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TARGET_NUCLEO_F030R8/stm32f0xx_rtc.h@80:8e73be2a2ac1, 2014-02-21 (annotated)

Committer:: emilmont
Date:: Fri Feb 21 12:21:39 2014 +0000
Revision:: 80:8e73be2a2ac1
Parent:: 77:869cf507173a
Child:: 81:7d30d6019079

First alpha release for the NRF51822 target (to be tested in the online IDE)

Who changed what in which revision?

User	Revision	Line number	New contents of line
emilmont	77:869cf507173a	1	/**
emilmont	77:869cf507173a	2	******************************************************************************
emilmont	77:869cf507173a	3	* @file stm32f0xx_rtc.h
emilmont	77:869cf507173a	4	* @author MCD Application Team
emilmont	77:869cf507173a	5	* @version V1.3.0
emilmont	77:869cf507173a	6	* @date 16-January-2014
emilmont	77:869cf507173a	7	* @brief This file contains all the functions prototypes for the RTC firmware
emilmont	77:869cf507173a	8	* library.
emilmont	77:869cf507173a	9	******************************************************************************
emilmont	77:869cf507173a	10	* @attention
emilmont	77:869cf507173a	11	*
emilmont	77:869cf507173a	12	* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
emilmont	77:869cf507173a	13	*
emilmont	77:869cf507173a	14	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
emilmont	77:869cf507173a	15	* You may not use this file except in compliance with the License.
emilmont	77:869cf507173a	16	* You may obtain a copy of the License at:
emilmont	77:869cf507173a	17	*
emilmont	77:869cf507173a	18	* http://www.st.com/software_license_agreement_liberty_v2
emilmont	77:869cf507173a	19	*
emilmont	77:869cf507173a	20	* Unless required by applicable law or agreed to in writing, software
emilmont	77:869cf507173a	21	* distributed under the License is distributed on an "AS IS" BASIS,
emilmont	77:869cf507173a	22	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont	77:869cf507173a	23	* See the License for the specific language governing permissions and
emilmont	77:869cf507173a	24	* limitations under the License.
emilmont	77:869cf507173a	25	*
emilmont	77:869cf507173a	26	******************************************************************************
emilmont	77:869cf507173a	27	*/
emilmont	77:869cf507173a	28
emilmont	77:869cf507173a	29	/* Define to prevent recursive inclusion -------------------------------------*/
emilmont	77:869cf507173a	30	#ifndef __STM32F0XX_RTC_H
emilmont	77:869cf507173a	31	#define __STM32F0XX_RTC_H
emilmont	77:869cf507173a	32
emilmont	77:869cf507173a	33	#ifdef __cplusplus
emilmont	77:869cf507173a	34	extern "C" {
emilmont	77:869cf507173a	35	#endif
emilmont	77:869cf507173a	36
emilmont	77:869cf507173a	37	/* Includes ------------------------------------------------------------------*/
emilmont	77:869cf507173a	38	#include "stm32f0xx.h"
emilmont	77:869cf507173a	39
emilmont	77:869cf507173a	40	/** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont	77:869cf507173a	41	* @{
emilmont	77:869cf507173a	42	*/
emilmont	77:869cf507173a	43
emilmont	77:869cf507173a	44	/** @addtogroup RTC
emilmont	77:869cf507173a	45	* @{
emilmont	77:869cf507173a	46	*/
emilmont	77:869cf507173a	47
emilmont	77:869cf507173a	48	/* Exported types ------------------------------------------------------------*/
emilmont	77:869cf507173a	49
emilmont	77:869cf507173a	50	/**
emilmont	77:869cf507173a	51	* @brief RTC Init structures definition
emilmont	77:869cf507173a	52	*/
emilmont	77:869cf507173a	53	typedef struct
emilmont	77:869cf507173a	54	{
emilmont	77:869cf507173a	55	uint32_t RTC_HourFormat; /*!< Specifies the RTC Hour Format.
emilmont	77:869cf507173a	56	This parameter can be a value of @ref RTC_Hour_Formats */
emilmont	77:869cf507173a	57
emilmont	77:869cf507173a	58	uint32_t RTC_AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
emilmont	77:869cf507173a	59	This parameter must be set to a value lower than 0x7F */
emilmont	77:869cf507173a	60
emilmont	77:869cf507173a	61	uint32_t RTC_SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
emilmont	77:869cf507173a	62	This parameter must be set to a value lower than 0x1FFF */
emilmont	77:869cf507173a	63	}RTC_InitTypeDef;
emilmont	77:869cf507173a	64
emilmont	77:869cf507173a	65	/**
emilmont	77:869cf507173a	66	* @brief RTC Time structure definition
emilmont	77:869cf507173a	67	*/
emilmont	77:869cf507173a	68	typedef struct
emilmont	77:869cf507173a	69	{
emilmont	77:869cf507173a	70	uint8_t RTC_Hours; /*!< Specifies the RTC Time Hour.
emilmont	77:869cf507173a	71	This parameter must be set to a value in the 0-12 range
emilmont	77:869cf507173a	72	if the RTC_HourFormat_12 is selected or 0-23 range if
emilmont	77:869cf507173a	73	the RTC_HourFormat_24 is selected. */
emilmont	77:869cf507173a	74
emilmont	77:869cf507173a	75	uint8_t RTC_Minutes; /*!< Specifies the RTC Time Minutes.
emilmont	77:869cf507173a	76	This parameter must be set to a value in the 0-59 range. */
emilmont	77:869cf507173a	77
emilmont	77:869cf507173a	78	uint8_t RTC_Seconds; /*!< Specifies the RTC Time Seconds.
emilmont	77:869cf507173a	79	This parameter must be set to a value in the 0-59 range. */
emilmont	77:869cf507173a	80
emilmont	77:869cf507173a	81	uint8_t RTC_H12; /*!< Specifies the RTC AM/PM Time.
emilmont	77:869cf507173a	82	This parameter can be a value of @ref RTC_AM_PM_Definitions */
emilmont	77:869cf507173a	83	}RTC_TimeTypeDef;
emilmont	77:869cf507173a	84
emilmont	77:869cf507173a	85	/**
emilmont	77:869cf507173a	86	* @brief RTC Date structure definition
emilmont	77:869cf507173a	87	*/
emilmont	77:869cf507173a	88	typedef struct
emilmont	77:869cf507173a	89	{
emilmont	77:869cf507173a	90	uint8_t RTC_WeekDay; /*!< Specifies the RTC Date WeekDay.
emilmont	77:869cf507173a	91	This parameter can be a value of @ref RTC_WeekDay_Definitions */
emilmont	77:869cf507173a	92
emilmont	77:869cf507173a	93	uint8_t RTC_Month; /*!< Specifies the RTC Date Month.
emilmont	77:869cf507173a	94	This parameter can be a value of @ref RTC_Month_Date_Definitions */
emilmont	77:869cf507173a	95
emilmont	77:869cf507173a	96	uint8_t RTC_Date; /*!< Specifies the RTC Date.
emilmont	77:869cf507173a	97	This parameter must be set to a value in the 1-31 range. */
emilmont	77:869cf507173a	98
emilmont	77:869cf507173a	99	uint8_t RTC_Year; /*!< Specifies the RTC Date Year.
emilmont	77:869cf507173a	100	This parameter must be set to a value in the 0-99 range. */
emilmont	77:869cf507173a	101	}RTC_DateTypeDef;
emilmont	77:869cf507173a	102
emilmont	77:869cf507173a	103	/**
emilmont	77:869cf507173a	104	* @brief RTC Alarm structure definition
emilmont	77:869cf507173a	105	*/
emilmont	77:869cf507173a	106	typedef struct
emilmont	77:869cf507173a	107	{
emilmont	77:869cf507173a	108	RTC_TimeTypeDef RTC_AlarmTime; /!< Specifies the RTC Alarm Time members. /
emilmont	77:869cf507173a	109
emilmont	77:869cf507173a	110	uint32_t RTC_AlarmMask; /*!< Specifies the RTC Alarm Masks.
emilmont	77:869cf507173a	111	This parameter can be a value of @ref RTC_AlarmMask_Definitions */
emilmont	77:869cf507173a	112
emilmont	77:869cf507173a	113	uint32_t RTC_AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
emilmont	77:869cf507173a	114	This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
emilmont	77:869cf507173a	115
emilmont	77:869cf507173a	116	uint8_t RTC_AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
emilmont	77:869cf507173a	117	This parameter must be set to a value in the 1-31 range
emilmont	77:869cf507173a	118	if the Alarm Date is selected.
emilmont	77:869cf507173a	119	This parameter can be a value of @ref RTC_WeekDay_Definitions
emilmont	77:869cf507173a	120	if the Alarm WeekDay is selected. */
emilmont	77:869cf507173a	121	}RTC_AlarmTypeDef;
emilmont	77:869cf507173a	122
emilmont	77:869cf507173a	123	/* Exported constants --------------------------------------------------------*/
emilmont	77:869cf507173a	124
emilmont	77:869cf507173a	125	/** @defgroup RTC_Exported_Constants
emilmont	77:869cf507173a	126	* @{
emilmont	77:869cf507173a	127	*/
emilmont	77:869cf507173a	128
emilmont	77:869cf507173a	129
emilmont	77:869cf507173a	130	/** @defgroup RTC_Hour_Formats
emilmont	77:869cf507173a	131	* @{
emilmont	77:869cf507173a	132	*/
emilmont	77:869cf507173a	133	#define RTC_HourFormat_24 ((uint32_t)0x00000000)
emilmont	77:869cf507173a	134	#define RTC_HourFormat_12 ((uint32_t)0x00000040)
emilmont	77:869cf507173a	135	#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HourFormat_12) \|\| \
emilmont	77:869cf507173a	136	((FORMAT) == RTC_HourFormat_24))
emilmont	77:869cf507173a	137	/**
emilmont	77:869cf507173a	138	* @}
emilmont	77:869cf507173a	139	*/
emilmont	77:869cf507173a	140
emilmont	77:869cf507173a	141	/** @defgroup RTC_Asynchronous_Predivider
emilmont	77:869cf507173a	142	* @{
emilmont	77:869cf507173a	143	*/
emilmont	77:869cf507173a	144	#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7F)
emilmont	77:869cf507173a	145
emilmont	77:869cf507173a	146	/**
emilmont	77:869cf507173a	147	* @}
emilmont	77:869cf507173a	148	*/
emilmont	77:869cf507173a	149
emilmont	77:869cf507173a	150
emilmont	77:869cf507173a	151	/** @defgroup RTC_Synchronous_Predivider
emilmont	77:869cf507173a	152	* @{
emilmont	77:869cf507173a	153	*/
emilmont	77:869cf507173a	154	#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFF)
emilmont	77:869cf507173a	155
emilmont	77:869cf507173a	156	/**
emilmont	77:869cf507173a	157	* @}
emilmont	77:869cf507173a	158	*/
emilmont	77:869cf507173a	159
emilmont	77:869cf507173a	160	/** @defgroup RTC_Time_Definitions
emilmont	77:869cf507173a	161	* @{
emilmont	77:869cf507173a	162	*/
emilmont	77:869cf507173a	163	#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0) && ((HOUR) <= 12))
emilmont	77:869cf507173a	164	#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23)
emilmont	77:869cf507173a	165	#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59)
emilmont	77:869cf507173a	166	#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59)
emilmont	77:869cf507173a	167
emilmont	77:869cf507173a	168	/**
emilmont	77:869cf507173a	169	* @}
emilmont	77:869cf507173a	170	*/
emilmont	77:869cf507173a	171
emilmont	77:869cf507173a	172	/** @defgroup RTC_AM_PM_Definitions
emilmont	77:869cf507173a	173	* @{
emilmont	77:869cf507173a	174	*/
emilmont	77:869cf507173a	175	#define RTC_H12_AM ((uint8_t)0x00)
emilmont	77:869cf507173a	176	#define RTC_H12_PM ((uint8_t)0x40)
emilmont	77:869cf507173a	177	#define IS_RTC_H12(PM) (((PM) == RTC_H12_AM) \|\| ((PM) == RTC_H12_PM))
emilmont	77:869cf507173a	178
emilmont	77:869cf507173a	179	/**
emilmont	77:869cf507173a	180	* @}
emilmont	77:869cf507173a	181	*/
emilmont	77:869cf507173a	182
emilmont	77:869cf507173a	183	/** @defgroup RTC_Year_Date_Definitions
emilmont	77:869cf507173a	184	* @{
emilmont	77:869cf507173a	185	*/
emilmont	77:869cf507173a	186	#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99)
emilmont	77:869cf507173a	187
emilmont	77:869cf507173a	188	/**
emilmont	77:869cf507173a	189	* @}
emilmont	77:869cf507173a	190	*/
emilmont	77:869cf507173a	191
emilmont	77:869cf507173a	192	/** @defgroup RTC_Month_Date_Definitions
emilmont	77:869cf507173a	193	* @{
emilmont	77:869cf507173a	194	*/
emilmont	77:869cf507173a	195	#define RTC_Month_January ((uint8_t)0x01)
emilmont	77:869cf507173a	196	#define RTC_Month_February ((uint8_t)0x02)
emilmont	77:869cf507173a	197	#define RTC_Month_March ((uint8_t)0x03)
emilmont	77:869cf507173a	198	#define RTC_Month_April ((uint8_t)0x04)
emilmont	77:869cf507173a	199	#define RTC_Month_May ((uint8_t)0x05)
emilmont	77:869cf507173a	200	#define RTC_Month_June ((uint8_t)0x06)
emilmont	77:869cf507173a	201	#define RTC_Month_July ((uint8_t)0x07)
emilmont	77:869cf507173a	202	#define RTC_Month_August ((uint8_t)0x08)
emilmont	77:869cf507173a	203	#define RTC_Month_September ((uint8_t)0x09)
emilmont	77:869cf507173a	204	#define RTC_Month_October ((uint8_t)0x10)
emilmont	77:869cf507173a	205	#define RTC_Month_November ((uint8_t)0x11)
emilmont	77:869cf507173a	206	#define RTC_Month_December ((uint8_t)0x12)
emilmont	77:869cf507173a	207	#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1) && ((MONTH) <= 12))
emilmont	77:869cf507173a	208	#define IS_RTC_DATE(DATE) (((DATE) >= 1) && ((DATE) <= 31))
emilmont	77:869cf507173a	209
emilmont	77:869cf507173a	210	/**
emilmont	77:869cf507173a	211	* @}
emilmont	77:869cf507173a	212	*/
emilmont	77:869cf507173a	213
emilmont	77:869cf507173a	214	/** @defgroup RTC_WeekDay_Definitions
emilmont	77:869cf507173a	215	* @{
emilmont	77:869cf507173a	216	*/
emilmont	77:869cf507173a	217
emilmont	77:869cf507173a	218	#define RTC_Weekday_Monday ((uint8_t)0x01)
emilmont	77:869cf507173a	219	#define RTC_Weekday_Tuesday ((uint8_t)0x02)
emilmont	77:869cf507173a	220	#define RTC_Weekday_Wednesday ((uint8_t)0x03)
emilmont	77:869cf507173a	221	#define RTC_Weekday_Thursday ((uint8_t)0x04)
emilmont	77:869cf507173a	222	#define RTC_Weekday_Friday ((uint8_t)0x05)
emilmont	77:869cf507173a	223	#define RTC_Weekday_Saturday ((uint8_t)0x6)
emilmont	77:869cf507173a	224	#define RTC_Weekday_Sunday ((uint8_t)0x07)
emilmont	77:869cf507173a	225	#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) \|\| \
emilmont	77:869cf507173a	226	((WEEKDAY) == RTC_Weekday_Tuesday) \|\| \
emilmont	77:869cf507173a	227	((WEEKDAY) == RTC_Weekday_Wednesday) \|\| \
emilmont	77:869cf507173a	228	((WEEKDAY) == RTC_Weekday_Thursday) \|\| \
emilmont	77:869cf507173a	229	((WEEKDAY) == RTC_Weekday_Friday) \|\| \
emilmont	77:869cf507173a	230	((WEEKDAY) == RTC_Weekday_Saturday) \|\| \
emilmont	77:869cf507173a	231	((WEEKDAY) == RTC_Weekday_Sunday))
emilmont	77:869cf507173a	232	/**
emilmont	77:869cf507173a	233	* @}
emilmont	77:869cf507173a	234	*/
emilmont	77:869cf507173a	235
emilmont	77:869cf507173a	236
emilmont	77:869cf507173a	237	/** @defgroup RTC_Alarm_Definitions
emilmont	77:869cf507173a	238	* @{
emilmont	77:869cf507173a	239	*/
emilmont	77:869cf507173a	240	#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0) && ((DATE) <= 31))
emilmont	77:869cf507173a	241	#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) \|\| \
emilmont	77:869cf507173a	242	((WEEKDAY) == RTC_Weekday_Tuesday) \|\| \
emilmont	77:869cf507173a	243	((WEEKDAY) == RTC_Weekday_Wednesday) \|\| \
emilmont	77:869cf507173a	244	((WEEKDAY) == RTC_Weekday_Thursday) \|\| \
emilmont	77:869cf507173a	245	((WEEKDAY) == RTC_Weekday_Friday) \|\| \
emilmont	77:869cf507173a	246	((WEEKDAY) == RTC_Weekday_Saturday) \|\| \
emilmont	77:869cf507173a	247	((WEEKDAY) == RTC_Weekday_Sunday))
emilmont	77:869cf507173a	248
emilmont	77:869cf507173a	249	/**
emilmont	77:869cf507173a	250	* @}
emilmont	77:869cf507173a	251	*/
emilmont	77:869cf507173a	252
emilmont	77:869cf507173a	253
emilmont	77:869cf507173a	254	/** @defgroup RTC_AlarmDateWeekDay_Definitions
emilmont	77:869cf507173a	255	* @{
emilmont	77:869cf507173a	256	*/
emilmont	77:869cf507173a	257	#define RTC_AlarmDateWeekDaySel_Date ((uint32_t)0x00000000)
emilmont	77:869cf507173a	258	#define RTC_AlarmDateWeekDaySel_WeekDay ((uint32_t)0x40000000)
emilmont	77:869cf507173a	259
emilmont	77:869cf507173a	260	#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_AlarmDateWeekDaySel_Date) \|\| \
emilmont	77:869cf507173a	261	((SEL) == RTC_AlarmDateWeekDaySel_WeekDay))
emilmont	77:869cf507173a	262
emilmont	77:869cf507173a	263	/**
emilmont	77:869cf507173a	264	* @}
emilmont	77:869cf507173a	265	*/
emilmont	77:869cf507173a	266
emilmont	77:869cf507173a	267
emilmont	77:869cf507173a	268	/** @defgroup RTC_AlarmMask_Definitions
emilmont	77:869cf507173a	269	* @{
emilmont	77:869cf507173a	270	*/
emilmont	77:869cf507173a	271	#define RTC_AlarmMask_None ((uint32_t)0x00000000)
emilmont	77:869cf507173a	272	#define RTC_AlarmMask_DateWeekDay ((uint32_t)0x80000000)
emilmont	77:869cf507173a	273	#define RTC_AlarmMask_Hours ((uint32_t)0x00800000)
emilmont	77:869cf507173a	274	#define RTC_AlarmMask_Minutes ((uint32_t)0x00008000)
emilmont	77:869cf507173a	275	#define RTC_AlarmMask_Seconds ((uint32_t)0x00000080)
emilmont	77:869cf507173a	276	#define RTC_AlarmMask_All ((uint32_t)0x80808080)
emilmont	77:869cf507173a	277	#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
emilmont	77:869cf507173a	278
emilmont	77:869cf507173a	279	/**
emilmont	77:869cf507173a	280	* @}
emilmont	77:869cf507173a	281	*/
emilmont	77:869cf507173a	282
emilmont	77:869cf507173a	283	/** @defgroup RTC_Alarms_Definitions
emilmont	77:869cf507173a	284	* @{
emilmont	77:869cf507173a	285	*/
emilmont	77:869cf507173a	286	#define RTC_Alarm_A ((uint32_t)0x00000100)
emilmont	77:869cf507173a	287	#define IS_RTC_ALARM(ALARM) ((ALARM) == RTC_Alarm_A)
emilmont	77:869cf507173a	288	#define IS_RTC_CMD_ALARM(ALARM) (((ALARM) & (RTC_Alarm_A)) != (uint32_t)RESET)
emilmont	77:869cf507173a	289
emilmont	77:869cf507173a	290	/**
emilmont	77:869cf507173a	291	* @}
emilmont	77:869cf507173a	292	*/
emilmont	77:869cf507173a	293
emilmont	77:869cf507173a	294	/** @defgroup RTC_Alarm_Sub_Seconds_Masks Definitions.
emilmont	77:869cf507173a	295	* @{
emilmont	77:869cf507173a	296	*/
emilmont	77:869cf507173a	297	#define RTC_AlarmSubSecondMask_All ((uint8_t)0x00) /*!< All Alarm SS fields are masked.
emilmont	77:869cf507173a	298	There is no comparison on sub seconds
emilmont	77:869cf507173a	299	for Alarm */
emilmont	77:869cf507173a	300	#define RTC_AlarmSubSecondMask_SS14_1 ((uint8_t)0x01) /*!< SS[14:1] are don't care in Alarm
emilmont	77:869cf507173a	301	comparison. Only SS[0] is compared. */
emilmont	77:869cf507173a	302	#define RTC_AlarmSubSecondMask_SS14_2 ((uint8_t)0x02) /*!< SS[14:2] are don't care in Alarm
emilmont	77:869cf507173a	303	comparison. Only SS[1:0] are compared */
emilmont	77:869cf507173a	304	#define RTC_AlarmSubSecondMask_SS14_3 ((uint8_t)0x03) /*!< SS[14:3] are don't care in Alarm
emilmont	77:869cf507173a	305	comparison. Only SS[2:0] are compared */
emilmont	77:869cf507173a	306	#define RTC_AlarmSubSecondMask_SS14_4 ((uint8_t)0x04) /*!< SS[14:4] are don't care in Alarm
emilmont	77:869cf507173a	307	comparison. Only SS[3:0] are compared */
emilmont	77:869cf507173a	308	#define RTC_AlarmSubSecondMask_SS14_5 ((uint8_t)0x05) /*!< SS[14:5] are don't care in Alarm
emilmont	77:869cf507173a	309	comparison. Only SS[4:0] are compared */
emilmont	77:869cf507173a	310	#define RTC_AlarmSubSecondMask_SS14_6 ((uint8_t)0x06) /*!< SS[14:6] are don't care in Alarm
emilmont	77:869cf507173a	311	comparison. Only SS[5:0] are compared */
emilmont	77:869cf507173a	312	#define RTC_AlarmSubSecondMask_SS14_7 ((uint8_t)0x07) /*!< SS[14:7] are don't care in Alarm
emilmont	77:869cf507173a	313	comparison. Only SS[6:0] are compared */
emilmont	77:869cf507173a	314	#define RTC_AlarmSubSecondMask_SS14_8 ((uint8_t)0x08) /*!< SS[14:8] are don't care in Alarm
emilmont	77:869cf507173a	315	comparison. Only SS[7:0] are compared */
emilmont	77:869cf507173a	316	#define RTC_AlarmSubSecondMask_SS14_9 ((uint8_t)0x09) /*!< SS[14:9] are don't care in Alarm
emilmont	77:869cf507173a	317	comparison. Only SS[8:0] are compared */
emilmont	77:869cf507173a	318	#define RTC_AlarmSubSecondMask_SS14_10 ((uint8_t)0x0A) /*!< SS[14:10] are don't care in Alarm
emilmont	77:869cf507173a	319	comparison. Only SS[9:0] are compared */
emilmont	77:869cf507173a	320	#define RTC_AlarmSubSecondMask_SS14_11 ((uint8_t)0x0B) /*!< SS[14:11] are don't care in Alarm
emilmont	77:869cf507173a	321	comparison. Only SS[10:0] are compared */
emilmont	77:869cf507173a	322	#define RTC_AlarmSubSecondMask_SS14_12 ((uint8_t)0x0C) /*!< SS[14:12] are don't care in Alarm
emilmont	77:869cf507173a	323	comparison.Only SS[11:0] are compared */
emilmont	77:869cf507173a	324	#define RTC_AlarmSubSecondMask_SS14_13 ((uint8_t)0x0D) /*!< SS[14:13] are don't care in Alarm
emilmont	77:869cf507173a	325	comparison. Only SS[12:0] are compared */
emilmont	77:869cf507173a	326	#define RTC_AlarmSubSecondMask_SS14 ((uint8_t)0x0E) /*!< SS[14] is don't care in Alarm
emilmont	77:869cf507173a	327	comparison.Only SS[13:0] are compared */
emilmont	77:869cf507173a	328	#define RTC_AlarmSubSecondMask_None ((uint8_t)0x0F) /*!< SS[14:0] are compared and must match
emilmont	77:869cf507173a	329	to activate alarm. */
emilmont	77:869cf507173a	330	#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) \|\| \
emilmont	77:869cf507173a	331	((MASK) == RTC_AlarmSubSecondMask_SS14_1) \|\| \
emilmont	77:869cf507173a	332	((MASK) == RTC_AlarmSubSecondMask_SS14_2) \|\| \
emilmont	77:869cf507173a	333	((MASK) == RTC_AlarmSubSecondMask_SS14_3) \|\| \
emilmont	77:869cf507173a	334	((MASK) == RTC_AlarmSubSecondMask_SS14_4) \|\| \
emilmont	77:869cf507173a	335	((MASK) == RTC_AlarmSubSecondMask_SS14_5) \|\| \
emilmont	77:869cf507173a	336	((MASK) == RTC_AlarmSubSecondMask_SS14_6) \|\| \
emilmont	77:869cf507173a	337	((MASK) == RTC_AlarmSubSecondMask_SS14_7) \|\| \
emilmont	77:869cf507173a	338	((MASK) == RTC_AlarmSubSecondMask_SS14_8) \|\| \
emilmont	77:869cf507173a	339	((MASK) == RTC_AlarmSubSecondMask_SS14_9) \|\| \
emilmont	77:869cf507173a	340	((MASK) == RTC_AlarmSubSecondMask_SS14_10) \|\| \
emilmont	77:869cf507173a	341	((MASK) == RTC_AlarmSubSecondMask_SS14_11) \|\| \
emilmont	77:869cf507173a	342	((MASK) == RTC_AlarmSubSecondMask_SS14_12) \|\| \
emilmont	77:869cf507173a	343	((MASK) == RTC_AlarmSubSecondMask_SS14_13) \|\| \
emilmont	77:869cf507173a	344	((MASK) == RTC_AlarmSubSecondMask_SS14) \|\| \
emilmont	77:869cf507173a	345	((MASK) == RTC_AlarmSubSecondMask_None))
emilmont	77:869cf507173a	346	/**
emilmont	77:869cf507173a	347	* @}
emilmont	77:869cf507173a	348	*/
emilmont	77:869cf507173a	349
emilmont	77:869cf507173a	350	/** @defgroup RTC_Alarm_Sub_Seconds_Value
emilmont	77:869cf507173a	351	* @{
emilmont	77:869cf507173a	352	*/
emilmont	77:869cf507173a	353
emilmont	77:869cf507173a	354	#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFF)
emilmont	77:869cf507173a	355
emilmont	77:869cf507173a	356	/**
emilmont	77:869cf507173a	357	* @}
emilmont	77:869cf507173a	358	*/
emilmont	77:869cf507173a	359
emilmont	77:869cf507173a	360	/** @defgroup RTC_Wakeup_Timer_Definitions
emilmont	77:869cf507173a	361	* @brief These parameters are only available for STM32F072 devices
emilmont	77:869cf507173a	362	* @{
emilmont	77:869cf507173a	363	*/
emilmont	77:869cf507173a	364	#define RTC_WakeUpClock_RTCCLK_Div16 ((uint32_t)0x00000000)
emilmont	77:869cf507173a	365	#define RTC_WakeUpClock_RTCCLK_Div8 ((uint32_t)0x00000001)
emilmont	77:869cf507173a	366	#define RTC_WakeUpClock_RTCCLK_Div4 ((uint32_t)0x00000002)
emilmont	77:869cf507173a	367	#define RTC_WakeUpClock_RTCCLK_Div2 ((uint32_t)0x00000003)
emilmont	77:869cf507173a	368	#define RTC_WakeUpClock_CK_SPRE_16bits ((uint32_t)0x00000004)
emilmont	77:869cf507173a	369	#define RTC_WakeUpClock_CK_SPRE_17bits ((uint32_t)0x00000006)
emilmont	77:869cf507173a	370	#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WakeUpClock_RTCCLK_Div16) \|\| \
emilmont	77:869cf507173a	371	((CLOCK) == RTC_WakeUpClock_RTCCLK_Div8) \|\| \
emilmont	77:869cf507173a	372	((CLOCK) == RTC_WakeUpClock_RTCCLK_Div4) \|\| \
emilmont	77:869cf507173a	373	((CLOCK) == RTC_WakeUpClock_RTCCLK_Div2) \|\| \
emilmont	77:869cf507173a	374	((CLOCK) == RTC_WakeUpClock_CK_SPRE_16bits) \|\| \
emilmont	77:869cf507173a	375	((CLOCK) == RTC_WakeUpClock_CK_SPRE_17bits))
emilmont	77:869cf507173a	376	#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
emilmont	77:869cf507173a	377	/**
emilmont	77:869cf507173a	378	* @}
emilmont	77:869cf507173a	379	*/
emilmont	77:869cf507173a	380
emilmont	77:869cf507173a	381	/** @defgroup RTC_Time_Stamp_Edges_definitions
emilmont	77:869cf507173a	382	* @{
emilmont	77:869cf507173a	383	*/
emilmont	77:869cf507173a	384	#define RTC_TimeStampEdge_Rising ((uint32_t)0x00000000)
emilmont	77:869cf507173a	385	#define RTC_TimeStampEdge_Falling ((uint32_t)0x00000008)
emilmont	77:869cf507173a	386	#define IS_RTC_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TimeStampEdge_Rising) \|\| \
emilmont	77:869cf507173a	387	((EDGE) == RTC_TimeStampEdge_Falling))
emilmont	77:869cf507173a	388	/**
emilmont	77:869cf507173a	389	* @}
emilmont	77:869cf507173a	390	*/
emilmont	77:869cf507173a	391
emilmont	77:869cf507173a	392	/** @defgroup RTC_Output_selection_Definitions
emilmont	77:869cf507173a	393	* @{
emilmont	77:869cf507173a	394	*/
emilmont	77:869cf507173a	395	#define RTC_Output_Disable ((uint32_t)0x00000000)
emilmont	77:869cf507173a	396	#define RTC_Output_AlarmA ((uint32_t)0x00200000)
emilmont	77:869cf507173a	397	#define RTC_Output_WakeUp ((uint32_t)0x00600000) /!< available only for STM32F072 devices /
emilmont	77:869cf507173a	398
emilmont	77:869cf507173a	399	#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_Output_Disable) \|\| \
emilmont	77:869cf507173a	400	((OUTPUT) == RTC_Output_AlarmA) \|\| \
emilmont	77:869cf507173a	401	((OUTPUT) == RTC_Output_WakeUp))
emilmont	77:869cf507173a	402
emilmont	77:869cf507173a	403	/**
emilmont	77:869cf507173a	404	* @}
emilmont	77:869cf507173a	405	*/
emilmont	77:869cf507173a	406
emilmont	77:869cf507173a	407	/** @defgroup RTC_Output_Polarity_Definitions
emilmont	77:869cf507173a	408	* @{
emilmont	77:869cf507173a	409	*/
emilmont	77:869cf507173a	410	#define RTC_OutputPolarity_High ((uint32_t)0x00000000)
emilmont	77:869cf507173a	411	#define RTC_OutputPolarity_Low ((uint32_t)0x00100000)
emilmont	77:869cf507173a	412	#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) \|\| \
emilmont	77:869cf507173a	413	((POL) == RTC_OutputPolarity_Low))
emilmont	77:869cf507173a	414	/**
emilmont	77:869cf507173a	415	* @}
emilmont	77:869cf507173a	416	*/
emilmont	77:869cf507173a	417
emilmont	77:869cf507173a	418
emilmont	77:869cf507173a	419	/** @defgroup RTC_Calib_Output_selection_Definitions
emilmont	77:869cf507173a	420	* @{
emilmont	77:869cf507173a	421	*/
emilmont	77:869cf507173a	422	#define RTC_CalibOutput_512Hz ((uint32_t)0x00000000)
emilmont	77:869cf507173a	423	#define RTC_CalibOutput_1Hz ((uint32_t)0x00080000)
emilmont	77:869cf507173a	424	#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CalibOutput_512Hz) \|\| \
emilmont	77:869cf507173a	425	((OUTPUT) == RTC_CalibOutput_1Hz))
emilmont	77:869cf507173a	426	/**
emilmont	77:869cf507173a	427	* @}
emilmont	77:869cf507173a	428	*/
emilmont	77:869cf507173a	429
emilmont	77:869cf507173a	430	/** @defgroup RTC_Smooth_calib_period_Definitions
emilmont	77:869cf507173a	431	* @{
emilmont	77:869cf507173a	432	*/
emilmont	77:869cf507173a	433	#define RTC_SmoothCalibPeriod_32sec ((uint32_t)0x00000000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont	77:869cf507173a	434	period is 32s, else 2exp20 RTCCLK seconds */
emilmont	77:869cf507173a	435	#define RTC_SmoothCalibPeriod_16sec ((uint32_t)0x00002000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont	77:869cf507173a	436	period is 16s, else 2exp19 RTCCLK seconds */
emilmont	77:869cf507173a	437	#define RTC_SmoothCalibPeriod_8sec ((uint32_t)0x00004000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont	77:869cf507173a	438	period is 8s, else 2exp18 RTCCLK seconds */
emilmont	77:869cf507173a	439	#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SmoothCalibPeriod_32sec) \|\| \
emilmont	77:869cf507173a	440	((PERIOD) == RTC_SmoothCalibPeriod_16sec) \|\| \
emilmont	77:869cf507173a	441	((PERIOD) == RTC_SmoothCalibPeriod_8sec))
emilmont	77:869cf507173a	442
emilmont	77:869cf507173a	443	/**
emilmont	77:869cf507173a	444	* @}
emilmont	77:869cf507173a	445	*/
emilmont	77:869cf507173a	446
emilmont	77:869cf507173a	447	/** @defgroup RTC_Smooth_calib_Plus_pulses_Definitions
emilmont	77:869cf507173a	448	* @{
emilmont	77:869cf507173a	449	*/
emilmont	77:869cf507173a	450	#define RTC_SmoothCalibPlusPulses_Set ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added
emilmont	77:869cf507173a	451	during a X -second window = Y - CALM[8:0].
emilmont	77:869cf507173a	452	with Y = 512, 256, 128 when X = 32, 16, 8 */
emilmont	77:869cf507173a	453	#define RTC_SmoothCalibPlusPulses_Reset ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited
emilmont	77:869cf507173a	454	during a 32-second window = CALM[8:0]. */
emilmont	77:869cf507173a	455	#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SmoothCalibPlusPulses_Set) \|\| \
emilmont	77:869cf507173a	456	((PLUS) == RTC_SmoothCalibPlusPulses_Reset))
emilmont	77:869cf507173a	457
emilmont	77:869cf507173a	458	/**
emilmont	77:869cf507173a	459	* @}
emilmont	77:869cf507173a	460	*/
emilmont	77:869cf507173a	461
emilmont	77:869cf507173a	462	/** @defgroup RTC_Smooth_calib_Minus_pulses_Definitions
emilmont	77:869cf507173a	463	* @{
emilmont	77:869cf507173a	464	*/
emilmont	77:869cf507173a	465	#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF)
emilmont	77:869cf507173a	466
emilmont	77:869cf507173a	467	/**
emilmont	77:869cf507173a	468	* @}
emilmont	77:869cf507173a	469	*/
emilmont	77:869cf507173a	470
emilmont	77:869cf507173a	471	/** @defgroup RTC_DayLightSaving_Definitions
emilmont	77:869cf507173a	472	* @{
emilmont	77:869cf507173a	473	*/
emilmont	77:869cf507173a	474	#define RTC_DayLightSaving_SUB1H ((uint32_t)0x00020000)
emilmont	77:869cf507173a	475	#define RTC_DayLightSaving_ADD1H ((uint32_t)0x00010000)
emilmont	77:869cf507173a	476	#define IS_RTC_DAYLIGHT_SAVING(SAVING) (((SAVING) == RTC_DayLightSaving_SUB1H) \|\| \
emilmont	77:869cf507173a	477	((SAVING) == RTC_DayLightSaving_ADD1H))
emilmont	77:869cf507173a	478
emilmont	77:869cf507173a	479	#define RTC_StoreOperation_Reset ((uint32_t)0x00000000)
emilmont	77:869cf507173a	480	#define RTC_StoreOperation_Set ((uint32_t)0x00040000)
emilmont	77:869cf507173a	481	#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_StoreOperation_Reset) \|\| \
emilmont	77:869cf507173a	482	((OPERATION) == RTC_StoreOperation_Set))
emilmont	77:869cf507173a	483	/**
emilmont	77:869cf507173a	484	* @}
emilmont	77:869cf507173a	485	*/
emilmont	77:869cf507173a	486
emilmont	77:869cf507173a	487	/** @defgroup RTC_Tamper_Trigger_Definitions
emilmont	77:869cf507173a	488	* @{
emilmont	77:869cf507173a	489	*/
emilmont	77:869cf507173a	490	#define RTC_TamperTrigger_RisingEdge ((uint32_t)0x00000000)
emilmont	77:869cf507173a	491	#define RTC_TamperTrigger_FallingEdge ((uint32_t)0x00000001)
emilmont	77:869cf507173a	492	#define RTC_TamperTrigger_LowLevel ((uint32_t)0x00000000)
emilmont	77:869cf507173a	493	#define RTC_TamperTrigger_HighLevel ((uint32_t)0x00000001)
emilmont	77:869cf507173a	494	#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TamperTrigger_RisingEdge) \|\| \
emilmont	77:869cf507173a	495	((TRIGGER) == RTC_TamperTrigger_FallingEdge) \|\| \
emilmont	77:869cf507173a	496	((TRIGGER) == RTC_TamperTrigger_LowLevel) \|\| \
emilmont	77:869cf507173a	497	((TRIGGER) == RTC_TamperTrigger_HighLevel))
emilmont	77:869cf507173a	498
emilmont	77:869cf507173a	499	/**
emilmont	77:869cf507173a	500	* @}
emilmont	77:869cf507173a	501	*/
emilmont	77:869cf507173a	502
emilmont	77:869cf507173a	503	/** @defgroup RTC_Tamper_Filter_Definitions
emilmont	77:869cf507173a	504	* @{
emilmont	77:869cf507173a	505	*/
emilmont	77:869cf507173a	506	#define RTC_TamperFilter_Disable ((uint32_t)0x00000000) /!< Tamper filter is disabled /
emilmont	77:869cf507173a	507
emilmont	77:869cf507173a	508	#define RTC_TamperFilter_2Sample ((uint32_t)0x00000800) /*!< Tamper is activated after 2
emilmont	77:869cf507173a	509	consecutive samples at the active level */
emilmont	77:869cf507173a	510	#define RTC_TamperFilter_4Sample ((uint32_t)0x00001000) /*!< Tamper is activated after 4
emilmont	77:869cf507173a	511	consecutive samples at the active level */
emilmont	77:869cf507173a	512	#define RTC_TamperFilter_8Sample ((uint32_t)0x00001800) /*!< Tamper is activated after 8
emilmont	77:869cf507173a	513	consecutive samples at the active leve. */
emilmont	77:869cf507173a	514	#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TamperFilter_Disable) \|\| \
emilmont	77:869cf507173a	515	((FILTER) == RTC_TamperFilter_2Sample) \|\| \
emilmont	77:869cf507173a	516	((FILTER) == RTC_TamperFilter_4Sample) \|\| \
emilmont	77:869cf507173a	517	((FILTER) == RTC_TamperFilter_8Sample))
emilmont	77:869cf507173a	518	/**
emilmont	77:869cf507173a	519	* @}
emilmont	77:869cf507173a	520	*/
emilmont	77:869cf507173a	521
emilmont	77:869cf507173a	522	/** @defgroup RTC_Tamper_Sampling_Frequencies_Definitions
emilmont	77:869cf507173a	523	* @{
emilmont	77:869cf507173a	524	*/
emilmont	77:869cf507173a	525	#define RTC_TamperSamplingFreq_RTCCLK_Div32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	526	with a frequency = RTCCLK / 32768 */
emilmont	77:869cf507173a	527	#define RTC_TamperSamplingFreq_RTCCLK_Div16384 ((uint32_t)0x00000100) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	528	with a frequency = RTCCLK / 16384 */
emilmont	77:869cf507173a	529	#define RTC_TamperSamplingFreq_RTCCLK_Div8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	530	with a frequency = RTCCLK / 8192 */
emilmont	77:869cf507173a	531	#define RTC_TamperSamplingFreq_RTCCLK_Div4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	532	with a frequency = RTCCLK / 4096 */
emilmont	77:869cf507173a	533	#define RTC_TamperSamplingFreq_RTCCLK_Div2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	534	with a frequency = RTCCLK / 2048 */
emilmont	77:869cf507173a	535	#define RTC_TamperSamplingFreq_RTCCLK_Div1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	536	with a frequency = RTCCLK / 1024 */
emilmont	77:869cf507173a	537	#define RTC_TamperSamplingFreq_RTCCLK_Div512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	538	with a frequency = RTCCLK / 512 */
emilmont	77:869cf507173a	539	#define RTC_TamperSamplingFreq_RTCCLK_Div256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled
emilmont	77:869cf507173a	540	with a frequency = RTCCLK / 256 */
emilmont	77:869cf507173a	541	#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div32768) \|\| \
emilmont	77:869cf507173a	542	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div16384) \|\| \
emilmont	77:869cf507173a	543	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div8192) \|\| \
emilmont	77:869cf507173a	544	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div4096) \|\| \
emilmont	77:869cf507173a	545	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div2048) \|\| \
emilmont	77:869cf507173a	546	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div1024) \|\| \
emilmont	77:869cf507173a	547	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div512) \|\| \
emilmont	77:869cf507173a	548	((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div256))
emilmont	77:869cf507173a	549
emilmont	77:869cf507173a	550	/**
emilmont	77:869cf507173a	551	* @}
emilmont	77:869cf507173a	552	*/
emilmont	77:869cf507173a	553
emilmont	77:869cf507173a	554	/** @defgroup RTC_Tamper_Pin_Precharge_Duration_Definitions
emilmont	77:869cf507173a	555	* @{
emilmont	77:869cf507173a	556	*/
emilmont	77:869cf507173a	557	#define RTC_TamperPrechargeDuration_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before
emilmont	77:869cf507173a	558	sampling during 1 RTCCLK cycle */
emilmont	77:869cf507173a	559	#define RTC_TamperPrechargeDuration_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before
emilmont	77:869cf507173a	560	sampling during 2 RTCCLK cycles */
emilmont	77:869cf507173a	561	#define RTC_TamperPrechargeDuration_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before
emilmont	77:869cf507173a	562	sampling during 4 RTCCLK cycles */
emilmont	77:869cf507173a	563	#define RTC_TamperPrechargeDuration_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before
emilmont	77:869cf507173a	564	sampling during 8 RTCCLK cycles */
emilmont	77:869cf507173a	565
emilmont	77:869cf507173a	566	#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TamperPrechargeDuration_1RTCCLK) \|\| \
emilmont	77:869cf507173a	567	((DURATION) == RTC_TamperPrechargeDuration_2RTCCLK) \|\| \
emilmont	77:869cf507173a	568	((DURATION) == RTC_TamperPrechargeDuration_4RTCCLK) \|\| \
emilmont	77:869cf507173a	569	((DURATION) == RTC_TamperPrechargeDuration_8RTCCLK))
emilmont	77:869cf507173a	570	/**
emilmont	77:869cf507173a	571	* @}
emilmont	77:869cf507173a	572	*/
emilmont	77:869cf507173a	573
emilmont	77:869cf507173a	574	/** @defgroup RTC_Tamper_Pins_Definitions
emilmont	77:869cf507173a	575	* @{
emilmont	77:869cf507173a	576	*/
emilmont	77:869cf507173a	577	#define RTC_Tamper_1 RTC_TAFCR_TAMP1E /*!< Tamper detection enable for
emilmont	77:869cf507173a	578	input tamper 1 */
emilmont	77:869cf507173a	579	#define RTC_Tamper_2 RTC_TAFCR_TAMP2E /*!< Tamper detection enable for
emilmont	77:869cf507173a	580	input tamper 2 */
emilmont	77:869cf507173a	581	#define RTC_Tamper_3 RTC_TAFCR_TAMP3E /*!< Tamper detection enable for
emilmont	77:869cf507173a	582	input tamper 3, available only
emilmont	77:869cf507173a	583	for STM32F072 devices */
emilmont	77:869cf507173a	584	#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET))
emilmont	77:869cf507173a	585
emilmont	77:869cf507173a	586	/**
emilmont	77:869cf507173a	587	* @}
emilmont	77:869cf507173a	588	*/
emilmont	77:869cf507173a	589
emilmont	77:869cf507173a	590	/** @defgroup RTC_Output_Type_ALARM_OUT
emilmont	77:869cf507173a	591	* @{
emilmont	77:869cf507173a	592	*/
emilmont	77:869cf507173a	593	#define RTC_OutputType_OpenDrain ((uint32_t)0x00000000)
emilmont	77:869cf507173a	594	#define RTC_OutputType_PushPull ((uint32_t)0x00040000)
emilmont	77:869cf507173a	595	#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OutputType_OpenDrain) \|\| \
emilmont	77:869cf507173a	596	((TYPE) == RTC_OutputType_PushPull))
emilmont	77:869cf507173a	597
emilmont	77:869cf507173a	598	/**
emilmont	77:869cf507173a	599	* @}
emilmont	77:869cf507173a	600	*/
emilmont	77:869cf507173a	601
emilmont	77:869cf507173a	602	/** @defgroup RTC_Add_1_Second_Parameter_Definitions
emilmont	77:869cf507173a	603	* @{
emilmont	77:869cf507173a	604	*/
emilmont	77:869cf507173a	605	#define RTC_ShiftAdd1S_Reset ((uint32_t)0x00000000)
emilmont	77:869cf507173a	606	#define RTC_ShiftAdd1S_Set ((uint32_t)0x80000000)
emilmont	77:869cf507173a	607	#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_ShiftAdd1S_Reset) \|\| \
emilmont	77:869cf507173a	608	((SEL) == RTC_ShiftAdd1S_Set))
emilmont	77:869cf507173a	609	/**
emilmont	77:869cf507173a	610	* @}
emilmont	77:869cf507173a	611	*/
emilmont	77:869cf507173a	612
emilmont	77:869cf507173a	613	/** @defgroup RTC_Substract_Fraction_Of_Second_Value
emilmont	77:869cf507173a	614	* @{
emilmont	77:869cf507173a	615	*/
emilmont	77:869cf507173a	616	#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF)
emilmont	77:869cf507173a	617
emilmont	77:869cf507173a	618	/**
emilmont	77:869cf507173a	619	* @}
emilmont	77:869cf507173a	620	*/
emilmont	77:869cf507173a	621
emilmont	77:869cf507173a	622	/** @defgroup RTC_Backup_Registers_Definitions
emilmont	77:869cf507173a	623	* @{
emilmont	77:869cf507173a	624	*/
emilmont	77:869cf507173a	625
emilmont	77:869cf507173a	626	#define RTC_BKP_DR0 ((uint32_t)0x00000000)
emilmont	77:869cf507173a	627	#define RTC_BKP_DR1 ((uint32_t)0x00000001)
emilmont	77:869cf507173a	628	#define RTC_BKP_DR2 ((uint32_t)0x00000002)
emilmont	77:869cf507173a	629	#define RTC_BKP_DR3 ((uint32_t)0x00000003)
emilmont	77:869cf507173a	630	#define RTC_BKP_DR4 ((uint32_t)0x00000004)
emilmont	77:869cf507173a	631	#define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) \|\| \
emilmont	77:869cf507173a	632	((BKP) == RTC_BKP_DR1) \|\| \
emilmont	77:869cf507173a	633	((BKP) == RTC_BKP_DR2) \|\| \
emilmont	77:869cf507173a	634	((BKP) == RTC_BKP_DR3) \|\| \
emilmont	77:869cf507173a	635	((BKP) == RTC_BKP_DR4))
emilmont	77:869cf507173a	636	/**
emilmont	77:869cf507173a	637	* @}
emilmont	77:869cf507173a	638	*/
emilmont	77:869cf507173a	639
emilmont	77:869cf507173a	640	/** @defgroup RTC_Input_parameter_format_definitions
emilmont	77:869cf507173a	641	* @{
emilmont	77:869cf507173a	642	*/
emilmont	77:869cf507173a	643	#define RTC_Format_BIN ((uint32_t)0x000000000)
emilmont	77:869cf507173a	644	#define RTC_Format_BCD ((uint32_t)0x000000001)
emilmont	77:869cf507173a	645	#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_Format_BIN) \|\| ((FORMAT) == RTC_Format_BCD))
emilmont	77:869cf507173a	646
emilmont	77:869cf507173a	647	/**
emilmont	77:869cf507173a	648	* @}
emilmont	77:869cf507173a	649	*/
emilmont	77:869cf507173a	650
emilmont	77:869cf507173a	651	/** @defgroup RTC_Flags_Definitions
emilmont	77:869cf507173a	652	* @{
emilmont	77:869cf507173a	653	*/
emilmont	77:869cf507173a	654	#define RTC_FLAG_RECALPF RTC_ISR_RECALPF
emilmont	77:869cf507173a	655	#define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F /!< Only available for STM32F072 devices /
emilmont	77:869cf507173a	656	#define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F
emilmont	77:869cf507173a	657	#define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F
emilmont	77:869cf507173a	658	#define RTC_FLAG_TSOVF RTC_ISR_TSOVF
emilmont	77:869cf507173a	659	#define RTC_FLAG_TSF RTC_ISR_TSF
emilmont	77:869cf507173a	660	#define RTC_FLAG_WUTF RTC_ISR_WUTF /!< Only available for STM32F072 devices /
emilmont	77:869cf507173a	661	#define RTC_FLAG_ALRAF RTC_ISR_ALRAF
emilmont	77:869cf507173a	662	#define RTC_FLAG_INITF RTC_ISR_INITF
emilmont	77:869cf507173a	663	#define RTC_FLAG_RSF RTC_ISR_RSF
emilmont	77:869cf507173a	664	#define RTC_FLAG_INITS RTC_ISR_INITS
emilmont	77:869cf507173a	665	#define RTC_FLAG_SHPF RTC_ISR_SHPF
emilmont	77:869cf507173a	666	#define RTC_FLAG_WUTWF RTC_ISR_WUTWF /!< Only available for STM32F072 devices /
emilmont	77:869cf507173a	667	#define RTC_FLAG_ALRAWF RTC_ISR_ALRAWF
emilmont	77:869cf507173a	668
emilmont	77:869cf507173a	669	#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_TSOVF) \|\| ((FLAG) == RTC_FLAG_TSF) \|\| \
emilmont	77:869cf507173a	670	((FLAG) == RTC_FLAG_WUTF) \|\| ((FLAG) == RTC_FLAG_ALRAWF) \|\| \
emilmont	77:869cf507173a	671	((FLAG) == RTC_FLAG_ALRAF) \|\| ((FLAG) == RTC_FLAG_INITF) \|\| \
emilmont	77:869cf507173a	672	((FLAG) == RTC_FLAG_RSF) \|\| ((FLAG) == RTC_FLAG_WUTWF) \|\| \
emilmont	77:869cf507173a	673	((FLAG) == RTC_FLAG_TAMP1F) \|\| ((FLAG) == RTC_FLAG_TAMP2F) \|\| \
emilmont	77:869cf507173a	674	((FLAG) == RTC_FLAG_TAMP3F) \|\| ((FLAG) == RTC_FLAG_RECALPF) \|\| \
emilmont	77:869cf507173a	675	((FLAG) == RTC_FLAG_SHPF))
emilmont	77:869cf507173a	676	#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF02DF) == (uint32_t)RESET))
emilmont	77:869cf507173a	677
emilmont	77:869cf507173a	678	/**
emilmont	77:869cf507173a	679	* @}
emilmont	77:869cf507173a	680	*/
emilmont	77:869cf507173a	681
emilmont	77:869cf507173a	682	/** @defgroup RTC_Interrupts_Definitions
emilmont	77:869cf507173a	683	* @{
emilmont	77:869cf507173a	684	*/
emilmont	77:869cf507173a	685	#define RTC_IT_TS ((uint32_t)0x00008000)
emilmont	77:869cf507173a	686	#define RTC_IT_WUT ((uint32_t)0x00004000) /* Available only for STM32F072 devices */
emilmont	77:869cf507173a	687	#define RTC_IT_ALRA ((uint32_t)0x00001000)
emilmont	77:869cf507173a	688	#define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
emilmont	77:869cf507173a	689	#define RTC_IT_TAMP1 ((uint32_t)0x00020000)
emilmont	77:869cf507173a	690	#define RTC_IT_TAMP2 ((uint32_t)0x00040000)
emilmont	77:869cf507173a	691	#define RTC_IT_TAMP3 ((uint32_t)0x00080000) /* Available only for STM32F072 devices */
emilmont	77:869cf507173a	692
emilmont	77:869cf507173a	693	#define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF2FFB) == (uint32_t)RESET))
emilmont	77:869cf507173a	694	#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) \|\| ((IT) == RTC_IT_ALRA) \|\| \
emilmont	77:869cf507173a	695	((IT) == RTC_IT_TAMP1) \|\| ((IT) == RTC_IT_WUT) \|\| \
emilmont	77:869cf507173a	696	((IT) == RTC_IT_TAMP2) \|\| ((IT) == RTC_IT_TAMP3))
emilmont	77:869cf507173a	697
emilmont	77:869cf507173a	698	#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF12FFF) == (uint32_t)RESET))
emilmont	77:869cf507173a	699
emilmont	77:869cf507173a	700	/**
emilmont	77:869cf507173a	701	* @}
emilmont	77:869cf507173a	702	*/
emilmont	77:869cf507173a	703
emilmont	77:869cf507173a	704	/**
emilmont	77:869cf507173a	705	* @}
emilmont	77:869cf507173a	706	*/
emilmont	77:869cf507173a	707
emilmont	77:869cf507173a	708
emilmont	77:869cf507173a	709	/* Exported macro ------------------------------------------------------------*/
emilmont	77:869cf507173a	710	/* Exported functions ------------------------------------------------------- */
emilmont	77:869cf507173a	711	/* Function used to set the RTC configuration to the default reset state *****/
emilmont	77:869cf507173a	712	ErrorStatus RTC_DeInit(void);
emilmont	77:869cf507173a	713
emilmont	77:869cf507173a	714
emilmont	77:869cf507173a	715	/* Initialization and Configuration functions *********************************/
emilmont	77:869cf507173a	716	ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct);
emilmont	77:869cf507173a	717	void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct);
emilmont	77:869cf507173a	718	void RTC_WriteProtectionCmd(FunctionalState NewState);
emilmont	77:869cf507173a	719	ErrorStatus RTC_EnterInitMode(void);
emilmont	77:869cf507173a	720	void RTC_ExitInitMode(void);
emilmont	77:869cf507173a	721	ErrorStatus RTC_WaitForSynchro(void);
emilmont	77:869cf507173a	722	ErrorStatus RTC_RefClockCmd(FunctionalState NewState);
emilmont	77:869cf507173a	723	void RTC_BypassShadowCmd(FunctionalState NewState);
emilmont	77:869cf507173a	724
emilmont	77:869cf507173a	725	/* Time and Date configuration functions **************************************/
emilmont	77:869cf507173a	726	ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont	77:869cf507173a	727	void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct);
emilmont	77:869cf507173a	728	void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont	77:869cf507173a	729	uint32_t RTC_GetSubSecond(void);
emilmont	77:869cf507173a	730	ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont	77:869cf507173a	731	void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct);
emilmont	77:869cf507173a	732	void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont	77:869cf507173a	733
emilmont	77:869cf507173a	734	/* Alarms (Alarm A) configuration functions **********************************/
emilmont	77:869cf507173a	735	void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont	77:869cf507173a	736	void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont	77:869cf507173a	737	void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont	77:869cf507173a	738	ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState);
emilmont	77:869cf507173a	739	void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint8_t RTC_AlarmSubSecondMask);
emilmont	77:869cf507173a	740	uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm);
emilmont	77:869cf507173a	741
emilmont	77:869cf507173a	742	/* WakeUp Timer configuration functions ***************************************/
emilmont	77:869cf507173a	743	void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock); /!< available only for STM32F072 devices /
emilmont	77:869cf507173a	744	void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter); /!< available only for STM32F072 devices /
emilmont	77:869cf507173a	745	uint32_t RTC_GetWakeUpCounter(void); /!< available only for STM32F072 devices /
emilmont	77:869cf507173a	746	ErrorStatus RTC_WakeUpCmd(FunctionalState NewState); /!< available only for STM32F072 devices /
emilmont	77:869cf507173a	747
emilmont	77:869cf507173a	748	/* Daylight Saving configuration functions ************************************/
emilmont	77:869cf507173a	749	void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation);
emilmont	77:869cf507173a	750	uint32_t RTC_GetStoreOperation(void);
emilmont	77:869cf507173a	751
emilmont	77:869cf507173a	752	/* Output pin Configuration function ******************************************/
emilmont	77:869cf507173a	753	void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity);
emilmont	77:869cf507173a	754
emilmont	77:869cf507173a	755	/* Digital Calibration configuration functions ********************************/
emilmont	77:869cf507173a	756	void RTC_CalibOutputCmd(FunctionalState NewState);
emilmont	77:869cf507173a	757	void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput);
emilmont	77:869cf507173a	758	ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
emilmont	77:869cf507173a	759	uint32_t RTC_SmoothCalibPlusPulses,
emilmont	77:869cf507173a	760	uint32_t RTC_SmouthCalibMinusPulsesValue);
emilmont	77:869cf507173a	761
emilmont	77:869cf507173a	762	/* TimeStamp configuration functions ******************************************/
emilmont	77:869cf507173a	763	void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState);
emilmont	77:869cf507173a	764	void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct, RTC_DateTypeDef* RTC_StampDateStruct);
emilmont	77:869cf507173a	765	uint32_t RTC_GetTimeStampSubSecond(void);
emilmont	77:869cf507173a	766
emilmont	77:869cf507173a	767	/* Tampers configuration functions ********************************************/
emilmont	77:869cf507173a	768	void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger);
emilmont	77:869cf507173a	769	void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState);
emilmont	77:869cf507173a	770	void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter);
emilmont	77:869cf507173a	771	void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq);
emilmont	77:869cf507173a	772	void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration);
emilmont	77:869cf507173a	773	void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState);
emilmont	77:869cf507173a	774	void RTC_TamperPullUpCmd(FunctionalState NewState);
emilmont	77:869cf507173a	775
emilmont	77:869cf507173a	776	/* Backup Data Registers configuration functions ******************************/
emilmont	77:869cf507173a	777	void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
emilmont	77:869cf507173a	778	uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
emilmont	77:869cf507173a	779
emilmont	77:869cf507173a	780	/* Output Type Config configuration functions *********************************/
emilmont	77:869cf507173a	781	void RTC_OutputTypeConfig(uint32_t RTC_OutputType);
emilmont	77:869cf507173a	782
emilmont	77:869cf507173a	783	/* RTC_Shift_control_synchonisation_functions *********************************/
emilmont	77:869cf507173a	784	ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSubFS);
emilmont	77:869cf507173a	785
emilmont	77:869cf507173a	786	/* Interrupts and flags management functions **********************************/
emilmont	77:869cf507173a	787	void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState);
emilmont	77:869cf507173a	788	FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG);
emilmont	77:869cf507173a	789	void RTC_ClearFlag(uint32_t RTC_FLAG);
emilmont	77:869cf507173a	790	ITStatus RTC_GetITStatus(uint32_t RTC_IT);
emilmont	77:869cf507173a	791	void RTC_ClearITPendingBit(uint32_t RTC_IT);
emilmont	77:869cf507173a	792
emilmont	77:869cf507173a	793	#ifdef __cplusplus
emilmont	77:869cf507173a	794	}
emilmont	77:869cf507173a	795	#endif
emilmont	77:869cf507173a	796
emilmont	77:869cf507173a	797	#endif /__STM32F0XX_RTC_H /
emilmont	77:869cf507173a	798
emilmont	77:869cf507173a	799	/**
emilmont	77:869cf507173a	800	* @}
emilmont	77:869cf507173a	801	*/
emilmont	77:869cf507173a	802
emilmont	77:869cf507173a	803	/**
emilmont	77:869cf507173a	804	* @}
emilmont	77:869cf507173a	805	*/
emilmont	77:869cf507173a	806
emilmont	77:869cf507173a	807	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/