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TARGET_NUCLEO_F030R8/stm32f0xx_flash.h@80:8e73be2a2ac1, 2014-02-21 (annotated)

Committer:: emilmont
Date:: Fri Feb 21 12:21:39 2014 +0000
Revision:: 80:8e73be2a2ac1
Parent:: 77:869cf507173a
Child:: 81:7d30d6019079

First alpha release for the NRF51822 target (to be tested in the online IDE)

Who changed what in which revision?

User	Revision	Line number	New contents of line
emilmont	77:869cf507173a	1	/**
emilmont	77:869cf507173a	2	******************************************************************************
emilmont	77:869cf507173a	3	* @file stm32f0xx_flash.h
emilmont	77:869cf507173a	4	* @author MCD Application Team
emilmont	77:869cf507173a	5	* @version V1.3.0
emilmont	77:869cf507173a	6	* @date 16-January-2014
emilmont	77:869cf507173a	7	* @brief This file contains all the functions prototypes for the FLASH
emilmont	77:869cf507173a	8	* firmware library.
emilmont	77:869cf507173a	9	******************************************************************************
emilmont	77:869cf507173a	10	* @attention
emilmont	77:869cf507173a	11	*
emilmont	77:869cf507173a	12	* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
emilmont	77:869cf507173a	13	*
emilmont	77:869cf507173a	14	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
emilmont	77:869cf507173a	15	* You may not use this file except in compliance with the License.
emilmont	77:869cf507173a	16	* You may obtain a copy of the License at:
emilmont	77:869cf507173a	17	*
emilmont	77:869cf507173a	18	* http://www.st.com/software_license_agreement_liberty_v2
emilmont	77:869cf507173a	19	*
emilmont	77:869cf507173a	20	* Unless required by applicable law or agreed to in writing, software
emilmont	77:869cf507173a	21	* distributed under the License is distributed on an "AS IS" BASIS,
emilmont	77:869cf507173a	22	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont	77:869cf507173a	23	* See the License for the specific language governing permissions and
emilmont	77:869cf507173a	24	* limitations under the License.
emilmont	77:869cf507173a	25	*
emilmont	77:869cf507173a	26	******************************************************************************
emilmont	77:869cf507173a	27	*/
emilmont	77:869cf507173a	28
emilmont	77:869cf507173a	29	/* Define to prevent recursive inclusion -------------------------------------*/
emilmont	77:869cf507173a	30	#ifndef __STM32F0XX_FLASH_H
emilmont	77:869cf507173a	31	#define __STM32F0XX_FLASH_H
emilmont	77:869cf507173a	32
emilmont	77:869cf507173a	33	#ifdef __cplusplus
emilmont	77:869cf507173a	34	extern "C" {
emilmont	77:869cf507173a	35	#endif
emilmont	77:869cf507173a	36
emilmont	77:869cf507173a	37	/* Includes ------------------------------------------------------------------*/
emilmont	77:869cf507173a	38	#include "stm32f0xx.h"
emilmont	77:869cf507173a	39
emilmont	77:869cf507173a	40	/** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont	77:869cf507173a	41	* @{
emilmont	77:869cf507173a	42	*/
emilmont	77:869cf507173a	43
emilmont	77:869cf507173a	44	/** @addtogroup FLASH
emilmont	77:869cf507173a	45	* @{
emilmont	77:869cf507173a	46	*/
emilmont	77:869cf507173a	47
emilmont	77:869cf507173a	48	/* Exported types ------------------------------------------------------------*/
emilmont	77:869cf507173a	49
emilmont	77:869cf507173a	50	/**
emilmont	77:869cf507173a	51	* @brief FLASH Status
emilmont	77:869cf507173a	52	*/
emilmont	77:869cf507173a	53	typedef enum
emilmont	77:869cf507173a	54	{
emilmont	77:869cf507173a	55	FLASH_BUSY = 1,
emilmont	77:869cf507173a	56	FLASH_ERROR_WRP,
emilmont	77:869cf507173a	57	FLASH_ERROR_PROGRAM,
emilmont	77:869cf507173a	58	FLASH_COMPLETE,
emilmont	77:869cf507173a	59	FLASH_TIMEOUT
emilmont	77:869cf507173a	60	}FLASH_Status;
emilmont	77:869cf507173a	61
emilmont	77:869cf507173a	62	/* Exported constants --------------------------------------------------------*/
emilmont	77:869cf507173a	63
emilmont	77:869cf507173a	64	/** @defgroup FLASH_Exported_Constants
emilmont	77:869cf507173a	65	* @{
emilmont	77:869cf507173a	66	*/
emilmont	77:869cf507173a	67
emilmont	77:869cf507173a	68	/** @defgroup FLASH_Latency
emilmont	77:869cf507173a	69	* @{
emilmont	77:869cf507173a	70	*/
emilmont	77:869cf507173a	71	#define FLASH_Latency_0 ((uint32_t)0x00000000) /!< FLASH Zero Latency cycle /
emilmont	77:869cf507173a	72	#define FLASH_Latency_1 FLASH_ACR_LATENCY /!< FLASH One Latency cycle /
emilmont	77:869cf507173a	73
emilmont	77:869cf507173a	74	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) \|\| \
emilmont	77:869cf507173a	75	((LATENCY) == FLASH_Latency_1))
emilmont	77:869cf507173a	76	/**
emilmont	77:869cf507173a	77	* @}
emilmont	77:869cf507173a	78	*/
emilmont	77:869cf507173a	79
emilmont	77:869cf507173a	80	/** @defgroup FLASH_Interrupts
emilmont	77:869cf507173a	81	* @{
emilmont	77:869cf507173a	82	*/
emilmont	77:869cf507173a	83
emilmont	77:869cf507173a	84	#define FLASH_IT_EOP FLASH_CR_EOPIE /!< End of programming interrupt source /
emilmont	77:869cf507173a	85	#define FLASH_IT_ERR FLASH_CR_ERRIE /!< Error interrupt source /
emilmont	77:869cf507173a	86	#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
emilmont	77:869cf507173a	87	/**
emilmont	77:869cf507173a	88	* @}
emilmont	77:869cf507173a	89	*/
emilmont	77:869cf507173a	90
emilmont	77:869cf507173a	91	/** @defgroup FLASH_Address
emilmont	77:869cf507173a	92	* @{
emilmont	77:869cf507173a	93	*/
emilmont	77:869cf507173a	94	#ifndef STM32F072
emilmont	77:869cf507173a	95	#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0800FFFF))
emilmont	77:869cf507173a	96	#else
emilmont	77:869cf507173a	97	#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF))
emilmont	77:869cf507173a	98	#endif /* STM32F072 */
emilmont	77:869cf507173a	99	/**
emilmont	77:869cf507173a	100	* @}
emilmont	77:869cf507173a	101	*/
emilmont	77:869cf507173a	102
emilmont	77:869cf507173a	103	/** @defgroup FLASH_OB_DATA_ADDRESS
emilmont	77:869cf507173a	104	* @{
emilmont	77:869cf507173a	105	*/
emilmont	77:869cf507173a	106	#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) \|\| ((ADDRESS) == 0x1FFFF806))
emilmont	77:869cf507173a	107
emilmont	77:869cf507173a	108	/**
emilmont	77:869cf507173a	109	* @}
emilmont	77:869cf507173a	110	*/
emilmont	77:869cf507173a	111
emilmont	77:869cf507173a	112	/** @defgroup FLASH_Option_Bytes_Write_Protection
emilmont	77:869cf507173a	113	* @{
emilmont	77:869cf507173a	114	*/
emilmont	77:869cf507173a	115
emilmont	77:869cf507173a	116	#ifndef STM32F072
emilmont	77:869cf507173a	117
emilmont	77:869cf507173a	118	#define OB_WRP_Pages0to3 ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
emilmont	77:869cf507173a	119	#define OB_WRP_Pages4to7 ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
emilmont	77:869cf507173a	120	#define OB_WRP_Pages8to11 ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
emilmont	77:869cf507173a	121	#define OB_WRP_Pages12to15 ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
emilmont	77:869cf507173a	122	#define OB_WRP_Pages16to19 ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
emilmont	77:869cf507173a	123	#define OB_WRP_Pages20to23 ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
emilmont	77:869cf507173a	124	#define OB_WRP_Pages24to27 ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
emilmont	77:869cf507173a	125	#define OB_WRP_Pages28to31 ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
emilmont	77:869cf507173a	126	#define OB_WRP_Pages32to35 ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
emilmont	77:869cf507173a	127	#define OB_WRP_Pages36to39 ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
emilmont	77:869cf507173a	128	#define OB_WRP_Pages40to43 ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
emilmont	77:869cf507173a	129	#define OB_WRP_Pages44to47 ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
emilmont	77:869cf507173a	130	#define OB_WRP_Pages48to51 ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
emilmont	77:869cf507173a	131	#define OB_WRP_Pages52to55 ((uint32_t)0x00002000) /* Write protection of page 52 to 55 */
emilmont	77:869cf507173a	132	#define OB_WRP_Pages56to59 ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
emilmont	77:869cf507173a	133	#define OB_WRP_Pages60to63 ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
emilmont	77:869cf507173a	134
emilmont	77:869cf507173a	135	#define OB_WRP_AllPages ((uint32_t)0x0000FFFF) /!< Write protection of all Sectors /
emilmont	77:869cf507173a	136
emilmont	77:869cf507173a	137	#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
emilmont	77:869cf507173a	138
emilmont	77:869cf507173a	139	#else
emilmont	77:869cf507173a	140
emilmont	77:869cf507173a	141	#define OB_WRP_Pages0to1 ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */
emilmont	77:869cf507173a	142	#define OB_WRP_Pages2to3 ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */
emilmont	77:869cf507173a	143	#define OB_WRP_Pages4to5 ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */
emilmont	77:869cf507173a	144	#define OB_WRP_Pages6to7 ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */
emilmont	77:869cf507173a	145	#define OB_WRP_Pages8to9 ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */
emilmont	77:869cf507173a	146	#define OB_WRP_Pages10to11 ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */
emilmont	77:869cf507173a	147	#define OB_WRP_Pages12to13 ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */
emilmont	77:869cf507173a	148	#define OB_WRP_Pages14to15 ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */
emilmont	77:869cf507173a	149	#define OB_WRP_Pages16to17 ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */
emilmont	77:869cf507173a	150	#define OB_WRP_Pages18to19 ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */
emilmont	77:869cf507173a	151	#define OB_WRP_Pages20to21 ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */
emilmont	77:869cf507173a	152	#define OB_WRP_Pages22to23 ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */
emilmont	77:869cf507173a	153	#define OB_WRP_Pages24to25 ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */
emilmont	77:869cf507173a	154	#define OB_WRP_Pages26to27 ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */
emilmont	77:869cf507173a	155	#define OB_WRP_Pages28to29 ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */
emilmont	77:869cf507173a	156	#define OB_WRP_Pages30to31 ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */
emilmont	77:869cf507173a	157	#define OB_WRP_Pages32to33 ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */
emilmont	77:869cf507173a	158	#define OB_WRP_Pages34to35 ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */
emilmont	77:869cf507173a	159	#define OB_WRP_Pages36to37 ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */
emilmont	77:869cf507173a	160	#define OB_WRP_Pages38to39 ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */
emilmont	77:869cf507173a	161	#define OB_WRP_Pages40to41 ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */
emilmont	77:869cf507173a	162	#define OB_WRP_Pages42to43 ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */
emilmont	77:869cf507173a	163	#define OB_WRP_Pages44to45 ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */
emilmont	77:869cf507173a	164	#define OB_WRP_Pages46to47 ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */
emilmont	77:869cf507173a	165	#define OB_WRP_Pages48to49 ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */
emilmont	77:869cf507173a	166	#define OB_WRP_Pages50to51 ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */
emilmont	77:869cf507173a	167	#define OB_WRP_Pages52to53 ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */
emilmont	77:869cf507173a	168	#define OB_WRP_Pages54to55 ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */
emilmont	77:869cf507173a	169	#define OB_WRP_Pages56to57 ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */
emilmont	77:869cf507173a	170	#define OB_WRP_Pages58to59 ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */
emilmont	77:869cf507173a	171	#define OB_WRP_Pages60to61 ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */
emilmont	77:869cf507173a	172	#define OB_WRP_Pages62to63 ((uint32_t)0x80000000) /* Write protection of page 62 to 63 */
emilmont	77:869cf507173a	173
emilmont	77:869cf507173a	174	#define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /!< Write protection of all Sectors /
emilmont	77:869cf507173a	175
emilmont	77:869cf507173a	176	#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
emilmont	77:869cf507173a	177
emilmont	77:869cf507173a	178	#endif /* STM32F072 */
emilmont	77:869cf507173a	179
emilmont	77:869cf507173a	180	/**
emilmont	77:869cf507173a	181	* @}
emilmont	77:869cf507173a	182	*/
emilmont	77:869cf507173a	183
emilmont	77:869cf507173a	184	/** @defgroup FLASH_Option_Bytes_Read_Protection
emilmont	77:869cf507173a	185	* @{
emilmont	77:869cf507173a	186	*/
emilmont	77:869cf507173a	187
emilmont	77:869cf507173a	188	/**
emilmont	77:869cf507173a	189	* @brief FLASH_Read Protection Level
emilmont	77:869cf507173a	190	*/
emilmont	77:869cf507173a	191	#define OB_RDP_Level_0 ((uint8_t)0xAA)
emilmont	77:869cf507173a	192	#define OB_RDP_Level_1 ((uint8_t)0xBB)
emilmont	77:869cf507173a	193	/#define OB_RDP_Level_2 ((uint8_t)0xCC)/ /* Warning: When enabling read protection level 2
emilmont	77:869cf507173a	194	it's no more possible to go back to level 1 or 0 */
emilmont	77:869cf507173a	195
emilmont	77:869cf507173a	196	#define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)\|\|\
emilmont	77:869cf507173a	197	((LEVEL) == OB_RDP_Level_1))/*\|\|\
emilmont	77:869cf507173a	198	((LEVEL) == OB_RDP_Level_2))*/
emilmont	77:869cf507173a	199	/**
emilmont	77:869cf507173a	200	* @}
emilmont	77:869cf507173a	201	*/
emilmont	77:869cf507173a	202
emilmont	77:869cf507173a	203	/** @defgroup FLASH_Option_Bytes_IWatchdog
emilmont	77:869cf507173a	204	* @{
emilmont	77:869cf507173a	205	*/
emilmont	77:869cf507173a	206
emilmont	77:869cf507173a	207	#define OB_IWDG_SW ((uint8_t)0x01) /!< Software IWDG selected /
emilmont	77:869cf507173a	208	#define OB_IWDG_HW ((uint8_t)0x00) /!< Hardware IWDG selected /
emilmont	77:869cf507173a	209	#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) \|\| ((SOURCE) == OB_IWDG_HW))
emilmont	77:869cf507173a	210
emilmont	77:869cf507173a	211	/**
emilmont	77:869cf507173a	212	* @}
emilmont	77:869cf507173a	213	*/
emilmont	77:869cf507173a	214
emilmont	77:869cf507173a	215	/** @defgroup FLASH_Option_Bytes_nRST_STOP
emilmont	77:869cf507173a	216	* @{
emilmont	77:869cf507173a	217	*/
emilmont	77:869cf507173a	218
emilmont	77:869cf507173a	219	#define OB_STOP_NoRST ((uint8_t)0x02) /!< No reset generated when entering in STOP /
emilmont	77:869cf507173a	220	#define OB_STOP_RST ((uint8_t)0x00) /!< Reset generated when entering in STOP /
emilmont	77:869cf507173a	221	#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) \|\| ((SOURCE) == OB_STOP_RST))
emilmont	77:869cf507173a	222
emilmont	77:869cf507173a	223	/**
emilmont	77:869cf507173a	224	* @}
emilmont	77:869cf507173a	225	*/
emilmont	77:869cf507173a	226
emilmont	77:869cf507173a	227	/** @defgroup FLASH_Option_Bytes_nRST_STDBY
emilmont	77:869cf507173a	228	* @{
emilmont	77:869cf507173a	229	*/
emilmont	77:869cf507173a	230
emilmont	77:869cf507173a	231	#define OB_STDBY_NoRST ((uint8_t)0x04) /!< No reset generated when entering in STANDBY /
emilmont	77:869cf507173a	232	#define OB_STDBY_RST ((uint8_t)0x00) /!< Reset generated when entering in STANDBY /
emilmont	77:869cf507173a	233	#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) \|\| ((SOURCE) == OB_STDBY_RST))
emilmont	77:869cf507173a	234
emilmont	77:869cf507173a	235	/**
emilmont	77:869cf507173a	236	* @}
emilmont	77:869cf507173a	237	*/
emilmont	77:869cf507173a	238
emilmont	77:869cf507173a	239	/** @defgroup FLASH_Option_Bytes_BOOT1
emilmont	77:869cf507173a	240	* @{
emilmont	77:869cf507173a	241	*/
emilmont	77:869cf507173a	242
emilmont	77:869cf507173a	243	#define OB_BOOT1_RESET ((uint8_t)0x00) /!< BOOT1 Reset /
emilmont	77:869cf507173a	244	#define OB_BOOT1_SET ((uint8_t)0x10) /!< BOOT1 Set /
emilmont	77:869cf507173a	245	#define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) \|\| ((BOOT1) == OB_BOOT1_SET))
emilmont	77:869cf507173a	246
emilmont	77:869cf507173a	247	/**
emilmont	77:869cf507173a	248	* @}
emilmont	77:869cf507173a	249	*/
emilmont	77:869cf507173a	250
emilmont	77:869cf507173a	251	/** @defgroup FLASH_Option_Bytes_BOOT0
emilmont	77:869cf507173a	252	* @{
emilmont	77:869cf507173a	253	*/
emilmont	77:869cf507173a	254
emilmont	77:869cf507173a	255	#define OB_BOOT0_RESET ((uint8_t)0x00) /!< BOOT0 Reset /
emilmont	77:869cf507173a	256	#define OB_BOOT0_SET ((uint8_t)0x08) /!< BOOT0 Set /
emilmont	77:869cf507173a	257	#define IS_OB_BOOT0(BOOT0) (((BOOT0) == OB_BOOT0_RESET) \|\| ((BOOT0) == OB_BOOT0_SET))
emilmont	77:869cf507173a	258
emilmont	77:869cf507173a	259	/**
emilmont	77:869cf507173a	260	* @}
emilmont	77:869cf507173a	261	*/
emilmont	77:869cf507173a	262
emilmont	77:869cf507173a	263	/** @defgroup FLASH_Option_Bytes_BOOT0SW
emilmont	77:869cf507173a	264	* @{
emilmont	77:869cf507173a	265	*/
emilmont	77:869cf507173a	266
emilmont	77:869cf507173a	267	#define OB_BOOT0_SW ((uint8_t)0x00) /!< BOOT0 pin disabled /
emilmont	77:869cf507173a	268	#define OB_BOOT0_HW ((uint8_t)0x80) /!< BOOT0 pin bonded with GPIO /
emilmont	77:869cf507173a	269	#define IS_OB_BOOT0SW(BOOT0) (((BOOT0) == OB_BOOT0_SW) \|\| ((BOOT0) == OB_BOOT0_HW))
emilmont	77:869cf507173a	270
emilmont	77:869cf507173a	271	/**
emilmont	77:869cf507173a	272	* @}
emilmont	77:869cf507173a	273	*/
emilmont	77:869cf507173a	274
emilmont	77:869cf507173a	275	/** @defgroup FLASH_Option_Bytes_VDDA_Analog_Monitoring
emilmont	77:869cf507173a	276	* @{
emilmont	77:869cf507173a	277	*/
emilmont	77:869cf507173a	278
emilmont	77:869cf507173a	279	#define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /!< Analog monitoring on VDDA Power source ON /
emilmont	77:869cf507173a	280	#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /!< Analog monitoring on VDDA Power source OFF /
emilmont	77:869cf507173a	281
emilmont	77:869cf507173a	282	#define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) \|\| ((ANALOG) == OB_VDDA_ANALOG_OFF))
emilmont	77:869cf507173a	283
emilmont	77:869cf507173a	284	/**
emilmont	77:869cf507173a	285	* @}
emilmont	77:869cf507173a	286	*/
emilmont	77:869cf507173a	287
emilmont	77:869cf507173a	288	/** @defgroup FLASH_Option_Bytes_SRAM_Parity_Enable
emilmont	77:869cf507173a	289	* @{
emilmont	77:869cf507173a	290	*/
emilmont	77:869cf507173a	291
emilmont	77:869cf507173a	292	#define OB_SRAM_PARITY_SET ((uint8_t)0x00) /!< SRAM parity enable Set /
emilmont	77:869cf507173a	293	#define OB_SRAM_PARITY_RESET ((uint8_t)0x40) /!< SRAM parity enable reset /
emilmont	77:869cf507173a	294
emilmont	77:869cf507173a	295	#define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) \|\| ((PARITY) == OB_SRAM_PARITY_RESET))
emilmont	77:869cf507173a	296
emilmont	77:869cf507173a	297	/**
emilmont	77:869cf507173a	298	* @}
emilmont	77:869cf507173a	299	*/
emilmont	77:869cf507173a	300
emilmont	77:869cf507173a	301	/** @defgroup FLASH_Flags
emilmont	77:869cf507173a	302	* @{
emilmont	77:869cf507173a	303	*/
emilmont	77:869cf507173a	304
emilmont	77:869cf507173a	305	#define FLASH_FLAG_BSY FLASH_SR_BSY /!< FLASH Busy flag /
emilmont	77:869cf507173a	306	#define FLASH_FLAG_PGERR FLASH_SR_PGERR /!< FLASH Programming error flag /
emilmont	77:869cf507173a	307	#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /!< FLASH Write protected error flag /
emilmont	77:869cf507173a	308	#define FLASH_FLAG_EOP FLASH_SR_EOP /!< FLASH End of Programming flag /
emilmont	77:869cf507173a	309
emilmont	77:869cf507173a	310	#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCB) == 0x00000000) && ((FLAG) != 0x00000000))
emilmont	77:869cf507173a	311
emilmont	77:869cf507173a	312	#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) \|\| ((FLAG) == FLASH_FLAG_PGERR) \|\| \
emilmont	77:869cf507173a	313	((FLAG) == FLASH_FLAG_WRPERR) \|\| ((FLAG) == FLASH_FLAG_EOP))
emilmont	77:869cf507173a	314	/**
emilmont	77:869cf507173a	315	* @}
emilmont	77:869cf507173a	316	*/
emilmont	77:869cf507173a	317
emilmont	77:869cf507173a	318	/** @defgroup FLASH_Timeout_definition
emilmont	77:869cf507173a	319	* @{
emilmont	77:869cf507173a	320	*/
emilmont	77:869cf507173a	321	#define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x000B0000)
emilmont	77:869cf507173a	322
emilmont	77:869cf507173a	323	/**
emilmont	77:869cf507173a	324	* @}
emilmont	77:869cf507173a	325	*/
emilmont	77:869cf507173a	326
emilmont	77:869cf507173a	327	/** @defgroup FLASH_Legacy
emilmont	77:869cf507173a	328	* @{
emilmont	77:869cf507173a	329	*/
emilmont	77:869cf507173a	330	#define FLASH_WRProt_Pages0to3 OB_WRP_Pages0to3
emilmont	77:869cf507173a	331	#define FLASH_WRProt_Pages4to7 OB_WRP_Pages4to7
emilmont	77:869cf507173a	332	#define FLASH_WRProt_Pages8to11 OB_WRP_Pages8to11
emilmont	77:869cf507173a	333	#define FLASH_WRProt_Pages12to15 OB_WRP_Pages12to15
emilmont	77:869cf507173a	334	#define FLASH_WRProt_Pages16to19 OB_WRP_Pages16to19
emilmont	77:869cf507173a	335	#define FLASH_WRProt_Pages20to23 OB_WRP_Pages20to23
emilmont	77:869cf507173a	336	#define FLASH_WRProt_Pages24to27 OB_WRP_Pages24to27
emilmont	77:869cf507173a	337	#define FLASH_WRProt_Pages28to31 OB_WRP_Pages28to31
emilmont	77:869cf507173a	338	#define FLASH_WRProt_Pages32to35 OB_WRP_Pages32to35
emilmont	77:869cf507173a	339	#define FLASH_WRProt_Pages36to39 OB_WRP_Pages36to39
emilmont	77:869cf507173a	340	#define FLASH_WRProt_Pages40to43 OB_WRP_Pages40to21
emilmont	77:869cf507173a	341	#define FLASH_WRProt_Pages44to47 OB_WRP_Pages44to23
emilmont	77:869cf507173a	342	#define FLASH_WRProt_Pages48to51 OB_WRP_Pages48to51
emilmont	77:869cf507173a	343	#define FLASH_WRProt_Pages52to55 OB_WRP_Pages52to55
emilmont	77:869cf507173a	344	#define FLASH_WRProt_Pages56to59 OB_WRP_Pages56to59
emilmont	77:869cf507173a	345	#define FLASH_WRProt_Pages60to63 OB_WRP_Pages60to63
emilmont	77:869cf507173a	346
emilmont	77:869cf507173a	347
emilmont	77:869cf507173a	348	#define FLASH_WRProt_AllPages OB_WRP_AllPages
emilmont	77:869cf507173a	349	/**
emilmont	77:869cf507173a	350	* @}
emilmont	77:869cf507173a	351	*/
emilmont	77:869cf507173a	352
emilmont	77:869cf507173a	353	/**
emilmont	77:869cf507173a	354	* @}
emilmont	77:869cf507173a	355	*/
emilmont	77:869cf507173a	356
emilmont	77:869cf507173a	357	/* Exported macro ------------------------------------------------------------*/
emilmont	77:869cf507173a	358	/* Exported functions ------------------------------------------------------- */
emilmont	77:869cf507173a	359
emilmont	77:869cf507173a	360	/**
emilmont	77:869cf507173a	361	* @brief FLASH memory functions that can be executed from FLASH.
emilmont	77:869cf507173a	362	*/
emilmont	77:869cf507173a	363	/* FLASH Interface configuration functions ************************************/
emilmont	77:869cf507173a	364	void FLASH_SetLatency(uint32_t FLASH_Latency);
emilmont	77:869cf507173a	365	void FLASH_PrefetchBufferCmd(FunctionalState NewState);
emilmont	77:869cf507173a	366	FlagStatus FLASH_GetPrefetchBufferStatus(void);
emilmont	77:869cf507173a	367
emilmont	77:869cf507173a	368	/* FLASH Memory Programming functions *****************************************/
emilmont	77:869cf507173a	369	void FLASH_Unlock(void);
emilmont	77:869cf507173a	370	void FLASH_Lock(void);
emilmont	77:869cf507173a	371	FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
emilmont	77:869cf507173a	372	FLASH_Status FLASH_EraseAllPages(void);
emilmont	77:869cf507173a	373	FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
emilmont	77:869cf507173a	374	FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
emilmont	77:869cf507173a	375
emilmont	77:869cf507173a	376	/* FLASH Option Bytes Programming functions *****************************************/
emilmont	77:869cf507173a	377	void FLASH_OB_Unlock(void);
emilmont	77:869cf507173a	378	void FLASH_OB_Lock(void);
emilmont	77:869cf507173a	379	void FLASH_OB_Launch(void);
emilmont	77:869cf507173a	380	FLASH_Status FLASH_OB_Erase(void);
emilmont	77:869cf507173a	381	FLASH_Status FLASH_OB_EnableWRP(uint32_t OB_WRP);
emilmont	77:869cf507173a	382	FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP);
emilmont	77:869cf507173a	383	FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
emilmont	77:869cf507173a	384	FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1);
emilmont	77:869cf507173a	385	FLASH_Status FLASH_OB_BOOT0Config(uint8_t OB_BOOT0);
emilmont	77:869cf507173a	386	FLASH_Status FLASH_OB_BOOT0SWConfig(uint8_t OB_BOOT0SW);
emilmont	77:869cf507173a	387	FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG);
emilmont	77:869cf507173a	388	FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity);
emilmont	77:869cf507173a	389	FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER);
emilmont	77:869cf507173a	390	FLASH_Status FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
emilmont	77:869cf507173a	391	uint8_t FLASH_OB_GetUser(void);
emilmont	77:869cf507173a	392	uint32_t FLASH_OB_GetWRP(void);
emilmont	77:869cf507173a	393	FlagStatus FLASH_OB_GetRDP(void);
emilmont	77:869cf507173a	394
emilmont	77:869cf507173a	395	/* FLASH Interrupts and flags management functions **********************************/
emilmont	77:869cf507173a	396	void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
emilmont	77:869cf507173a	397	FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
emilmont	77:869cf507173a	398	void FLASH_ClearFlag(uint32_t FLASH_FLAG);
emilmont	77:869cf507173a	399	FLASH_Status FLASH_GetStatus(void);
emilmont	77:869cf507173a	400	FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
emilmont	77:869cf507173a	401
emilmont	77:869cf507173a	402	/** @defgroup FLASH_Legacy
emilmont	77:869cf507173a	403	* @{
emilmont	77:869cf507173a	404	*/
emilmont	77:869cf507173a	405	#define FLASH_EraseOptionBytes FLASH_OB_Erase
emilmont	77:869cf507173a	406	#define FLASH_EnableWriteProtection FLASH_OB_EnableWRP
emilmont	77:869cf507173a	407	#define FLASH_UserOptionByteConfig FLASH_OB_UserConfig
emilmont	77:869cf507173a	408	#define FLASH_ProgramOptionByteData FLASH_OB_ProgramData
emilmont	77:869cf507173a	409	#define FLASH_GetUserOptionByte FLASH_OB_GetUser
emilmont	77:869cf507173a	410	#define FLASH_GetWriteProtectionOptionByte FLASH_OB_GetWRP
emilmont	77:869cf507173a	411
emilmont	77:869cf507173a	412	/**
emilmont	77:869cf507173a	413	* @}
emilmont	77:869cf507173a	414	*/
emilmont	77:869cf507173a	415
emilmont	77:869cf507173a	416	#ifdef __cplusplus
emilmont	77:869cf507173a	417	}
emilmont	77:869cf507173a	418	#endif
emilmont	77:869cf507173a	419
emilmont	77:869cf507173a	420	#endif /* __STM32F0XX_FLASH_H */
emilmont	77:869cf507173a	421
emilmont	77:869cf507173a	422	/**
emilmont	77:869cf507173a	423	* @}
emilmont	77:869cf507173a	424	*/
emilmont	77:869cf507173a	425
emilmont	77:869cf507173a	426	/**
emilmont	77:869cf507173a	427	* @}
emilmont	77:869cf507173a	428	*/
emilmont	77:869cf507173a	429
emilmont	77:869cf507173a	430	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/