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TARGET_NUCLEO_F030R8/stm32f0xx_dbgmcu.h@80:8e73be2a2ac1, 2014-02-21 (annotated)

Committer:
emilmont
Date:
Fri Feb 21 12:21:39 2014 +0000
Revision:
80:8e73be2a2ac1
Parent:
77:869cf507173a
Child:
81:7d30d6019079
First alpha release for the NRF51822 target (to be tested in the online IDE)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_dbgmcu.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the DBGMCU firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
emilmont 77:869cf507173a 12 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
emilmont 77:869cf507173a 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
emilmont 77:869cf507173a 15 * You may not use this file except in compliance with the License.
emilmont 77:869cf507173a 16 * You may obtain a copy of the License at:
emilmont 77:869cf507173a 17 *
emilmont 77:869cf507173a 18 * http://www.st.com/software_license_agreement_liberty_v2
emilmont 77:869cf507173a 19 *
emilmont 77:869cf507173a 20 * Unless required by applicable law or agreed to in writing, software
emilmont 77:869cf507173a 21 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 77:869cf507173a 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 77:869cf507173a 23 * See the License for the specific language governing permissions and
emilmont 77:869cf507173a 24 * limitations under the License.
emilmont 77:869cf507173a 25 *
emilmont 77:869cf507173a 26 ******************************************************************************
emilmont 77:869cf507173a 27 */
emilmont 77:869cf507173a 28
emilmont 77:869cf507173a 29 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 30 #ifndef __STM32F0XX_DBGMCU_H
emilmont 77:869cf507173a 31 #define __STM32F0XX_DBGMCU_H
emilmont 77:869cf507173a 32
emilmont 77:869cf507173a 33 #ifdef __cplusplus
emilmont 77:869cf507173a 34 extern "C" {
emilmont 77:869cf507173a 35 #endif
emilmont 77:869cf507173a 36
emilmont 77:869cf507173a 37 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 38 #include "stm32f0xx.h"
emilmont 77:869cf507173a 39
emilmont 77:869cf507173a 40 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 41 * @{
emilmont 77:869cf507173a 42 */
emilmont 77:869cf507173a 43
emilmont 77:869cf507173a 44 /** @addtogroup DBGMCU
emilmont 77:869cf507173a 45 * @{
emilmont 77:869cf507173a 46 */
emilmont 77:869cf507173a 47 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 48 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50
emilmont 77:869cf507173a 51 /** @defgroup DBGMCU_Exported_Constants
emilmont 77:869cf507173a 52 * @{
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54
emilmont 77:869cf507173a 55 #define DBGMCU_STOP DBGMCU_CR_DBG_STOP
emilmont 77:869cf507173a 56 #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
emilmont 77:869cf507173a 57 #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF9) == 0x00) && ((PERIPH) != 0x00))
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 #define DBGMCU_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< Not applicable for STM32F030 devices */
emilmont 77:869cf507173a 60 #define DBGMCU_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP
emilmont 77:869cf507173a 61 #define DBGMCU_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP
emilmont 77:869cf507173a 62 #define DBGMCU_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< Only applicable for STM32F072 devices */
emilmont 77:869cf507173a 63 #define DBGMCU_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP
emilmont 77:869cf507173a 64 #define DBGMCU_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP
emilmont 77:869cf507173a 65 #define DBGMCU_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP
emilmont 77:869cf507173a 66 #define DBGMCU_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
emilmont 77:869cf507173a 67 #define DBGMCU_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
emilmont 77:869cf507173a 68 #define DBGMCU_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP /*!< Only applicable for STM32F042 and STM32F072 devices */
emilmont 77:869cf507173a 69 #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xFDDFE2CC) == 0x00) && ((PERIPH) != 0x00))
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 #define DBGMCU_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP
emilmont 77:869cf507173a 72 #define DBGMCU_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP
emilmont 77:869cf507173a 73 #define DBGMCU_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP
emilmont 77:869cf507173a 74 #define DBGMCU_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP
emilmont 77:869cf507173a 75 #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8F7FF) == 0x00) && ((PERIPH) != 0x00))
emilmont 77:869cf507173a 76
emilmont 77:869cf507173a 77 /**
emilmont 77:869cf507173a 78 * @}
emilmont 77:869cf507173a 79 */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 82 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 /* Device and Revision ID management functions ********************************/
emilmont 77:869cf507173a 85 uint32_t DBGMCU_GetREVID(void);
emilmont 77:869cf507173a 86 uint32_t DBGMCU_GetDEVID(void);
emilmont 77:869cf507173a 87
emilmont 77:869cf507173a 88 /* Peripherals Configuration functions ****************************************/
emilmont 77:869cf507173a 89 void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
emilmont 77:869cf507173a 90 void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
emilmont 77:869cf507173a 91 void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
emilmont 77:869cf507173a 92
emilmont 77:869cf507173a 93 #ifdef __cplusplus
emilmont 77:869cf507173a 94 }
emilmont 77:869cf507173a 95 #endif
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 #endif /* __STM32F0XX_DBGMCU_H */
emilmont 77:869cf507173a 98
emilmont 77:869cf507173a 99 /**
emilmont 77:869cf507173a 100 * @}
emilmont 77:869cf507173a 101 */
emilmont 77:869cf507173a 102
emilmont 77:869cf507173a 103 /**
emilmont 77:869cf507173a 104 * @}
emilmont 77:869cf507173a 105 */
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/