The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_RZ_A1H/TOOLCHAIN_ARM_STD/MBRZA1H.sct@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Anna Bridge |
160:5571c4ff569f | 1 | #! armcc -E |
Anna Bridge |
160:5571c4ff569f | 2 | ;************************************************** |
Anna Bridge |
160:5571c4ff569f | 3 | ; Copyright (c) 2017 ARM Ltd. All rights reserved. |
Anna Bridge |
160:5571c4ff569f | 4 | ;************************************************** |
Anna Bridge |
160:5571c4ff569f | 5 | |
Anna Bridge |
160:5571c4ff569f | 6 | ; Scatter-file for RTX Example on Versatile Express |
Anna Bridge |
160:5571c4ff569f | 7 | |
Anna Bridge |
160:5571c4ff569f | 8 | ; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map. |
Anna Bridge |
160:5571c4ff569f | 9 | |
AnnaBridge | 171:3a7713b1edbc | 10 | #define __RAM_BASE 0x20000000 |
AnnaBridge | 171:3a7713b1edbc | 11 | #define __RAM_SIZE 0x00A00000 |
AnnaBridge | 171:3a7713b1edbc | 12 | #define __NC_RAM_SIZE 0x00100000 |
AnnaBridge | 171:3a7713b1edbc | 13 | #define __NM_RAM_SIZE (__RAM_SIZE - __NC_RAM_SIZE) |
AnnaBridge | 171:3a7713b1edbc | 14 | #define __DATA_NC_BASE (__RAM_BASE + __NM_RAM_SIZE + 0x40000000) |
AnnaBridge | 171:3a7713b1edbc | 15 | |
AnnaBridge | 171:3a7713b1edbc | 16 | #define __UND_STACK_SIZE 0x00000100 |
AnnaBridge | 171:3a7713b1edbc | 17 | #define __SVC_STACK_SIZE 0x00008000 |
AnnaBridge | 171:3a7713b1edbc | 18 | #define __ABT_STACK_SIZE 0x00000100 |
AnnaBridge | 171:3a7713b1edbc | 19 | #define __FIQ_STACK_SIZE 0x00000100 |
AnnaBridge | 171:3a7713b1edbc | 20 | #define __IRQ_STACK_SIZE 0x0000F000 |
AnnaBridge | 171:3a7713b1edbc | 21 | #define __STACK_SIZE (__UND_STACK_SIZE + __SVC_STACK_SIZE + __ABT_STACK_SIZE + __FIQ_STACK_SIZE + __IRQ_STACK_SIZE) |
AnnaBridge | 171:3a7713b1edbc | 22 | |
AnnaBridge | 171:3a7713b1edbc | 23 | #define __TTB_BASE 0x20000000 |
AnnaBridge | 171:3a7713b1edbc | 24 | #define __TTB_SIZE 0x00004000 |
Anna Bridge |
160:5571c4ff569f | 25 | |
AnnaBridge | 170:e95d10626187 | 26 | #if !defined(MBED_APP_START) |
AnnaBridge | 170:e95d10626187 | 27 | #define MBED_APP_START 0x18000000 |
AnnaBridge | 170:e95d10626187 | 28 | #endif |
AnnaBridge | 170:e95d10626187 | 29 | |
AnnaBridge | 170:e95d10626187 | 30 | #if !defined(MBED_APP_SIZE) |
AnnaBridge | 170:e95d10626187 | 31 | #define MBED_APP_SIZE 0x800000 |
AnnaBridge | 170:e95d10626187 | 32 | #endif |
AnnaBridge | 170:e95d10626187 | 33 | |
Anna Bridge |
160:5571c4ff569f | 34 | LOAD_TTB __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM |
Anna Bridge |
160:5571c4ff569f | 35 | { |
Anna Bridge |
160:5571c4ff569f | 36 | TTB +0 EMPTY 0x4000 |
Anna Bridge |
160:5571c4ff569f | 37 | { } ; Level-1 Translation Table for MMU |
Anna Bridge |
160:5571c4ff569f | 38 | } |
Anna Bridge |
160:5571c4ff569f | 39 | |
AnnaBridge | 170:e95d10626187 | 40 | LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region |
Anna Bridge |
160:5571c4ff569f | 41 | { |
AnnaBridge | 170:e95d10626187 | 42 | #if (MBED_APP_START == 0x18000000) |
AnnaBridge | 170:e95d10626187 | 43 | BOOT_LOADER_BEGIN MBED_APP_START FIXED |
Anna Bridge |
160:5571c4ff569f | 44 | { |
Anna Bridge |
160:5571c4ff569f | 45 | * (BOOT_LOADER) |
Anna Bridge |
160:5571c4ff569f | 46 | } |
Anna Bridge |
160:5571c4ff569f | 47 | |
AnnaBridge | 170:e95d10626187 | 48 | VECTORS (MBED_APP_START + 0x4000) FIXED |
Anna Bridge |
160:5571c4ff569f | 49 | { |
Anna Bridge |
160:5571c4ff569f | 50 | * (RESET, +FIRST) ; Vector table and other startup code |
Anna Bridge |
160:5571c4ff569f | 51 | * (InRoot$$Sections) ; All (library) code that must be in a root region |
Anna Bridge |
160:5571c4ff569f | 52 | * (+RO-CODE) ; Application RO code (.text) |
Anna Bridge |
160:5571c4ff569f | 53 | } |
AnnaBridge | 170:e95d10626187 | 54 | #else |
AnnaBridge | 170:e95d10626187 | 55 | VECTORS MBED_APP_START FIXED |
AnnaBridge | 170:e95d10626187 | 56 | { |
AnnaBridge | 170:e95d10626187 | 57 | * (RESET, +FIRST) ; Vector table and other startup code |
AnnaBridge | 170:e95d10626187 | 58 | * (InRoot$$Sections) ; All (library) code that must be in a root region |
AnnaBridge | 170:e95d10626187 | 59 | * (+RO-CODE) ; Application RO code (.text) |
AnnaBridge | 170:e95d10626187 | 60 | } |
AnnaBridge | 170:e95d10626187 | 61 | #endif |
Anna Bridge |
160:5571c4ff569f | 62 | |
Anna Bridge |
160:5571c4ff569f | 63 | RO_DATA +0 |
Anna Bridge |
160:5571c4ff569f | 64 | { * (+RO-DATA) } ; Application RO data (.constdata) |
Anna Bridge |
160:5571c4ff569f | 65 | |
AnnaBridge | 170:e95d10626187 | 66 | RAM_CODE 0x20020000 |
AnnaBridge | 170:e95d10626187 | 67 | { * (RAM_CODE) } ; Application RAM_CODE |
AnnaBridge | 170:e95d10626187 | 68 | |
AnnaBridge | 171:3a7713b1edbc | 69 | RW_DATA +0 ALIGN 0x8 |
Anna Bridge |
160:5571c4ff569f | 70 | { * (+RW) } ; Application RW data (.data) |
Anna Bridge |
160:5571c4ff569f | 71 | |
Anna Bridge |
160:5571c4ff569f | 72 | RW_IRAM1 +0 ALIGN 0x10 |
Anna Bridge |
160:5571c4ff569f | 73 | { * (+ZI) } ; Application ZI data (.bss) |
Anna Bridge |
160:5571c4ff569f | 74 | |
AnnaBridge | 172:65be27845400 | 75 | ARM_LIB_HEAP +0 ALIGN 0x8 |
Anna Bridge |
160:5571c4ff569f | 76 | { * (HEAP) } ; Application heap area (HEAP) |
Anna Bridge |
160:5571c4ff569f | 77 | |
Anna Bridge |
160:5571c4ff569f | 78 | ARM_LIB_STACK (__RAM_BASE + __NM_RAM_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down |
Anna Bridge |
160:5571c4ff569f | 79 | { } |
Anna Bridge |
160:5571c4ff569f | 80 | |
Anna Bridge |
160:5571c4ff569f | 81 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
Anna Bridge |
160:5571c4ff569f | 82 | ; RAM-NC : Internal non-cached RAM region |
Anna Bridge |
160:5571c4ff569f | 83 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
Anna Bridge |
160:5571c4ff569f | 84 | |
Anna Bridge |
160:5571c4ff569f | 85 | RW_DATA_NC __DATA_NC_BASE __NC_RAM_SIZE |
Anna Bridge |
160:5571c4ff569f | 86 | { * (NC_DATA) } ; Application RW data Non cached area |
Anna Bridge |
160:5571c4ff569f | 87 | |
Anna Bridge |
160:5571c4ff569f | 88 | ZI_DATA_NC +0 |
Anna Bridge |
160:5571c4ff569f | 89 | { * (NC_BSS) } ; Application ZI data Non cached area |
Anna Bridge |
160:5571c4ff569f | 90 | } |
Anna Bridge |
160:5571c4ff569f | 91 |