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TARGET_NUCLEO_L4R5ZI_P/TOOLCHAIN_IAR/stm32l4xx_ll_i2c.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32l4xx_ll_i2c.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of I2C LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	172:65be27845400	10	*
AnnaBridge	172:65be27845400	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	172:65be27845400	12	* are permitted provided that the following conditions are met:
AnnaBridge	172:65be27845400	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	172:65be27845400	14	* this list of conditions and the following disclaimer.
AnnaBridge	172:65be27845400	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	172:65be27845400	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	172:65be27845400	17	* and/or other materials provided with the distribution.
AnnaBridge	172:65be27845400	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	172:65be27845400	19	* may be used to endorse or promote products derived from this software
AnnaBridge	172:65be27845400	20	* without specific prior written permission.
AnnaBridge	172:65be27845400	21	*
AnnaBridge	172:65be27845400	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	172:65be27845400	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	172:65be27845400	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	172:65be27845400	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	172:65be27845400	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	172:65be27845400	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	172:65be27845400	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	172:65be27845400	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	172:65be27845400	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	172:65be27845400	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	172:65be27845400	32	*
AnnaBridge	172:65be27845400	33	******************************************************************************
AnnaBridge	172:65be27845400	34	*/
AnnaBridge	172:65be27845400	35
AnnaBridge	172:65be27845400	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	37	#ifndef __STM32L4xx_LL_I2C_H
AnnaBridge	172:65be27845400	38	#define __STM32L4xx_LL_I2C_H
AnnaBridge	172:65be27845400	39
AnnaBridge	172:65be27845400	40	#ifdef __cplusplus
AnnaBridge	172:65be27845400	41	extern "C" {
AnnaBridge	172:65be27845400	42	#endif
AnnaBridge	172:65be27845400	43
AnnaBridge	172:65be27845400	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	45	#include "stm32l4xx.h"
AnnaBridge	172:65be27845400	46
AnnaBridge	172:65be27845400	47	/** @addtogroup STM32L4xx_LL_Driver
AnnaBridge	172:65be27845400	48	* @{
AnnaBridge	172:65be27845400	49	*/
AnnaBridge	172:65be27845400	50
AnnaBridge	172:65be27845400	51	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3) \|\| defined (I2C4)
AnnaBridge	172:65be27845400	52
AnnaBridge	172:65be27845400	53	/** @defgroup I2C_LL I2C
AnnaBridge	172:65be27845400	54	* @{
AnnaBridge	172:65be27845400	55	*/
AnnaBridge	172:65be27845400	56
AnnaBridge	172:65be27845400	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	59
AnnaBridge	172:65be27845400	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	61	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	172:65be27845400	62	* @{
AnnaBridge	172:65be27845400	63	*/
AnnaBridge	172:65be27845400	64	/**
AnnaBridge	172:65be27845400	65	* @}
AnnaBridge	172:65be27845400	66	*/
AnnaBridge	172:65be27845400	67
AnnaBridge	172:65be27845400	68	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	69	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	70	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	172:65be27845400	71	* @{
AnnaBridge	172:65be27845400	72	*/
AnnaBridge	172:65be27845400	73	/**
AnnaBridge	172:65be27845400	74	* @}
AnnaBridge	172:65be27845400	75	*/
AnnaBridge	172:65be27845400	76	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	77
AnnaBridge	172:65be27845400	78	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	79	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	80	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	172:65be27845400	81	* @{
AnnaBridge	172:65be27845400	82	*/
AnnaBridge	172:65be27845400	83	typedef struct
AnnaBridge	172:65be27845400	84	{
AnnaBridge	172:65be27845400	85	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	172:65be27845400	86	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	172:65be27845400	87
AnnaBridge	172:65be27845400	88	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	172:65be27845400	89
AnnaBridge	172:65be27845400	90	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge	172:65be27845400	91	This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge	172:65be27845400	92	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge	172:65be27845400	93
AnnaBridge	172:65be27845400	94	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge	172:65be27845400	95
AnnaBridge	172:65be27845400	96	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge	172:65be27845400	97	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge	172:65be27845400	98
AnnaBridge	172:65be27845400	99	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge	172:65be27845400	100
AnnaBridge	172:65be27845400	101	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge	172:65be27845400	102	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge	172:65be27845400	103
AnnaBridge	172:65be27845400	104	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge	172:65be27845400	105
AnnaBridge	172:65be27845400	106	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	172:65be27845400	107	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	172:65be27845400	108
AnnaBridge	172:65be27845400	109	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	172:65be27845400	110
AnnaBridge	172:65be27845400	111	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	172:65be27845400	112	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	172:65be27845400	113
AnnaBridge	172:65be27845400	114	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	172:65be27845400	115
AnnaBridge	172:65be27845400	116	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	172:65be27845400	117	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	172:65be27845400	118
AnnaBridge	172:65be27845400	119	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	172:65be27845400	120	} LL_I2C_InitTypeDef;
AnnaBridge	172:65be27845400	121	/**
AnnaBridge	172:65be27845400	122	* @}
AnnaBridge	172:65be27845400	123	*/
AnnaBridge	172:65be27845400	124	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	125
AnnaBridge	172:65be27845400	126	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	127	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	172:65be27845400	128	* @{
AnnaBridge	172:65be27845400	129	*/
AnnaBridge	172:65be27845400	130
AnnaBridge	172:65be27845400	131	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	172:65be27845400	132	* @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge	172:65be27845400	133	* @{
AnnaBridge	172:65be27845400	134	*/
AnnaBridge	172:65be27845400	135	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
AnnaBridge	172:65be27845400	136	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
AnnaBridge	172:65be27845400	137	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
AnnaBridge	172:65be27845400	138	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
AnnaBridge	172:65be27845400	139	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
AnnaBridge	172:65be27845400	140	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
AnnaBridge	172:65be27845400	141	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
AnnaBridge	172:65be27845400	142	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
AnnaBridge	172:65be27845400	143	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
AnnaBridge	172:65be27845400	144	/**
AnnaBridge	172:65be27845400	145	* @}
AnnaBridge	172:65be27845400	146	*/
AnnaBridge	172:65be27845400	147
AnnaBridge	172:65be27845400	148	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	149	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	172:65be27845400	150	* @{
AnnaBridge	172:65be27845400	151	*/
AnnaBridge	172:65be27845400	152	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
AnnaBridge	172:65be27845400	153	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
AnnaBridge	172:65be27845400	154	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
AnnaBridge	172:65be27845400	155	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
AnnaBridge	172:65be27845400	156	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
AnnaBridge	172:65be27845400	157	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
AnnaBridge	172:65be27845400	158	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
AnnaBridge	172:65be27845400	159	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
AnnaBridge	172:65be27845400	160	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
AnnaBridge	172:65be27845400	161	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
AnnaBridge	172:65be27845400	162	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
AnnaBridge	172:65be27845400	163	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	172:65be27845400	164	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	172:65be27845400	165	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	172:65be27845400	166	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
AnnaBridge	172:65be27845400	167	/**
AnnaBridge	172:65be27845400	168	* @}
AnnaBridge	172:65be27845400	169	*/
AnnaBridge	172:65be27845400	170
AnnaBridge	172:65be27845400	171	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	172:65be27845400	172	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	172:65be27845400	173	* @{
AnnaBridge	172:65be27845400	174	*/
AnnaBridge	172:65be27845400	175	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
AnnaBridge	172:65be27845400	176	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
AnnaBridge	172:65be27845400	177	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
AnnaBridge	172:65be27845400	178	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
AnnaBridge	172:65be27845400	179	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
AnnaBridge	172:65be27845400	180	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
AnnaBridge	172:65be27845400	181	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
AnnaBridge	172:65be27845400	182	/**
AnnaBridge	172:65be27845400	183	* @}
AnnaBridge	172:65be27845400	184	*/
AnnaBridge	172:65be27845400	185
AnnaBridge	172:65be27845400	186	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	172:65be27845400	187	* @{
AnnaBridge	172:65be27845400	188	*/
AnnaBridge	172:65be27845400	189	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
AnnaBridge	172:65be27845400	190	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	172:65be27845400	191	#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	172:65be27845400	192	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
AnnaBridge	172:65be27845400	193	/**
AnnaBridge	172:65be27845400	194	* @}
AnnaBridge	172:65be27845400	195	*/
AnnaBridge	172:65be27845400	196
AnnaBridge	172:65be27845400	197	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge	172:65be27845400	198	* @{
AnnaBridge	172:65be27845400	199	*/
AnnaBridge	172:65be27845400	200	#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /!< Analog filter is enabled. /
AnnaBridge	172:65be27845400	201	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
AnnaBridge	172:65be27845400	202	/**
AnnaBridge	172:65be27845400	203	* @}
AnnaBridge	172:65be27845400	204	*/
AnnaBridge	172:65be27845400	205
AnnaBridge	172:65be27845400	206	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge	172:65be27845400	207	* @{
AnnaBridge	172:65be27845400	208	*/
AnnaBridge	172:65be27845400	209	#define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /!< Master operates in 7-bit addressing mode. /
AnnaBridge	172:65be27845400	210	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
AnnaBridge	172:65be27845400	211	/**
AnnaBridge	172:65be27845400	212	* @}
AnnaBridge	172:65be27845400	213	*/
AnnaBridge	172:65be27845400	214
AnnaBridge	172:65be27845400	215	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	172:65be27845400	216	* @{
AnnaBridge	172:65be27845400	217	*/
AnnaBridge	172:65be27845400	218	#define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /!< Own address 1 is a 7-bit address. /
AnnaBridge	172:65be27845400	219	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
AnnaBridge	172:65be27845400	220	/**
AnnaBridge	172:65be27845400	221	* @}
AnnaBridge	172:65be27845400	222	*/
AnnaBridge	172:65be27845400	223
AnnaBridge	172:65be27845400	224	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge	172:65be27845400	225	* @{
AnnaBridge	172:65be27845400	226	*/
AnnaBridge	172:65be27845400	227	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
AnnaBridge	172:65be27845400	228	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
AnnaBridge	172:65be27845400	229	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
AnnaBridge	172:65be27845400	230	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
AnnaBridge	172:65be27845400	231	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
AnnaBridge	172:65be27845400	232	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
AnnaBridge	172:65be27845400	233	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
AnnaBridge	172:65be27845400	234	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
AnnaBridge	172:65be27845400	235	/**
AnnaBridge	172:65be27845400	236	* @}
AnnaBridge	172:65be27845400	237	*/
AnnaBridge	172:65be27845400	238
AnnaBridge	172:65be27845400	239	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	172:65be27845400	240	* @{
AnnaBridge	172:65be27845400	241	*/
AnnaBridge	172:65be27845400	242	#define LL_I2C_ACK 0x00000000U /!< ACK is sent after current received byte. /
AnnaBridge	172:65be27845400	243	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
AnnaBridge	172:65be27845400	244	/**
AnnaBridge	172:65be27845400	245	* @}
AnnaBridge	172:65be27845400	246	*/
AnnaBridge	172:65be27845400	247
AnnaBridge	172:65be27845400	248	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge	172:65be27845400	249	* @{
AnnaBridge	172:65be27845400	250	*/
AnnaBridge	172:65be27845400	251	#define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /!< Slave Address in 7-bit. /
AnnaBridge	172:65be27845400	252	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
AnnaBridge	172:65be27845400	253	/**
AnnaBridge	172:65be27845400	254	* @}
AnnaBridge	172:65be27845400	255	*/
AnnaBridge	172:65be27845400	256
AnnaBridge	172:65be27845400	257	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge	172:65be27845400	258	* @{
AnnaBridge	172:65be27845400	259	*/
AnnaBridge	172:65be27845400	260	#define LL_I2C_REQUEST_WRITE 0x00000000U /!< Master request a write transfer. /
AnnaBridge	172:65be27845400	261	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
AnnaBridge	172:65be27845400	262	/**
AnnaBridge	172:65be27845400	263	* @}
AnnaBridge	172:65be27845400	264	*/
AnnaBridge	172:65be27845400	265
AnnaBridge	172:65be27845400	266	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge	172:65be27845400	267	* @{
AnnaBridge	172:65be27845400	268	*/
AnnaBridge	172:65be27845400	269	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
AnnaBridge	172:65be27845400	270	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	172:65be27845400	271	#define LL_I2C_MODE_SOFTEND 0x00000000U /!< Enable I2C Software end mode with no HW PEC comparison. /
AnnaBridge	172:65be27845400	272	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	273	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	274	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	275	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	276	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	277	/**
AnnaBridge	172:65be27845400	278	* @}
AnnaBridge	172:65be27845400	279	*/
AnnaBridge	172:65be27845400	280
AnnaBridge	172:65be27845400	281	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge	172:65be27845400	282	* @{
AnnaBridge	172:65be27845400	283	*/
AnnaBridge	172:65be27845400	284	#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /!< Don't Generate Stop and Start condition. /
AnnaBridge	172:65be27845400	285	#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP) /!< Generate Stop condition (Size should be set to 0). /
AnnaBridge	172:65be27845400	286	#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
AnnaBridge	172:65be27845400	287	#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Start for write request. /
AnnaBridge	172:65be27845400	288	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
AnnaBridge	172:65be27845400	289	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 7Bit address. /
AnnaBridge	172:65be27845400	290	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
AnnaBridge	172:65be27845400	291	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 10Bit address./
AnnaBridge	172:65be27845400	292	/**
AnnaBridge	172:65be27845400	293	* @}
AnnaBridge	172:65be27845400	294	*/
AnnaBridge	172:65be27845400	295
AnnaBridge	172:65be27845400	296	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	172:65be27845400	297	* @{
AnnaBridge	172:65be27845400	298	*/
AnnaBridge	172:65be27845400	299	#define LL_I2C_DIRECTION_WRITE 0x00000000U /!< Write transfer request by master, slave enters receiver mode. /
AnnaBridge	172:65be27845400	300	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
AnnaBridge	172:65be27845400	301	/**
AnnaBridge	172:65be27845400	302	* @}
AnnaBridge	172:65be27845400	303	*/
AnnaBridge	172:65be27845400	304
AnnaBridge	172:65be27845400	305	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	172:65be27845400	306	* @{
AnnaBridge	172:65be27845400	307	*/
AnnaBridge	172:65be27845400	308	#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	172:65be27845400	309	#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
AnnaBridge	172:65be27845400	310	/**
AnnaBridge	172:65be27845400	311	* @}
AnnaBridge	172:65be27845400	312	*/
AnnaBridge	172:65be27845400	313
AnnaBridge	172:65be27845400	314	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge	172:65be27845400	315	* @{
AnnaBridge	172:65be27845400	316	*/
AnnaBridge	172:65be27845400	317	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /!< TimeoutA is used to detect SCL low level timeout. /
AnnaBridge	172:65be27845400	318	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
AnnaBridge	172:65be27845400	319	/**
AnnaBridge	172:65be27845400	320	* @}
AnnaBridge	172:65be27845400	321	*/
AnnaBridge	172:65be27845400	322
AnnaBridge	172:65be27845400	323	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge	172:65be27845400	324	* @{
AnnaBridge	172:65be27845400	325	*/
AnnaBridge	172:65be27845400	326	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
AnnaBridge	172:65be27845400	327	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
AnnaBridge	172:65be27845400	328	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
AnnaBridge	172:65be27845400	329	/**
AnnaBridge	172:65be27845400	330	* @}
AnnaBridge	172:65be27845400	331	*/
AnnaBridge	172:65be27845400	332
AnnaBridge	172:65be27845400	333	/**
AnnaBridge	172:65be27845400	334	* @}
AnnaBridge	172:65be27845400	335	*/
AnnaBridge	172:65be27845400	336
AnnaBridge	172:65be27845400	337	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	338	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	172:65be27845400	339	* @{
AnnaBridge	172:65be27845400	340	*/
AnnaBridge	172:65be27845400	341
AnnaBridge	172:65be27845400	342	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	343	* @{
AnnaBridge	172:65be27845400	344	*/
AnnaBridge	172:65be27845400	345
AnnaBridge	172:65be27845400	346	/**
AnnaBridge	172:65be27845400	347	* @brief Write a value in I2C register
AnnaBridge	172:65be27845400	348	* @param __INSTANCE__ I2C Instance
AnnaBridge	172:65be27845400	349	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	350	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	351	* @retval None
AnnaBridge	172:65be27845400	352	*/
AnnaBridge	172:65be27845400	353	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	172:65be27845400	354
AnnaBridge	172:65be27845400	355	/**
AnnaBridge	172:65be27845400	356	* @brief Read a value in I2C register
AnnaBridge	172:65be27845400	357	* @param __INSTANCE__ I2C Instance
AnnaBridge	172:65be27845400	358	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	359	* @retval Register value
AnnaBridge	172:65be27845400	360	*/
AnnaBridge	172:65be27845400	361	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	172:65be27845400	362	/**
AnnaBridge	172:65be27845400	363	* @}
AnnaBridge	172:65be27845400	364	*/
AnnaBridge	172:65be27845400	365
AnnaBridge	172:65be27845400	366	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge	172:65be27845400	367	* @{
AnnaBridge	172:65be27845400	368	*/
AnnaBridge	172:65be27845400	369	/**
AnnaBridge	172:65be27845400	370	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	172:65be27845400	371	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	172:65be27845400	372	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	172:65be27845400	373	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	172:65be27845400	374	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	172:65be27845400	375	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	172:65be27845400	376	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	377	*/
AnnaBridge	172:65be27845400	378	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	172:65be27845400	379	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	172:65be27845400	380	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	172:65be27845400	381	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	172:65be27845400	382	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	172:65be27845400	383	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge	172:65be27845400	384	/**
AnnaBridge	172:65be27845400	385	* @}
AnnaBridge	172:65be27845400	386	*/
AnnaBridge	172:65be27845400	387
AnnaBridge	172:65be27845400	388	/**
AnnaBridge	172:65be27845400	389	* @}
AnnaBridge	172:65be27845400	390	*/
AnnaBridge	172:65be27845400	391
AnnaBridge	172:65be27845400	392	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	393	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	172:65be27845400	394	* @{
AnnaBridge	172:65be27845400	395	*/
AnnaBridge	172:65be27845400	396
AnnaBridge	172:65be27845400	397	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	172:65be27845400	398	* @{
AnnaBridge	172:65be27845400	399	*/
AnnaBridge	172:65be27845400	400
AnnaBridge	172:65be27845400	401	/**
AnnaBridge	172:65be27845400	402	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	172:65be27845400	403	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	172:65be27845400	404	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	405	* @retval None
AnnaBridge	172:65be27845400	406	*/
AnnaBridge	172:65be27845400	407	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	408	{
AnnaBridge	172:65be27845400	409	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	172:65be27845400	410	}
AnnaBridge	172:65be27845400	411
AnnaBridge	172:65be27845400	412	/**
AnnaBridge	172:65be27845400	413	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	172:65be27845400	414	* @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge	172:65be27845400	415	* Internal state machines and status bits are put back to their reset value.
AnnaBridge	172:65be27845400	416	* When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge	172:65be27845400	417	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	172:65be27845400	418	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	419	* @retval None
AnnaBridge	172:65be27845400	420	*/
AnnaBridge	172:65be27845400	421	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	422	{
AnnaBridge	172:65be27845400	423	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	172:65be27845400	424	}
AnnaBridge	172:65be27845400	425
AnnaBridge	172:65be27845400	426	/**
AnnaBridge	172:65be27845400	427	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	172:65be27845400	428	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	172:65be27845400	429	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	430	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	431	*/
AnnaBridge	172:65be27845400	432	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	433	{
AnnaBridge	172:65be27845400	434	return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge	172:65be27845400	435	}
AnnaBridge	172:65be27845400	436
AnnaBridge	172:65be27845400	437	/**
AnnaBridge	172:65be27845400	438	* @brief Configure Noise Filters (Analog and Digital).
AnnaBridge	172:65be27845400	439	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	172:65be27845400	440	* The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	441	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge	172:65be27845400	442	* CR1 DNF LL_I2C_ConfigFilters
AnnaBridge	172:65be27845400	443	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	444	* @param AnalogFilter This parameter can be one of the following values:
AnnaBridge	172:65be27845400	445	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge	172:65be27845400	446	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	172:65be27845400	447	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	172:65be27845400	448	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	172:65be27845400	449	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	172:65be27845400	450	* @retval None
AnnaBridge	172:65be27845400	451	*/
AnnaBridge	172:65be27845400	452	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge	172:65be27845400	453	{
AnnaBridge	172:65be27845400	454	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge	172:65be27845400	455	}
AnnaBridge	172:65be27845400	456
AnnaBridge	172:65be27845400	457	/**
AnnaBridge	172:65be27845400	458	* @brief Configure Digital Noise Filter.
AnnaBridge	172:65be27845400	459	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	172:65be27845400	460	* This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	461	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge	172:65be27845400	462	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	463	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	172:65be27845400	464	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	172:65be27845400	465	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	172:65be27845400	466	* @retval None
AnnaBridge	172:65be27845400	467	*/
AnnaBridge	172:65be27845400	468	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge	172:65be27845400	469	{
AnnaBridge	172:65be27845400	470	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge	172:65be27845400	471	}
AnnaBridge	172:65be27845400	472
AnnaBridge	172:65be27845400	473	/**
AnnaBridge	172:65be27845400	474	* @brief Get the current Digital Noise Filter configuration.
AnnaBridge	172:65be27845400	475	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge	172:65be27845400	476	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	477	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	478	*/
AnnaBridge	172:65be27845400	479	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	480	{
AnnaBridge	172:65be27845400	481	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge	172:65be27845400	482	}
AnnaBridge	172:65be27845400	483
AnnaBridge	172:65be27845400	484	/**
AnnaBridge	172:65be27845400	485	* @brief Enable Analog Noise Filter.
AnnaBridge	172:65be27845400	486	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	487	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge	172:65be27845400	488	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	489	* @retval None
AnnaBridge	172:65be27845400	490	*/
AnnaBridge	172:65be27845400	491	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	492	{
AnnaBridge	172:65be27845400	493	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	172:65be27845400	494	}
AnnaBridge	172:65be27845400	495
AnnaBridge	172:65be27845400	496	/**
AnnaBridge	172:65be27845400	497	* @brief Disable Analog Noise Filter.
AnnaBridge	172:65be27845400	498	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	499	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge	172:65be27845400	500	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	501	* @retval None
AnnaBridge	172:65be27845400	502	*/
AnnaBridge	172:65be27845400	503	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	504	{
AnnaBridge	172:65be27845400	505	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	172:65be27845400	506	}
AnnaBridge	172:65be27845400	507
AnnaBridge	172:65be27845400	508	/**
AnnaBridge	172:65be27845400	509	* @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge	172:65be27845400	510	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge	172:65be27845400	511	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	512	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	513	*/
AnnaBridge	172:65be27845400	514	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	515	{
AnnaBridge	172:65be27845400	516	return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
AnnaBridge	172:65be27845400	517	}
AnnaBridge	172:65be27845400	518
AnnaBridge	172:65be27845400	519	/**
AnnaBridge	172:65be27845400	520	* @brief Enable DMA transmission requests.
AnnaBridge	172:65be27845400	521	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	172:65be27845400	522	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	523	* @retval None
AnnaBridge	172:65be27845400	524	*/
AnnaBridge	172:65be27845400	525	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	526	{
AnnaBridge	172:65be27845400	527	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	172:65be27845400	528	}
AnnaBridge	172:65be27845400	529
AnnaBridge	172:65be27845400	530	/**
AnnaBridge	172:65be27845400	531	* @brief Disable DMA transmission requests.
AnnaBridge	172:65be27845400	532	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	172:65be27845400	533	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	534	* @retval None
AnnaBridge	172:65be27845400	535	*/
AnnaBridge	172:65be27845400	536	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	537	{
AnnaBridge	172:65be27845400	538	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	172:65be27845400	539	}
AnnaBridge	172:65be27845400	540
AnnaBridge	172:65be27845400	541	/**
AnnaBridge	172:65be27845400	542	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	172:65be27845400	543	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	172:65be27845400	544	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	545	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	546	*/
AnnaBridge	172:65be27845400	547	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	548	{
AnnaBridge	172:65be27845400	549	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
AnnaBridge	172:65be27845400	550	}
AnnaBridge	172:65be27845400	551
AnnaBridge	172:65be27845400	552	/**
AnnaBridge	172:65be27845400	553	* @brief Enable DMA reception requests.
AnnaBridge	172:65be27845400	554	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	172:65be27845400	555	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	556	* @retval None
AnnaBridge	172:65be27845400	557	*/
AnnaBridge	172:65be27845400	558	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	559	{
AnnaBridge	172:65be27845400	560	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	172:65be27845400	561	}
AnnaBridge	172:65be27845400	562
AnnaBridge	172:65be27845400	563	/**
AnnaBridge	172:65be27845400	564	* @brief Disable DMA reception requests.
AnnaBridge	172:65be27845400	565	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	172:65be27845400	566	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	567	* @retval None
AnnaBridge	172:65be27845400	568	*/
AnnaBridge	172:65be27845400	569	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	570	{
AnnaBridge	172:65be27845400	571	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	172:65be27845400	572	}
AnnaBridge	172:65be27845400	573
AnnaBridge	172:65be27845400	574	/**
AnnaBridge	172:65be27845400	575	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	172:65be27845400	576	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	172:65be27845400	577	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	578	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	579	*/
AnnaBridge	172:65be27845400	580	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	581	{
AnnaBridge	172:65be27845400	582	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
AnnaBridge	172:65be27845400	583	}
AnnaBridge	172:65be27845400	584
AnnaBridge	172:65be27845400	585	/**
AnnaBridge	172:65be27845400	586	* @brief Get the data register address used for DMA transfer
AnnaBridge	172:65be27845400	587	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge	172:65be27845400	588	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge	172:65be27845400	589	* @param I2Cx I2C Instance
AnnaBridge	172:65be27845400	590	* @param Direction This parameter can be one of the following values:
AnnaBridge	172:65be27845400	591	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge	172:65be27845400	592	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge	172:65be27845400	593	* @retval Address of data register
AnnaBridge	172:65be27845400	594	*/
AnnaBridge	172:65be27845400	595	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge	172:65be27845400	596	{
AnnaBridge	172:65be27845400	597	register uint32_t data_reg_addr = 0U;
AnnaBridge	172:65be27845400	598
AnnaBridge	172:65be27845400	599	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge	172:65be27845400	600	{
AnnaBridge	172:65be27845400	601	/* return address of TXDR register */
AnnaBridge	172:65be27845400	602	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge	172:65be27845400	603	}
AnnaBridge	172:65be27845400	604	else
AnnaBridge	172:65be27845400	605	{
AnnaBridge	172:65be27845400	606	/* return address of RXDR register */
AnnaBridge	172:65be27845400	607	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge	172:65be27845400	608	}
AnnaBridge	172:65be27845400	609
AnnaBridge	172:65be27845400	610	return data_reg_addr;
AnnaBridge	172:65be27845400	611	}
AnnaBridge	172:65be27845400	612
AnnaBridge	172:65be27845400	613	/**
AnnaBridge	172:65be27845400	614	* @brief Enable Clock stretching.
AnnaBridge	172:65be27845400	615	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	616	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	172:65be27845400	617	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	618	* @retval None
AnnaBridge	172:65be27845400	619	*/
AnnaBridge	172:65be27845400	620	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	621	{
AnnaBridge	172:65be27845400	622	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	172:65be27845400	623	}
AnnaBridge	172:65be27845400	624
AnnaBridge	172:65be27845400	625	/**
AnnaBridge	172:65be27845400	626	* @brief Disable Clock stretching.
AnnaBridge	172:65be27845400	627	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	628	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	172:65be27845400	629	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	630	* @retval None
AnnaBridge	172:65be27845400	631	*/
AnnaBridge	172:65be27845400	632	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	633	{
AnnaBridge	172:65be27845400	634	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	172:65be27845400	635	}
AnnaBridge	172:65be27845400	636
AnnaBridge	172:65be27845400	637	/**
AnnaBridge	172:65be27845400	638	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	172:65be27845400	639	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	172:65be27845400	640	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	641	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	642	*/
AnnaBridge	172:65be27845400	643	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	644	{
AnnaBridge	172:65be27845400	645	return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge	172:65be27845400	646	}
AnnaBridge	172:65be27845400	647
AnnaBridge	172:65be27845400	648	/**
AnnaBridge	172:65be27845400	649	* @brief Enable hardware byte control in slave mode.
AnnaBridge	172:65be27845400	650	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge	172:65be27845400	651	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	652	* @retval None
AnnaBridge	172:65be27845400	653	*/
AnnaBridge	172:65be27845400	654	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	655	{
AnnaBridge	172:65be27845400	656	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	172:65be27845400	657	}
AnnaBridge	172:65be27845400	658
AnnaBridge	172:65be27845400	659	/**
AnnaBridge	172:65be27845400	660	* @brief Disable hardware byte control in slave mode.
AnnaBridge	172:65be27845400	661	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge	172:65be27845400	662	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	663	* @retval None
AnnaBridge	172:65be27845400	664	*/
AnnaBridge	172:65be27845400	665	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	666	{
AnnaBridge	172:65be27845400	667	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	172:65be27845400	668	}
AnnaBridge	172:65be27845400	669
AnnaBridge	172:65be27845400	670	/**
AnnaBridge	172:65be27845400	671	* @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge	172:65be27845400	672	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge	172:65be27845400	673	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	674	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	675	*/
AnnaBridge	172:65be27845400	676	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	677	{
AnnaBridge	172:65be27845400	678	return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
AnnaBridge	172:65be27845400	679	}
AnnaBridge	172:65be27845400	680
AnnaBridge	172:65be27845400	681	/**
AnnaBridge	172:65be27845400	682	* @brief Enable Wakeup from STOP.
AnnaBridge	172:65be27845400	683	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	684	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	685	* @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge	172:65be27845400	686	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge	172:65be27845400	687	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	688	* @retval None
AnnaBridge	172:65be27845400	689	*/
AnnaBridge	172:65be27845400	690	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	691	{
AnnaBridge	172:65be27845400	692	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	172:65be27845400	693	}
AnnaBridge	172:65be27845400	694
AnnaBridge	172:65be27845400	695	/**
AnnaBridge	172:65be27845400	696	* @brief Disable Wakeup from STOP.
AnnaBridge	172:65be27845400	697	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	698	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	699	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge	172:65be27845400	700	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	701	* @retval None
AnnaBridge	172:65be27845400	702	*/
AnnaBridge	172:65be27845400	703	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	704	{
AnnaBridge	172:65be27845400	705	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	172:65be27845400	706	}
AnnaBridge	172:65be27845400	707
AnnaBridge	172:65be27845400	708	/**
AnnaBridge	172:65be27845400	709	* @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge	172:65be27845400	710	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	711	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	712	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge	172:65be27845400	713	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	714	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	715	*/
AnnaBridge	172:65be27845400	716	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	717	{
AnnaBridge	172:65be27845400	718	return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
AnnaBridge	172:65be27845400	719	}
AnnaBridge	172:65be27845400	720
AnnaBridge	172:65be27845400	721	/**
AnnaBridge	172:65be27845400	722	* @brief Enable General Call.
AnnaBridge	172:65be27845400	723	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	172:65be27845400	724	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge	172:65be27845400	725	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	726	* @retval None
AnnaBridge	172:65be27845400	727	*/
AnnaBridge	172:65be27845400	728	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	729	{
AnnaBridge	172:65be27845400	730	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	172:65be27845400	731	}
AnnaBridge	172:65be27845400	732
AnnaBridge	172:65be27845400	733	/**
AnnaBridge	172:65be27845400	734	* @brief Disable General Call.
AnnaBridge	172:65be27845400	735	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	172:65be27845400	736	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge	172:65be27845400	737	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	738	* @retval None
AnnaBridge	172:65be27845400	739	*/
AnnaBridge	172:65be27845400	740	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	741	{
AnnaBridge	172:65be27845400	742	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	172:65be27845400	743	}
AnnaBridge	172:65be27845400	744
AnnaBridge	172:65be27845400	745	/**
AnnaBridge	172:65be27845400	746	* @brief Check if General Call is enabled or disabled.
AnnaBridge	172:65be27845400	747	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge	172:65be27845400	748	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	749	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	750	*/
AnnaBridge	172:65be27845400	751	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	752	{
AnnaBridge	172:65be27845400	753	return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
AnnaBridge	172:65be27845400	754	}
AnnaBridge	172:65be27845400	755
AnnaBridge	172:65be27845400	756	/**
AnnaBridge	172:65be27845400	757	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge	172:65be27845400	758	* @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge	172:65be27845400	759	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge	172:65be27845400	760	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	761	* @param AddressingMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	762	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	172:65be27845400	763	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	172:65be27845400	764	* @retval None
AnnaBridge	172:65be27845400	765	*/
AnnaBridge	172:65be27845400	766	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge	172:65be27845400	767	{
AnnaBridge	172:65be27845400	768	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge	172:65be27845400	769	}
AnnaBridge	172:65be27845400	770
AnnaBridge	172:65be27845400	771	/**
AnnaBridge	172:65be27845400	772	* @brief Get the Master addressing mode.
AnnaBridge	172:65be27845400	773	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge	172:65be27845400	774	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	775	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	776	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	172:65be27845400	777	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	172:65be27845400	778	*/
AnnaBridge	172:65be27845400	779	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	780	{
AnnaBridge	172:65be27845400	781	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge	172:65be27845400	782	}
AnnaBridge	172:65be27845400	783
AnnaBridge	172:65be27845400	784	/**
AnnaBridge	172:65be27845400	785	* @brief Set the Own Address1.
AnnaBridge	172:65be27845400	786	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge	172:65be27845400	787	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge	172:65be27845400	788	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	789	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	172:65be27845400	790	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	172:65be27845400	791	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	172:65be27845400	792	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	172:65be27845400	793	* @retval None
AnnaBridge	172:65be27845400	794	*/
AnnaBridge	172:65be27845400	795	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	172:65be27845400	796	{
AnnaBridge	172:65be27845400	797	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	172:65be27845400	798	}
AnnaBridge	172:65be27845400	799
AnnaBridge	172:65be27845400	800	/**
AnnaBridge	172:65be27845400	801	* @brief Enable acknowledge on Own Address1 match address.
AnnaBridge	172:65be27845400	802	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge	172:65be27845400	803	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	804	* @retval None
AnnaBridge	172:65be27845400	805	*/
AnnaBridge	172:65be27845400	806	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	807	{
AnnaBridge	172:65be27845400	808	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	172:65be27845400	809	}
AnnaBridge	172:65be27845400	810
AnnaBridge	172:65be27845400	811	/**
AnnaBridge	172:65be27845400	812	* @brief Disable acknowledge on Own Address1 match address.
AnnaBridge	172:65be27845400	813	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge	172:65be27845400	814	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	815	* @retval None
AnnaBridge	172:65be27845400	816	*/
AnnaBridge	172:65be27845400	817	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	818	{
AnnaBridge	172:65be27845400	819	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	172:65be27845400	820	}
AnnaBridge	172:65be27845400	821
AnnaBridge	172:65be27845400	822	/**
AnnaBridge	172:65be27845400	823	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	172:65be27845400	824	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge	172:65be27845400	825	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	826	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	827	*/
AnnaBridge	172:65be27845400	828	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	829	{
AnnaBridge	172:65be27845400	830	return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
AnnaBridge	172:65be27845400	831	}
AnnaBridge	172:65be27845400	832
AnnaBridge	172:65be27845400	833	/**
AnnaBridge	172:65be27845400	834	* @brief Set the 7bits Own Address2.
AnnaBridge	172:65be27845400	835	* @note This action has no effect if own address2 is enabled.
AnnaBridge	172:65be27845400	836	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge	172:65be27845400	837	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge	172:65be27845400	838	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	839	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	172:65be27845400	840	* @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge	172:65be27845400	841	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge	172:65be27845400	842	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge	172:65be27845400	843	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge	172:65be27845400	844	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge	172:65be27845400	845	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge	172:65be27845400	846	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge	172:65be27845400	847	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge	172:65be27845400	848	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge	172:65be27845400	849	* @retval None
AnnaBridge	172:65be27845400	850	*/
AnnaBridge	172:65be27845400	851	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge	172:65be27845400	852	{
AnnaBridge	172:65be27845400	853	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
AnnaBridge	172:65be27845400	854	}
AnnaBridge	172:65be27845400	855
AnnaBridge	172:65be27845400	856	/**
AnnaBridge	172:65be27845400	857	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	172:65be27845400	858	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge	172:65be27845400	859	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	860	* @retval None
AnnaBridge	172:65be27845400	861	*/
AnnaBridge	172:65be27845400	862	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	863	{
AnnaBridge	172:65be27845400	864	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	172:65be27845400	865	}
AnnaBridge	172:65be27845400	866
AnnaBridge	172:65be27845400	867	/**
AnnaBridge	172:65be27845400	868	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	172:65be27845400	869	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge	172:65be27845400	870	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	871	* @retval None
AnnaBridge	172:65be27845400	872	*/
AnnaBridge	172:65be27845400	873	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	874	{
AnnaBridge	172:65be27845400	875	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	172:65be27845400	876	}
AnnaBridge	172:65be27845400	877
AnnaBridge	172:65be27845400	878	/**
AnnaBridge	172:65be27845400	879	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	172:65be27845400	880	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge	172:65be27845400	881	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	882	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	883	*/
AnnaBridge	172:65be27845400	884	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	885	{
AnnaBridge	172:65be27845400	886	return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
AnnaBridge	172:65be27845400	887	}
AnnaBridge	172:65be27845400	888
AnnaBridge	172:65be27845400	889	/**
AnnaBridge	172:65be27845400	890	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	172:65be27845400	891	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	892	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge	172:65be27845400	893	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	894	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge	172:65be27845400	895	* @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge	172:65be27845400	896	* @retval None
AnnaBridge	172:65be27845400	897	*/
AnnaBridge	172:65be27845400	898	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge	172:65be27845400	899	{
AnnaBridge	172:65be27845400	900	WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge	172:65be27845400	901	}
AnnaBridge	172:65be27845400	902
AnnaBridge	172:65be27845400	903	/**
AnnaBridge	172:65be27845400	904	* @brief Get the Timing Prescaler setting.
AnnaBridge	172:65be27845400	905	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge	172:65be27845400	906	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	907	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	908	*/
AnnaBridge	172:65be27845400	909	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	910	{
AnnaBridge	172:65be27845400	911	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge	172:65be27845400	912	}
AnnaBridge	172:65be27845400	913
AnnaBridge	172:65be27845400	914	/**
AnnaBridge	172:65be27845400	915	* @brief Get the SCL low period setting.
AnnaBridge	172:65be27845400	916	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge	172:65be27845400	917	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	918	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	919	*/
AnnaBridge	172:65be27845400	920	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	921	{
AnnaBridge	172:65be27845400	922	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge	172:65be27845400	923	}
AnnaBridge	172:65be27845400	924
AnnaBridge	172:65be27845400	925	/**
AnnaBridge	172:65be27845400	926	* @brief Get the SCL high period setting.
AnnaBridge	172:65be27845400	927	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge	172:65be27845400	928	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	929	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	930	*/
AnnaBridge	172:65be27845400	931	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	932	{
AnnaBridge	172:65be27845400	933	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge	172:65be27845400	934	}
AnnaBridge	172:65be27845400	935
AnnaBridge	172:65be27845400	936	/**
AnnaBridge	172:65be27845400	937	* @brief Get the SDA hold time.
AnnaBridge	172:65be27845400	938	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge	172:65be27845400	939	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	940	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	941	*/
AnnaBridge	172:65be27845400	942	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	943	{
AnnaBridge	172:65be27845400	944	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge	172:65be27845400	945	}
AnnaBridge	172:65be27845400	946
AnnaBridge	172:65be27845400	947	/**
AnnaBridge	172:65be27845400	948	* @brief Get the SDA setup time.
AnnaBridge	172:65be27845400	949	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge	172:65be27845400	950	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	951	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	952	*/
AnnaBridge	172:65be27845400	953	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	954	{
AnnaBridge	172:65be27845400	955	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge	172:65be27845400	956	}
AnnaBridge	172:65be27845400	957
AnnaBridge	172:65be27845400	958	/**
AnnaBridge	172:65be27845400	959	* @brief Configure peripheral mode.
AnnaBridge	172:65be27845400	960	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	961	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	962	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge	172:65be27845400	963	* CR1 SMBDEN LL_I2C_SetMode
AnnaBridge	172:65be27845400	964	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	965	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	966	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	172:65be27845400	967	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	172:65be27845400	968	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	172:65be27845400	969	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	172:65be27845400	970	* @retval None
AnnaBridge	172:65be27845400	971	*/
AnnaBridge	172:65be27845400	972	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	172:65be27845400	973	{
AnnaBridge	172:65be27845400	974	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge	172:65be27845400	975	}
AnnaBridge	172:65be27845400	976
AnnaBridge	172:65be27845400	977	/**
AnnaBridge	172:65be27845400	978	* @brief Get peripheral mode.
AnnaBridge	172:65be27845400	979	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	980	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	981	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge	172:65be27845400	982	* CR1 SMBDEN LL_I2C_GetMode
AnnaBridge	172:65be27845400	983	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	984	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	985	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	172:65be27845400	986	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	172:65be27845400	987	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	172:65be27845400	988	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	172:65be27845400	989	*/
AnnaBridge	172:65be27845400	990	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	991	{
AnnaBridge	172:65be27845400	992	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
AnnaBridge	172:65be27845400	993	}
AnnaBridge	172:65be27845400	994
AnnaBridge	172:65be27845400	995	/**
AnnaBridge	172:65be27845400	996	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	172:65be27845400	997	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	998	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	999	* @note SMBus Device mode:
AnnaBridge	172:65be27845400	1000	* - SMBus Alert pin is drived low and
AnnaBridge	172:65be27845400	1001	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	172:65be27845400	1002	* SMBus Host mode:
AnnaBridge	172:65be27845400	1003	* - SMBus Alert pin management is supported.
AnnaBridge	172:65be27845400	1004	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge	172:65be27845400	1005	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1006	* @retval None
AnnaBridge	172:65be27845400	1007	*/
AnnaBridge	172:65be27845400	1008	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1009	{
AnnaBridge	172:65be27845400	1010	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	172:65be27845400	1011	}
AnnaBridge	172:65be27845400	1012
AnnaBridge	172:65be27845400	1013	/**
AnnaBridge	172:65be27845400	1014	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	172:65be27845400	1015	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1016	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1017	* @note SMBus Device mode:
AnnaBridge	172:65be27845400	1018	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	172:65be27845400	1019	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	172:65be27845400	1020	* SMBus Host mode:
AnnaBridge	172:65be27845400	1021	* - SMBus Alert pin management is not supported.
AnnaBridge	172:65be27845400	1022	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge	172:65be27845400	1023	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1024	* @retval None
AnnaBridge	172:65be27845400	1025	*/
AnnaBridge	172:65be27845400	1026	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1027	{
AnnaBridge	172:65be27845400	1028	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	172:65be27845400	1029	}
AnnaBridge	172:65be27845400	1030
AnnaBridge	172:65be27845400	1031	/**
AnnaBridge	172:65be27845400	1032	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	172:65be27845400	1033	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1034	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1035	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge	172:65be27845400	1036	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1037	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1038	*/
AnnaBridge	172:65be27845400	1039	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1040	{
AnnaBridge	172:65be27845400	1041	return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
AnnaBridge	172:65be27845400	1042	}
AnnaBridge	172:65be27845400	1043
AnnaBridge	172:65be27845400	1044	/**
AnnaBridge	172:65be27845400	1045	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	172:65be27845400	1046	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1047	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1048	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge	172:65be27845400	1049	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1050	* @retval None
AnnaBridge	172:65be27845400	1051	*/
AnnaBridge	172:65be27845400	1052	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1053	{
AnnaBridge	172:65be27845400	1054	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	172:65be27845400	1055	}
AnnaBridge	172:65be27845400	1056
AnnaBridge	172:65be27845400	1057	/**
AnnaBridge	172:65be27845400	1058	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	172:65be27845400	1059	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1060	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1061	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge	172:65be27845400	1062	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1063	* @retval None
AnnaBridge	172:65be27845400	1064	*/
AnnaBridge	172:65be27845400	1065	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1066	{
AnnaBridge	172:65be27845400	1067	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	172:65be27845400	1068	}
AnnaBridge	172:65be27845400	1069
AnnaBridge	172:65be27845400	1070	/**
AnnaBridge	172:65be27845400	1071	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	172:65be27845400	1072	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1073	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1074	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge	172:65be27845400	1075	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1076	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1077	*/
AnnaBridge	172:65be27845400	1078	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1079	{
AnnaBridge	172:65be27845400	1080	return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
AnnaBridge	172:65be27845400	1081	}
AnnaBridge	172:65be27845400	1082
AnnaBridge	172:65be27845400	1083	/**
AnnaBridge	172:65be27845400	1084	* @brief Configure the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1085	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1086	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1087	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge	172:65be27845400	1088	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	172:65be27845400	1089	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	172:65be27845400	1090	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge	172:65be27845400	1091	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1092	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1093	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1094	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1095	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1096	* @param TimeoutB
AnnaBridge	172:65be27845400	1097	* @retval None
AnnaBridge	172:65be27845400	1098	*/
AnnaBridge	172:65be27845400	1099	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge	172:65be27845400	1100	uint32_t TimeoutB)
AnnaBridge	172:65be27845400	1101	{
AnnaBridge	172:65be27845400	1102	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	172:65be27845400	1103	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge	172:65be27845400	1104	}
AnnaBridge	172:65be27845400	1105
AnnaBridge	172:65be27845400	1106	/**
AnnaBridge	172:65be27845400	1107	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge	172:65be27845400	1108	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1109	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1110	* @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge	172:65be27845400	1111	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge	172:65be27845400	1112	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1113	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1114	* @retval None
AnnaBridge	172:65be27845400	1115	*/
AnnaBridge	172:65be27845400	1116	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge	172:65be27845400	1117	{
AnnaBridge	172:65be27845400	1118	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge	172:65be27845400	1119	}
AnnaBridge	172:65be27845400	1120
AnnaBridge	172:65be27845400	1121	/**
AnnaBridge	172:65be27845400	1122	* @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge	172:65be27845400	1123	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1124	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1125	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge	172:65be27845400	1126	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1127	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	172:65be27845400	1128	*/
AnnaBridge	172:65be27845400	1129	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1130	{
AnnaBridge	172:65be27845400	1131	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge	172:65be27845400	1132	}
AnnaBridge	172:65be27845400	1133
AnnaBridge	172:65be27845400	1134	/**
AnnaBridge	172:65be27845400	1135	* @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge	172:65be27845400	1136	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1137	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1138	* @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge	172:65be27845400	1139	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge	172:65be27845400	1140	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1141	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1142	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1143	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1144	* @retval None
AnnaBridge	172:65be27845400	1145	*/
AnnaBridge	172:65be27845400	1146	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge	172:65be27845400	1147	{
AnnaBridge	172:65be27845400	1148	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge	172:65be27845400	1149	}
AnnaBridge	172:65be27845400	1150
AnnaBridge	172:65be27845400	1151	/**
AnnaBridge	172:65be27845400	1152	* @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge	172:65be27845400	1153	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1154	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1155	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge	172:65be27845400	1156	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1157	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1158	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1159	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1160	*/
AnnaBridge	172:65be27845400	1161	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1162	{
AnnaBridge	172:65be27845400	1163	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge	172:65be27845400	1164	}
AnnaBridge	172:65be27845400	1165
AnnaBridge	172:65be27845400	1166	/**
AnnaBridge	172:65be27845400	1167	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge	172:65be27845400	1168	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1169	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1170	* @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge	172:65be27845400	1171	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge	172:65be27845400	1172	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1173	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1174	* @retval None
AnnaBridge	172:65be27845400	1175	*/
AnnaBridge	172:65be27845400	1176	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge	172:65be27845400	1177	{
AnnaBridge	172:65be27845400	1178	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	172:65be27845400	1179	}
AnnaBridge	172:65be27845400	1180
AnnaBridge	172:65be27845400	1181	/**
AnnaBridge	172:65be27845400	1182	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge	172:65be27845400	1183	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1184	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1185	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge	172:65be27845400	1186	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1187	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	172:65be27845400	1188	*/
AnnaBridge	172:65be27845400	1189	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1190	{
AnnaBridge	172:65be27845400	1191	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	172:65be27845400	1192	}
AnnaBridge	172:65be27845400	1193
AnnaBridge	172:65be27845400	1194	/**
AnnaBridge	172:65be27845400	1195	* @brief Enable the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1196	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1197	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1198	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge	172:65be27845400	1199	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge	172:65be27845400	1200	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1201	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1202	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1203	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1204	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1205	* @retval None
AnnaBridge	172:65be27845400	1206	*/
AnnaBridge	172:65be27845400	1207	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1208	{
AnnaBridge	172:65be27845400	1209	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	172:65be27845400	1210	}
AnnaBridge	172:65be27845400	1211
AnnaBridge	172:65be27845400	1212	/**
AnnaBridge	172:65be27845400	1213	* @brief Disable the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1214	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1215	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1216	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge	172:65be27845400	1217	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge	172:65be27845400	1218	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1219	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1220	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1221	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1222	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1223	* @retval None
AnnaBridge	172:65be27845400	1224	*/
AnnaBridge	172:65be27845400	1225	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1226	{
AnnaBridge	172:65be27845400	1227	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	172:65be27845400	1228	}
AnnaBridge	172:65be27845400	1229
AnnaBridge	172:65be27845400	1230	/**
AnnaBridge	172:65be27845400	1231	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge	172:65be27845400	1232	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1233	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1234	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge	172:65be27845400	1235	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge	172:65be27845400	1236	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1237	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1238	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1239	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1240	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1241	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1242	*/
AnnaBridge	172:65be27845400	1243	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1244	{
AnnaBridge	172:65be27845400	1245	return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
AnnaBridge	172:65be27845400	1246	}
AnnaBridge	172:65be27845400	1247
AnnaBridge	172:65be27845400	1248	/**
AnnaBridge	172:65be27845400	1249	* @}
AnnaBridge	172:65be27845400	1250	*/
AnnaBridge	172:65be27845400	1251
AnnaBridge	172:65be27845400	1252	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	172:65be27845400	1253	* @{
AnnaBridge	172:65be27845400	1254	*/
AnnaBridge	172:65be27845400	1255
AnnaBridge	172:65be27845400	1256	/**
AnnaBridge	172:65be27845400	1257	* @brief Enable TXIS interrupt.
AnnaBridge	172:65be27845400	1258	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge	172:65be27845400	1259	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1260	* @retval None
AnnaBridge	172:65be27845400	1261	*/
AnnaBridge	172:65be27845400	1262	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1263	{
AnnaBridge	172:65be27845400	1264	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	172:65be27845400	1265	}
AnnaBridge	172:65be27845400	1266
AnnaBridge	172:65be27845400	1267	/**
AnnaBridge	172:65be27845400	1268	* @brief Disable TXIS interrupt.
AnnaBridge	172:65be27845400	1269	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge	172:65be27845400	1270	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1271	* @retval None
AnnaBridge	172:65be27845400	1272	*/
AnnaBridge	172:65be27845400	1273	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1274	{
AnnaBridge	172:65be27845400	1275	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	172:65be27845400	1276	}
AnnaBridge	172:65be27845400	1277
AnnaBridge	172:65be27845400	1278	/**
AnnaBridge	172:65be27845400	1279	* @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1280	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge	172:65be27845400	1281	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1282	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1283	*/
AnnaBridge	172:65be27845400	1284	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1285	{
AnnaBridge	172:65be27845400	1286	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
AnnaBridge	172:65be27845400	1287	}
AnnaBridge	172:65be27845400	1288
AnnaBridge	172:65be27845400	1289	/**
AnnaBridge	172:65be27845400	1290	* @brief Enable RXNE interrupt.
AnnaBridge	172:65be27845400	1291	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge	172:65be27845400	1292	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1293	* @retval None
AnnaBridge	172:65be27845400	1294	*/
AnnaBridge	172:65be27845400	1295	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1296	{
AnnaBridge	172:65be27845400	1297	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	172:65be27845400	1298	}
AnnaBridge	172:65be27845400	1299
AnnaBridge	172:65be27845400	1300	/**
AnnaBridge	172:65be27845400	1301	* @brief Disable RXNE interrupt.
AnnaBridge	172:65be27845400	1302	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge	172:65be27845400	1303	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1304	* @retval None
AnnaBridge	172:65be27845400	1305	*/
AnnaBridge	172:65be27845400	1306	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1307	{
AnnaBridge	172:65be27845400	1308	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	172:65be27845400	1309	}
AnnaBridge	172:65be27845400	1310
AnnaBridge	172:65be27845400	1311	/**
AnnaBridge	172:65be27845400	1312	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1313	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge	172:65be27845400	1314	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1315	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1316	*/
AnnaBridge	172:65be27845400	1317	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1318	{
AnnaBridge	172:65be27845400	1319	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
AnnaBridge	172:65be27845400	1320	}
AnnaBridge	172:65be27845400	1321
AnnaBridge	172:65be27845400	1322	/**
AnnaBridge	172:65be27845400	1323	* @brief Enable Address match interrupt (slave mode only).
AnnaBridge	172:65be27845400	1324	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge	172:65be27845400	1325	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1326	* @retval None
AnnaBridge	172:65be27845400	1327	*/
AnnaBridge	172:65be27845400	1328	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1329	{
AnnaBridge	172:65be27845400	1330	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	172:65be27845400	1331	}
AnnaBridge	172:65be27845400	1332
AnnaBridge	172:65be27845400	1333	/**
AnnaBridge	172:65be27845400	1334	* @brief Disable Address match interrupt (slave mode only).
AnnaBridge	172:65be27845400	1335	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge	172:65be27845400	1336	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1337	* @retval None
AnnaBridge	172:65be27845400	1338	*/
AnnaBridge	172:65be27845400	1339	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1340	{
AnnaBridge	172:65be27845400	1341	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	172:65be27845400	1342	}
AnnaBridge	172:65be27845400	1343
AnnaBridge	172:65be27845400	1344	/**
AnnaBridge	172:65be27845400	1345	* @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1346	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge	172:65be27845400	1347	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1348	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1349	*/
AnnaBridge	172:65be27845400	1350	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1351	{
AnnaBridge	172:65be27845400	1352	return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
AnnaBridge	172:65be27845400	1353	}
AnnaBridge	172:65be27845400	1354
AnnaBridge	172:65be27845400	1355	/**
AnnaBridge	172:65be27845400	1356	* @brief Enable Not acknowledge received interrupt.
AnnaBridge	172:65be27845400	1357	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge	172:65be27845400	1358	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1359	* @retval None
AnnaBridge	172:65be27845400	1360	*/
AnnaBridge	172:65be27845400	1361	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1362	{
AnnaBridge	172:65be27845400	1363	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	172:65be27845400	1364	}
AnnaBridge	172:65be27845400	1365
AnnaBridge	172:65be27845400	1366	/**
AnnaBridge	172:65be27845400	1367	* @brief Disable Not acknowledge received interrupt.
AnnaBridge	172:65be27845400	1368	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge	172:65be27845400	1369	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1370	* @retval None
AnnaBridge	172:65be27845400	1371	*/
AnnaBridge	172:65be27845400	1372	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1373	{
AnnaBridge	172:65be27845400	1374	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	172:65be27845400	1375	}
AnnaBridge	172:65be27845400	1376
AnnaBridge	172:65be27845400	1377	/**
AnnaBridge	172:65be27845400	1378	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1379	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge	172:65be27845400	1380	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1381	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1382	*/
AnnaBridge	172:65be27845400	1383	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1384	{
AnnaBridge	172:65be27845400	1385	return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
AnnaBridge	172:65be27845400	1386	}
AnnaBridge	172:65be27845400	1387
AnnaBridge	172:65be27845400	1388	/**
AnnaBridge	172:65be27845400	1389	* @brief Enable STOP detection interrupt.
AnnaBridge	172:65be27845400	1390	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge	172:65be27845400	1391	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1392	* @retval None
AnnaBridge	172:65be27845400	1393	*/
AnnaBridge	172:65be27845400	1394	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1395	{
AnnaBridge	172:65be27845400	1396	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	172:65be27845400	1397	}
AnnaBridge	172:65be27845400	1398
AnnaBridge	172:65be27845400	1399	/**
AnnaBridge	172:65be27845400	1400	* @brief Disable STOP detection interrupt.
AnnaBridge	172:65be27845400	1401	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge	172:65be27845400	1402	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1403	* @retval None
AnnaBridge	172:65be27845400	1404	*/
AnnaBridge	172:65be27845400	1405	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1406	{
AnnaBridge	172:65be27845400	1407	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	172:65be27845400	1408	}
AnnaBridge	172:65be27845400	1409
AnnaBridge	172:65be27845400	1410	/**
AnnaBridge	172:65be27845400	1411	* @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1412	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge	172:65be27845400	1413	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1414	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1415	*/
AnnaBridge	172:65be27845400	1416	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1417	{
AnnaBridge	172:65be27845400	1418	return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
AnnaBridge	172:65be27845400	1419	}
AnnaBridge	172:65be27845400	1420
AnnaBridge	172:65be27845400	1421	/**
AnnaBridge	172:65be27845400	1422	* @brief Enable Transfer Complete interrupt.
AnnaBridge	172:65be27845400	1423	* @note Any of these events will generate interrupt :
AnnaBridge	172:65be27845400	1424	* Transfer Complete (TC)
AnnaBridge	172:65be27845400	1425	* Transfer Complete Reload (TCR)
AnnaBridge	172:65be27845400	1426	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge	172:65be27845400	1427	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1428	* @retval None
AnnaBridge	172:65be27845400	1429	*/
AnnaBridge	172:65be27845400	1430	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1431	{
AnnaBridge	172:65be27845400	1432	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	172:65be27845400	1433	}
AnnaBridge	172:65be27845400	1434
AnnaBridge	172:65be27845400	1435	/**
AnnaBridge	172:65be27845400	1436	* @brief Disable Transfer Complete interrupt.
AnnaBridge	172:65be27845400	1437	* @note Any of these events will generate interrupt :
AnnaBridge	172:65be27845400	1438	* Transfer Complete (TC)
AnnaBridge	172:65be27845400	1439	* Transfer Complete Reload (TCR)
AnnaBridge	172:65be27845400	1440	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge	172:65be27845400	1441	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1442	* @retval None
AnnaBridge	172:65be27845400	1443	*/
AnnaBridge	172:65be27845400	1444	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1445	{
AnnaBridge	172:65be27845400	1446	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	172:65be27845400	1447	}
AnnaBridge	172:65be27845400	1448
AnnaBridge	172:65be27845400	1449	/**
AnnaBridge	172:65be27845400	1450	* @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1451	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge	172:65be27845400	1452	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1453	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1454	*/
AnnaBridge	172:65be27845400	1455	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1456	{
AnnaBridge	172:65be27845400	1457	return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
AnnaBridge	172:65be27845400	1458	}
AnnaBridge	172:65be27845400	1459
AnnaBridge	172:65be27845400	1460	/**
AnnaBridge	172:65be27845400	1461	* @brief Enable Error interrupts.
AnnaBridge	172:65be27845400	1462	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1463	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1464	* @note Any of these errors will generate interrupt :
AnnaBridge	172:65be27845400	1465	* Arbitration Loss (ARLO)
AnnaBridge	172:65be27845400	1466	* Bus Error detection (BERR)
AnnaBridge	172:65be27845400	1467	* Overrun/Underrun (OVR)
AnnaBridge	172:65be27845400	1468	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	172:65be27845400	1469	* SMBus PEC error detection (PECERR)
AnnaBridge	172:65be27845400	1470	* SMBus Alert pin event detection (ALERT)
AnnaBridge	172:65be27845400	1471	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge	172:65be27845400	1472	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1473	* @retval None
AnnaBridge	172:65be27845400	1474	*/
AnnaBridge	172:65be27845400	1475	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1476	{
AnnaBridge	172:65be27845400	1477	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	172:65be27845400	1478	}
AnnaBridge	172:65be27845400	1479
AnnaBridge	172:65be27845400	1480	/**
AnnaBridge	172:65be27845400	1481	* @brief Disable Error interrupts.
AnnaBridge	172:65be27845400	1482	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1483	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1484	* @note Any of these errors will generate interrupt :
AnnaBridge	172:65be27845400	1485	* Arbitration Loss (ARLO)
AnnaBridge	172:65be27845400	1486	* Bus Error detection (BERR)
AnnaBridge	172:65be27845400	1487	* Overrun/Underrun (OVR)
AnnaBridge	172:65be27845400	1488	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	172:65be27845400	1489	* SMBus PEC error detection (PECERR)
AnnaBridge	172:65be27845400	1490	* SMBus Alert pin event detection (ALERT)
AnnaBridge	172:65be27845400	1491	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge	172:65be27845400	1492	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1493	* @retval None
AnnaBridge	172:65be27845400	1494	*/
AnnaBridge	172:65be27845400	1495	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1496	{
AnnaBridge	172:65be27845400	1497	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	172:65be27845400	1498	}
AnnaBridge	172:65be27845400	1499
AnnaBridge	172:65be27845400	1500	/**
AnnaBridge	172:65be27845400	1501	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	172:65be27845400	1502	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge	172:65be27845400	1503	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1504	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1505	*/
AnnaBridge	172:65be27845400	1506	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1507	{
AnnaBridge	172:65be27845400	1508	return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
AnnaBridge	172:65be27845400	1509	}
AnnaBridge	172:65be27845400	1510
AnnaBridge	172:65be27845400	1511	/**
AnnaBridge	172:65be27845400	1512	* @}
AnnaBridge	172:65be27845400	1513	*/
AnnaBridge	172:65be27845400	1514
AnnaBridge	172:65be27845400	1515	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	172:65be27845400	1516	* @{
AnnaBridge	172:65be27845400	1517	*/
AnnaBridge	172:65be27845400	1518
AnnaBridge	172:65be27845400	1519	/**
AnnaBridge	172:65be27845400	1520	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	172:65be27845400	1521	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	172:65be27845400	1522	* SET: When Transmit data register is empty.
AnnaBridge	172:65be27845400	1523	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	172:65be27845400	1524	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1525	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1526	*/
AnnaBridge	172:65be27845400	1527	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1528	{
AnnaBridge	172:65be27845400	1529	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
AnnaBridge	172:65be27845400	1530	}
AnnaBridge	172:65be27845400	1531
AnnaBridge	172:65be27845400	1532	/**
AnnaBridge	172:65be27845400	1533	* @brief Indicate the status of Transmit interrupt flag.
AnnaBridge	172:65be27845400	1534	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	172:65be27845400	1535	* SET: When Transmit data register is empty.
AnnaBridge	172:65be27845400	1536	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge	172:65be27845400	1537	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1538	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1539	*/
AnnaBridge	172:65be27845400	1540	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1541	{
AnnaBridge	172:65be27845400	1542	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
AnnaBridge	172:65be27845400	1543	}
AnnaBridge	172:65be27845400	1544
AnnaBridge	172:65be27845400	1545	/**
AnnaBridge	172:65be27845400	1546	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	172:65be27845400	1547	* @note RESET: When Receive data register is read.
AnnaBridge	172:65be27845400	1548	* SET: When the received data is copied in Receive data register.
AnnaBridge	172:65be27845400	1549	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	172:65be27845400	1550	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1551	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1552	*/
AnnaBridge	172:65be27845400	1553	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1554	{
AnnaBridge	172:65be27845400	1555	return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
AnnaBridge	172:65be27845400	1556	}
AnnaBridge	172:65be27845400	1557
AnnaBridge	172:65be27845400	1558	/**
AnnaBridge	172:65be27845400	1559	* @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge	172:65be27845400	1560	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1561	* SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge	172:65be27845400	1562	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	172:65be27845400	1563	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1564	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1565	*/
AnnaBridge	172:65be27845400	1566	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1567	{
AnnaBridge	172:65be27845400	1568	return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
AnnaBridge	172:65be27845400	1569	}
AnnaBridge	172:65be27845400	1570
AnnaBridge	172:65be27845400	1571	/**
AnnaBridge	172:65be27845400	1572	* @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge	172:65be27845400	1573	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1574	* SET: When a NACK is received after a byte transmission.
AnnaBridge	172:65be27845400	1575	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge	172:65be27845400	1576	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1577	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1578	*/
AnnaBridge	172:65be27845400	1579	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1580	{
AnnaBridge	172:65be27845400	1581	return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
AnnaBridge	172:65be27845400	1582	}
AnnaBridge	172:65be27845400	1583
AnnaBridge	172:65be27845400	1584	/**
AnnaBridge	172:65be27845400	1585	* @brief Indicate the status of Stop detection flag.
AnnaBridge	172:65be27845400	1586	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1587	* SET: When a Stop condition is detected.
AnnaBridge	172:65be27845400	1588	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	172:65be27845400	1589	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1590	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1591	*/
AnnaBridge	172:65be27845400	1592	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1593	{
AnnaBridge	172:65be27845400	1594	return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
AnnaBridge	172:65be27845400	1595	}
AnnaBridge	172:65be27845400	1596
AnnaBridge	172:65be27845400	1597	/**
AnnaBridge	172:65be27845400	1598	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	172:65be27845400	1599	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1600	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge	172:65be27845400	1601	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge	172:65be27845400	1602	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1603	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1604	*/
AnnaBridge	172:65be27845400	1605	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1606	{
AnnaBridge	172:65be27845400	1607	return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
AnnaBridge	172:65be27845400	1608	}
AnnaBridge	172:65be27845400	1609
AnnaBridge	172:65be27845400	1610	/**
AnnaBridge	172:65be27845400	1611	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	172:65be27845400	1612	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1613	* SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge	172:65be27845400	1614	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge	172:65be27845400	1615	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1616	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1617	*/
AnnaBridge	172:65be27845400	1618	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1619	{
AnnaBridge	172:65be27845400	1620	return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
AnnaBridge	172:65be27845400	1621	}
AnnaBridge	172:65be27845400	1622
AnnaBridge	172:65be27845400	1623	/**
AnnaBridge	172:65be27845400	1624	* @brief Indicate the status of Bus error flag.
AnnaBridge	172:65be27845400	1625	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1626	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	172:65be27845400	1627	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	172:65be27845400	1628	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1629	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1630	*/
AnnaBridge	172:65be27845400	1631	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1632	{
AnnaBridge	172:65be27845400	1633	return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
AnnaBridge	172:65be27845400	1634	}
AnnaBridge	172:65be27845400	1635
AnnaBridge	172:65be27845400	1636	/**
AnnaBridge	172:65be27845400	1637	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	172:65be27845400	1638	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1639	* SET: When arbitration lost.
AnnaBridge	172:65be27845400	1640	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	172:65be27845400	1641	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1642	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1643	*/
AnnaBridge	172:65be27845400	1644	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1645	{
AnnaBridge	172:65be27845400	1646	return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
AnnaBridge	172:65be27845400	1647	}
AnnaBridge	172:65be27845400	1648
AnnaBridge	172:65be27845400	1649	/**
AnnaBridge	172:65be27845400	1650	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge	172:65be27845400	1651	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1652	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	172:65be27845400	1653	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	172:65be27845400	1654	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1655	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1656	*/
AnnaBridge	172:65be27845400	1657	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1658	{
AnnaBridge	172:65be27845400	1659	return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
AnnaBridge	172:65be27845400	1660	}
AnnaBridge	172:65be27845400	1661
AnnaBridge	172:65be27845400	1662	/**
AnnaBridge	172:65be27845400	1663	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	172:65be27845400	1664	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1665	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1666	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1667	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	172:65be27845400	1668	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	172:65be27845400	1669	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1670	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1671	*/
AnnaBridge	172:65be27845400	1672	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1673	{
AnnaBridge	172:65be27845400	1674	return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge	172:65be27845400	1675	}
AnnaBridge	172:65be27845400	1676
AnnaBridge	172:65be27845400	1677	/**
AnnaBridge	172:65be27845400	1678	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	172:65be27845400	1679	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1680	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1681	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1682	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	172:65be27845400	1683	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	172:65be27845400	1684	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1685	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1686	*/
AnnaBridge	172:65be27845400	1687	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1688	{
AnnaBridge	172:65be27845400	1689	return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge	172:65be27845400	1690	}
AnnaBridge	172:65be27845400	1691
AnnaBridge	172:65be27845400	1692	/**
AnnaBridge	172:65be27845400	1693	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	172:65be27845400	1694	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1695	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1696	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1697	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	172:65be27845400	1698	* a falling edge event occurs on SMBA pin.
AnnaBridge	172:65be27845400	1699	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	172:65be27845400	1700	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1701	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1702	*/
AnnaBridge	172:65be27845400	1703	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1704	{
AnnaBridge	172:65be27845400	1705	return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge	172:65be27845400	1706	}
AnnaBridge	172:65be27845400	1707
AnnaBridge	172:65be27845400	1708	/**
AnnaBridge	172:65be27845400	1709	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	172:65be27845400	1710	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1711	* SET: When a Start condition is detected.
AnnaBridge	172:65be27845400	1712	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	172:65be27845400	1713	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1714	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1715	*/
AnnaBridge	172:65be27845400	1716	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1717	{
AnnaBridge	172:65be27845400	1718	return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
AnnaBridge	172:65be27845400	1719	}
AnnaBridge	172:65be27845400	1720
AnnaBridge	172:65be27845400	1721	/**
AnnaBridge	172:65be27845400	1722	* @brief Clear Address Matched flag.
AnnaBridge	172:65be27845400	1723	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge	172:65be27845400	1724	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1725	* @retval None
AnnaBridge	172:65be27845400	1726	*/
AnnaBridge	172:65be27845400	1727	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1728	{
AnnaBridge	172:65be27845400	1729	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge	172:65be27845400	1730	}
AnnaBridge	172:65be27845400	1731
AnnaBridge	172:65be27845400	1732	/**
AnnaBridge	172:65be27845400	1733	* @brief Clear Not Acknowledge flag.
AnnaBridge	172:65be27845400	1734	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge	172:65be27845400	1735	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1736	* @retval None
AnnaBridge	172:65be27845400	1737	*/
AnnaBridge	172:65be27845400	1738	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1739	{
AnnaBridge	172:65be27845400	1740	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge	172:65be27845400	1741	}
AnnaBridge	172:65be27845400	1742
AnnaBridge	172:65be27845400	1743	/**
AnnaBridge	172:65be27845400	1744	* @brief Clear Stop detection flag.
AnnaBridge	172:65be27845400	1745	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge	172:65be27845400	1746	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1747	* @retval None
AnnaBridge	172:65be27845400	1748	*/
AnnaBridge	172:65be27845400	1749	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1750	{
AnnaBridge	172:65be27845400	1751	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge	172:65be27845400	1752	}
AnnaBridge	172:65be27845400	1753
AnnaBridge	172:65be27845400	1754	/**
AnnaBridge	172:65be27845400	1755	* @brief Clear Transmit data register empty flag (TXE).
AnnaBridge	172:65be27845400	1756	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge	172:65be27845400	1757	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge	172:65be27845400	1758	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1759	* @retval None
AnnaBridge	172:65be27845400	1760	*/
AnnaBridge	172:65be27845400	1761	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1762	{
AnnaBridge	172:65be27845400	1763	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge	172:65be27845400	1764	}
AnnaBridge	172:65be27845400	1765
AnnaBridge	172:65be27845400	1766	/**
AnnaBridge	172:65be27845400	1767	* @brief Clear Bus error flag.
AnnaBridge	172:65be27845400	1768	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge	172:65be27845400	1769	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1770	* @retval None
AnnaBridge	172:65be27845400	1771	*/
AnnaBridge	172:65be27845400	1772	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1773	{
AnnaBridge	172:65be27845400	1774	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge	172:65be27845400	1775	}
AnnaBridge	172:65be27845400	1776
AnnaBridge	172:65be27845400	1777	/**
AnnaBridge	172:65be27845400	1778	* @brief Clear Arbitration lost flag.
AnnaBridge	172:65be27845400	1779	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge	172:65be27845400	1780	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1781	* @retval None
AnnaBridge	172:65be27845400	1782	*/
AnnaBridge	172:65be27845400	1783	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1784	{
AnnaBridge	172:65be27845400	1785	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge	172:65be27845400	1786	}
AnnaBridge	172:65be27845400	1787
AnnaBridge	172:65be27845400	1788	/**
AnnaBridge	172:65be27845400	1789	* @brief Clear Overrun/Underrun flag.
AnnaBridge	172:65be27845400	1790	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge	172:65be27845400	1791	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1792	* @retval None
AnnaBridge	172:65be27845400	1793	*/
AnnaBridge	172:65be27845400	1794	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1795	{
AnnaBridge	172:65be27845400	1796	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge	172:65be27845400	1797	}
AnnaBridge	172:65be27845400	1798
AnnaBridge	172:65be27845400	1799	/**
AnnaBridge	172:65be27845400	1800	* @brief Clear SMBus PEC error flag.
AnnaBridge	172:65be27845400	1801	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1802	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1803	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	172:65be27845400	1804	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1805	* @retval None
AnnaBridge	172:65be27845400	1806	*/
AnnaBridge	172:65be27845400	1807	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1808	{
AnnaBridge	172:65be27845400	1809	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge	172:65be27845400	1810	}
AnnaBridge	172:65be27845400	1811
AnnaBridge	172:65be27845400	1812	/**
AnnaBridge	172:65be27845400	1813	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	172:65be27845400	1814	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1815	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1816	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	172:65be27845400	1817	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1818	* @retval None
AnnaBridge	172:65be27845400	1819	*/
AnnaBridge	172:65be27845400	1820	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1821	{
AnnaBridge	172:65be27845400	1822	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge	172:65be27845400	1823	}
AnnaBridge	172:65be27845400	1824
AnnaBridge	172:65be27845400	1825	/**
AnnaBridge	172:65be27845400	1826	* @brief Clear SMBus Alert flag.
AnnaBridge	172:65be27845400	1827	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1828	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1829	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	172:65be27845400	1830	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1831	* @retval None
AnnaBridge	172:65be27845400	1832	*/
AnnaBridge	172:65be27845400	1833	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1834	{
AnnaBridge	172:65be27845400	1835	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge	172:65be27845400	1836	}
AnnaBridge	172:65be27845400	1837
AnnaBridge	172:65be27845400	1838	/**
AnnaBridge	172:65be27845400	1839	* @}
AnnaBridge	172:65be27845400	1840	*/
AnnaBridge	172:65be27845400	1841
AnnaBridge	172:65be27845400	1842	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	172:65be27845400	1843	* @{
AnnaBridge	172:65be27845400	1844	*/
AnnaBridge	172:65be27845400	1845
AnnaBridge	172:65be27845400	1846	/**
AnnaBridge	172:65be27845400	1847	* @brief Enable automatic STOP condition generation (master mode).
AnnaBridge	172:65be27845400	1848	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge	172:65be27845400	1849	* This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge	172:65be27845400	1850	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge	172:65be27845400	1851	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1852	* @retval None
AnnaBridge	172:65be27845400	1853	*/
AnnaBridge	172:65be27845400	1854	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1855	{
AnnaBridge	172:65be27845400	1856	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	172:65be27845400	1857	}
AnnaBridge	172:65be27845400	1858
AnnaBridge	172:65be27845400	1859	/**
AnnaBridge	172:65be27845400	1860	* @brief Disable automatic STOP condition generation (master mode).
AnnaBridge	172:65be27845400	1861	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge	172:65be27845400	1862	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge	172:65be27845400	1863	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1864	* @retval None
AnnaBridge	172:65be27845400	1865	*/
AnnaBridge	172:65be27845400	1866	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1867	{
AnnaBridge	172:65be27845400	1868	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	172:65be27845400	1869	}
AnnaBridge	172:65be27845400	1870
AnnaBridge	172:65be27845400	1871	/**
AnnaBridge	172:65be27845400	1872	* @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge	172:65be27845400	1873	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge	172:65be27845400	1874	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1875	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1876	*/
AnnaBridge	172:65be27845400	1877	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1878	{
AnnaBridge	172:65be27845400	1879	return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
AnnaBridge	172:65be27845400	1880	}
AnnaBridge	172:65be27845400	1881
AnnaBridge	172:65be27845400	1882	/**
AnnaBridge	172:65be27845400	1883	* @brief Enable reload mode (master mode).
AnnaBridge	172:65be27845400	1884	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge	172:65be27845400	1885	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge	172:65be27845400	1886	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1887	* @retval None
AnnaBridge	172:65be27845400	1888	*/
AnnaBridge	172:65be27845400	1889	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1890	{
AnnaBridge	172:65be27845400	1891	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	172:65be27845400	1892	}
AnnaBridge	172:65be27845400	1893
AnnaBridge	172:65be27845400	1894	/**
AnnaBridge	172:65be27845400	1895	* @brief Disable reload mode (master mode).
AnnaBridge	172:65be27845400	1896	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge	172:65be27845400	1897	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge	172:65be27845400	1898	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1899	* @retval None
AnnaBridge	172:65be27845400	1900	*/
AnnaBridge	172:65be27845400	1901	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1902	{
AnnaBridge	172:65be27845400	1903	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	172:65be27845400	1904	}
AnnaBridge	172:65be27845400	1905
AnnaBridge	172:65be27845400	1906	/**
AnnaBridge	172:65be27845400	1907	* @brief Check if reload mode is enabled or disabled.
AnnaBridge	172:65be27845400	1908	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge	172:65be27845400	1909	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1910	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1911	*/
AnnaBridge	172:65be27845400	1912	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1913	{
AnnaBridge	172:65be27845400	1914	return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
AnnaBridge	172:65be27845400	1915	}
AnnaBridge	172:65be27845400	1916
AnnaBridge	172:65be27845400	1917	/**
AnnaBridge	172:65be27845400	1918	* @brief Configure the number of bytes for transfer.
AnnaBridge	172:65be27845400	1919	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	1920	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge	172:65be27845400	1921	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1922	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge	172:65be27845400	1923	* @retval None
AnnaBridge	172:65be27845400	1924	*/
AnnaBridge	172:65be27845400	1925	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge	172:65be27845400	1926	{
AnnaBridge	172:65be27845400	1927	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge	172:65be27845400	1928	}
AnnaBridge	172:65be27845400	1929
AnnaBridge	172:65be27845400	1930	/**
AnnaBridge	172:65be27845400	1931	* @brief Get the number of bytes configured for transfer.
AnnaBridge	172:65be27845400	1932	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge	172:65be27845400	1933	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1934	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1935	*/
AnnaBridge	172:65be27845400	1936	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1937	{
AnnaBridge	172:65be27845400	1938	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge	172:65be27845400	1939	}
AnnaBridge	172:65be27845400	1940
AnnaBridge	172:65be27845400	1941	/**
AnnaBridge	172:65be27845400	1942	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	172:65be27845400	1943	* @note Usage in Slave mode only.
AnnaBridge	172:65be27845400	1944	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge	172:65be27845400	1945	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1946	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1947	* @arg @ref LL_I2C_ACK
AnnaBridge	172:65be27845400	1948	* @arg @ref LL_I2C_NACK
AnnaBridge	172:65be27845400	1949	* @retval None
AnnaBridge	172:65be27845400	1950	*/
AnnaBridge	172:65be27845400	1951	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	172:65be27845400	1952	{
AnnaBridge	172:65be27845400	1953	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge	172:65be27845400	1954	}
AnnaBridge	172:65be27845400	1955
AnnaBridge	172:65be27845400	1956	/**
AnnaBridge	172:65be27845400	1957	* @brief Generate a START or RESTART condition
AnnaBridge	172:65be27845400	1958	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	172:65be27845400	1959	* This action has no effect when RELOAD is set.
AnnaBridge	172:65be27845400	1960	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge	172:65be27845400	1961	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1962	* @retval None
AnnaBridge	172:65be27845400	1963	*/
AnnaBridge	172:65be27845400	1964	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1965	{
AnnaBridge	172:65be27845400	1966	SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge	172:65be27845400	1967	}
AnnaBridge	172:65be27845400	1968
AnnaBridge	172:65be27845400	1969	/**
AnnaBridge	172:65be27845400	1970	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	172:65be27845400	1971	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	172:65be27845400	1972	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1973	* @retval None
AnnaBridge	172:65be27845400	1974	*/
AnnaBridge	172:65be27845400	1975	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1976	{
AnnaBridge	172:65be27845400	1977	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	172:65be27845400	1978	}
AnnaBridge	172:65be27845400	1979
AnnaBridge	172:65be27845400	1980	/**
AnnaBridge	172:65be27845400	1981	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	172:65be27845400	1982	* @note The master sends the complete 10bit slave address read sequence :
AnnaBridge	172:65be27845400	1983	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge	172:65be27845400	1984	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge	172:65be27845400	1985	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1986	* @retval None
AnnaBridge	172:65be27845400	1987	*/
AnnaBridge	172:65be27845400	1988	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1989	{
AnnaBridge	172:65be27845400	1990	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	172:65be27845400	1991	}
AnnaBridge	172:65be27845400	1992
AnnaBridge	172:65be27845400	1993	/**
AnnaBridge	172:65be27845400	1994	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	172:65be27845400	1995	* @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge	172:65be27845400	1996	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge	172:65be27845400	1997	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1998	* @retval None
AnnaBridge	172:65be27845400	1999	*/
AnnaBridge	172:65be27845400	2000	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2001	{
AnnaBridge	172:65be27845400	2002	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	172:65be27845400	2003	}
AnnaBridge	172:65be27845400	2004
AnnaBridge	172:65be27845400	2005	/**
AnnaBridge	172:65be27845400	2006	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge	172:65be27845400	2007	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge	172:65be27845400	2008	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2009	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2010	*/
AnnaBridge	172:65be27845400	2011	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2012	{
AnnaBridge	172:65be27845400	2013	return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
AnnaBridge	172:65be27845400	2014	}
AnnaBridge	172:65be27845400	2015
AnnaBridge	172:65be27845400	2016	/**
AnnaBridge	172:65be27845400	2017	* @brief Configure the transfer direction (master mode).
AnnaBridge	172:65be27845400	2018	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	2019	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge	172:65be27845400	2020	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2021	* @param TransferRequest This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2022	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	172:65be27845400	2023	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	172:65be27845400	2024	* @retval None
AnnaBridge	172:65be27845400	2025	*/
AnnaBridge	172:65be27845400	2026	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge	172:65be27845400	2027	{
AnnaBridge	172:65be27845400	2028	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge	172:65be27845400	2029	}
AnnaBridge	172:65be27845400	2030
AnnaBridge	172:65be27845400	2031	/**
AnnaBridge	172:65be27845400	2032	* @brief Get the transfer direction requested (master mode).
AnnaBridge	172:65be27845400	2033	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge	172:65be27845400	2034	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2035	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	2036	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	172:65be27845400	2037	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	172:65be27845400	2038	*/
AnnaBridge	172:65be27845400	2039	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2040	{
AnnaBridge	172:65be27845400	2041	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge	172:65be27845400	2042	}
AnnaBridge	172:65be27845400	2043
AnnaBridge	172:65be27845400	2044	/**
AnnaBridge	172:65be27845400	2045	* @brief Configure the slave address for transfer (master mode).
AnnaBridge	172:65be27845400	2046	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	2047	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge	172:65be27845400	2048	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2049	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge	172:65be27845400	2050	* @retval None
AnnaBridge	172:65be27845400	2051	*/
AnnaBridge	172:65be27845400	2052	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge	172:65be27845400	2053	{
AnnaBridge	172:65be27845400	2054	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge	172:65be27845400	2055	}
AnnaBridge	172:65be27845400	2056
AnnaBridge	172:65be27845400	2057	/**
AnnaBridge	172:65be27845400	2058	* @brief Get the slave address programmed for transfer.
AnnaBridge	172:65be27845400	2059	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge	172:65be27845400	2060	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2061	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge	172:65be27845400	2062	*/
AnnaBridge	172:65be27845400	2063	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2064	{
AnnaBridge	172:65be27845400	2065	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge	172:65be27845400	2066	}
AnnaBridge	172:65be27845400	2067
AnnaBridge	172:65be27845400	2068	/**
AnnaBridge	172:65be27845400	2069	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge	172:65be27845400	2070	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2071	* CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2072	* CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2073	* CR2 START LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2074	* CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2075	* CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2076	* CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2077	* CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2078	* CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge	172:65be27845400	2079	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2080	* @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge	172:65be27845400	2081	* @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2082	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge	172:65be27845400	2083	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge	172:65be27845400	2084	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	172:65be27845400	2085	* This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge	172:65be27845400	2086	* @param EndMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2087	* @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge	172:65be27845400	2088	* @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge	172:65be27845400	2089	* @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge	172:65be27845400	2090	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge	172:65be27845400	2091	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge	172:65be27845400	2092	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge	172:65be27845400	2093	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge	172:65be27845400	2094	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge	172:65be27845400	2095	* @param Request This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2096	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge	172:65be27845400	2097	* @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge	172:65be27845400	2098	* @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge	172:65be27845400	2099	* @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge	172:65be27845400	2100	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge	172:65be27845400	2101	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge	172:65be27845400	2102	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge	172:65be27845400	2103	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge	172:65be27845400	2104	* @retval None
AnnaBridge	172:65be27845400	2105	*/
AnnaBridge	172:65be27845400	2106	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge	172:65be27845400	2107	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge	172:65be27845400	2108	{
AnnaBridge	172:65be27845400	2109	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
AnnaBridge	172:65be27845400	2110	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	172:65be27845400	2111	SlaveAddr \| SlaveAddrSize \| TransferSize << I2C_CR2_NBYTES_Pos \| EndMode \| Request);
AnnaBridge	172:65be27845400	2112	}
AnnaBridge	172:65be27845400	2113
AnnaBridge	172:65be27845400	2114	/**
AnnaBridge	172:65be27845400	2115	* @brief Indicate the value of transfer direction (slave mode).
AnnaBridge	172:65be27845400	2116	* @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge	172:65be27845400	2117	* SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge	172:65be27845400	2118	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge	172:65be27845400	2119	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2120	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	2121	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	172:65be27845400	2122	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	172:65be27845400	2123	*/
AnnaBridge	172:65be27845400	2124	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2125	{
AnnaBridge	172:65be27845400	2126	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge	172:65be27845400	2127	}
AnnaBridge	172:65be27845400	2128
AnnaBridge	172:65be27845400	2129	/**
AnnaBridge	172:65be27845400	2130	* @brief Return the slave matched address.
AnnaBridge	172:65be27845400	2131	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge	172:65be27845400	2132	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2133	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	172:65be27845400	2134	*/
AnnaBridge	172:65be27845400	2135	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2136	{
AnnaBridge	172:65be27845400	2137	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge	172:65be27845400	2138	}
AnnaBridge	172:65be27845400	2139
AnnaBridge	172:65be27845400	2140	/**
AnnaBridge	172:65be27845400	2141	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	172:65be27845400	2142	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2143	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2144	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge	172:65be27845400	2145	* This bit has no effect when RELOAD bit is set.
AnnaBridge	172:65be27845400	2146	* This bit has no effect in device mode when SBC bit is not set.
AnnaBridge	172:65be27845400	2147	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge	172:65be27845400	2148	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2149	* @retval None
AnnaBridge	172:65be27845400	2150	*/
AnnaBridge	172:65be27845400	2151	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2152	{
AnnaBridge	172:65be27845400	2153	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge	172:65be27845400	2154	}
AnnaBridge	172:65be27845400	2155
AnnaBridge	172:65be27845400	2156	/**
AnnaBridge	172:65be27845400	2157	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge	172:65be27845400	2158	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2159	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2160	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	172:65be27845400	2161	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2162	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2163	*/
AnnaBridge	172:65be27845400	2164	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2165	{
AnnaBridge	172:65be27845400	2166	return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
AnnaBridge	172:65be27845400	2167	}
AnnaBridge	172:65be27845400	2168
AnnaBridge	172:65be27845400	2169	/**
AnnaBridge	172:65be27845400	2170	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	172:65be27845400	2171	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2172	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2173	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge	172:65be27845400	2174	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2175	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2176	*/
AnnaBridge	172:65be27845400	2177	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2178	{
AnnaBridge	172:65be27845400	2179	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge	172:65be27845400	2180	}
AnnaBridge	172:65be27845400	2181
AnnaBridge	172:65be27845400	2182	/**
AnnaBridge	172:65be27845400	2183	* @brief Read Receive Data register.
AnnaBridge	172:65be27845400	2184	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge	172:65be27845400	2185	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2186	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2187	*/
AnnaBridge	172:65be27845400	2188	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2189	{
AnnaBridge	172:65be27845400	2190	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge	172:65be27845400	2191	}
AnnaBridge	172:65be27845400	2192
AnnaBridge	172:65be27845400	2193	/**
AnnaBridge	172:65be27845400	2194	* @brief Write in Transmit Data Register .
AnnaBridge	172:65be27845400	2195	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge	172:65be27845400	2196	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2197	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2198	* @retval None
AnnaBridge	172:65be27845400	2199	*/
AnnaBridge	172:65be27845400	2200	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	172:65be27845400	2201	{
AnnaBridge	172:65be27845400	2202	WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge	172:65be27845400	2203	}
AnnaBridge	172:65be27845400	2204
AnnaBridge	172:65be27845400	2205	/**
AnnaBridge	172:65be27845400	2206	* @}
AnnaBridge	172:65be27845400	2207	*/
AnnaBridge	172:65be27845400	2208
AnnaBridge	172:65be27845400	2209	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	2210	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	172:65be27845400	2211	* @{
AnnaBridge	172:65be27845400	2212	*/
AnnaBridge	172:65be27845400	2213
AnnaBridge	172:65be27845400	2214	uint32_t LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	172:65be27845400	2215	uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	172:65be27845400	2216	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	172:65be27845400	2217
AnnaBridge	172:65be27845400	2218
AnnaBridge	172:65be27845400	2219	/**
AnnaBridge	172:65be27845400	2220	* @}
AnnaBridge	172:65be27845400	2221	*/
AnnaBridge	172:65be27845400	2222	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	2223
AnnaBridge	172:65be27845400	2224	/**
AnnaBridge	172:65be27845400	2225	* @}
AnnaBridge	172:65be27845400	2226	*/
AnnaBridge	172:65be27845400	2227
AnnaBridge	172:65be27845400	2228	/**
AnnaBridge	172:65be27845400	2229	* @}
AnnaBridge	172:65be27845400	2230	*/
AnnaBridge	172:65be27845400	2231
AnnaBridge	172:65be27845400	2232	#endif /* I2C1 \|\| I2C2 \|\| I2C3 \|\| I2C4 */
AnnaBridge	172:65be27845400	2233
AnnaBridge	172:65be27845400	2234	/**
AnnaBridge	172:65be27845400	2235	* @}
AnnaBridge	172:65be27845400	2236	*/
AnnaBridge	172:65be27845400	2237
AnnaBridge	172:65be27845400	2238	#ifdef __cplusplus
AnnaBridge	172:65be27845400	2239	}
AnnaBridge	172:65be27845400	2240	#endif
AnnaBridge	172:65be27845400	2241
AnnaBridge	172:65be27845400	2242	#endif /* __STM32L4xx_LL_I2C_H */
AnnaBridge	172:65be27845400	2243
AnnaBridge	172:65be27845400	2244	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/