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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_hal.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief This file contains all the functions prototypes for the HAL |
AnnaBridge | 172:65be27845400 | 6 | * module driver. |
AnnaBridge | 172:65be27845400 | 7 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 8 | * @attention |
AnnaBridge | 172:65be27845400 | 9 | * |
AnnaBridge | 172:65be27845400 | 10 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
AnnaBridge | 172:65be27845400 | 11 | * All rights reserved.</center></h2> |
AnnaBridge | 172:65be27845400 | 12 | * |
AnnaBridge | 172:65be27845400 | 13 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 14 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 15 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 16 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 17 | * |
AnnaBridge | 172:65be27845400 | 18 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 19 | */ |
AnnaBridge | 172:65be27845400 | 20 | |
AnnaBridge | 172:65be27845400 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 22 | #ifndef STM32H7xx_HAL_H |
AnnaBridge | 172:65be27845400 | 23 | #define STM32H7xx_HAL_H |
AnnaBridge | 172:65be27845400 | 24 | |
AnnaBridge | 172:65be27845400 | 25 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 26 | extern "C" { |
AnnaBridge | 172:65be27845400 | 27 | #endif |
AnnaBridge | 172:65be27845400 | 28 | |
AnnaBridge | 172:65be27845400 | 29 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 30 | #include "stm32h7xx_hal_conf.h" |
AnnaBridge | 172:65be27845400 | 31 | |
AnnaBridge | 172:65be27845400 | 32 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 33 | * @{ |
AnnaBridge | 172:65be27845400 | 34 | */ |
AnnaBridge | 172:65be27845400 | 35 | |
AnnaBridge | 172:65be27845400 | 36 | /** @addtogroup HAL |
AnnaBridge | 172:65be27845400 | 37 | * @{ |
AnnaBridge | 172:65be27845400 | 38 | */ |
AnnaBridge | 172:65be27845400 | 39 | |
AnnaBridge | 172:65be27845400 | 40 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 41 | /** @defgroup HAL_TICK_FREQ Tick Frequency |
AnnaBridge | 172:65be27845400 | 42 | * @{ |
AnnaBridge | 172:65be27845400 | 43 | */ |
AnnaBridge | 172:65be27845400 | 44 | typedef enum |
AnnaBridge | 172:65be27845400 | 45 | { |
AnnaBridge | 172:65be27845400 | 46 | HAL_TICK_FREQ_10HZ = 100U, |
AnnaBridge | 172:65be27845400 | 47 | HAL_TICK_FREQ_100HZ = 10U, |
AnnaBridge | 172:65be27845400 | 48 | HAL_TICK_FREQ_1KHZ = 1U, |
AnnaBridge | 172:65be27845400 | 49 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ |
AnnaBridge | 172:65be27845400 | 50 | } HAL_TickFreqTypeDef; |
AnnaBridge | 172:65be27845400 | 51 | /** |
AnnaBridge | 172:65be27845400 | 52 | * @} |
AnnaBridge | 172:65be27845400 | 53 | */ |
AnnaBridge | 172:65be27845400 | 54 | |
AnnaBridge | 172:65be27845400 | 55 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 56 | |
AnnaBridge | 172:65be27845400 | 57 | /** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale |
AnnaBridge | 172:65be27845400 | 58 | * @{ |
AnnaBridge | 172:65be27845400 | 59 | */ |
AnnaBridge | 172:65be27845400 | 60 | #define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_CSR_VRS_OUT2 /*!< Voltage reference scale 0 (VREF_OUT2) */ |
AnnaBridge | 172:65be27845400 | 61 | #define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_OUT1 /*!< Voltage reference scale 1 (VREF_OUT1) */ |
AnnaBridge | 172:65be27845400 | 62 | #define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_OUT4 /*!< Voltage reference scale 2 (VREF_OUT4) */ |
AnnaBridge | 172:65be27845400 | 63 | #define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_CSR_VRS_OUT3 /*!< Voltage reference scale 3 (VREF_OUT3) */ |
AnnaBridge | 172:65be27845400 | 64 | |
AnnaBridge | 172:65be27845400 | 65 | |
AnnaBridge | 172:65be27845400 | 66 | #define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \ |
AnnaBridge | 172:65be27845400 | 67 | ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1) || \ |
AnnaBridge | 172:65be27845400 | 68 | ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE2) || \ |
AnnaBridge | 172:65be27845400 | 69 | ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE3)) |
AnnaBridge | 172:65be27845400 | 70 | |
AnnaBridge | 172:65be27845400 | 71 | |
AnnaBridge | 172:65be27845400 | 72 | /** |
AnnaBridge | 172:65be27845400 | 73 | * @} |
AnnaBridge | 172:65be27845400 | 74 | */ |
AnnaBridge | 172:65be27845400 | 75 | |
AnnaBridge | 172:65be27845400 | 76 | /** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance |
AnnaBridge | 172:65be27845400 | 77 | * @{ |
AnnaBridge | 172:65be27845400 | 78 | */ |
AnnaBridge | 172:65be27845400 | 79 | #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */ |
AnnaBridge | 172:65be27845400 | 80 | #define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */ |
AnnaBridge | 172:65be27845400 | 81 | |
AnnaBridge | 172:65be27845400 | 82 | #define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \ |
AnnaBridge | 172:65be27845400 | 83 | ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE)) |
AnnaBridge | 172:65be27845400 | 84 | |
AnnaBridge | 172:65be27845400 | 85 | #define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM)) |
AnnaBridge | 172:65be27845400 | 86 | |
AnnaBridge | 172:65be27845400 | 87 | /** |
AnnaBridge | 172:65be27845400 | 88 | * @} |
AnnaBridge | 172:65be27845400 | 89 | */ |
AnnaBridge | 172:65be27845400 | 90 | |
AnnaBridge | 172:65be27845400 | 91 | /** @defgroup SYSCFG_Ethernet_Config Ethernet Config |
AnnaBridge | 172:65be27845400 | 92 | * @{ |
AnnaBridge | 172:65be27845400 | 93 | */ |
AnnaBridge | 172:65be27845400 | 94 | #define SYSCFG_ETH_MII ((uint32_t)0x00000000) /*!< Select the Media Independent Interface */ |
AnnaBridge | 172:65be27845400 | 95 | #define SYSCFG_ETH_RMII SYSCFG_PMCR_EPIS_SEL_2 /*!< Select the Reduced Media Independent Interface */ |
AnnaBridge | 172:65be27845400 | 96 | |
AnnaBridge | 172:65be27845400 | 97 | #define IS_SYSCFG_ETHERNET_CONFIG(CONFIG) (((CONFIG) == SYSCFG_ETH_MII) || \ |
AnnaBridge | 172:65be27845400 | 98 | ((CONFIG) == SYSCFG_ETH_RMII)) |
AnnaBridge | 172:65be27845400 | 99 | |
AnnaBridge | 172:65be27845400 | 100 | /** |
AnnaBridge | 172:65be27845400 | 101 | * @} |
AnnaBridge | 172:65be27845400 | 102 | */ |
AnnaBridge | 172:65be27845400 | 103 | |
AnnaBridge | 172:65be27845400 | 104 | |
AnnaBridge | 172:65be27845400 | 105 | /** @defgroup SYSCFG_Analog_Switch_Config Analog Switch Config |
AnnaBridge | 172:65be27845400 | 106 | * @{ |
AnnaBridge | 172:65be27845400 | 107 | */ |
AnnaBridge | 172:65be27845400 | 108 | #define SYSCFG_SWITCH_PA0 SYSCFG_PMCR_PA0SO /*!< Select PA0 analog switch */ |
AnnaBridge | 172:65be27845400 | 109 | #define SYSCFG_SWITCH_PA1 SYSCFG_PMCR_PA1SO /*!< Select PA1 analog switch */ |
AnnaBridge | 172:65be27845400 | 110 | #define SYSCFG_SWITCH_PC2 SYSCFG_PMCR_PC2SO /*!< Select PC2 analog switch */ |
AnnaBridge | 172:65be27845400 | 111 | #define SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO /*!< Select PC3 analog switch */ |
AnnaBridge | 172:65be27845400 | 112 | |
AnnaBridge | 172:65be27845400 | 113 | |
AnnaBridge | 172:65be27845400 | 114 | #define IS_SYSCFG_ANALOG_SWITCH(SWITCH) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \ |
AnnaBridge | 172:65be27845400 | 115 | (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \ |
AnnaBridge | 172:65be27845400 | 116 | (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \ |
AnnaBridge | 172:65be27845400 | 117 | (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3)) |
AnnaBridge | 172:65be27845400 | 118 | |
AnnaBridge | 172:65be27845400 | 119 | |
AnnaBridge | 172:65be27845400 | 120 | #define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO /*!< PA0 analog switch opened */ |
AnnaBridge | 172:65be27845400 | 121 | #define SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) /*!< PA0 analog switch closed */ |
AnnaBridge | 172:65be27845400 | 122 | #define SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCR_PA1SO /*!< PA1 analog switch opened */ |
AnnaBridge | 172:65be27845400 | 123 | #define SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) /*!< PA1 analog switch closed*/ |
AnnaBridge | 172:65be27845400 | 124 | #define SYSCFG_SWITCH_PC2_OPEN SYSCFG_PMCR_PC2SO /*!< PC2 analog switch opened */ |
AnnaBridge | 172:65be27845400 | 125 | #define SYSCFG_SWITCH_PC2_CLOSE ((uint32_t)0x00000000) /*!< PC2 analog switch closed */ |
AnnaBridge | 172:65be27845400 | 126 | #define SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO /*!< PC3 analog switch opened */ |
AnnaBridge | 172:65be27845400 | 127 | #define SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) /*!< PC3 analog switch closed */ |
AnnaBridge | 172:65be27845400 | 128 | |
AnnaBridge | 172:65be27845400 | 129 | #define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \ |
AnnaBridge | 172:65be27845400 | 130 | (((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \ |
AnnaBridge | 172:65be27845400 | 131 | (((STATE) & SYSCFG_SWITCH_PA1_OPEN) == SYSCFG_SWITCH_PA1_OPEN) || \ |
AnnaBridge | 172:65be27845400 | 132 | (((STATE) & SYSCFG_SWITCH_PA1_CLOSE) == SYSCFG_SWITCH_PA1_CLOSE) || \ |
AnnaBridge | 172:65be27845400 | 133 | (((STATE) & SYSCFG_SWITCH_PC2_OPEN) == SYSCFG_SWITCH_PC2_OPEN) || \ |
AnnaBridge | 172:65be27845400 | 134 | (((STATE) & SYSCFG_SWITCH_PC2_CLOSE) == SYSCFG_SWITCH_PC2_CLOSE) || \ |
AnnaBridge | 172:65be27845400 | 135 | (((STATE) & SYSCFG_SWITCH_PC3_OPEN) == SYSCFG_SWITCH_PC3_OPEN) || \ |
AnnaBridge | 172:65be27845400 | 136 | (((STATE) & SYSCFG_SWITCH_PC3_CLOSE) == SYSCFG_SWITCH_PC3_CLOSE)) |
AnnaBridge | 172:65be27845400 | 137 | /** |
AnnaBridge | 172:65be27845400 | 138 | * @} |
AnnaBridge | 172:65be27845400 | 139 | */ |
AnnaBridge | 172:65be27845400 | 140 | |
AnnaBridge | 172:65be27845400 | 141 | /** @defgroup SYSCFG_Boot_Config Boot Config |
AnnaBridge | 172:65be27845400 | 142 | * @{ |
AnnaBridge | 172:65be27845400 | 143 | */ |
AnnaBridge | 172:65be27845400 | 144 | #define SYSCFG_BOOT_ADDR0 ((uint32_t)0x00000000) /*!< Select Boot address0 */ |
AnnaBridge | 172:65be27845400 | 145 | #define SYSCFG_BOOT_ADDR1 ((uint32_t)0x00000001) /*!< Select Boot address1 */ |
AnnaBridge | 172:65be27845400 | 146 | |
AnnaBridge | 172:65be27845400 | 147 | #define IS_SYSCFG_BOOT_REGISTER(REGISTER) (((REGISTER) == SYSCFG_BOOT_ADDR0)|| \ |
AnnaBridge | 172:65be27845400 | 148 | ((REGISTER) == SYSCFG_BOOT_ADDR1)) |
AnnaBridge | 172:65be27845400 | 149 | |
AnnaBridge | 172:65be27845400 | 150 | #define IS_SYSCFG_BOOT_ADDRESS(ADDRESS) ((ADDRESS) < PERIPH_BASE) |
AnnaBridge | 172:65be27845400 | 151 | |
AnnaBridge | 172:65be27845400 | 152 | /** |
AnnaBridge | 172:65be27845400 | 153 | * @} |
AnnaBridge | 172:65be27845400 | 154 | */ |
AnnaBridge | 172:65be27845400 | 155 | |
AnnaBridge | 172:65be27845400 | 156 | |
AnnaBridge | 172:65be27845400 | 157 | /** @defgroup SYSCFG_IOCompenstionCell_Config IOCompenstionCell Config |
AnnaBridge | 172:65be27845400 | 158 | * @{ |
AnnaBridge | 172:65be27845400 | 159 | */ |
AnnaBridge | 172:65be27845400 | 160 | #define SYSCFG_CELL_CODE ((uint32_t)0x00000000) /*!< Select Code from the cell */ |
AnnaBridge | 172:65be27845400 | 161 | #define SYSCFG_REGISTER_CODE SYSCFG_CCCSR_CS /*!< Code from the SYSCFG compensation cell code register */ |
AnnaBridge | 172:65be27845400 | 162 | |
AnnaBridge | 172:65be27845400 | 163 | #define IS_SYSCFG_CODE_SELECT(SELECT) (((SELECT) == SYSCFG_CELL_CODE)|| \ |
AnnaBridge | 172:65be27845400 | 164 | ((SELECT) == SYSCFG_REGISTER_CODE)) |
AnnaBridge | 172:65be27845400 | 165 | |
AnnaBridge | 172:65be27845400 | 166 | #define IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10UL)) |
AnnaBridge | 172:65be27845400 | 167 | |
AnnaBridge | 172:65be27845400 | 168 | /** |
AnnaBridge | 172:65be27845400 | 169 | * @} |
AnnaBridge | 172:65be27845400 | 170 | */ |
AnnaBridge | 172:65be27845400 | 171 | |
AnnaBridge | 172:65be27845400 | 172 | |
AnnaBridge | 172:65be27845400 | 173 | |
AnnaBridge | 172:65be27845400 | 174 | |
AnnaBridge | 172:65be27845400 | 175 | /** @defgroup EXTI_Event_Input_Config Event Input Config |
AnnaBridge | 172:65be27845400 | 176 | * @{ |
AnnaBridge | 172:65be27845400 | 177 | */ |
AnnaBridge | 172:65be27845400 | 178 | |
AnnaBridge | 172:65be27845400 | 179 | #define EXTI_MODE_IT ((uint32_t)0x00010000) |
AnnaBridge | 172:65be27845400 | 180 | #define EXTI_MODE_EVT ((uint32_t)0x00020000) |
AnnaBridge | 172:65be27845400 | 181 | #define EXTI_RISING_EDGE ((uint32_t)0x00100000) |
AnnaBridge | 172:65be27845400 | 182 | #define EXTI_FALLING_EDGE ((uint32_t)0x00200000) |
AnnaBridge | 172:65be27845400 | 183 | |
AnnaBridge | 172:65be27845400 | 184 | #define IS_EXTI_EDGE_LINE(EDGE) (((EDGE) == EXTI_RISING_EDGE) || ((EDGE) == EXTI_FALLING_EDGE)) |
AnnaBridge | 172:65be27845400 | 185 | #define IS_EXTI_MODE_LINE(MODE) (((MODE) == EXTI_MODE_IT) || ((MODE) == EXTI_MODE_EVT)) |
AnnaBridge | 172:65be27845400 | 186 | |
AnnaBridge | 172:65be27845400 | 187 | #define EXTI_LINE0 ((uint32_t)0x00) /*!< External interrupt LINE 0 */ |
AnnaBridge | 172:65be27845400 | 188 | #define EXTI_LINE1 ((uint32_t)0x01) /*!< External interrupt LINE 1 */ |
AnnaBridge | 172:65be27845400 | 189 | #define EXTI_LINE2 ((uint32_t)0x02) /*!< External interrupt LINE 2 */ |
AnnaBridge | 172:65be27845400 | 190 | #define EXTI_LINE3 ((uint32_t)0x03) /*!< External interrupt LINE 3 */ |
AnnaBridge | 172:65be27845400 | 191 | #define EXTI_LINE4 ((uint32_t)0x04) /*!< External interrupt LINE 4 */ |
AnnaBridge | 172:65be27845400 | 192 | #define EXTI_LINE5 ((uint32_t)0x05) /*!< External interrupt LINE 5 */ |
AnnaBridge | 172:65be27845400 | 193 | #define EXTI_LINE6 ((uint32_t)0x06) /*!< External interrupt LINE 6 */ |
AnnaBridge | 172:65be27845400 | 194 | #define EXTI_LINE7 ((uint32_t)0x07) /*!< External interrupt LINE 7 */ |
AnnaBridge | 172:65be27845400 | 195 | #define EXTI_LINE8 ((uint32_t)0x08) /*!< External interrupt LINE 8 */ |
AnnaBridge | 172:65be27845400 | 196 | #define EXTI_LINE9 ((uint32_t)0x09) /*!< External interrupt LINE 9 */ |
AnnaBridge | 172:65be27845400 | 197 | #define EXTI_LINE10 ((uint32_t)0x0A) /*!< External interrupt LINE 10 */ |
AnnaBridge | 172:65be27845400 | 198 | #define EXTI_LINE11 ((uint32_t)0x0B) /*!< External interrupt LINE 11 */ |
AnnaBridge | 172:65be27845400 | 199 | #define EXTI_LINE12 ((uint32_t)0x0C) /*!< External interrupt LINE 12 */ |
AnnaBridge | 172:65be27845400 | 200 | #define EXTI_LINE13 ((uint32_t)0x0D) /*!< External interrupt LINE 13 */ |
AnnaBridge | 172:65be27845400 | 201 | #define EXTI_LINE14 ((uint32_t)0x0E) /*!< External interrupt LINE 14 */ |
AnnaBridge | 172:65be27845400 | 202 | #define EXTI_LINE15 ((uint32_t)0x0F) /*!< External interrupt LINE 15 */ |
AnnaBridge | 172:65be27845400 | 203 | #define EXTI_LINE16 ((uint32_t)0x10) |
AnnaBridge | 172:65be27845400 | 204 | #define EXTI_LINE17 ((uint32_t)0x11) |
AnnaBridge | 172:65be27845400 | 205 | #define EXTI_LINE18 ((uint32_t)0x12) |
AnnaBridge | 172:65be27845400 | 206 | #define EXTI_LINE19 ((uint32_t)0x13) |
AnnaBridge | 172:65be27845400 | 207 | #define EXTI_LINE20 ((uint32_t)0x14) |
AnnaBridge | 172:65be27845400 | 208 | #define EXTI_LINE21 ((uint32_t)0x15) |
AnnaBridge | 172:65be27845400 | 209 | #define EXTI_LINE22 ((uint32_t)0x16) |
AnnaBridge | 172:65be27845400 | 210 | #define EXTI_LINE23 ((uint32_t)0x17) |
AnnaBridge | 172:65be27845400 | 211 | #define EXTI_LINE24 ((uint32_t)0x18) |
AnnaBridge | 172:65be27845400 | 212 | #define EXTI_LINE25 ((uint32_t)0x19) |
AnnaBridge | 172:65be27845400 | 213 | #define EXTI_LINE26 ((uint32_t)0x1A) |
AnnaBridge | 172:65be27845400 | 214 | #define EXTI_LINE27 ((uint32_t)0x1B) |
AnnaBridge | 172:65be27845400 | 215 | #define EXTI_LINE28 ((uint32_t)0x1C) |
AnnaBridge | 172:65be27845400 | 216 | #define EXTI_LINE29 ((uint32_t)0x1D) |
AnnaBridge | 172:65be27845400 | 217 | #define EXTI_LINE30 ((uint32_t)0x1E) |
AnnaBridge | 172:65be27845400 | 218 | #define EXTI_LINE31 ((uint32_t)0x1F) |
AnnaBridge | 172:65be27845400 | 219 | #define EXTI_LINE32 ((uint32_t)0x20) |
AnnaBridge | 172:65be27845400 | 220 | #define EXTI_LINE33 ((uint32_t)0x21) |
AnnaBridge | 172:65be27845400 | 221 | #define EXTI_LINE34 ((uint32_t)0x22) |
AnnaBridge | 172:65be27845400 | 222 | #define EXTI_LINE35 ((uint32_t)0x23) |
AnnaBridge | 172:65be27845400 | 223 | #define EXTI_LINE36 ((uint32_t)0x24) |
AnnaBridge | 172:65be27845400 | 224 | #define EXTI_LINE37 ((uint32_t)0x25) |
AnnaBridge | 172:65be27845400 | 225 | #define EXTI_LINE38 ((uint32_t)0x26) |
AnnaBridge | 172:65be27845400 | 226 | #define EXTI_LINE39 ((uint32_t)0x27) |
AnnaBridge | 172:65be27845400 | 227 | |
AnnaBridge | 172:65be27845400 | 228 | #define EXTI_LINE40 ((uint32_t)0x28) |
AnnaBridge | 172:65be27845400 | 229 | #define EXTI_LINE41 ((uint32_t)0x29) |
AnnaBridge | 172:65be27845400 | 230 | #define EXTI_LINE42 ((uint32_t)0x2A) |
AnnaBridge | 172:65be27845400 | 231 | #define EXTI_LINE43 ((uint32_t)0x2B) |
AnnaBridge | 172:65be27845400 | 232 | #define EXTI_LINE44 ((uint32_t)0x2C) |
AnnaBridge | 172:65be27845400 | 233 | /* EXTI_LINE45 Reserved */ |
AnnaBridge | 172:65be27845400 | 234 | /* EXTI_LINE46 Reserved */ |
AnnaBridge | 172:65be27845400 | 235 | #define EXTI_LINE47 ((uint32_t)0x2F) |
AnnaBridge | 172:65be27845400 | 236 | #define EXTI_LINE48 ((uint32_t)0x30) |
AnnaBridge | 172:65be27845400 | 237 | #define EXTI_LINE49 ((uint32_t)0x31) |
AnnaBridge | 172:65be27845400 | 238 | |
AnnaBridge | 172:65be27845400 | 239 | #define EXTI_LINE50 ((uint32_t)0x32) |
AnnaBridge | 172:65be27845400 | 240 | #define EXTI_LINE51 ((uint32_t)0x33) |
AnnaBridge | 172:65be27845400 | 241 | #define EXTI_LINE52 ((uint32_t)0x34) |
AnnaBridge | 172:65be27845400 | 242 | #define EXTI_LINE53 ((uint32_t)0x35) |
AnnaBridge | 172:65be27845400 | 243 | #define EXTI_LINE54 ((uint32_t)0x36) |
AnnaBridge | 172:65be27845400 | 244 | #define EXTI_LINE55 ((uint32_t)0x37) |
AnnaBridge | 172:65be27845400 | 245 | #define EXTI_LINE56 ((uint32_t)0x38) |
AnnaBridge | 172:65be27845400 | 246 | #define EXTI_LINE57 ((uint32_t)0x39) |
AnnaBridge | 172:65be27845400 | 247 | #define EXTI_LINE58 ((uint32_t)0x3A) |
AnnaBridge | 172:65be27845400 | 248 | #define EXTI_LINE59 ((uint32_t)0x3B) |
AnnaBridge | 172:65be27845400 | 249 | |
AnnaBridge | 172:65be27845400 | 250 | #define EXTI_LINE60 ((uint32_t)0x3C) |
AnnaBridge | 172:65be27845400 | 251 | #define EXTI_LINE61 ((uint32_t)0x3D) |
AnnaBridge | 172:65be27845400 | 252 | #define EXTI_LINE62 ((uint32_t)0x3E) |
AnnaBridge | 172:65be27845400 | 253 | #define EXTI_LINE63 ((uint32_t)0x3F) |
AnnaBridge | 172:65be27845400 | 254 | #define EXTI_LINE64 ((uint32_t)0x40) |
AnnaBridge | 172:65be27845400 | 255 | #define EXTI_LINE65 ((uint32_t)0x41) |
AnnaBridge | 172:65be27845400 | 256 | #define EXTI_LINE66 ((uint32_t)0x42) |
AnnaBridge | 172:65be27845400 | 257 | #define EXTI_LINE67 ((uint32_t)0x43) |
AnnaBridge | 172:65be27845400 | 258 | #define EXTI_LINE68 ((uint32_t)0x44) |
AnnaBridge | 172:65be27845400 | 259 | #define EXTI_LINE69 ((uint32_t)0x45) |
AnnaBridge | 172:65be27845400 | 260 | |
AnnaBridge | 172:65be27845400 | 261 | #define EXTI_LINE70 ((uint32_t)0x46) |
AnnaBridge | 172:65be27845400 | 262 | #define EXTI_LINE71 ((uint32_t)0x47) |
AnnaBridge | 172:65be27845400 | 263 | #define EXTI_LINE72 ((uint32_t)0x48) |
AnnaBridge | 172:65be27845400 | 264 | #define EXTI_LINE73 ((uint32_t)0x49) |
AnnaBridge | 172:65be27845400 | 265 | #define EXTI_LINE74 ((uint32_t)0x4A) |
AnnaBridge | 172:65be27845400 | 266 | #define EXTI_LINE75 ((uint32_t)0x4B) |
AnnaBridge | 172:65be27845400 | 267 | #define EXTI_LINE76 ((uint32_t)0x4C) |
AnnaBridge | 172:65be27845400 | 268 | |
AnnaBridge | 172:65be27845400 | 269 | /* EXTI_LINE77 Reserved */ |
AnnaBridge | 172:65be27845400 | 270 | /* EXTI_LINE78 Reserved */ |
AnnaBridge | 172:65be27845400 | 271 | /* EXTI_LINE79 Reserved */ |
AnnaBridge | 172:65be27845400 | 272 | /* EXTI_LINE80 Reserved */ |
AnnaBridge | 172:65be27845400 | 273 | /* EXTI_LINE81 Reserved */ |
AnnaBridge | 172:65be27845400 | 274 | /* EXTI_LINE82 Reserved */ |
AnnaBridge | 172:65be27845400 | 275 | /* EXTI_LINE83 Reserved */ |
AnnaBridge | 172:65be27845400 | 276 | /* EXTI_LINE84 Reserved */ |
AnnaBridge | 172:65be27845400 | 277 | |
AnnaBridge | 172:65be27845400 | 278 | #define EXTI_LINE85 ((uint32_t)0x55) |
AnnaBridge | 172:65be27845400 | 279 | #define EXTI_LINE86 ((uint32_t)0x56) |
AnnaBridge | 172:65be27845400 | 280 | #define EXTI_LINE87 ((uint32_t)0x57) |
AnnaBridge | 172:65be27845400 | 281 | |
AnnaBridge | 172:65be27845400 | 282 | /* EXTI_LINE88 Reserved */ |
AnnaBridge | 172:65be27845400 | 283 | |
AnnaBridge | 172:65be27845400 | 284 | |
AnnaBridge | 172:65be27845400 | 285 | #define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1)|| \ |
AnnaBridge | 172:65be27845400 | 286 | ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \ |
AnnaBridge | 172:65be27845400 | 287 | ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \ |
AnnaBridge | 172:65be27845400 | 288 | ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \ |
AnnaBridge | 172:65be27845400 | 289 | ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \ |
AnnaBridge | 172:65be27845400 | 290 | ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \ |
AnnaBridge | 172:65be27845400 | 291 | ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \ |
AnnaBridge | 172:65be27845400 | 292 | ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \ |
AnnaBridge | 172:65be27845400 | 293 | ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \ |
AnnaBridge | 172:65be27845400 | 294 | ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \ |
AnnaBridge | 172:65be27845400 | 295 | ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \ |
AnnaBridge | 172:65be27845400 | 296 | ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \ |
AnnaBridge | 172:65be27845400 | 297 | ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86)) |
AnnaBridge | 172:65be27845400 | 298 | |
AnnaBridge | 172:65be27845400 | 299 | |
AnnaBridge | 172:65be27845400 | 300 | #define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \ |
AnnaBridge | 172:65be27845400 | 301 | ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \ |
AnnaBridge | 172:65be27845400 | 302 | ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \ |
AnnaBridge | 172:65be27845400 | 303 | ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \ |
AnnaBridge | 172:65be27845400 | 304 | ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \ |
AnnaBridge | 172:65be27845400 | 305 | ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \ |
AnnaBridge | 172:65be27845400 | 306 | ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \ |
AnnaBridge | 172:65be27845400 | 307 | ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \ |
AnnaBridge | 172:65be27845400 | 308 | ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \ |
AnnaBridge | 172:65be27845400 | 309 | ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \ |
AnnaBridge | 172:65be27845400 | 310 | ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \ |
AnnaBridge | 172:65be27845400 | 311 | ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \ |
AnnaBridge | 172:65be27845400 | 312 | ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \ |
AnnaBridge | 172:65be27845400 | 313 | ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \ |
AnnaBridge | 172:65be27845400 | 314 | ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \ |
AnnaBridge | 172:65be27845400 | 315 | ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \ |
AnnaBridge | 172:65be27845400 | 316 | ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \ |
AnnaBridge | 172:65be27845400 | 317 | ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \ |
AnnaBridge | 172:65be27845400 | 318 | ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \ |
AnnaBridge | 172:65be27845400 | 319 | ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \ |
AnnaBridge | 172:65be27845400 | 320 | ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \ |
AnnaBridge | 172:65be27845400 | 321 | ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \ |
AnnaBridge | 172:65be27845400 | 322 | ((LINE) == EXTI_LINE44) || \ |
AnnaBridge | 172:65be27845400 | 323 | ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \ |
AnnaBridge | 172:65be27845400 | 324 | ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \ |
AnnaBridge | 172:65be27845400 | 325 | ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \ |
AnnaBridge | 172:65be27845400 | 326 | ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \ |
AnnaBridge | 172:65be27845400 | 327 | ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \ |
AnnaBridge | 172:65be27845400 | 328 | ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \ |
AnnaBridge | 172:65be27845400 | 329 | ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \ |
AnnaBridge | 172:65be27845400 | 330 | ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \ |
AnnaBridge | 172:65be27845400 | 331 | ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \ |
AnnaBridge | 172:65be27845400 | 332 | ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \ |
AnnaBridge | 172:65be27845400 | 333 | ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \ |
AnnaBridge | 172:65be27845400 | 334 | ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \ |
AnnaBridge | 172:65be27845400 | 335 | ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \ |
AnnaBridge | 172:65be27845400 | 336 | ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \ |
AnnaBridge | 172:65be27845400 | 337 | ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \ |
AnnaBridge | 172:65be27845400 | 338 | ((LINE) == EXTI_LINE85) || \ |
AnnaBridge | 172:65be27845400 | 339 | ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87)) |
AnnaBridge | 172:65be27845400 | 340 | |
AnnaBridge | 172:65be27845400 | 341 | |
AnnaBridge | 172:65be27845400 | 342 | #define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \ |
AnnaBridge | 172:65be27845400 | 343 | ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \ |
AnnaBridge | 172:65be27845400 | 344 | ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \ |
AnnaBridge | 172:65be27845400 | 345 | ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \ |
AnnaBridge | 172:65be27845400 | 346 | ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \ |
AnnaBridge | 172:65be27845400 | 347 | ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \ |
AnnaBridge | 172:65be27845400 | 348 | ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \ |
AnnaBridge | 172:65be27845400 | 349 | ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \ |
AnnaBridge | 172:65be27845400 | 350 | ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \ |
AnnaBridge | 172:65be27845400 | 351 | ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \ |
AnnaBridge | 172:65be27845400 | 352 | ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \ |
AnnaBridge | 172:65be27845400 | 353 | ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \ |
AnnaBridge | 172:65be27845400 | 354 | ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \ |
AnnaBridge | 172:65be27845400 | 355 | ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \ |
AnnaBridge | 172:65be27845400 | 356 | ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \ |
AnnaBridge | 172:65be27845400 | 357 | ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \ |
AnnaBridge | 172:65be27845400 | 358 | ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \ |
AnnaBridge | 172:65be27845400 | 359 | ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \ |
AnnaBridge | 172:65be27845400 | 360 | ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \ |
AnnaBridge | 172:65be27845400 | 361 | ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \ |
AnnaBridge | 172:65be27845400 | 362 | ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \ |
AnnaBridge | 172:65be27845400 | 363 | ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \ |
AnnaBridge | 172:65be27845400 | 364 | ((LINE) == EXTI_LINE44) || \ |
AnnaBridge | 172:65be27845400 | 365 | ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \ |
AnnaBridge | 172:65be27845400 | 366 | ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \ |
AnnaBridge | 172:65be27845400 | 367 | ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \ |
AnnaBridge | 172:65be27845400 | 368 | ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \ |
AnnaBridge | 172:65be27845400 | 369 | ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \ |
AnnaBridge | 172:65be27845400 | 370 | ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \ |
AnnaBridge | 172:65be27845400 | 371 | ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \ |
AnnaBridge | 172:65be27845400 | 372 | ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \ |
AnnaBridge | 172:65be27845400 | 373 | ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \ |
AnnaBridge | 172:65be27845400 | 374 | ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \ |
AnnaBridge | 172:65be27845400 | 375 | ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \ |
AnnaBridge | 172:65be27845400 | 376 | ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \ |
AnnaBridge | 172:65be27845400 | 377 | ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \ |
AnnaBridge | 172:65be27845400 | 378 | ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \ |
AnnaBridge | 172:65be27845400 | 379 | ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \ |
AnnaBridge | 172:65be27845400 | 380 | ((LINE) == EXTI_LINE85) || \ |
AnnaBridge | 172:65be27845400 | 381 | ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87)) |
AnnaBridge | 172:65be27845400 | 382 | |
AnnaBridge | 172:65be27845400 | 383 | |
AnnaBridge | 172:65be27845400 | 384 | #define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \ |
AnnaBridge | 172:65be27845400 | 385 | ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \ |
AnnaBridge | 172:65be27845400 | 386 | ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \ |
AnnaBridge | 172:65be27845400 | 387 | ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \ |
AnnaBridge | 172:65be27845400 | 388 | ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \ |
AnnaBridge | 172:65be27845400 | 389 | ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \ |
AnnaBridge | 172:65be27845400 | 390 | ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \ |
AnnaBridge | 172:65be27845400 | 391 | ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \ |
AnnaBridge | 172:65be27845400 | 392 | ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \ |
AnnaBridge | 172:65be27845400 | 393 | ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \ |
AnnaBridge | 172:65be27845400 | 394 | ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \ |
AnnaBridge | 172:65be27845400 | 395 | ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \ |
AnnaBridge | 172:65be27845400 | 396 | ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \ |
AnnaBridge | 172:65be27845400 | 397 | ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \ |
AnnaBridge | 172:65be27845400 | 398 | ((LINE) == EXTI_LINE53)) |
AnnaBridge | 172:65be27845400 | 399 | |
AnnaBridge | 172:65be27845400 | 400 | |
AnnaBridge | 172:65be27845400 | 401 | #define BDMA_CH6_CLEAR ((uint32_t)0x00000000) /*!< BDMA ch6 event selected as D3 domain pendclear source*/ |
AnnaBridge | 172:65be27845400 | 402 | #define BDMA_CH7_CLEAR ((uint32_t)0x00000001) /*!< BDMA ch7 event selected as D3 domain pendclear source*/ |
AnnaBridge | 172:65be27845400 | 403 | #define LPTIM4_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM4 out selected as D3 domain pendclear source*/ |
AnnaBridge | 172:65be27845400 | 404 | #define LPTIM5_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM5 out selected as D3 domain pendclear source*/ |
AnnaBridge | 172:65be27845400 | 405 | |
AnnaBridge | 172:65be27845400 | 406 | #define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \ |
AnnaBridge | 172:65be27845400 | 407 | ((SOURCE) == LPTIM4_OUT_CLEAR) || ((SOURCE) == LPTIM5_OUT_CLEAR)) |
AnnaBridge | 172:65be27845400 | 408 | |
AnnaBridge | 172:65be27845400 | 409 | /** |
AnnaBridge | 172:65be27845400 | 410 | * @} |
AnnaBridge | 172:65be27845400 | 411 | */ |
AnnaBridge | 172:65be27845400 | 412 | |
AnnaBridge | 172:65be27845400 | 413 | |
AnnaBridge | 172:65be27845400 | 414 | /** @defgroup FMC_SwapBankMapping_Config SwapBankMapping Config |
AnnaBridge | 172:65be27845400 | 415 | * @{ |
AnnaBridge | 172:65be27845400 | 416 | */ |
AnnaBridge | 172:65be27845400 | 417 | #define FMC_SWAPBMAP_DISABLE (0x00000000U) |
AnnaBridge | 172:65be27845400 | 418 | #define FMC_SWAPBMAP_SDRAM_SRAM FMC_BCR1_BMAP_0 |
AnnaBridge | 172:65be27845400 | 419 | #define FMC_SWAPBMAP_SDRAMB2 FMC_BCR1_BMAP_1 |
AnnaBridge | 172:65be27845400 | 420 | |
AnnaBridge | 172:65be27845400 | 421 | #define IS_FMC_SWAPBMAP_MODE(__MODE__) (((__MODE__) == FMC_SWAPBMAP_DISABLE) || \ |
AnnaBridge | 172:65be27845400 | 422 | ((__MODE__) == FMC_SWAPBMAP_SDRAM_SRAM) || \ |
AnnaBridge | 172:65be27845400 | 423 | ((__MODE__) == FMC_SWAPBMAP_SDRAMB2)) |
AnnaBridge | 172:65be27845400 | 424 | /** |
AnnaBridge | 172:65be27845400 | 425 | * @} |
AnnaBridge | 172:65be27845400 | 426 | */ |
AnnaBridge | 172:65be27845400 | 427 | |
AnnaBridge | 172:65be27845400 | 428 | |
AnnaBridge | 172:65be27845400 | 429 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 430 | |
AnnaBridge | 172:65be27845400 | 431 | /** @brief Freeze/Unfreeze Peripherals in Debug mode |
AnnaBridge | 172:65be27845400 | 432 | */ |
AnnaBridge | 172:65be27845400 | 433 | #define __HAL_DBGMCU_FREEZE_WWDG1() (DBGMCU->APB3FZ1 |= (DBGMCU_APB3FZ1_DBG_WWDG1)) |
AnnaBridge | 172:65be27845400 | 434 | |
AnnaBridge | 172:65be27845400 | 435 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM2)) |
AnnaBridge | 172:65be27845400 | 436 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM3)) |
AnnaBridge | 172:65be27845400 | 437 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM4)) |
AnnaBridge | 172:65be27845400 | 438 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM5)) |
AnnaBridge | 172:65be27845400 | 439 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM6)) |
AnnaBridge | 172:65be27845400 | 440 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM7)) |
AnnaBridge | 172:65be27845400 | 441 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM12)) |
AnnaBridge | 172:65be27845400 | 442 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM13)) |
AnnaBridge | 172:65be27845400 | 443 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM14)) |
AnnaBridge | 172:65be27845400 | 444 | #define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_LPTIM1)) |
AnnaBridge | 172:65be27845400 | 445 | #define __HAL_DBGMCU_FREEZE_I2C1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1)) |
AnnaBridge | 172:65be27845400 | 446 | #define __HAL_DBGMCU_FREEZE_I2C2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2)) |
AnnaBridge | 172:65be27845400 | 447 | #define __HAL_DBGMCU_FREEZE_I2C3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3)) |
AnnaBridge | 172:65be27845400 | 448 | #define __HAL_DBGMCU_FREEZE_FDCAN() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN)) |
AnnaBridge | 172:65be27845400 | 449 | |
AnnaBridge | 172:65be27845400 | 450 | |
AnnaBridge | 172:65be27845400 | 451 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1)) |
AnnaBridge | 172:65be27845400 | 452 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8)) |
AnnaBridge | 172:65be27845400 | 453 | #define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM15)) |
AnnaBridge | 172:65be27845400 | 454 | #define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM16)) |
AnnaBridge | 172:65be27845400 | 455 | #define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM17)) |
AnnaBridge | 172:65be27845400 | 456 | #define __HAL_DBGMCU_FREEZE_HRTIM() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_HRTIM)) |
AnnaBridge | 172:65be27845400 | 457 | |
AnnaBridge | 172:65be27845400 | 458 | #define __HAL_DBGMCU_FREEZE_I2C4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_I2C4)) |
AnnaBridge | 172:65be27845400 | 459 | #define __HAL_DBGMCU_FREEZE_LPTIM2() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM2)) |
AnnaBridge | 172:65be27845400 | 460 | #define __HAL_DBGMCU_FREEZE_LPTIM3() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM3)) |
AnnaBridge | 172:65be27845400 | 461 | #define __HAL_DBGMCU_FREEZE_LPTIM4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM4)) |
AnnaBridge | 172:65be27845400 | 462 | #define __HAL_DBGMCU_FREEZE_LPTIM5() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM5)) |
AnnaBridge | 172:65be27845400 | 463 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_RTC)) |
AnnaBridge | 172:65be27845400 | 464 | #define __HAL_DBGMCU_FREEZE_IWDG1() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_IWDG1)) |
AnnaBridge | 172:65be27845400 | 465 | |
AnnaBridge | 172:65be27845400 | 466 | |
AnnaBridge | 172:65be27845400 | 467 | #define __HAL_DBGMCU_UnFreeze_WWDG1() (DBGMCU->APB3FZ1 &= ~ (DBGMCU_APB3FZ1_DBG_WWDG1)) |
AnnaBridge | 172:65be27845400 | 468 | |
AnnaBridge | 172:65be27845400 | 469 | #define __HAL_DBGMCU_UnFreeze_TIM2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM2)) |
AnnaBridge | 172:65be27845400 | 470 | #define __HAL_DBGMCU_UnFreeze_TIM3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM3)) |
AnnaBridge | 172:65be27845400 | 471 | #define __HAL_DBGMCU_UnFreeze_TIM4() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM4)) |
AnnaBridge | 172:65be27845400 | 472 | #define __HAL_DBGMCU_UnFreeze_TIM5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM5)) |
AnnaBridge | 172:65be27845400 | 473 | #define __HAL_DBGMCU_UnFreeze_TIM6() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM6)) |
AnnaBridge | 172:65be27845400 | 474 | #define __HAL_DBGMCU_UnFreeze_TIM7() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM7)) |
AnnaBridge | 172:65be27845400 | 475 | #define __HAL_DBGMCU_UnFreeze_TIM12() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM12)) |
AnnaBridge | 172:65be27845400 | 476 | #define __HAL_DBGMCU_UnFreeze_TIM13() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM13)) |
AnnaBridge | 172:65be27845400 | 477 | #define __HAL_DBGMCU_UnFreeze_TIM14() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM14)) |
AnnaBridge | 172:65be27845400 | 478 | #define __HAL_DBGMCU_UnFreeze_LPTIM1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_LPTIM1)) |
AnnaBridge | 172:65be27845400 | 479 | #define __HAL_DBGMCU_UnFreeze_I2C1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1)) |
AnnaBridge | 172:65be27845400 | 480 | #define __HAL_DBGMCU_UnFreeze_I2C2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2)) |
AnnaBridge | 172:65be27845400 | 481 | #define __HAL_DBGMCU_UnFreeze_I2C3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3)) |
AnnaBridge | 172:65be27845400 | 482 | #define __HAL_DBGMCU_UnFreeze_FDCAN() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_FDCAN)) |
AnnaBridge | 172:65be27845400 | 483 | |
AnnaBridge | 172:65be27845400 | 484 | |
AnnaBridge | 172:65be27845400 | 485 | #define __HAL_DBGMCU_UnFreeze_TIM1() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1)) |
AnnaBridge | 172:65be27845400 | 486 | #define __HAL_DBGMCU_UnFreeze_TIM8() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8)) |
AnnaBridge | 172:65be27845400 | 487 | #define __HAL_DBGMCU_UnFreeze_TIM15() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM15)) |
AnnaBridge | 172:65be27845400 | 488 | #define __HAL_DBGMCU_UnFreeze_TIM16() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM16)) |
AnnaBridge | 172:65be27845400 | 489 | #define __HAL_DBGMCU_UnFreeze_TIM17() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM17)) |
AnnaBridge | 172:65be27845400 | 490 | #define __HAL_DBGMCU_UnFreeze_HRTIM() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_HRTIM)) |
AnnaBridge | 172:65be27845400 | 491 | |
AnnaBridge | 172:65be27845400 | 492 | #define __HAL_DBGMCU_UnFreeze_I2C4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_I2C4)) |
AnnaBridge | 172:65be27845400 | 493 | #define __HAL_DBGMCU_UnFreeze_LPTIM2() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM2)) |
AnnaBridge | 172:65be27845400 | 494 | #define __HAL_DBGMCU_UnFreeze_LPTIM3() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM3)) |
AnnaBridge | 172:65be27845400 | 495 | #define __HAL_DBGMCU_UnFreeze_LPTIM4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM4)) |
AnnaBridge | 172:65be27845400 | 496 | #define __HAL_DBGMCU_UnFreeze_LPTIM5() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM5)) |
AnnaBridge | 172:65be27845400 | 497 | #define __HAL_DBGMCU_UnFreeze_RTC() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_RTC)) |
AnnaBridge | 172:65be27845400 | 498 | #define __HAL_DBGMCU_UnFreeze_IWDG1() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_IWDG1)) |
AnnaBridge | 172:65be27845400 | 499 | |
AnnaBridge | 172:65be27845400 | 500 | /** @defgroup HAL_Private_Macros HAL Private Macros |
AnnaBridge | 172:65be27845400 | 501 | * @{ |
AnnaBridge | 172:65be27845400 | 502 | */ |
AnnaBridge | 172:65be27845400 | 503 | #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ |
AnnaBridge | 172:65be27845400 | 504 | ((FREQ) == HAL_TICK_FREQ_100HZ) || \ |
AnnaBridge | 172:65be27845400 | 505 | ((FREQ) == HAL_TICK_FREQ_1KHZ)) |
AnnaBridge | 172:65be27845400 | 506 | /** |
AnnaBridge | 172:65be27845400 | 507 | * @} |
AnnaBridge | 172:65be27845400 | 508 | */ |
AnnaBridge | 172:65be27845400 | 509 | |
AnnaBridge | 172:65be27845400 | 510 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 511 | |
AnnaBridge | 172:65be27845400 | 512 | /* Initialization and de-initialization functions ******************************/ |
AnnaBridge | 172:65be27845400 | 513 | HAL_StatusTypeDef HAL_Init(void); |
AnnaBridge | 172:65be27845400 | 514 | HAL_StatusTypeDef HAL_DeInit(void); |
AnnaBridge | 172:65be27845400 | 515 | void HAL_MspInit(void); |
AnnaBridge | 172:65be27845400 | 516 | void HAL_MspDeInit(void); |
AnnaBridge | 172:65be27845400 | 517 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
AnnaBridge | 172:65be27845400 | 518 | |
AnnaBridge | 172:65be27845400 | 519 | /* Peripheral Control functions ************************************************/ |
AnnaBridge | 172:65be27845400 | 520 | void HAL_IncTick(void); |
AnnaBridge | 172:65be27845400 | 521 | void HAL_Delay(uint32_t Delay); |
AnnaBridge | 172:65be27845400 | 522 | uint32_t HAL_GetTick(void); |
AnnaBridge | 172:65be27845400 | 523 | uint32_t HAL_GetTickPrio(void); |
AnnaBridge | 172:65be27845400 | 524 | HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); |
AnnaBridge | 172:65be27845400 | 525 | HAL_TickFreqTypeDef HAL_GetTickFreq(void); |
AnnaBridge | 172:65be27845400 | 526 | void HAL_SuspendTick(void); |
AnnaBridge | 172:65be27845400 | 527 | void HAL_ResumeTick(void); |
AnnaBridge | 172:65be27845400 | 528 | uint32_t HAL_GetHalVersion(void); |
AnnaBridge | 172:65be27845400 | 529 | uint32_t HAL_GetREVID(void); |
AnnaBridge | 172:65be27845400 | 530 | uint32_t HAL_GetDEVID(void); |
AnnaBridge | 172:65be27845400 | 531 | void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface); |
AnnaBridge | 172:65be27845400 | 532 | void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState ); |
AnnaBridge | 172:65be27845400 | 533 | void HAL_SYSCFG_EnableBOOST(void); |
AnnaBridge | 172:65be27845400 | 534 | void HAL_SYSCFG_DisableBOOST(void); |
AnnaBridge | 172:65be27845400 | 535 | void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress); |
AnnaBridge | 172:65be27845400 | 536 | void HAL_EnableCompensationCell(void); |
AnnaBridge | 172:65be27845400 | 537 | void HAL_DisableCompensationCell(void); |
AnnaBridge | 172:65be27845400 | 538 | void HAL_SYSCFG_EnableIOSpeedOptimize(void); |
AnnaBridge | 172:65be27845400 | 539 | void HAL_SYSCFG_DisableIOSpeedOptimize(void); |
AnnaBridge | 172:65be27845400 | 540 | void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode); |
AnnaBridge | 172:65be27845400 | 541 | void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode); |
AnnaBridge | 172:65be27845400 | 542 | void HAL_EnableDBGSleepMode(void); |
AnnaBridge | 172:65be27845400 | 543 | void HAL_DisableDBGSleepMode(void); |
AnnaBridge | 172:65be27845400 | 544 | void HAL_EnableDBGStopMode(void); |
AnnaBridge | 172:65be27845400 | 545 | void HAL_DisableDBGStopMode(void); |
AnnaBridge | 172:65be27845400 | 546 | void HAL_EnableDBGStandbyMode(void); |
AnnaBridge | 172:65be27845400 | 547 | void HAL_DisableDBGStandbyMode(void); |
AnnaBridge | 172:65be27845400 | 548 | void HAL_EnableDomain3DBGStopMode(void); |
AnnaBridge | 172:65be27845400 | 549 | void HAL_DisableDomain3DBGStopMode(void); |
AnnaBridge | 172:65be27845400 | 550 | void HAL_EnableDomain3DBGStandbyMode(void); |
AnnaBridge | 172:65be27845400 | 551 | void HAL_DisableDomain3DBGStandbyMode(void); |
AnnaBridge | 172:65be27845400 | 552 | void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line , uint32_t EXTI_Edge ); |
AnnaBridge | 172:65be27845400 | 553 | void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); |
AnnaBridge | 172:65be27845400 | 554 | void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line); |
AnnaBridge | 172:65be27845400 | 555 | void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd); |
AnnaBridge | 172:65be27845400 | 556 | void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd , uint32_t EXTI_ClearSrc); |
AnnaBridge | 172:65be27845400 | 557 | void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig); |
AnnaBridge | 172:65be27845400 | 558 | uint32_t HAL_GetFMCMemorySwappingConfig(void); |
AnnaBridge | 172:65be27845400 | 559 | void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling); |
AnnaBridge | 172:65be27845400 | 560 | void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode); |
AnnaBridge | 172:65be27845400 | 561 | void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue); |
AnnaBridge | 172:65be27845400 | 562 | HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void); |
AnnaBridge | 172:65be27845400 | 563 | void HAL_SYSCFG_DisableVREFBUF(void); |
AnnaBridge | 172:65be27845400 | 564 | |
AnnaBridge | 172:65be27845400 | 565 | /** |
AnnaBridge | 172:65be27845400 | 566 | * @} |
AnnaBridge | 172:65be27845400 | 567 | */ |
AnnaBridge | 172:65be27845400 | 568 | |
AnnaBridge | 172:65be27845400 | 569 | /** |
AnnaBridge | 172:65be27845400 | 570 | * @} |
AnnaBridge | 172:65be27845400 | 571 | */ |
AnnaBridge | 172:65be27845400 | 572 | |
AnnaBridge | 172:65be27845400 | 573 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 574 | } |
AnnaBridge | 172:65be27845400 | 575 | #endif |
AnnaBridge | 172:65be27845400 | 576 | |
AnnaBridge | 172:65be27845400 | 577 | #endif /* STM32H7xx_HAL_H */ |
AnnaBridge | 172:65be27845400 | 578 | |
AnnaBridge | 172:65be27845400 | 579 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |