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Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file clock.h
AnnaBridge 171:3a7713b1edbc 4 * @brief Header of clock hw module functions
AnnaBridge 171:3a7713b1edbc 5 * @internal
AnnaBridge 171:3a7713b1edbc 6 * @author ON Semiconductor
AnnaBridge 171:3a7713b1edbc 7 * $Rev: 3414 $
AnnaBridge 171:3a7713b1edbc 8 * $Date: 2015-06-05 13:27:04 +0530 (Fri, 05 Jun 2015) $
AnnaBridge 171:3a7713b1edbc 9 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
AnnaBridge 171:3a7713b1edbc 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * under limited terms and conditions. The terms and conditions pertaining to the software
AnnaBridge 171:3a7713b1edbc 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
AnnaBridge 171:3a7713b1edbc 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
AnnaBridge 171:3a7713b1edbc 15 * if applicable the software license agreement. Do not use this software and/or
AnnaBridge 171:3a7713b1edbc 16 * documentation unless you have carefully read and you agree to the limited terms and
AnnaBridge 171:3a7713b1edbc 17 * conditions. By using this software and/or documentation, you agree to the limited
AnnaBridge 171:3a7713b1edbc 18 * terms and conditions.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
AnnaBridge 171:3a7713b1edbc 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
AnnaBridge 171:3a7713b1edbc 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
AnnaBridge 171:3a7713b1edbc 25 * @endinternal
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * @ingroup clock
AnnaBridge 171:3a7713b1edbc 28 */
AnnaBridge 171:3a7713b1edbc 29
AnnaBridge 171:3a7713b1edbc 30 #ifndef CLOCK_H_
AnnaBridge 171:3a7713b1edbc 31 #define CLOCK_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 /*************************************************************************************************
AnnaBridge 171:3a7713b1edbc 34 * *
AnnaBridge 171:3a7713b1edbc 35 * Header files *
AnnaBridge 171:3a7713b1edbc 36 * *
AnnaBridge 171:3a7713b1edbc 37 *************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 38
AnnaBridge 171:3a7713b1edbc 39 #include "types.h"
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*************************************************************************************************
AnnaBridge 171:3a7713b1edbc 42 * *
AnnaBridge 171:3a7713b1edbc 43 * Symbolic Constants *
AnnaBridge 171:3a7713b1edbc 44 * *
AnnaBridge 171:3a7713b1edbc 45 *************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** Peripherals clock disable defines /
AnnaBridge 171:3a7713b1edbc 48 * @details
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50 #define CLOCK_TIMER0 (0x0) /**< <b> Timer 0 clock enable offset </b>*/
AnnaBridge 171:3a7713b1edbc 51 #define CLOCK_TIMER1 (0x1) /**< <b> Timer 1 clock enable offset </b>: */
AnnaBridge 171:3a7713b1edbc 52 #define CLOCK_TIMER2 (0x2) /**< <b> Timer 2 clock enable offset </b>: */
AnnaBridge 171:3a7713b1edbc 53 #define CLOCK_PAD0_0 (0x3) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 54 #define CLOCK_PAD0_1 (0x4) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 55 #define CLOCK_UART1 (0x5) /**< <b> UART 1 clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 56 #define CLOCK_SPI (0x6) /**< <b> SPI clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 57 #define CLOCK_I2C (0x7) /**< <b> I2C clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 58 #define CLOCK_UART2 (0x8) /**< <b> UART 2 clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 59 #define CLOCK_SPI2 (0x9) /**< <b> Unused offset </b>: */
AnnaBridge 171:3a7713b1edbc 60 #define CLOCK_WDOG (0xA) /**< <b> Watchdog clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 61 #define CLOCK_PWM (0xB) /**< <b> PWM clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 62 #define CLOCK_GPIO (0xC) /**< <b> GPIO clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 63 #define CLOCK_I2C2 (0xD) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 64 #define CLOCK_PAD2_1 (0xE) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 65 #define CLOCK_RTC (0xF) /**< <b> RTC clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 66 #define CLOCK_CROSSB (0x10) /**< <b> Crossbar clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 67 #define CLOCK_RAND (0x11) /**< <b> Randomizer clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 68 #define CLOCK_PAD3_0 (0x12) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 69 #define CLOCK_PAD3_1 (0x13) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 70 #define CLOCK_MACHW (0x14) /**< <b> macHw clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 71 #define CLOCK_ADC (0x15) /**< <b> ADC clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 72 #define CLOCK_AES (0x16) /**< <b> AES clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 73 #define CLOCK_FLASH (0x17) /**< <b> Flash controller clock enable offset</b> */
AnnaBridge 171:3a7713b1edbc 74 #define CLOCK_PAD4_0 (0x18) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 75 #define CLOCK_RFANA (0x19) /**< <b> rfAna clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 76 #define CLOCK_IO (0x1A) /**< <b> IO clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 77 #define CLOCK_PAD5_0 (0x1B) /**< <b> Unused offset </b> */
AnnaBridge 171:3a7713b1edbc 78 #define CLOCK_PAD (0x1C) /**< <b> Pad clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 79 #define CLOCK_PMU (0x1D) /**< <b> Pmu clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 80 #define CLOCK_DMA (0x1E) /**< <b> DMA clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 81 #define CLOCK_TEST (0x1F) /**< <b> Test controller clock enable offset </b> */
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 #define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
AnnaBridge 171:3a7713b1edbc 84 #define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
AnnaBridge 171:3a7713b1edbc 85 #define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD >> a) & 1)?0:1)
AnnaBridge 171:3a7713b1edbc 86
AnnaBridge 171:3a7713b1edbc 87 /*************************************************************************************************
AnnaBridge 171:3a7713b1edbc 88 * *
AnnaBridge 171:3a7713b1edbc 89 * Functions *
AnnaBridge 171:3a7713b1edbc 90 * *
AnnaBridge 171:3a7713b1edbc 91 *************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 /** Function to initialize clocks
AnnaBridge 171:3a7713b1edbc 94 * @details
AnnaBridge 171:3a7713b1edbc 95 * The function initializes clocks.
AnnaBridge 171:3a7713b1edbc 96 * This initialization includes:
AnnaBridge 171:3a7713b1edbc 97 * - Enable of external 32mHz oscillator
AnnaBridge 171:3a7713b1edbc 98 * - Disable of all peripheral clocks (to be turned on selectively when used later in the application)
AnnaBridge 171:3a7713b1edbc 99 * - Setting core frequency
AnnaBridge 171:3a7713b1edbc 100 */
AnnaBridge 171:3a7713b1edbc 101 void fClockInit(void);
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 /** Function to get peripheral clock frequency
AnnaBridge 171:3a7713b1edbc 104 * @details
AnnaBridge 171:3a7713b1edbc 105 * The function checks and returns peripheral clock frequency
AnnaBridge 171:3a7713b1edbc 106 * @return Peripheral clock frequency
AnnaBridge 171:3a7713b1edbc 107 */
AnnaBridge 171:3a7713b1edbc 108 uint32_t fClockGetPeriphClockfrequency();
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110 /** Function to get peripheral clock frequency
AnnaBridge 171:3a7713b1edbc 111 * @details
AnnaBridge 171:3a7713b1edbc 112 * The function checks which input clock is sourcing 32kHz clock domain.
AnnaBridge 171:3a7713b1edbc 113 * This domain can be either sourced by:
AnnaBridge 171:3a7713b1edbc 114 * - Internal 32kHz oscillator
AnnaBridge 171:3a7713b1edbc 115 * - External 32.768kHz oscillator
AnnaBridge 171:3a7713b1edbc 116 * @return 32kHz clock domain frequency
AnnaBridge 171:3a7713b1edbc 117 */
AnnaBridge 171:3a7713b1edbc 118 uint16_t fClockGet32kClockfrequency();
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 /** Function to enable peripheral clock
AnnaBridge 171:3a7713b1edbc 121 * @details
AnnaBridge 171:3a7713b1edbc 122 * The function enables clock of peripheral indicated by parameter
AnnaBridge 171:3a7713b1edbc 123 * @param deviceId Peripheral ID whose clock must be enabled.
AnnaBridge 171:3a7713b1edbc 124 */
AnnaBridge 171:3a7713b1edbc 125 void fClockEnablePeriph(uint8_t deviceId);
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /** Function to disable peripheral clock
AnnaBridge 171:3a7713b1edbc 128 * @details
AnnaBridge 171:3a7713b1edbc 129 * The function disables clock of peripheral indicated by parameter
AnnaBridge 171:3a7713b1edbc 130 * @param deviceId ID Peripheral whose clock must be disabled.
AnnaBridge 171:3a7713b1edbc 131 */
AnnaBridge 171:3a7713b1edbc 132 void fClockDisablePeriph(uint8_t deviceId);
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 #endif /* CLOCK_H_ */