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TARGET_MIMXRT1050_EVK/TOOLCHAIN_IAR/fsl_enet.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 161:aa5281ff4a02 | 1 | /* |
AnnaBridge | 170:e95d10626187 | 2 | * The Clear BSD License |
AnnaBridge | 161:aa5281ff4a02 | 3 | * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc. |
AnnaBridge | 161:aa5281ff4a02 | 4 | * Copyright 2016-2017 NXP |
AnnaBridge | 170:e95d10626187 | 5 | * All rights reserved. |
AnnaBridge | 161:aa5281ff4a02 | 6 | * |
AnnaBridge | 161:aa5281ff4a02 | 7 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 170:e95d10626187 | 8 | * are permitted (subject to the limitations in the disclaimer below) provided |
AnnaBridge | 170:e95d10626187 | 9 | * that the following conditions are met: |
AnnaBridge | 161:aa5281ff4a02 | 10 | * |
AnnaBridge | 161:aa5281ff4a02 | 11 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 161:aa5281ff4a02 | 12 | * of conditions and the following disclaimer. |
AnnaBridge | 161:aa5281ff4a02 | 13 | * |
AnnaBridge | 161:aa5281ff4a02 | 14 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 161:aa5281ff4a02 | 15 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 161:aa5281ff4a02 | 16 | * other materials provided with the distribution. |
AnnaBridge | 161:aa5281ff4a02 | 17 | * |
AnnaBridge | 161:aa5281ff4a02 | 18 | * o Neither the name of the copyright holder nor the names of its |
AnnaBridge | 161:aa5281ff4a02 | 19 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 161:aa5281ff4a02 | 20 | * software without specific prior written permission. |
AnnaBridge | 161:aa5281ff4a02 | 21 | * |
AnnaBridge | 170:e95d10626187 | 22 | * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. |
AnnaBridge | 161:aa5281ff4a02 | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 161:aa5281ff4a02 | 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 161:aa5281ff4a02 | 25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 161:aa5281ff4a02 | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 161:aa5281ff4a02 | 27 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 161:aa5281ff4a02 | 28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 161:aa5281ff4a02 | 29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 161:aa5281ff4a02 | 30 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 161:aa5281ff4a02 | 31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 161:aa5281ff4a02 | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 161:aa5281ff4a02 | 33 | */ |
AnnaBridge | 161:aa5281ff4a02 | 34 | #ifndef _FSL_ENET_H_ |
AnnaBridge | 161:aa5281ff4a02 | 35 | #define _FSL_ENET_H_ |
AnnaBridge | 161:aa5281ff4a02 | 36 | |
AnnaBridge | 161:aa5281ff4a02 | 37 | #include "fsl_common.h" |
AnnaBridge | 161:aa5281ff4a02 | 38 | #if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET |
AnnaBridge | 161:aa5281ff4a02 | 39 | #include "fsl_memory.h" |
AnnaBridge | 161:aa5281ff4a02 | 40 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 41 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 42 | * @addtogroup enet |
AnnaBridge | 161:aa5281ff4a02 | 43 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 44 | */ |
AnnaBridge | 161:aa5281ff4a02 | 45 | |
AnnaBridge | 161:aa5281ff4a02 | 46 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 47 | * Definitions |
AnnaBridge | 161:aa5281ff4a02 | 48 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 49 | |
AnnaBridge | 161:aa5281ff4a02 | 50 | /*! @name Driver version */ |
AnnaBridge | 161:aa5281ff4a02 | 51 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 52 | /*! @brief Defines the driver version. */ |
AnnaBridge | 170:e95d10626187 | 53 | #define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 2, 3)) /*!< Version 2.2.3. */ |
AnnaBridge | 161:aa5281ff4a02 | 54 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 55 | |
AnnaBridge | 161:aa5281ff4a02 | 56 | /*! @name ENET DESCRIPTOR QUEUE */ |
AnnaBridge | 161:aa5281ff4a02 | 57 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 58 | /*! @brief Defines the queue number. */ |
AnnaBridge | 161:aa5281ff4a02 | 59 | #ifndef FSL_FEATURE_ENET_QUEUE |
AnnaBridge | 161:aa5281ff4a02 | 60 | #define FSL_FEATURE_ENET_QUEUE 1 /* Singal queue for previous IP. */ |
AnnaBridge | 161:aa5281ff4a02 | 61 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 62 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 63 | |
AnnaBridge | 161:aa5281ff4a02 | 64 | /*! @name Control and status region bit masks of the receive buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 65 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 66 | #define ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK 0x8000U /*!< Empty bit mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 67 | #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK 0x4000U /*!< Software owner one mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 68 | #define ENET_BUFFDESCRIPTOR_RX_WRAP_MASK 0x2000U /*!< Next buffer descriptor is the start address. */ |
AnnaBridge | 161:aa5281ff4a02 | 69 | #define ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask 0x1000U /*!< Software owner two mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 70 | #define ENET_BUFFDESCRIPTOR_RX_LAST_MASK 0x0800U /*!< Last BD of the frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 71 | #define ENET_BUFFDESCRIPTOR_RX_MISS_MASK 0x0100U /*!< Received because of the promiscuous mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 72 | #define ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK 0x0080U /*!< Broadcast packet mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 73 | #define ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK 0x0040U /*!< Multicast packet mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 74 | #define ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK 0x0020U /*!< Length violation mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 75 | #define ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK 0x0010U /*!< Non-octet aligned frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 76 | #define ENET_BUFFDESCRIPTOR_RX_CRC_MASK 0x0004U /*!< CRC error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 77 | #define ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK 0x0002U /*!< FIFO overrun mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 78 | #define ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK 0x0001U /*!< Frame is truncated mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 79 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 80 | |
AnnaBridge | 161:aa5281ff4a02 | 81 | /*! @name Control and status bit masks of the transmit buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 82 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 83 | #define ENET_BUFFDESCRIPTOR_TX_READY_MASK 0x8000U /*!< Ready bit mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 84 | #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK 0x4000U /*!< Software owner one mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 85 | #define ENET_BUFFDESCRIPTOR_TX_WRAP_MASK 0x2000U /*!< Wrap buffer descriptor mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 86 | #define ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK 0x1000U /*!< Software owner two mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 87 | #define ENET_BUFFDESCRIPTOR_TX_LAST_MASK 0x0800U /*!< Last BD of the frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 88 | #define ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK 0x0400U /*!< Transmit CRC mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 89 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 90 | |
AnnaBridge | 161:aa5281ff4a02 | 91 | /* Extended control regions for enhanced buffer descriptors. */ |
AnnaBridge | 161:aa5281ff4a02 | 92 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 93 | /*! @name First extended control region bit masks of the receive buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 94 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 95 | #define ENET_BUFFDESCRIPTOR_RX_IPV4_MASK 0x0001U /*!< Ipv4 frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 96 | #define ENET_BUFFDESCRIPTOR_RX_IPV6_MASK 0x0002U /*!< Ipv6 frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 97 | #define ENET_BUFFDESCRIPTOR_RX_VLAN_MASK 0x0004U /*!< VLAN frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 98 | #define ENET_BUFFDESCRIPTOR_RX_PROTOCOLCHECKSUM_MASK 0x0010U /*!< Protocol checksum error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 99 | #define ENET_BUFFDESCRIPTOR_RX_IPHEADCHECKSUM_MASK 0x0020U /*!< IP header checksum error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 100 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 101 | |
AnnaBridge | 161:aa5281ff4a02 | 102 | /*! @name Second extended control region bit masks of the receive buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 103 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 104 | #define ENET_BUFFDESCRIPTOR_RX_INTERRUPT_MASK 0x0080U /*!< BD interrupt mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 105 | #define ENET_BUFFDESCRIPTOR_RX_UNICAST_MASK 0x0100U /*!< Unicast frame mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 106 | #define ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK 0x0200U /*!< BD collision mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 107 | #define ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK 0x0400U /*!< PHY error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 108 | #define ENET_BUFFDESCRIPTOR_RX_MACERR_MASK 0x8000U /*!< Mac error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 109 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 110 | |
AnnaBridge | 161:aa5281ff4a02 | 111 | /*! @name First extended control region bit masks of the transmit buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 112 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 113 | #define ENET_BUFFDESCRIPTOR_TX_ERR_MASK 0x8000U /*!< Transmit error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 114 | #define ENET_BUFFDESCRIPTOR_TX_UNDERFLOWERR_MASK 0x2000U /*!< Underflow error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 115 | #define ENET_BUFFDESCRIPTOR_TX_EXCCOLLISIONERR_MASK 0x1000U /*!< Excess collision error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 116 | #define ENET_BUFFDESCRIPTOR_TX_FRAMEERR_MASK 0x0800U /*!< Frame error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 117 | #define ENET_BUFFDESCRIPTOR_TX_LATECOLLISIONERR_MASK 0x0400U /*!< Late collision error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 118 | #define ENET_BUFFDESCRIPTOR_TX_OVERFLOWERR_MASK 0x0200U /*!< Overflow error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 119 | #define ENET_BUFFDESCRIPTOR_TX_TIMESTAMPERR_MASK 0x0100U /*!< Timestamp error mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 120 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 121 | |
AnnaBridge | 161:aa5281ff4a02 | 122 | /*! @name Second extended control region bit masks of the transmit buffer descriptor. */ |
AnnaBridge | 161:aa5281ff4a02 | 123 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 124 | #define ENET_BUFFDESCRIPTOR_TX_INTERRUPT_MASK 0x4000U /*!< Interrupt mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 125 | #define ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK 0x2000U /*!< Timestamp flag mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 126 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 127 | #define ENET_BUFFDESCRIPTOR_TX_USETXLAUNCHTIME_MASK 0x0100U /*!< Use the transmit launch time. */ |
AnnaBridge | 161:aa5281ff4a02 | 128 | #define ENET_BUFFDESCRIPTOR_TX_FRAMETYPE_MASK 0x00F0U /*!< Frame type mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 129 | #define ENET_BUFFDESCRIPTOR_TX_FRAMETYPE_SHIFT 4U /*!< Frame type shift. */ |
AnnaBridge | 161:aa5281ff4a02 | 130 | #define ENET_BD_FTYPE(n) ((n << ENET_BUFFDESCRIPTOR_TX_FRAMETYPE_SHIFT) & ENET_BUFFDESCRIPTOR_TX_FRAMETYPE_MASK) |
AnnaBridge | 161:aa5281ff4a02 | 131 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 132 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 133 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 134 | |
AnnaBridge | 161:aa5281ff4a02 | 135 | /*! @brief Defines the receive error status flag mask. */ |
AnnaBridge | 161:aa5281ff4a02 | 136 | #define ENET_BUFFDESCRIPTOR_RX_ERR_MASK \ |
AnnaBridge | 161:aa5281ff4a02 | 137 | (ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK | ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK | \ |
AnnaBridge | 161:aa5281ff4a02 | 138 | ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK | ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK | ENET_BUFFDESCRIPTOR_RX_CRC_MASK) |
AnnaBridge | 161:aa5281ff4a02 | 139 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 140 | #define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \ |
AnnaBridge | 161:aa5281ff4a02 | 141 | (ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK) |
AnnaBridge | 161:aa5281ff4a02 | 142 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 143 | |
AnnaBridge | 161:aa5281ff4a02 | 144 | /*! @name Defines some Ethernet parameters. */ |
AnnaBridge | 161:aa5281ff4a02 | 145 | /*@{*/ |
AnnaBridge | 161:aa5281ff4a02 | 146 | #define ENET_FRAME_MAX_FRAMELEN 1518U /*!< Default maximum Ethernet frame size. */ |
AnnaBridge | 161:aa5281ff4a02 | 147 | |
AnnaBridge | 161:aa5281ff4a02 | 148 | #define ENET_FIFO_MIN_RX_FULL 5U /*!< ENET minimum receive FIFO full. */ |
AnnaBridge | 161:aa5281ff4a02 | 149 | #define ENET_RX_MIN_BUFFERSIZE 256U /*!< ENET minimum buffer size. */ |
AnnaBridge | 161:aa5281ff4a02 | 150 | #define ENET_PHY_MAXADDRESS (ENET_MMFR_PA_MASK >> ENET_MMFR_PA_SHIFT) |
AnnaBridge | 161:aa5281ff4a02 | 151 | #if FSL_FEATURE_ENET_QUEUE > 1 |
AnnaBridge | 161:aa5281ff4a02 | 152 | #define ENET_TX_INTERRUPT \ |
AnnaBridge | 161:aa5281ff4a02 | 153 | (kENET_TxFrameInterrupt | kENET_TxBufferInterrupt | kENET_TxFrame1Interrupt | kENET_TxBuffer1Interrupt | \ |
AnnaBridge | 161:aa5281ff4a02 | 154 | kENET_TxFrame2Interrupt | kENET_TxBuffer2Interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 155 | #define ENET_RX_INTERRUPT \ |
AnnaBridge | 161:aa5281ff4a02 | 156 | (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt | kENET_RxFrame1Interrupt | kENET_RxBuffer1Interrupt | \ |
AnnaBridge | 161:aa5281ff4a02 | 157 | kENET_RxFrame2Interrupt | kENET_RxBuffer2Interrupt) |
AnnaBridge | 161:aa5281ff4a02 | 158 | #else |
AnnaBridge | 161:aa5281ff4a02 | 159 | #define ENET_TX_INTERRUPT (kENET_TxFrameInterrupt | kENET_TxBufferInterrupt) |
AnnaBridge | 161:aa5281ff4a02 | 160 | #define ENET_RX_INTERRUPT (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt) |
AnnaBridge | 161:aa5281ff4a02 | 161 | #endif /* FSL_FEATURE_ENET_QUEUE > 1 */ |
AnnaBridge | 161:aa5281ff4a02 | 162 | #define ENET_TS_INTERRUPT (kENET_TsTimerInterrupt | kENET_TsAvailInterrupt) |
AnnaBridge | 161:aa5281ff4a02 | 163 | #define ENET_ERR_INTERRUPT \ |
AnnaBridge | 161:aa5281ff4a02 | 164 | (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_EBusERInterrupt | kENET_LateCollisionInterrupt | \ |
AnnaBridge | 161:aa5281ff4a02 | 165 | kENET_RetryLimitInterrupt | kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt) |
AnnaBridge | 161:aa5281ff4a02 | 166 | #define ENET_ERR_INTERRUPT \ |
AnnaBridge | 161:aa5281ff4a02 | 167 | (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_EBusERInterrupt | kENET_LateCollisionInterrupt | \ |
AnnaBridge | 161:aa5281ff4a02 | 168 | kENET_RetryLimitInterrupt | kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt) |
AnnaBridge | 161:aa5281ff4a02 | 169 | /*@}*/ |
AnnaBridge | 161:aa5281ff4a02 | 170 | |
AnnaBridge | 161:aa5281ff4a02 | 171 | /*! @brief Defines the status return codes for transaction. */ |
AnnaBridge | 161:aa5281ff4a02 | 172 | enum _enet_status |
AnnaBridge | 161:aa5281ff4a02 | 173 | { |
AnnaBridge | 161:aa5281ff4a02 | 174 | kStatus_ENET_RxFrameError = MAKE_STATUS(kStatusGroup_ENET, 0U), /*!< A frame received but data error happen. */ |
AnnaBridge | 161:aa5281ff4a02 | 175 | kStatus_ENET_RxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 1U), /*!< Failed to receive a frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 176 | kStatus_ENET_RxFrameEmpty = MAKE_STATUS(kStatusGroup_ENET, 2U), /*!< No frame arrive. */ |
AnnaBridge | 161:aa5281ff4a02 | 177 | kStatus_ENET_TxFrameOverLen = MAKE_STATUS(kStatusGroup_ENET, 3U), /*!< Tx frame over length. */ |
AnnaBridge | 161:aa5281ff4a02 | 178 | kStatus_ENET_TxFrameBusy = MAKE_STATUS(kStatusGroup_ENET, 4U), /*!< Tx buffer descriptors are under process. */ |
AnnaBridge | 161:aa5281ff4a02 | 179 | kStatus_ENET_TxFrameFail = MAKE_STATUS(kStatusGroup_ENET, 5U) /*!< Transmit frame fail. */ |
AnnaBridge | 161:aa5281ff4a02 | 180 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 181 | , |
AnnaBridge | 161:aa5281ff4a02 | 182 | kStatus_ENET_PtpTsRingFull = MAKE_STATUS(kStatusGroup_ENET, 6U), /*!< Timestamp ring full. */ |
AnnaBridge | 161:aa5281ff4a02 | 183 | kStatus_ENET_PtpTsRingEmpty = MAKE_STATUS(kStatusGroup_ENET, 7U) /*!< Timestamp ring empty. */ |
AnnaBridge | 161:aa5281ff4a02 | 184 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 185 | }; |
AnnaBridge | 161:aa5281ff4a02 | 186 | |
AnnaBridge | 161:aa5281ff4a02 | 187 | /*! @brief Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY. */ |
AnnaBridge | 161:aa5281ff4a02 | 188 | typedef enum _enet_mii_mode |
AnnaBridge | 161:aa5281ff4a02 | 189 | { |
AnnaBridge | 161:aa5281ff4a02 | 190 | kENET_MiiMode = 0U, /*!< MII mode for data interface. */ |
AnnaBridge | 161:aa5281ff4a02 | 191 | kENET_RmiiMode = 1U, /*!< RMII mode for data interface. */ |
AnnaBridge | 161:aa5281ff4a02 | 192 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 193 | kENET_RgmiiMode = 2U /*!< RGMII mode for data interface. */ |
AnnaBridge | 161:aa5281ff4a02 | 194 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 195 | } enet_mii_mode_t; |
AnnaBridge | 161:aa5281ff4a02 | 196 | |
AnnaBridge | 161:aa5281ff4a02 | 197 | /*! @brief Defines the 10/100/1000 Mbps speed for the MII data interface. |
AnnaBridge | 161:aa5281ff4a02 | 198 | * |
AnnaBridge | 161:aa5281ff4a02 | 199 | * Notice: "kENET_MiiSpeed1000M" only supported when mii mode is "kENET_RgmiiMode". |
AnnaBridge | 161:aa5281ff4a02 | 200 | */ |
AnnaBridge | 170:e95d10626187 | 201 | typedef enum _enet_mii_speed |
AnnaBridge | 161:aa5281ff4a02 | 202 | { |
AnnaBridge | 161:aa5281ff4a02 | 203 | kENET_MiiSpeed10M = 0U, /*!< Speed 10 Mbps. */ |
AnnaBridge | 161:aa5281ff4a02 | 204 | kENET_MiiSpeed100M = 1U, /*!< Speed 100 Mbps. */ |
AnnaBridge | 161:aa5281ff4a02 | 205 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 206 | kENET_MiiSpeed1000M = 2U /*!< Speed 1000M bps. */ |
AnnaBridge | 161:aa5281ff4a02 | 207 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 208 | } enet_mii_speed_t; |
AnnaBridge | 161:aa5281ff4a02 | 209 | |
AnnaBridge | 161:aa5281ff4a02 | 210 | /*! @brief Defines the half or full duplex for the MII data interface. */ |
AnnaBridge | 170:e95d10626187 | 211 | typedef enum _enet_mii_duplex |
AnnaBridge | 161:aa5281ff4a02 | 212 | { |
AnnaBridge | 161:aa5281ff4a02 | 213 | kENET_MiiHalfDuplex = 0U, /*!< Half duplex mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 214 | kENET_MiiFullDuplex /*!< Full duplex mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 215 | } enet_mii_duplex_t; |
AnnaBridge | 161:aa5281ff4a02 | 216 | |
AnnaBridge | 161:aa5281ff4a02 | 217 | /*! @brief Define the MII opcode for normal MDIO_CLAUSES_22 Frame. */ |
AnnaBridge | 170:e95d10626187 | 218 | typedef enum _enet_mii_write |
AnnaBridge | 161:aa5281ff4a02 | 219 | { |
AnnaBridge | 161:aa5281ff4a02 | 220 | kENET_MiiWriteNoCompliant = 0U, /*!< Write frame operation, but not MII-compliant. */ |
AnnaBridge | 161:aa5281ff4a02 | 221 | kENET_MiiWriteValidFrame /*!< Write frame operation for a valid MII management frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 222 | } enet_mii_write_t; |
AnnaBridge | 161:aa5281ff4a02 | 223 | |
AnnaBridge | 161:aa5281ff4a02 | 224 | /*! @brief Defines the read operation for the MII management frame. */ |
AnnaBridge | 170:e95d10626187 | 225 | typedef enum _enet_mii_read |
AnnaBridge | 161:aa5281ff4a02 | 226 | { |
AnnaBridge | 161:aa5281ff4a02 | 227 | kENET_MiiReadValidFrame = 2U, /*!< Read frame operation for a valid MII management frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 228 | kENET_MiiReadNoCompliant = 3U /*!< Read frame operation, but not MII-compliant. */ |
AnnaBridge | 161:aa5281ff4a02 | 229 | } enet_mii_read_t; |
AnnaBridge | 161:aa5281ff4a02 | 230 | |
AnnaBridge | 161:aa5281ff4a02 | 231 | #if defined(FSL_FEATURE_ENET_HAS_EXTEND_MDIO) && FSL_FEATURE_ENET_HAS_EXTEND_MDIO |
AnnaBridge | 161:aa5281ff4a02 | 232 | /*! @brief Define the MII opcode for extended MDIO_CLAUSES_45 Frame. */ |
AnnaBridge | 170:e95d10626187 | 233 | typedef enum _enet_mii_extend_opcode |
AnnaBridge | 170:e95d10626187 | 234 | { |
AnnaBridge | 161:aa5281ff4a02 | 235 | kENET_MiiAddrWrite_C45 = 0U, /*!< Address Write operation. */ |
AnnaBridge | 161:aa5281ff4a02 | 236 | kENET_MiiWriteFrame_C45 = 1U, /*!< Write frame operation for a valid MII management frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 237 | kENET_MiiReadFrame_C45 = 3U /*!< Read frame operation for a valid MII management frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 238 | } enet_mii_extend_opcode; |
AnnaBridge | 161:aa5281ff4a02 | 239 | #endif /* FSL_FEATURE_ENET_HAS_EXTEND_MDIO */ |
AnnaBridge | 161:aa5281ff4a02 | 240 | |
AnnaBridge | 161:aa5281ff4a02 | 241 | /*! @brief Defines a special configuration for ENET MAC controller. |
AnnaBridge | 161:aa5281ff4a02 | 242 | * |
AnnaBridge | 161:aa5281ff4a02 | 243 | * These control flags are provided for special user requirements. |
AnnaBridge | 161:aa5281ff4a02 | 244 | * Normally, these control flags are unused for ENET initialization. |
AnnaBridge | 161:aa5281ff4a02 | 245 | * For special requirements, set the flags to |
AnnaBridge | 161:aa5281ff4a02 | 246 | * macSpecialConfig in the enet_config_t. |
AnnaBridge | 161:aa5281ff4a02 | 247 | * The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store |
AnnaBridge | 161:aa5281ff4a02 | 248 | * and forward. FIFO store and forward means that the FIFO read/send is started |
AnnaBridge | 161:aa5281ff4a02 | 249 | * when a complete frame is stored in TX/RX FIFO. If this flag is set, |
AnnaBridge | 161:aa5281ff4a02 | 250 | * configure rxFifoFullThreshold and txFifoWatermark |
AnnaBridge | 161:aa5281ff4a02 | 251 | * in the enet_config_t. |
AnnaBridge | 161:aa5281ff4a02 | 252 | */ |
AnnaBridge | 170:e95d10626187 | 253 | typedef enum _enet_special_control_flag |
AnnaBridge | 161:aa5281ff4a02 | 254 | { |
AnnaBridge | 161:aa5281ff4a02 | 255 | kENET_ControlFlowControlEnable = 0x0001U, /*!< Enable ENET flow control: pause frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 256 | kENET_ControlRxPayloadCheckEnable = 0x0002U, /*!< Enable ENET receive payload length check. */ |
AnnaBridge | 161:aa5281ff4a02 | 257 | kENET_ControlRxPadRemoveEnable = 0x0004U, /*!< Padding is removed from received frames. */ |
AnnaBridge | 161:aa5281ff4a02 | 258 | kENET_ControlRxBroadCastRejectEnable = 0x0008U, /*!< Enable broadcast frame reject. */ |
AnnaBridge | 161:aa5281ff4a02 | 259 | kENET_ControlMacAddrInsert = 0x0010U, /*!< Enable MAC address insert. */ |
AnnaBridge | 161:aa5281ff4a02 | 260 | kENET_ControlStoreAndFwdDisable = 0x0020U, /*!< Enable FIFO store and forward. */ |
AnnaBridge | 161:aa5281ff4a02 | 261 | kENET_ControlSMIPreambleDisable = 0x0040U, /*!< Enable SMI preamble. */ |
AnnaBridge | 161:aa5281ff4a02 | 262 | kENET_ControlPromiscuousEnable = 0x0080U, /*!< Enable promiscuous mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 263 | kENET_ControlMIILoopEnable = 0x0100U, /*!< Enable ENET MII loop back. */ |
AnnaBridge | 161:aa5281ff4a02 | 264 | kENET_ControlVLANTagEnable = 0x0200U, /*!< Enable normal VLAN (single vlan tag). */ |
AnnaBridge | 161:aa5281ff4a02 | 265 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 266 | kENET_ControlSVLANEnable = 0x0400U, /*!< Enable S-VLAN. */ |
AnnaBridge | 161:aa5281ff4a02 | 267 | kENET_ControlVLANUseSecondTag = 0x0800U /*!< Enable extracting the second vlan tag for further processing. */ |
AnnaBridge | 161:aa5281ff4a02 | 268 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 269 | } enet_special_control_flag_t; |
AnnaBridge | 161:aa5281ff4a02 | 270 | |
AnnaBridge | 161:aa5281ff4a02 | 271 | /*! @brief List of interrupts supported by the peripheral. This |
AnnaBridge | 161:aa5281ff4a02 | 272 | * enumeration uses one-bot encoding to allow a logical OR of multiple |
AnnaBridge | 161:aa5281ff4a02 | 273 | * members. Members usually map to interrupt enable bits in one or more |
AnnaBridge | 161:aa5281ff4a02 | 274 | * peripheral registers. |
AnnaBridge | 161:aa5281ff4a02 | 275 | */ |
AnnaBridge | 170:e95d10626187 | 276 | typedef enum _enet_interrupt_enable |
AnnaBridge | 161:aa5281ff4a02 | 277 | { |
AnnaBridge | 161:aa5281ff4a02 | 278 | kENET_BabrInterrupt = ENET_EIR_BABR_MASK, /*!< Babbling receive error interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 279 | kENET_BabtInterrupt = ENET_EIR_BABT_MASK, /*!< Babbling transmit error interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 280 | kENET_GraceStopInterrupt = ENET_EIR_GRA_MASK, /*!< Graceful stop complete interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 281 | kENET_TxFrameInterrupt = ENET_EIR_TXF_MASK, /*!< TX FRAME interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 282 | kENET_TxBufferInterrupt = ENET_EIR_TXB_MASK, /*!< TX BUFFER interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 283 | kENET_RxFrameInterrupt = ENET_EIR_RXF_MASK, /*!< RX FRAME interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 284 | kENET_RxBufferInterrupt = ENET_EIR_RXB_MASK, /*!< RX BUFFER interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 285 | kENET_MiiInterrupt = ENET_EIR_MII_MASK, /*!< MII interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 286 | kENET_EBusERInterrupt = ENET_EIR_EBERR_MASK, /*!< Ethernet bus error interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 287 | kENET_LateCollisionInterrupt = ENET_EIR_LC_MASK, /*!< Late collision interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 288 | kENET_RetryLimitInterrupt = ENET_EIR_RL_MASK, /*!< Collision Retry Limit interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 289 | kENET_UnderrunInterrupt = ENET_EIR_UN_MASK, /*!< Transmit FIFO underrun interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 290 | kENET_PayloadRxInterrupt = ENET_EIR_PLR_MASK, /*!< Payload Receive error interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 291 | kENET_WakeupInterrupt = ENET_EIR_WAKEUP_MASK, /*!< WAKEUP interrupt source */ |
AnnaBridge | 161:aa5281ff4a02 | 292 | #if FSL_FEATURE_ENET_QUEUE > 1 |
AnnaBridge | 161:aa5281ff4a02 | 293 | kENET_RxFlush2Interrupt = ENET_EIR_RXFLUSH_2_MASK, /*!< Rx DMA ring2 flush indication. */ |
AnnaBridge | 161:aa5281ff4a02 | 294 | kENET_RxFlush1Interrupt = ENET_EIR_RXFLUSH_1_MASK, /*!< Rx DMA ring1 flush indication. */ |
AnnaBridge | 161:aa5281ff4a02 | 295 | kENET_RxFlush0Interrupt = ENET_EIR_RXFLUSH_0_MASK, /*!< RX DMA ring0 flush indication. */ |
AnnaBridge | 161:aa5281ff4a02 | 296 | kENET_TxFrame2Interrupt = ENET_EIR_TXF2_MASK, /*!< Tx frame interrupt for Tx ring/class 2. */ |
AnnaBridge | 161:aa5281ff4a02 | 297 | kENET_TxBuffer2Interrupt = ENET_EIR_TXB2_MASK, /*!< Tx buffer interrupt for Tx ring/class 2. */ |
AnnaBridge | 161:aa5281ff4a02 | 298 | kENET_RxFrame2Interrupt = ENET_EIR_RXF2_MASK, /*!< Rx frame interrupt for Rx ring/class 2. */ |
AnnaBridge | 161:aa5281ff4a02 | 299 | kENET_RxBuffer2Interrupt = ENET_EIR_RXB2_MASK, /*!< Rx buffer interrupt for Rx ring/class 2. */ |
AnnaBridge | 161:aa5281ff4a02 | 300 | kENET_TxFrame1Interrupt = ENET_EIR_TXF1_MASK, /*!< Tx frame interrupt for Tx ring/class 1. */ |
AnnaBridge | 161:aa5281ff4a02 | 301 | kENET_TxBuffer1Interrupt = ENET_EIR_TXB1_MASK, /*!< Tx buffer interrupt for Tx ring/class 1. */ |
AnnaBridge | 161:aa5281ff4a02 | 302 | kENET_RxFrame1Interrupt = ENET_EIR_RXF1_MASK, /*!< Rx frame interrupt for Rx ring/class 1. */ |
AnnaBridge | 161:aa5281ff4a02 | 303 | kENET_RxBuffer1Interrupt = ENET_EIR_RXB1_MASK, /*!< Rx buffer interrupt for Rx ring/class 1. */ |
AnnaBridge | 161:aa5281ff4a02 | 304 | #endif /* FSL_FEATURE_ENET_QUEUE > 1 */ |
AnnaBridge | 161:aa5281ff4a02 | 305 | kENET_TsAvailInterrupt = ENET_EIR_TS_AVAIL_MASK, /*!< TS AVAIL interrupt source for PTP */ |
AnnaBridge | 161:aa5281ff4a02 | 306 | kENET_TsTimerInterrupt = ENET_EIR_TS_TIMER_MASK /*!< TS WRAP interrupt source for PTP */ |
AnnaBridge | 161:aa5281ff4a02 | 307 | } enet_interrupt_enable_t; |
AnnaBridge | 161:aa5281ff4a02 | 308 | |
AnnaBridge | 161:aa5281ff4a02 | 309 | /*! @brief Defines the common interrupt event for callback use. */ |
AnnaBridge | 170:e95d10626187 | 310 | typedef enum _enet_event |
AnnaBridge | 161:aa5281ff4a02 | 311 | { |
AnnaBridge | 161:aa5281ff4a02 | 312 | kENET_RxEvent, /*!< Receive event. */ |
AnnaBridge | 161:aa5281ff4a02 | 313 | kENET_TxEvent, /*!< Transmit event. */ |
AnnaBridge | 161:aa5281ff4a02 | 314 | kENET_ErrEvent, /*!< Error event: BABR/BABT/EBERR/LC/RL/UN/PLR . */ |
AnnaBridge | 161:aa5281ff4a02 | 315 | kENET_WakeUpEvent, /*!< Wake up from sleep mode event. */ |
AnnaBridge | 161:aa5281ff4a02 | 316 | kENET_TimeStampEvent, /*!< Time stamp event. */ |
AnnaBridge | 161:aa5281ff4a02 | 317 | kENET_TimeStampAvailEvent /*!< Time stamp available event.*/ |
AnnaBridge | 161:aa5281ff4a02 | 318 | } enet_event_t; |
AnnaBridge | 161:aa5281ff4a02 | 319 | |
AnnaBridge | 161:aa5281ff4a02 | 320 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 321 | /*! @brief Defines certain idle slope for bandwidth fraction. */ |
AnnaBridge | 170:e95d10626187 | 322 | typedef enum _enet_idle_slope |
AnnaBridge | 161:aa5281ff4a02 | 323 | { |
AnnaBridge | 161:aa5281ff4a02 | 324 | kENET_IdleSlope1 = 1U, /*!< The bandwidth fraction is about 0.002. */ |
AnnaBridge | 161:aa5281ff4a02 | 325 | kENET_IdleSlope2 = 2U, /*!< The bandwidth fraction is about 0.003. */ |
AnnaBridge | 161:aa5281ff4a02 | 326 | kENET_IdleSlope4 = 4U, /*!< The bandwidth fraction is about 0.008. */ |
AnnaBridge | 161:aa5281ff4a02 | 327 | kENET_IdleSlope8 = 8U, /*!< The bandwidth fraction is about 0.02. */ |
AnnaBridge | 161:aa5281ff4a02 | 328 | kENET_IdleSlope16 = 16U, /*!< The bandwidth fraction is about 0.03. */ |
AnnaBridge | 161:aa5281ff4a02 | 329 | kENET_IdleSlope32 = 32U, /*!< The bandwidth fraction is about 0.06. */ |
AnnaBridge | 161:aa5281ff4a02 | 330 | kENET_IdleSlope64 = 64U, /*!< The bandwidth fraction is about 0.11. */ |
AnnaBridge | 161:aa5281ff4a02 | 331 | kENET_IdleSlope128 = 128U, /*!< The bandwidth fraction is about 0.20. */ |
AnnaBridge | 161:aa5281ff4a02 | 332 | kENET_IdleSlope256 = 256U, /*!< The bandwidth fraction is about 0.33. */ |
AnnaBridge | 161:aa5281ff4a02 | 333 | kENET_IdleSlope384 = 384U, /*!< The bandwidth fraction is about 0.43. */ |
AnnaBridge | 161:aa5281ff4a02 | 334 | kENET_IdleSlope512 = 512U, /*!< The bandwidth fraction is about 0.50. */ |
AnnaBridge | 161:aa5281ff4a02 | 335 | kENET_IdleSlope640 = 640U, /*!< The bandwidth fraction is about 0.56. */ |
AnnaBridge | 161:aa5281ff4a02 | 336 | kENET_IdleSlope768 = 768U, /*!< The bandwidth fraction is about 0.60. */ |
AnnaBridge | 161:aa5281ff4a02 | 337 | kENET_IdleSlope896 = 896U, /*!< The bandwidth fraction is about 0.64. */ |
AnnaBridge | 161:aa5281ff4a02 | 338 | kENET_IdleSlope1024 = 1024U, /*!< The bandwidth fraction is about 0.67. */ |
AnnaBridge | 161:aa5281ff4a02 | 339 | kENET_IdleSlope1152 = 1152U, /*!< The bandwidth fraction is about 0.69. */ |
AnnaBridge | 161:aa5281ff4a02 | 340 | kENET_IdleSlope1280 = 1280U, /*!< The bandwidth fraction is about 0.71. */ |
AnnaBridge | 161:aa5281ff4a02 | 341 | kENET_IdleSlope1408 = 1408U, /*!< The bandwidth fraction is about 0.73. */ |
AnnaBridge | 161:aa5281ff4a02 | 342 | kENET_IdleSlope1536 = 1536U /*!< The bandwidth fraction is about 0.75. */ |
AnnaBridge | 161:aa5281ff4a02 | 343 | } enet_idle_slope_t; |
AnnaBridge | 161:aa5281ff4a02 | 344 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 345 | |
AnnaBridge | 161:aa5281ff4a02 | 346 | /*! @brief Defines the transmit accelerator configuration. */ |
AnnaBridge | 170:e95d10626187 | 347 | typedef enum _enet_tx_accelerator |
AnnaBridge | 161:aa5281ff4a02 | 348 | { |
AnnaBridge | 161:aa5281ff4a02 | 349 | kENET_TxAccelIsShift16Enabled = ENET_TACC_SHIFT16_MASK, /*!< Transmit FIFO shift-16. */ |
AnnaBridge | 161:aa5281ff4a02 | 350 | kENET_TxAccelIpCheckEnabled = ENET_TACC_IPCHK_MASK, /*!< Insert IP header checksum. */ |
AnnaBridge | 161:aa5281ff4a02 | 351 | kENET_TxAccelProtoCheckEnabled = ENET_TACC_PROCHK_MASK /*!< Insert protocol checksum. */ |
AnnaBridge | 161:aa5281ff4a02 | 352 | } enet_tx_accelerator_t; |
AnnaBridge | 161:aa5281ff4a02 | 353 | |
AnnaBridge | 161:aa5281ff4a02 | 354 | /*! @brief Defines the receive accelerator configuration. */ |
AnnaBridge | 170:e95d10626187 | 355 | typedef enum _enet_rx_accelerator |
AnnaBridge | 161:aa5281ff4a02 | 356 | { |
AnnaBridge | 161:aa5281ff4a02 | 357 | kENET_RxAccelPadRemoveEnabled = ENET_RACC_PADREM_MASK, /*!< Padding removal for short IP frames. */ |
AnnaBridge | 161:aa5281ff4a02 | 358 | kENET_RxAccelIpCheckEnabled = ENET_RACC_IPDIS_MASK, /*!< Discard with wrong IP header checksum. */ |
AnnaBridge | 161:aa5281ff4a02 | 359 | kENET_RxAccelProtoCheckEnabled = ENET_RACC_PRODIS_MASK, /*!< Discard with wrong protocol checksum. */ |
AnnaBridge | 161:aa5281ff4a02 | 360 | kENET_RxAccelMacCheckEnabled = ENET_RACC_LINEDIS_MASK, /*!< Discard with Mac layer errors. */ |
AnnaBridge | 161:aa5281ff4a02 | 361 | kENET_RxAccelisShift16Enabled = ENET_RACC_SHIFT16_MASK /*!< Receive FIFO shift-16. */ |
AnnaBridge | 161:aa5281ff4a02 | 362 | } enet_rx_accelerator_t; |
AnnaBridge | 161:aa5281ff4a02 | 363 | |
AnnaBridge | 161:aa5281ff4a02 | 364 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 365 | /*! @brief Defines the ENET PTP message related constant. */ |
AnnaBridge | 170:e95d10626187 | 366 | typedef enum _enet_ptp_event_type |
AnnaBridge | 161:aa5281ff4a02 | 367 | { |
AnnaBridge | 161:aa5281ff4a02 | 368 | kENET_PtpEventMsgType = 3U, /*!< PTP event message type. */ |
AnnaBridge | 161:aa5281ff4a02 | 369 | kENET_PtpSrcPortIdLen = 10U, /*!< PTP message sequence id length. */ |
AnnaBridge | 161:aa5281ff4a02 | 370 | kENET_PtpEventPort = 319U, /*!< PTP event port number. */ |
AnnaBridge | 161:aa5281ff4a02 | 371 | kENET_PtpGnrlPort = 320U /*!< PTP general port number. */ |
AnnaBridge | 161:aa5281ff4a02 | 372 | } enet_ptp_event_type_t; |
AnnaBridge | 161:aa5281ff4a02 | 373 | |
AnnaBridge | 161:aa5281ff4a02 | 374 | /*! @brief Defines the IEEE 1588 PTP timer channel numbers. */ |
AnnaBridge | 170:e95d10626187 | 375 | typedef enum _enet_ptp_timer_channel |
AnnaBridge | 161:aa5281ff4a02 | 376 | { |
AnnaBridge | 161:aa5281ff4a02 | 377 | kENET_PtpTimerChannel1 = 0U, /*!< IEEE 1588 PTP timer Channel 1. */ |
AnnaBridge | 161:aa5281ff4a02 | 378 | kENET_PtpTimerChannel2, /*!< IEEE 1588 PTP timer Channel 2. */ |
AnnaBridge | 161:aa5281ff4a02 | 379 | kENET_PtpTimerChannel3, /*!< IEEE 1588 PTP timer Channel 3. */ |
AnnaBridge | 161:aa5281ff4a02 | 380 | kENET_PtpTimerChannel4 /*!< IEEE 1588 PTP timer Channel 4. */ |
AnnaBridge | 161:aa5281ff4a02 | 381 | } enet_ptp_timer_channel_t; |
AnnaBridge | 161:aa5281ff4a02 | 382 | |
AnnaBridge | 161:aa5281ff4a02 | 383 | /*! @brief Defines the capture or compare mode for IEEE 1588 PTP timer channels. */ |
AnnaBridge | 161:aa5281ff4a02 | 384 | typedef enum _enet_ptp_timer_channel_mode |
AnnaBridge | 161:aa5281ff4a02 | 385 | { |
AnnaBridge | 161:aa5281ff4a02 | 386 | kENET_PtpChannelDisable = 0U, /*!< Disable timer channel. */ |
AnnaBridge | 161:aa5281ff4a02 | 387 | kENET_PtpChannelRisingCapture = 1U, /*!< Input capture on rising edge. */ |
AnnaBridge | 161:aa5281ff4a02 | 388 | kENET_PtpChannelFallingCapture = 2U, /*!< Input capture on falling edge. */ |
AnnaBridge | 161:aa5281ff4a02 | 389 | kENET_PtpChannelBothCapture = 3U, /*!< Input capture on both edges. */ |
AnnaBridge | 161:aa5281ff4a02 | 390 | kENET_PtpChannelSoftCompare = 4U, /*!< Output compare software only. */ |
AnnaBridge | 161:aa5281ff4a02 | 391 | kENET_PtpChannelToggleCompare = 5U, /*!< Toggle output on compare. */ |
AnnaBridge | 161:aa5281ff4a02 | 392 | kENET_PtpChannelClearCompare = 6U, /*!< Clear output on compare. */ |
AnnaBridge | 161:aa5281ff4a02 | 393 | kENET_PtpChannelSetCompare = 7U, /*!< Set output on compare. */ |
AnnaBridge | 161:aa5281ff4a02 | 394 | kENET_PtpChannelClearCompareSetOverflow = 10U, /*!< Clear output on compare, set output on overflow. */ |
AnnaBridge | 161:aa5281ff4a02 | 395 | kENET_PtpChannelSetCompareClearOverflow = 11U, /*!< Set output on compare, clear output on overflow. */ |
AnnaBridge | 161:aa5281ff4a02 | 396 | kENET_PtpChannelPulseLowonCompare = 14U, /*!< Pulse output low on compare for one IEEE 1588 clock cycle. */ |
AnnaBridge | 161:aa5281ff4a02 | 397 | kENET_PtpChannelPulseHighonCompare = 15U /*!< Pulse output high on compare for one IEEE 1588 clock cycle. */ |
AnnaBridge | 161:aa5281ff4a02 | 398 | } enet_ptp_timer_channel_mode_t; |
AnnaBridge | 161:aa5281ff4a02 | 399 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 400 | |
AnnaBridge | 161:aa5281ff4a02 | 401 | /*! @brief Defines the receive buffer descriptor structure for the little endian system.*/ |
AnnaBridge | 161:aa5281ff4a02 | 402 | typedef struct _enet_rx_bd_struct |
AnnaBridge | 161:aa5281ff4a02 | 403 | { |
AnnaBridge | 161:aa5281ff4a02 | 404 | uint16_t length; /*!< Buffer descriptor data length. */ |
AnnaBridge | 161:aa5281ff4a02 | 405 | uint16_t control; /*!< Buffer descriptor control and status. */ |
AnnaBridge | 161:aa5281ff4a02 | 406 | uint8_t *buffer; /*!< Data buffer pointer. */ |
AnnaBridge | 161:aa5281ff4a02 | 407 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 408 | uint16_t controlExtend0; /*!< Extend buffer descriptor control0. */ |
AnnaBridge | 161:aa5281ff4a02 | 409 | uint16_t controlExtend1; /*!< Extend buffer descriptor control1. */ |
AnnaBridge | 161:aa5281ff4a02 | 410 | uint16_t payloadCheckSum; /*!< Internal payload checksum. */ |
AnnaBridge | 161:aa5281ff4a02 | 411 | uint8_t headerLength; /*!< Header length. */ |
AnnaBridge | 161:aa5281ff4a02 | 412 | uint8_t protocolTyte; /*!< Protocol type. */ |
AnnaBridge | 161:aa5281ff4a02 | 413 | uint16_t reserved0; |
AnnaBridge | 161:aa5281ff4a02 | 414 | uint16_t controlExtend2; /*!< Extend buffer descriptor control2. */ |
AnnaBridge | 161:aa5281ff4a02 | 415 | uint32_t timestamp; /*!< Timestamp. */ |
AnnaBridge | 161:aa5281ff4a02 | 416 | uint16_t reserved1; |
AnnaBridge | 161:aa5281ff4a02 | 417 | uint16_t reserved2; |
AnnaBridge | 161:aa5281ff4a02 | 418 | uint16_t reserved3; |
AnnaBridge | 161:aa5281ff4a02 | 419 | uint16_t reserved4; |
AnnaBridge | 161:aa5281ff4a02 | 420 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 421 | } enet_rx_bd_struct_t; |
AnnaBridge | 161:aa5281ff4a02 | 422 | |
AnnaBridge | 161:aa5281ff4a02 | 423 | /*! @brief Defines the enhanced transmit buffer descriptor structure for the little endian system. */ |
AnnaBridge | 161:aa5281ff4a02 | 424 | typedef struct _enet_tx_bd_struct |
AnnaBridge | 161:aa5281ff4a02 | 425 | { |
AnnaBridge | 161:aa5281ff4a02 | 426 | uint16_t length; /*!< Buffer descriptor data length. */ |
AnnaBridge | 161:aa5281ff4a02 | 427 | uint16_t control; /*!< Buffer descriptor control and status. */ |
AnnaBridge | 161:aa5281ff4a02 | 428 | uint8_t *buffer; /*!< Data buffer pointer. */ |
AnnaBridge | 161:aa5281ff4a02 | 429 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 430 | uint16_t controlExtend0; /*!< Extend buffer descriptor control0. */ |
AnnaBridge | 161:aa5281ff4a02 | 431 | uint16_t controlExtend1; /*!< Extend buffer descriptor control1. */ |
AnnaBridge | 161:aa5281ff4a02 | 432 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 433 | int8_t *txLaunchTime; /*!< Transmit launch time. */ |
AnnaBridge | 161:aa5281ff4a02 | 434 | #else |
AnnaBridge | 161:aa5281ff4a02 | 435 | uint16_t reserved0; |
AnnaBridge | 161:aa5281ff4a02 | 436 | uint16_t reserved1; |
AnnaBridge | 161:aa5281ff4a02 | 437 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 438 | uint16_t reserved2; |
AnnaBridge | 161:aa5281ff4a02 | 439 | uint16_t controlExtend2; /*!< Extend buffer descriptor control2. */ |
AnnaBridge | 161:aa5281ff4a02 | 440 | uint32_t timestamp; /*!< Timestamp. */ |
AnnaBridge | 161:aa5281ff4a02 | 441 | uint16_t reserved3; |
AnnaBridge | 161:aa5281ff4a02 | 442 | uint16_t reserved4; |
AnnaBridge | 161:aa5281ff4a02 | 443 | uint16_t reserved5; |
AnnaBridge | 161:aa5281ff4a02 | 444 | uint16_t reserved6; |
AnnaBridge | 161:aa5281ff4a02 | 445 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 446 | } enet_tx_bd_struct_t; |
AnnaBridge | 161:aa5281ff4a02 | 447 | |
AnnaBridge | 161:aa5281ff4a02 | 448 | /*! @brief Defines the ENET data error statistic structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 449 | typedef struct _enet_data_error_stats |
AnnaBridge | 161:aa5281ff4a02 | 450 | { |
AnnaBridge | 161:aa5281ff4a02 | 451 | uint32_t statsRxLenGreaterErr; /*!< Receive length greater than RCR[MAX_FL]. */ |
AnnaBridge | 161:aa5281ff4a02 | 452 | uint32_t statsRxAlignErr; /*!< Receive non-octet alignment/ */ |
AnnaBridge | 161:aa5281ff4a02 | 453 | uint32_t statsRxFcsErr; /*!< Receive CRC error. */ |
AnnaBridge | 161:aa5281ff4a02 | 454 | uint32_t statsRxOverRunErr; /*!< Receive over run. */ |
AnnaBridge | 161:aa5281ff4a02 | 455 | uint32_t statsRxTruncateErr; /*!< Receive truncate. */ |
AnnaBridge | 161:aa5281ff4a02 | 456 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 457 | uint32_t statsRxProtocolChecksumErr; /*!< Receive protocol checksum error. */ |
AnnaBridge | 161:aa5281ff4a02 | 458 | uint32_t statsRxIpHeadChecksumErr; /*!< Receive IP header checksum error. */ |
AnnaBridge | 161:aa5281ff4a02 | 459 | uint32_t statsRxMacErr; /*!< Receive Mac error. */ |
AnnaBridge | 161:aa5281ff4a02 | 460 | uint32_t statsRxPhyErr; /*!< Receive PHY error. */ |
AnnaBridge | 161:aa5281ff4a02 | 461 | uint32_t statsRxCollisionErr; /*!< Receive collision. */ |
AnnaBridge | 161:aa5281ff4a02 | 462 | uint32_t statsTxErr; /*!< The error happen when transmit the frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 463 | uint32_t statsTxFrameErr; /*!< The transmit frame is error. */ |
AnnaBridge | 161:aa5281ff4a02 | 464 | uint32_t statsTxOverFlowErr; /*!< Transmit overflow. */ |
AnnaBridge | 161:aa5281ff4a02 | 465 | uint32_t statsTxLateCollisionErr; /*!< Transmit late collision. */ |
AnnaBridge | 161:aa5281ff4a02 | 466 | uint32_t statsTxExcessCollisionErr; /*!< Transmit excess collision.*/ |
AnnaBridge | 161:aa5281ff4a02 | 467 | uint32_t statsTxUnderFlowErr; /*!< Transmit under flow error. */ |
AnnaBridge | 161:aa5281ff4a02 | 468 | uint32_t statsTxTsErr; /*!< Transmit time stamp error. */ |
AnnaBridge | 161:aa5281ff4a02 | 469 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 470 | } enet_data_error_stats_t; |
AnnaBridge | 161:aa5281ff4a02 | 471 | |
AnnaBridge | 161:aa5281ff4a02 | 472 | /*! @brief Defines the receive buffer descriptor configuration structure. |
AnnaBridge | 161:aa5281ff4a02 | 473 | * |
AnnaBridge | 161:aa5281ff4a02 | 474 | * Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements. |
AnnaBridge | 161:aa5281ff4a02 | 475 | * 1. The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. |
AnnaBridge | 161:aa5281ff4a02 | 476 | * when the data buffers are in cacheable region when cache is enabled, all those size should be |
AnnaBridge | 161:aa5281ff4a02 | 477 | * aligned to the maximum value of "ENET_BUFF_ALIGNMENT" and the cache line size. |
AnnaBridge | 161:aa5281ff4a02 | 478 | * 2. The aligned transmit and receive buffer descriptor start address must be at |
AnnaBridge | 161:aa5281ff4a02 | 479 | * least 64 bit aligned. However, it's recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. |
AnnaBridge | 161:aa5281ff4a02 | 480 | * buffer descriptors should be put in non-cacheable region when cache is enabled. |
AnnaBridge | 161:aa5281ff4a02 | 481 | * 3. The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. |
AnnaBridge | 161:aa5281ff4a02 | 482 | * Receive buffers should be continuous with the total size equal to "rxBdNumber * rxBuffSizeAlign". |
AnnaBridge | 161:aa5281ff4a02 | 483 | * Transmit buffers should be continuous with the total size equal to "txBdNumber * txBuffSizeAlign". |
AnnaBridge | 161:aa5281ff4a02 | 484 | * when the data buffers are in cacheable region when cache is enabled, all those size should be |
AnnaBridge | 161:aa5281ff4a02 | 485 | * aligned to the maximum value of "ENET_BUFF_ALIGNMENT" and the cache line size. |
AnnaBridge | 161:aa5281ff4a02 | 486 | */ |
AnnaBridge | 161:aa5281ff4a02 | 487 | typedef struct _enet_buffer_config |
AnnaBridge | 161:aa5281ff4a02 | 488 | { |
AnnaBridge | 170:e95d10626187 | 489 | uint16_t rxBdNumber; /*!< Receive buffer descriptor number. */ |
AnnaBridge | 170:e95d10626187 | 490 | uint16_t txBdNumber; /*!< Transmit buffer descriptor number. */ |
AnnaBridge | 170:e95d10626187 | 491 | uint32_t rxBuffSizeAlign; /*!< Aligned receive data buffer size. */ |
AnnaBridge | 170:e95d10626187 | 492 | uint32_t txBuffSizeAlign; /*!< Aligned transmit data buffer size. */ |
AnnaBridge | 170:e95d10626187 | 493 | volatile enet_rx_bd_struct_t |
AnnaBridge | 170:e95d10626187 | 494 | *rxBdStartAddrAlign; /*!< Aligned receive buffer descriptor start address: should be non-cacheable. */ |
AnnaBridge | 170:e95d10626187 | 495 | volatile enet_tx_bd_struct_t |
AnnaBridge | 170:e95d10626187 | 496 | *txBdStartAddrAlign; /*!< Aligned transmit buffer descriptor start address: should be non-cacheable. */ |
AnnaBridge | 170:e95d10626187 | 497 | uint8_t *rxBufferAlign; /*!< Receive data buffer start address. */ |
AnnaBridge | 170:e95d10626187 | 498 | uint8_t *txBufferAlign; /*!< Transmit data buffer start address. */ |
AnnaBridge | 161:aa5281ff4a02 | 499 | } enet_buffer_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 500 | |
AnnaBridge | 161:aa5281ff4a02 | 501 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 502 | /*! @brief Defines the ENET PTP time stamp structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 503 | typedef struct _enet_ptp_time |
AnnaBridge | 161:aa5281ff4a02 | 504 | { |
AnnaBridge | 161:aa5281ff4a02 | 505 | uint64_t second; /*!< Second. */ |
AnnaBridge | 161:aa5281ff4a02 | 506 | uint32_t nanosecond; /*!< Nanosecond. */ |
AnnaBridge | 161:aa5281ff4a02 | 507 | } enet_ptp_time_t; |
AnnaBridge | 161:aa5281ff4a02 | 508 | |
AnnaBridge | 161:aa5281ff4a02 | 509 | /*! @brief Defines the structure for the ENET PTP message data and timestamp data.*/ |
AnnaBridge | 161:aa5281ff4a02 | 510 | typedef struct _enet_ptp_time_data |
AnnaBridge | 161:aa5281ff4a02 | 511 | { |
AnnaBridge | 161:aa5281ff4a02 | 512 | uint8_t version; /*!< PTP version. */ |
AnnaBridge | 161:aa5281ff4a02 | 513 | uint8_t sourcePortId[kENET_PtpSrcPortIdLen]; /*!< PTP source port ID. */ |
AnnaBridge | 161:aa5281ff4a02 | 514 | uint16_t sequenceId; /*!< PTP sequence ID. */ |
AnnaBridge | 161:aa5281ff4a02 | 515 | uint8_t messageType; /*!< PTP message type. */ |
AnnaBridge | 161:aa5281ff4a02 | 516 | enet_ptp_time_t timeStamp; /*!< PTP timestamp. */ |
AnnaBridge | 161:aa5281ff4a02 | 517 | } enet_ptp_time_data_t; |
AnnaBridge | 161:aa5281ff4a02 | 518 | |
AnnaBridge | 161:aa5281ff4a02 | 519 | /*! @brief Defines the ENET PTP ring buffer structure for the PTP message timestamp store.*/ |
AnnaBridge | 161:aa5281ff4a02 | 520 | typedef struct _enet_ptp_time_data_ring |
AnnaBridge | 161:aa5281ff4a02 | 521 | { |
AnnaBridge | 161:aa5281ff4a02 | 522 | uint32_t front; /*!< The first index of the ring. */ |
AnnaBridge | 161:aa5281ff4a02 | 523 | uint32_t end; /*!< The end index of the ring. */ |
AnnaBridge | 161:aa5281ff4a02 | 524 | uint32_t size; /*!< The size of the ring. */ |
AnnaBridge | 161:aa5281ff4a02 | 525 | enet_ptp_time_data_t *ptpTsData; /*!< PTP message data structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 526 | } enet_ptp_time_data_ring_t; |
AnnaBridge | 161:aa5281ff4a02 | 527 | |
AnnaBridge | 161:aa5281ff4a02 | 528 | /*! @brief Defines the ENET PTP configuration structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 529 | typedef struct _enet_ptp_config |
AnnaBridge | 161:aa5281ff4a02 | 530 | { |
AnnaBridge | 161:aa5281ff4a02 | 531 | uint8_t ptpTsRxBuffNum; /*!< Receive 1588 timestamp buffer number*/ |
AnnaBridge | 161:aa5281ff4a02 | 532 | uint8_t ptpTsTxBuffNum; /*!< Transmit 1588 timestamp buffer number*/ |
AnnaBridge | 161:aa5281ff4a02 | 533 | enet_ptp_time_data_t *rxPtpTsData; /*!< The start address of 1588 receive timestamp buffers */ |
AnnaBridge | 161:aa5281ff4a02 | 534 | enet_ptp_time_data_t *txPtpTsData; /*!< The start address of 1588 transmit timestamp buffers */ |
AnnaBridge | 161:aa5281ff4a02 | 535 | enet_ptp_timer_channel_t channel; /*!< Used for ERRATA_2579: the PTP 1588 timer channel for time interrupt. */ |
AnnaBridge | 161:aa5281ff4a02 | 536 | uint32_t ptp1588ClockSrc_Hz; /*!< The clock source of the PTP 1588 timer. */ |
AnnaBridge | 161:aa5281ff4a02 | 537 | } enet_ptp_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 538 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 539 | |
AnnaBridge | 161:aa5281ff4a02 | 540 | #if defined(FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE) && FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE |
AnnaBridge | 161:aa5281ff4a02 | 541 | /*! @brief Defines the interrupt coalescing configure structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 542 | typedef struct _enet_intcoalesce_config |
AnnaBridge | 161:aa5281ff4a02 | 543 | { |
AnnaBridge | 161:aa5281ff4a02 | 544 | uint8_t txCoalesceFrameCount[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit interrupt coalescing frame count threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 545 | uint16_t txCoalesceTimeCount[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit interrupt coalescing timer count threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 546 | uint8_t rxCoalesceFrameCount[FSL_FEATURE_ENET_QUEUE]; /*!< Receive interrupt coalescing frame count threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 547 | uint16_t rxCoalesceTimeCount[FSL_FEATURE_ENET_QUEUE]; /*!< Receive interrupt coalescing timer count threshold. */ |
AnnaBridge | 161:aa5281ff4a02 | 548 | } enet_intcoalesce_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 549 | #endif /* FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE */ |
AnnaBridge | 161:aa5281ff4a02 | 550 | |
AnnaBridge | 161:aa5281ff4a02 | 551 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 552 | /*! @brief Defines the ENET AVB Configure structure. |
AnnaBridge | 161:aa5281ff4a02 | 553 | * |
AnnaBridge | 161:aa5281ff4a02 | 554 | * This is used for to configure the extended ring 1 and ring 2. |
AnnaBridge | 161:aa5281ff4a02 | 555 | * 1. The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. |
AnnaBridge | 161:aa5281ff4a02 | 556 | * composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel. |
AnnaBridge | 161:aa5281ff4a02 | 557 | * |
AnnaBridge | 161:aa5281ff4a02 | 558 | * If CMP1,2,3 are not unused, please set them to the same value as CMP0. |
AnnaBridge | 161:aa5281ff4a02 | 559 | * 2. The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). |
AnnaBridge | 161:aa5281ff4a02 | 560 | * For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75. |
AnnaBridge | 161:aa5281ff4a02 | 561 | */ |
AnnaBridge | 161:aa5281ff4a02 | 562 | typedef struct _enet_avb_config |
AnnaBridge | 161:aa5281ff4a02 | 563 | { |
AnnaBridge | 161:aa5281ff4a02 | 564 | uint16_t rxClassifyMatch[FSL_FEATURE_ENET_QUEUE - 1]; /*!< The classification match value for the ring. */ |
AnnaBridge | 161:aa5281ff4a02 | 565 | enet_idle_slope_t idleSlope[FSL_FEATURE_ENET_QUEUE - 1]; /*!< The idle slope for certian bandwidth fraction. */ |
AnnaBridge | 161:aa5281ff4a02 | 566 | } enet_avb_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 567 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 568 | |
AnnaBridge | 161:aa5281ff4a02 | 569 | /*! @brief Defines the basic configuration structure for the ENET device. |
AnnaBridge | 161:aa5281ff4a02 | 570 | * |
AnnaBridge | 161:aa5281ff4a02 | 571 | * Note: |
AnnaBridge | 161:aa5281ff4a02 | 572 | * 1. macSpecialConfig is used for a special control configuration, A logical OR of |
AnnaBridge | 161:aa5281ff4a02 | 573 | * "enet_special_control_flag_t". For a special configuration for MAC, |
AnnaBridge | 161:aa5281ff4a02 | 574 | * set this parameter to 0. |
AnnaBridge | 161:aa5281ff4a02 | 575 | * 2. txWatermark is used for a cut-through operation. It is in steps of 64 bytes: |
AnnaBridge | 161:aa5281ff4a02 | 576 | * 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. |
AnnaBridge | 161:aa5281ff4a02 | 577 | * 2 - 128 bytes written to TX FIFO .... |
AnnaBridge | 161:aa5281ff4a02 | 578 | * 3 - 192 bytes written to TX FIFO .... |
AnnaBridge | 161:aa5281ff4a02 | 579 | * The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO .... |
AnnaBridge | 161:aa5281ff4a02 | 580 | * txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 |
AnnaBridge | 161:aa5281ff4a02 | 581 | * or for larger bus access latency 3 or larger due to contention for the system bus. |
AnnaBridge | 161:aa5281ff4a02 | 582 | * 3. rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. |
AnnaBridge | 161:aa5281ff4a02 | 583 | * It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. |
AnnaBridge | 161:aa5281ff4a02 | 584 | * If the end of the frame is stored in FIFO and the frame size if smaller than the |
AnnaBridge | 161:aa5281ff4a02 | 585 | * txWatermark, the frame is still transmitted. The rule is the |
AnnaBridge | 161:aa5281ff4a02 | 586 | * same for rxFifoFullThreshold in the receive direction. |
AnnaBridge | 161:aa5281ff4a02 | 587 | * 4. When "kENET_ControlFlowControlEnable" is set in the macSpecialConfig, ensure |
AnnaBridge | 161:aa5281ff4a02 | 588 | * that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold |
AnnaBridge | 161:aa5281ff4a02 | 589 | * are set for flow control enabled case. |
AnnaBridge | 161:aa5281ff4a02 | 590 | * 5. When "kENET_ControlStoreAndFwdDisabled" is set in the macSpecialConfig, ensure |
AnnaBridge | 161:aa5281ff4a02 | 591 | * that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable. |
AnnaBridge | 161:aa5281ff4a02 | 592 | * 6. The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator |
AnnaBridge | 161:aa5281ff4a02 | 593 | * are disabled. The "enet_tx_accelerator_t" and "enet_rx_accelerator_t" are |
AnnaBridge | 161:aa5281ff4a02 | 594 | * recommended to be used to enable the transmit and receive accelerator. |
AnnaBridge | 161:aa5281ff4a02 | 595 | * After the accelerators are enabled, the store and forward feature should be enabled. |
AnnaBridge | 161:aa5281ff4a02 | 596 | * As a result, kENET_ControlStoreAndFwdDisabled should not be set. |
AnnaBridge | 161:aa5281ff4a02 | 597 | * 7. The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading. |
AnnaBridge | 161:aa5281ff4a02 | 598 | */ |
AnnaBridge | 161:aa5281ff4a02 | 599 | typedef struct _enet_config |
AnnaBridge | 161:aa5281ff4a02 | 600 | { |
AnnaBridge | 161:aa5281ff4a02 | 601 | uint32_t macSpecialConfig; /*!< Mac special configuration. A logical OR of "enet_special_control_flag_t". */ |
AnnaBridge | 161:aa5281ff4a02 | 602 | uint32_t interrupt; /*!< Mac interrupt source. A logical OR of "enet_interrupt_enable_t". */ |
AnnaBridge | 161:aa5281ff4a02 | 603 | uint16_t rxMaxFrameLen; /*!< Receive maximum frame length. */ |
AnnaBridge | 161:aa5281ff4a02 | 604 | enet_mii_mode_t miiMode; /*!< MII mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 605 | enet_mii_speed_t miiSpeed; /*!< MII Speed. */ |
AnnaBridge | 161:aa5281ff4a02 | 606 | enet_mii_duplex_t miiDuplex; /*!< MII duplex. */ |
AnnaBridge | 161:aa5281ff4a02 | 607 | uint8_t rxAccelerConfig; /*!< Receive accelerator, A logical OR of "enet_rx_accelerator_t". */ |
AnnaBridge | 161:aa5281ff4a02 | 608 | uint8_t txAccelerConfig; /*!< Transmit accelerator, A logical OR of "enet_rx_accelerator_t". */ |
AnnaBridge | 161:aa5281ff4a02 | 609 | uint16_t pauseDuration; /*!< For flow control enabled case: Pause duration. */ |
AnnaBridge | 161:aa5281ff4a02 | 610 | uint8_t rxFifoEmptyThreshold; /*!< For flow control enabled case: when RX FIFO level reaches this value, |
AnnaBridge | 161:aa5281ff4a02 | 611 | it makes MAC generate XOFF pause frame. */ |
AnnaBridge | 161:aa5281ff4a02 | 612 | #if defined(FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD) && FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD |
AnnaBridge | 161:aa5281ff4a02 | 613 | uint8_t rxFifoStatEmptyThreshold; /*!< For flow control enabled case: number of frames in the receive FIFO, |
AnnaBridge | 161:aa5281ff4a02 | 614 | independent of size, that can be accept. If the limit is reached, reception |
AnnaBridge | 161:aa5281ff4a02 | 615 | continues and a pause frame is triggered. */ |
AnnaBridge | 161:aa5281ff4a02 | 616 | #endif /* FSL_FEATURE_ENET_HAS_RECEIVE_STATUS_THRESHOLD */ |
AnnaBridge | 161:aa5281ff4a02 | 617 | uint8_t rxFifoFullThreshold; /*!< For store and forward disable case, the data required in RX FIFO to notify |
AnnaBridge | 161:aa5281ff4a02 | 618 | the MAC receive ready status. */ |
AnnaBridge | 161:aa5281ff4a02 | 619 | uint8_t txFifoWatermark; /*!< For store and forward disable case, the data required in TX FIFO |
AnnaBridge | 161:aa5281ff4a02 | 620 | before a frame transmit start. */ |
AnnaBridge | 161:aa5281ff4a02 | 621 | #if defined(FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE) && FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE |
AnnaBridge | 161:aa5281ff4a02 | 622 | enet_intcoalesce_config_t |
AnnaBridge | 161:aa5281ff4a02 | 623 | *intCoalesceCfg; /* If the interrupt coalsecence is not required in the ring n(0,1,2), please set |
AnnaBridge | 161:aa5281ff4a02 | 624 | to NULL. */ |
AnnaBridge | 161:aa5281ff4a02 | 625 | #endif /* FSL_FEATURE_ENET_HAS_INTERRUPT_COALESCE */ |
AnnaBridge | 161:aa5281ff4a02 | 626 | uint8_t ringNum; /*!< Number of used rings. default with 1 -- single ring. */ |
AnnaBridge | 161:aa5281ff4a02 | 627 | } enet_config_t; |
AnnaBridge | 161:aa5281ff4a02 | 628 | |
AnnaBridge | 161:aa5281ff4a02 | 629 | /* Forward declaration of the handle typedef. */ |
AnnaBridge | 161:aa5281ff4a02 | 630 | typedef struct _enet_handle enet_handle_t; |
AnnaBridge | 161:aa5281ff4a02 | 631 | |
AnnaBridge | 161:aa5281ff4a02 | 632 | /*! @brief ENET callback function. */ |
AnnaBridge | 161:aa5281ff4a02 | 633 | #if FSL_FEATURE_ENET_QUEUE > 1 |
AnnaBridge | 161:aa5281ff4a02 | 634 | typedef void (*enet_callback_t)( |
AnnaBridge | 161:aa5281ff4a02 | 635 | ENET_Type *base, enet_handle_t *handle, uint32_t ringId, enet_event_t event, void *userData); |
AnnaBridge | 161:aa5281ff4a02 | 636 | #else |
AnnaBridge | 161:aa5281ff4a02 | 637 | typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, void *userData); |
AnnaBridge | 161:aa5281ff4a02 | 638 | #endif /* FSL_FEATURE_ENET_QUEUE > 1 */ |
AnnaBridge | 161:aa5281ff4a02 | 639 | |
AnnaBridge | 161:aa5281ff4a02 | 640 | /*! @brief Defines the ENET handler structure. */ |
AnnaBridge | 161:aa5281ff4a02 | 641 | struct _enet_handle |
AnnaBridge | 161:aa5281ff4a02 | 642 | { |
AnnaBridge | 161:aa5281ff4a02 | 643 | volatile enet_rx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 644 | *rxBdBase[FSL_FEATURE_ENET_QUEUE]; /*!< Receive buffer descriptor base address pointer. */ |
AnnaBridge | 161:aa5281ff4a02 | 645 | volatile enet_rx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 646 | *rxBdCurrent[FSL_FEATURE_ENET_QUEUE]; /*!< The current available receive buffer descriptor pointer. */ |
AnnaBridge | 161:aa5281ff4a02 | 647 | volatile enet_tx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 648 | *txBdBase[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit buffer descriptor base address pointer. */ |
AnnaBridge | 161:aa5281ff4a02 | 649 | volatile enet_tx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 650 | *txBdCurrent[FSL_FEATURE_ENET_QUEUE]; /*!< The current available transmit buffer descriptor pointer. */ |
AnnaBridge | 172:65be27845400 | 651 | volatile enet_tx_bd_struct_t |
AnnaBridge | 172:65be27845400 | 652 | *txBdDirty[FSL_FEATURE_ENET_QUEUE]; /*!< The dirty transmit buffer descriptor needed to be updated from. */ |
AnnaBridge | 161:aa5281ff4a02 | 653 | uint32_t rxBuffSizeAlign[FSL_FEATURE_ENET_QUEUE]; /*!< Receive buffer size alignment. */ |
AnnaBridge | 161:aa5281ff4a02 | 654 | uint32_t txBuffSizeAlign[FSL_FEATURE_ENET_QUEUE]; /*!< Transmit buffer size alignment. */ |
AnnaBridge | 161:aa5281ff4a02 | 655 | uint8_t ringNum; /*!< Number of used rings. */ |
AnnaBridge | 161:aa5281ff4a02 | 656 | enet_callback_t callback; /*!< Callback function. */ |
AnnaBridge | 161:aa5281ff4a02 | 657 | void *userData; /*!< Callback function parameter.*/ |
AnnaBridge | 161:aa5281ff4a02 | 658 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 659 | volatile enet_tx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 660 | *txBdDirtyStatic[FSL_FEATURE_ENET_QUEUE]; /*!< The dirty transmit buffer descriptor for error static update. */ |
AnnaBridge | 161:aa5281ff4a02 | 661 | volatile enet_tx_bd_struct_t |
AnnaBridge | 161:aa5281ff4a02 | 662 | *txBdDirtyTime[FSL_FEATURE_ENET_QUEUE]; /*!< The dirty transmit buffer descriptor for time stamp update. */ |
AnnaBridge | 161:aa5281ff4a02 | 663 | uint64_t msTimerSecond; /*!< The second for Master PTP timer .*/ |
AnnaBridge | 161:aa5281ff4a02 | 664 | enet_ptp_time_data_ring_t rxPtpTsDataRing; /*!< Receive PTP 1588 time stamp data ring buffer. */ |
AnnaBridge | 161:aa5281ff4a02 | 665 | enet_ptp_time_data_ring_t txPtpTsDataRing; /*!< Transmit PTP 1588 time stamp data ring buffer. */ |
AnnaBridge | 161:aa5281ff4a02 | 666 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 667 | }; |
AnnaBridge | 161:aa5281ff4a02 | 668 | |
AnnaBridge | 161:aa5281ff4a02 | 669 | /******************************************************************************* |
AnnaBridge | 161:aa5281ff4a02 | 670 | * API |
AnnaBridge | 161:aa5281ff4a02 | 671 | ******************************************************************************/ |
AnnaBridge | 161:aa5281ff4a02 | 672 | |
AnnaBridge | 161:aa5281ff4a02 | 673 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 674 | extern "C" { |
AnnaBridge | 161:aa5281ff4a02 | 675 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 676 | |
AnnaBridge | 161:aa5281ff4a02 | 677 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 678 | * @name Initialization and De-initialization |
AnnaBridge | 161:aa5281ff4a02 | 679 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 680 | */ |
AnnaBridge | 161:aa5281ff4a02 | 681 | |
AnnaBridge | 161:aa5281ff4a02 | 682 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 683 | * @brief Gets the ENET default configuration structure. |
AnnaBridge | 161:aa5281ff4a02 | 684 | * |
AnnaBridge | 161:aa5281ff4a02 | 685 | * The purpose of this API is to get the default ENET MAC controller |
AnnaBridge | 161:aa5281ff4a02 | 686 | * configure structure for ENET_Init(). User may use the initialized |
AnnaBridge | 161:aa5281ff4a02 | 687 | * structure unchanged in ENET_Init(), or modify some fields of the |
AnnaBridge | 161:aa5281ff4a02 | 688 | * structure before calling ENET_Init(). |
AnnaBridge | 161:aa5281ff4a02 | 689 | * Example: |
AnnaBridge | 161:aa5281ff4a02 | 690 | @code |
AnnaBridge | 161:aa5281ff4a02 | 691 | enet_config_t config; |
AnnaBridge | 161:aa5281ff4a02 | 692 | ENET_GetDefaultConfig(&config); |
AnnaBridge | 161:aa5281ff4a02 | 693 | @endcode |
AnnaBridge | 161:aa5281ff4a02 | 694 | * @param config The ENET mac controller configuration structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 695 | */ |
AnnaBridge | 161:aa5281ff4a02 | 696 | void ENET_GetDefaultConfig(enet_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 697 | |
AnnaBridge | 161:aa5281ff4a02 | 698 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 699 | * @brief Initializes the ENET module. |
AnnaBridge | 161:aa5281ff4a02 | 700 | * |
AnnaBridge | 161:aa5281ff4a02 | 701 | * This function ungates the module clock and initializes it with the ENET configuration. |
AnnaBridge | 161:aa5281ff4a02 | 702 | * |
AnnaBridge | 161:aa5281ff4a02 | 703 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 704 | * @param handle ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 705 | * @param config ENET mac configuration structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 706 | * The "enet_config_t" type mac configuration return from ENET_GetDefaultConfig |
AnnaBridge | 161:aa5281ff4a02 | 707 | * can be used directly. It is also possible to verify the Mac configuration using other methods. |
AnnaBridge | 161:aa5281ff4a02 | 708 | * @param bufferConfig ENET buffer configuration structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 709 | * The buffer configuration should be prepared for ENET Initialization. |
AnnaBridge | 161:aa5281ff4a02 | 710 | * It is the start address of "ringNum" enet_buffer_config structures. |
AnnaBridge | 161:aa5281ff4a02 | 711 | * To support added multi-ring features in some soc and compatible with the previous |
AnnaBridge | 172:65be27845400 | 712 | * enet driver version. For single ring supported, this bufferConfig is a buffer |
AnnaBridge | 172:65be27845400 | 713 | * configure structure pointer, for multi-ring supported and used case, this bufferConfig |
AnnaBridge | 172:65be27845400 | 714 | * pointer should be a buffer configure structure array pointer. |
AnnaBridge | 161:aa5281ff4a02 | 715 | * @param macAddr ENET mac address of Ethernet device. This MAC address should be |
AnnaBridge | 161:aa5281ff4a02 | 716 | * provided. |
AnnaBridge | 161:aa5281ff4a02 | 717 | * @param srcClock_Hz The internal module clock source for MII clock. |
AnnaBridge | 161:aa5281ff4a02 | 718 | * |
AnnaBridge | 161:aa5281ff4a02 | 719 | * @note ENET has two buffer descriptors legacy buffer descriptors and |
AnnaBridge | 161:aa5281ff4a02 | 720 | * enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To |
AnnaBridge | 161:aa5281ff4a02 | 721 | * use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor |
AnnaBridge | 161:aa5281ff4a02 | 722 | * by defining "ENET_ENHANCEDBUFFERDESCRIPTOR_MODE" and calling ENET_Ptp1588Configure() |
AnnaBridge | 161:aa5281ff4a02 | 723 | * to configure the 1588 feature and related buffers after calling ENET_Init(). |
AnnaBridge | 161:aa5281ff4a02 | 724 | */ |
AnnaBridge | 161:aa5281ff4a02 | 725 | void ENET_Init(ENET_Type *base, |
AnnaBridge | 161:aa5281ff4a02 | 726 | enet_handle_t *handle, |
AnnaBridge | 161:aa5281ff4a02 | 727 | const enet_config_t *config, |
AnnaBridge | 161:aa5281ff4a02 | 728 | const enet_buffer_config_t *bufferConfig, |
AnnaBridge | 161:aa5281ff4a02 | 729 | uint8_t *macAddr, |
AnnaBridge | 161:aa5281ff4a02 | 730 | uint32_t srcClock_Hz); |
AnnaBridge | 161:aa5281ff4a02 | 731 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 732 | * @brief Deinitializes the ENET module. |
AnnaBridge | 161:aa5281ff4a02 | 733 | |
AnnaBridge | 161:aa5281ff4a02 | 734 | * This function gates the module clock, clears ENET interrupts, and disables the ENET module. |
AnnaBridge | 161:aa5281ff4a02 | 735 | * |
AnnaBridge | 161:aa5281ff4a02 | 736 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 737 | */ |
AnnaBridge | 161:aa5281ff4a02 | 738 | void ENET_Deinit(ENET_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 739 | |
AnnaBridge | 161:aa5281ff4a02 | 740 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 741 | * @brief Resets the ENET module. |
AnnaBridge | 161:aa5281ff4a02 | 742 | * |
AnnaBridge | 161:aa5281ff4a02 | 743 | * This function restores the ENET module to reset state. |
AnnaBridge | 161:aa5281ff4a02 | 744 | * Note that this function sets all registers to |
AnnaBridge | 161:aa5281ff4a02 | 745 | * reset state. As a result, the ENET module can't work after calling this function. |
AnnaBridge | 161:aa5281ff4a02 | 746 | * |
AnnaBridge | 161:aa5281ff4a02 | 747 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 748 | */ |
AnnaBridge | 161:aa5281ff4a02 | 749 | static inline void ENET_Reset(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 750 | { |
AnnaBridge | 161:aa5281ff4a02 | 751 | base->ECR |= ENET_ECR_RESET_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 752 | } |
AnnaBridge | 161:aa5281ff4a02 | 753 | |
AnnaBridge | 161:aa5281ff4a02 | 754 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 755 | |
AnnaBridge | 161:aa5281ff4a02 | 756 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 757 | * @name MII interface operation |
AnnaBridge | 161:aa5281ff4a02 | 758 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 759 | */ |
AnnaBridge | 161:aa5281ff4a02 | 760 | |
AnnaBridge | 161:aa5281ff4a02 | 761 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 762 | * @brief Sets the ENET MII speed and duplex. |
AnnaBridge | 161:aa5281ff4a02 | 763 | * |
AnnaBridge | 161:aa5281ff4a02 | 764 | * This API is provided to dynamically change the speed and dulpex for MAC. |
AnnaBridge | 161:aa5281ff4a02 | 765 | * |
AnnaBridge | 161:aa5281ff4a02 | 766 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 767 | * @param speed The speed of the RMII mode. |
AnnaBridge | 161:aa5281ff4a02 | 768 | * @param duplex The duplex of the RMII mode. |
AnnaBridge | 161:aa5281ff4a02 | 769 | */ |
AnnaBridge | 161:aa5281ff4a02 | 770 | void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex); |
AnnaBridge | 161:aa5281ff4a02 | 771 | |
AnnaBridge | 161:aa5281ff4a02 | 772 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 773 | * @brief Sets the ENET SMI(serial management interface)- MII management interface. |
AnnaBridge | 161:aa5281ff4a02 | 774 | * |
AnnaBridge | 161:aa5281ff4a02 | 775 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 776 | * @param srcClock_Hz This is the ENET module clock frequency. Normally it's the system clock. See clock distribution. |
AnnaBridge | 161:aa5281ff4a02 | 777 | * @param isPreambleDisabled The preamble disable flag. |
AnnaBridge | 161:aa5281ff4a02 | 778 | * - true Enables the preamble. |
AnnaBridge | 161:aa5281ff4a02 | 779 | * - false Disables the preamble. |
AnnaBridge | 161:aa5281ff4a02 | 780 | */ |
AnnaBridge | 161:aa5281ff4a02 | 781 | void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled); |
AnnaBridge | 161:aa5281ff4a02 | 782 | |
AnnaBridge | 161:aa5281ff4a02 | 783 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 784 | * @brief Gets the ENET SMI- MII management interface configuration. |
AnnaBridge | 161:aa5281ff4a02 | 785 | * |
AnnaBridge | 161:aa5281ff4a02 | 786 | * This API is used to get the SMI configuration to check whether the MII management |
AnnaBridge | 161:aa5281ff4a02 | 787 | * interface has been set. |
AnnaBridge | 161:aa5281ff4a02 | 788 | * |
AnnaBridge | 161:aa5281ff4a02 | 789 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 790 | * @return The SMI setup status true or false. |
AnnaBridge | 161:aa5281ff4a02 | 791 | */ |
AnnaBridge | 161:aa5281ff4a02 | 792 | static inline bool ENET_GetSMI(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 793 | { |
AnnaBridge | 161:aa5281ff4a02 | 794 | return (0 != (base->MSCR & 0x7E)); |
AnnaBridge | 161:aa5281ff4a02 | 795 | } |
AnnaBridge | 161:aa5281ff4a02 | 796 | |
AnnaBridge | 161:aa5281ff4a02 | 797 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 798 | * @brief Reads data from the PHY register through an SMI interface. |
AnnaBridge | 161:aa5281ff4a02 | 799 | * |
AnnaBridge | 161:aa5281ff4a02 | 800 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 801 | * @return The data read from PHY |
AnnaBridge | 161:aa5281ff4a02 | 802 | */ |
AnnaBridge | 161:aa5281ff4a02 | 803 | static inline uint32_t ENET_ReadSMIData(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 804 | { |
AnnaBridge | 161:aa5281ff4a02 | 805 | return (uint32_t)((base->MMFR & ENET_MMFR_DATA_MASK) >> ENET_MMFR_DATA_SHIFT); |
AnnaBridge | 161:aa5281ff4a02 | 806 | } |
AnnaBridge | 161:aa5281ff4a02 | 807 | |
AnnaBridge | 161:aa5281ff4a02 | 808 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 809 | * @brief Starts an SMI (Serial Management Interface) read command. |
AnnaBridge | 161:aa5281ff4a02 | 810 | * |
AnnaBridge | 161:aa5281ff4a02 | 811 | * Used for standard IEEE802.3 MDIO Clause 22 format. |
AnnaBridge | 161:aa5281ff4a02 | 812 | * |
AnnaBridge | 161:aa5281ff4a02 | 813 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 814 | * @param phyAddr The PHY address. |
AnnaBridge | 161:aa5281ff4a02 | 815 | * @param phyReg The PHY register. Range from 0 ~ 31. |
AnnaBridge | 161:aa5281ff4a02 | 816 | * @param operation The read operation. |
AnnaBridge | 161:aa5281ff4a02 | 817 | */ |
AnnaBridge | 161:aa5281ff4a02 | 818 | void ENET_StartSMIRead(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_read_t operation); |
AnnaBridge | 161:aa5281ff4a02 | 819 | |
AnnaBridge | 161:aa5281ff4a02 | 820 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 821 | * @brief Starts an SMI write command. |
AnnaBridge | 161:aa5281ff4a02 | 822 | * |
AnnaBridge | 161:aa5281ff4a02 | 823 | * Used for standard IEEE802.3 MDIO Clause 22 format. |
AnnaBridge | 161:aa5281ff4a02 | 824 | * |
AnnaBridge | 161:aa5281ff4a02 | 825 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 826 | * @param phyAddr The PHY address. |
AnnaBridge | 161:aa5281ff4a02 | 827 | * @param phyReg The PHY register. Range from 0 ~ 31. |
AnnaBridge | 161:aa5281ff4a02 | 828 | * @param operation The write operation. |
AnnaBridge | 161:aa5281ff4a02 | 829 | * @param data The data written to PHY. |
AnnaBridge | 161:aa5281ff4a02 | 830 | */ |
AnnaBridge | 161:aa5281ff4a02 | 831 | void ENET_StartSMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_write_t operation, uint32_t data); |
AnnaBridge | 161:aa5281ff4a02 | 832 | |
AnnaBridge | 161:aa5281ff4a02 | 833 | #if defined(FSL_FEATURE_ENET_HAS_EXTEND_MDIO) && FSL_FEATURE_ENET_HAS_EXTEND_MDIO |
AnnaBridge | 161:aa5281ff4a02 | 834 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 835 | * @brief Starts the extended IEEE802.3 Clause 45 MDIO format SMI read command. |
AnnaBridge | 161:aa5281ff4a02 | 836 | * |
AnnaBridge | 161:aa5281ff4a02 | 837 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 838 | * @param phyAddr The PHY address. |
AnnaBridge | 161:aa5281ff4a02 | 839 | * @param phyReg The PHY register. For MDIO IEEE802.3 Clause 45, |
AnnaBridge | 161:aa5281ff4a02 | 840 | * the phyReg is a 21-bits combination of the devaddr (5 bits device address) |
AnnaBridge | 161:aa5281ff4a02 | 841 | * and the regAddr (16 bits phy register): phyReg = (devaddr << 16) | regAddr. |
AnnaBridge | 161:aa5281ff4a02 | 842 | */ |
AnnaBridge | 161:aa5281ff4a02 | 843 | void ENET_StartExtC45SMIRead(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg); |
AnnaBridge | 161:aa5281ff4a02 | 844 | |
AnnaBridge | 161:aa5281ff4a02 | 845 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 846 | * @brief Starts the extended IEEE802.3 Clause 45 MDIO format SMI write command. |
AnnaBridge | 161:aa5281ff4a02 | 847 | * |
AnnaBridge | 161:aa5281ff4a02 | 848 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 849 | * @param phyAddr The PHY address. |
AnnaBridge | 161:aa5281ff4a02 | 850 | * @param phyReg The PHY register. For MDIO IEEE802.3 Clause 45, |
AnnaBridge | 161:aa5281ff4a02 | 851 | * the phyReg is a 21-bits combination of the devaddr (5 bits device address) |
AnnaBridge | 161:aa5281ff4a02 | 852 | * and the regAddr (16 bits phy register): phyReg = (devaddr << 16) | regAddr. |
AnnaBridge | 161:aa5281ff4a02 | 853 | * @param data The data written to PHY. |
AnnaBridge | 161:aa5281ff4a02 | 854 | */ |
AnnaBridge | 161:aa5281ff4a02 | 855 | void ENET_StartExtC45SMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data); |
AnnaBridge | 161:aa5281ff4a02 | 856 | #endif /* FSL_FEATURE_ENET_HAS_EXTEND_MDIO */ |
AnnaBridge | 161:aa5281ff4a02 | 857 | |
AnnaBridge | 161:aa5281ff4a02 | 858 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 859 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 860 | * @brief Control the usage of the delayed tx/rx RGMII clock. |
AnnaBridge | 161:aa5281ff4a02 | 861 | * |
AnnaBridge | 161:aa5281ff4a02 | 862 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 863 | * @param txEnabled Enable or disable to generate the delayed version of RGMII_TXC. |
AnnaBridge | 161:aa5281ff4a02 | 864 | * @param rxEnabled Enable or disable to use the delayed version of RGMII_RXC. |
AnnaBridge | 161:aa5281ff4a02 | 865 | */ |
AnnaBridge | 161:aa5281ff4a02 | 866 | |
AnnaBridge | 161:aa5281ff4a02 | 867 | static inline void ENET_SetRGMIIClockDelay(ENET_Type *base, bool txEnabled, bool rxEnabled) |
AnnaBridge | 161:aa5281ff4a02 | 868 | { |
AnnaBridge | 161:aa5281ff4a02 | 869 | uint32_t ecrReg = base->ECR; |
AnnaBridge | 161:aa5281ff4a02 | 870 | |
AnnaBridge | 161:aa5281ff4a02 | 871 | /* Set for transmit clock delay. */ |
AnnaBridge | 161:aa5281ff4a02 | 872 | if (txEnabled) |
AnnaBridge | 161:aa5281ff4a02 | 873 | { |
AnnaBridge | 161:aa5281ff4a02 | 874 | ecrReg |= ENET_ECR_TXC_DLY_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 875 | } |
AnnaBridge | 161:aa5281ff4a02 | 876 | else |
AnnaBridge | 161:aa5281ff4a02 | 877 | { |
AnnaBridge | 161:aa5281ff4a02 | 878 | ecrReg &= ~ENET_ECR_TXC_DLY_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 879 | } |
AnnaBridge | 161:aa5281ff4a02 | 880 | |
AnnaBridge | 161:aa5281ff4a02 | 881 | /* Set for receive clock delay. */ |
AnnaBridge | 161:aa5281ff4a02 | 882 | if (rxEnabled) |
AnnaBridge | 161:aa5281ff4a02 | 883 | { |
AnnaBridge | 161:aa5281ff4a02 | 884 | ecrReg |= ENET_ECR_RXC_DLY_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 885 | } |
AnnaBridge | 161:aa5281ff4a02 | 886 | else |
AnnaBridge | 161:aa5281ff4a02 | 887 | { |
AnnaBridge | 161:aa5281ff4a02 | 888 | ecrReg &= ~ENET_ECR_RXC_DLY_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 889 | } |
AnnaBridge | 161:aa5281ff4a02 | 890 | } |
AnnaBridge | 161:aa5281ff4a02 | 891 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 892 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 893 | |
AnnaBridge | 161:aa5281ff4a02 | 894 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 895 | * @name MAC Address Filter |
AnnaBridge | 161:aa5281ff4a02 | 896 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 897 | */ |
AnnaBridge | 161:aa5281ff4a02 | 898 | |
AnnaBridge | 161:aa5281ff4a02 | 899 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 900 | * @brief Sets the ENET module Mac address. |
AnnaBridge | 161:aa5281ff4a02 | 901 | * |
AnnaBridge | 161:aa5281ff4a02 | 902 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 903 | * @param macAddr The six-byte Mac address pointer. |
AnnaBridge | 161:aa5281ff4a02 | 904 | * The pointer is allocated by application and input into the API. |
AnnaBridge | 161:aa5281ff4a02 | 905 | */ |
AnnaBridge | 161:aa5281ff4a02 | 906 | void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr); |
AnnaBridge | 161:aa5281ff4a02 | 907 | |
AnnaBridge | 161:aa5281ff4a02 | 908 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 909 | * @brief Gets the ENET module Mac address. |
AnnaBridge | 161:aa5281ff4a02 | 910 | * |
AnnaBridge | 161:aa5281ff4a02 | 911 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 912 | * @param macAddr The six-byte Mac address pointer. |
AnnaBridge | 161:aa5281ff4a02 | 913 | * The pointer is allocated by application and input into the API. |
AnnaBridge | 161:aa5281ff4a02 | 914 | */ |
AnnaBridge | 161:aa5281ff4a02 | 915 | void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr); |
AnnaBridge | 161:aa5281ff4a02 | 916 | |
AnnaBridge | 161:aa5281ff4a02 | 917 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 918 | * @brief Adds the ENET device to a multicast group. |
AnnaBridge | 161:aa5281ff4a02 | 919 | * |
AnnaBridge | 161:aa5281ff4a02 | 920 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 921 | * @param address The six-byte multicast group address which is provided by application. |
AnnaBridge | 161:aa5281ff4a02 | 922 | */ |
AnnaBridge | 161:aa5281ff4a02 | 923 | void ENET_AddMulticastGroup(ENET_Type *base, uint8_t *address); |
AnnaBridge | 161:aa5281ff4a02 | 924 | |
AnnaBridge | 161:aa5281ff4a02 | 925 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 926 | * @brief Moves the ENET device from a multicast group. |
AnnaBridge | 161:aa5281ff4a02 | 927 | * |
AnnaBridge | 161:aa5281ff4a02 | 928 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 929 | * @param address The six-byte multicast group address which is provided by application. |
AnnaBridge | 161:aa5281ff4a02 | 930 | */ |
AnnaBridge | 161:aa5281ff4a02 | 931 | void ENET_LeaveMulticastGroup(ENET_Type *base, uint8_t *address); |
AnnaBridge | 161:aa5281ff4a02 | 932 | |
AnnaBridge | 161:aa5281ff4a02 | 933 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 934 | |
AnnaBridge | 161:aa5281ff4a02 | 935 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 936 | * @name Other basic operation |
AnnaBridge | 161:aa5281ff4a02 | 937 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 938 | */ |
AnnaBridge | 161:aa5281ff4a02 | 939 | |
AnnaBridge | 161:aa5281ff4a02 | 940 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 941 | #if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB |
AnnaBridge | 161:aa5281ff4a02 | 942 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 943 | * @brief Sets the ENET AVB feature. |
AnnaBridge | 161:aa5281ff4a02 | 944 | * |
AnnaBridge | 161:aa5281ff4a02 | 945 | * ENET AVB feature configuration, set the Receive classification match and transmit |
AnnaBridge | 161:aa5281ff4a02 | 946 | * bandwidth. This API is called when the AVB feature is required. |
AnnaBridge | 161:aa5281ff4a02 | 947 | * |
AnnaBridge | 161:aa5281ff4a02 | 948 | * Note: The AVB frames transmission scheme is credit-based tx scheme and it's only supported |
AnnaBridge | 161:aa5281ff4a02 | 949 | * with the Enhanced buffer descriptors. so the AVB configuration should only done with |
AnnaBridge | 161:aa5281ff4a02 | 950 | * Enhanced buffer descriptor. so when the AVB feature is required, please make sure the |
AnnaBridge | 161:aa5281ff4a02 | 951 | * the "ENET_ENHANCEDBUFFERDESCRIPTOR_MODE" is defined. |
AnnaBridge | 161:aa5281ff4a02 | 952 | * |
AnnaBridge | 161:aa5281ff4a02 | 953 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 954 | * @param handle ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 955 | * @param config The ENET AVB feature configuration structure. |
AnnaBridge | 161:aa5281ff4a02 | 956 | */ |
AnnaBridge | 161:aa5281ff4a02 | 957 | void ENET_AVBConfigure(ENET_Type *base, enet_handle_t *handle, const enet_avb_config_t *config); |
AnnaBridge | 161:aa5281ff4a02 | 958 | #endif /* FSL_FEATURE_ENET_HAS_AVB */ |
AnnaBridge | 161:aa5281ff4a02 | 959 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 960 | |
AnnaBridge | 161:aa5281ff4a02 | 961 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 962 | * @brief Activates ENET read or receive. |
AnnaBridge | 161:aa5281ff4a02 | 963 | * |
AnnaBridge | 161:aa5281ff4a02 | 964 | * This function is to active the enet read process. It is |
AnnaBridge | 161:aa5281ff4a02 | 965 | * used for single descriptor ring/queue. |
AnnaBridge | 161:aa5281ff4a02 | 966 | * |
AnnaBridge | 161:aa5281ff4a02 | 967 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 968 | * |
AnnaBridge | 161:aa5281ff4a02 | 969 | * @note This must be called after the MAC configuration and |
AnnaBridge | 161:aa5281ff4a02 | 970 | * state are ready. It must be called after the ENET_Init() and |
AnnaBridge | 161:aa5281ff4a02 | 971 | * ENET_Ptp1588Configure(). This should be called when the ENET receive required. |
AnnaBridge | 161:aa5281ff4a02 | 972 | */ |
AnnaBridge | 161:aa5281ff4a02 | 973 | static inline void ENET_ActiveRead(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 974 | { |
AnnaBridge | 161:aa5281ff4a02 | 975 | base->RDAR = ENET_RDAR_RDAR_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 976 | } |
AnnaBridge | 161:aa5281ff4a02 | 977 | |
AnnaBridge | 161:aa5281ff4a02 | 978 | #if FSL_FEATURE_ENET_QUEUE > 1 |
AnnaBridge | 161:aa5281ff4a02 | 979 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 980 | * @brief Activates ENET read or receive for multiple-queue/ring. |
AnnaBridge | 161:aa5281ff4a02 | 981 | * |
AnnaBridge | 161:aa5281ff4a02 | 982 | * This function is to active the enet read process. It is |
AnnaBridge | 161:aa5281ff4a02 | 983 | * used for extended multiple descriptor rings/queues. |
AnnaBridge | 161:aa5281ff4a02 | 984 | * |
AnnaBridge | 161:aa5281ff4a02 | 985 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 986 | * |
AnnaBridge | 161:aa5281ff4a02 | 987 | * @note This must be called after the MAC configuration and |
AnnaBridge | 161:aa5281ff4a02 | 988 | * state are ready. It must be called after the ENET_Init() and |
AnnaBridge | 161:aa5281ff4a02 | 989 | * ENET_Ptp1588Configure(). This should be called when the ENET receive required. |
AnnaBridge | 161:aa5281ff4a02 | 990 | */ |
AnnaBridge | 161:aa5281ff4a02 | 991 | static inline void ENET_ActiveReadMultiRing(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 992 | { |
AnnaBridge | 161:aa5281ff4a02 | 993 | base->RDAR = ENET_RDAR_RDAR_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 994 | base->RDAR1 = ENET_RDAR1_RDAR_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 995 | base->RDAR2 = ENET_RDAR2_RDAR_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 996 | } |
AnnaBridge | 161:aa5281ff4a02 | 997 | #endif /* FSL_FEATURE_ENET_QUEUE > 1 */ |
AnnaBridge | 161:aa5281ff4a02 | 998 | |
AnnaBridge | 161:aa5281ff4a02 | 999 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1000 | * @brief Enables/disables the MAC to enter sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 1001 | * This function is used to set the MAC enter sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 1002 | * When entering sleep mode, the magic frame wakeup interrupt should be enabled |
AnnaBridge | 161:aa5281ff4a02 | 1003 | * to wake up MAC from the sleep mode and reset it to normal mode. |
AnnaBridge | 161:aa5281ff4a02 | 1004 | * |
AnnaBridge | 161:aa5281ff4a02 | 1005 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1006 | * @param enable True enable sleep mode, false disable sleep mode. |
AnnaBridge | 161:aa5281ff4a02 | 1007 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1008 | static inline void ENET_EnableSleepMode(ENET_Type *base, bool enable) |
AnnaBridge | 161:aa5281ff4a02 | 1009 | { |
AnnaBridge | 161:aa5281ff4a02 | 1010 | if (enable) |
AnnaBridge | 161:aa5281ff4a02 | 1011 | { |
AnnaBridge | 161:aa5281ff4a02 | 1012 | /* When this field is set, MAC enters sleep mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 1013 | base->ECR |= ENET_ECR_SLEEP_MASK | ENET_ECR_MAGICEN_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 1014 | } |
AnnaBridge | 161:aa5281ff4a02 | 1015 | else |
AnnaBridge | 161:aa5281ff4a02 | 1016 | { /* MAC exits sleep mode. */ |
AnnaBridge | 161:aa5281ff4a02 | 1017 | base->ECR &= ~(ENET_ECR_SLEEP_MASK | ENET_ECR_MAGICEN_MASK); |
AnnaBridge | 161:aa5281ff4a02 | 1018 | } |
AnnaBridge | 161:aa5281ff4a02 | 1019 | } |
AnnaBridge | 161:aa5281ff4a02 | 1020 | |
AnnaBridge | 161:aa5281ff4a02 | 1021 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1022 | * @brief Gets ENET transmit and receive accelerator functions from MAC controller. |
AnnaBridge | 161:aa5281ff4a02 | 1023 | * |
AnnaBridge | 161:aa5281ff4a02 | 1024 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1025 | * @param txAccelOption The transmit accelerator option. The "enet_tx_accelerator_t" is |
AnnaBridge | 161:aa5281ff4a02 | 1026 | * recommended to be used to as the mask to get the exact the accelerator option. |
AnnaBridge | 161:aa5281ff4a02 | 1027 | * @param rxAccelOption The receive accelerator option. The "enet_rx_accelerator_t" is |
AnnaBridge | 161:aa5281ff4a02 | 1028 | * recommended to be used to as the mask to get the exact the accelerator option. |
AnnaBridge | 161:aa5281ff4a02 | 1029 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1030 | static inline void ENET_GetAccelFunction(ENET_Type *base, uint32_t *txAccelOption, uint32_t *rxAccelOption) |
AnnaBridge | 161:aa5281ff4a02 | 1031 | { |
AnnaBridge | 161:aa5281ff4a02 | 1032 | assert(txAccelOption); |
AnnaBridge | 161:aa5281ff4a02 | 1033 | assert(txAccelOption); |
AnnaBridge | 161:aa5281ff4a02 | 1034 | |
AnnaBridge | 161:aa5281ff4a02 | 1035 | *txAccelOption = base->TACC; |
AnnaBridge | 161:aa5281ff4a02 | 1036 | *rxAccelOption = base->RACC; |
AnnaBridge | 161:aa5281ff4a02 | 1037 | } |
AnnaBridge | 161:aa5281ff4a02 | 1038 | |
AnnaBridge | 161:aa5281ff4a02 | 1039 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 1040 | |
AnnaBridge | 161:aa5281ff4a02 | 1041 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1042 | * @name Interrupts. |
AnnaBridge | 161:aa5281ff4a02 | 1043 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 1044 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1045 | |
AnnaBridge | 161:aa5281ff4a02 | 1046 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1047 | * @brief Enables the ENET interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 1048 | * |
AnnaBridge | 161:aa5281ff4a02 | 1049 | * This function enables the ENET interrupt according to the provided mask. The mask |
AnnaBridge | 161:aa5281ff4a02 | 1050 | * is a logical OR of enumeration members. See @ref enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1051 | * For example, to enable the TX frame interrupt and RX frame interrupt, do the following. |
AnnaBridge | 161:aa5281ff4a02 | 1052 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 1053 | * ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt); |
AnnaBridge | 161:aa5281ff4a02 | 1054 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 1055 | * |
AnnaBridge | 161:aa5281ff4a02 | 1056 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1057 | * @param mask ENET interrupts to enable. This is a logical OR of the |
AnnaBridge | 161:aa5281ff4a02 | 1058 | * enumeration :: enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1059 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1060 | static inline void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 1061 | { |
AnnaBridge | 161:aa5281ff4a02 | 1062 | base->EIMR |= mask; |
AnnaBridge | 161:aa5281ff4a02 | 1063 | } |
AnnaBridge | 161:aa5281ff4a02 | 1064 | |
AnnaBridge | 161:aa5281ff4a02 | 1065 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1066 | * @brief Disables the ENET interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 1067 | * |
AnnaBridge | 161:aa5281ff4a02 | 1068 | * This function disables the ENET interrupts according to the provided mask. The mask |
AnnaBridge | 161:aa5281ff4a02 | 1069 | * is a logical OR of enumeration members. See @ref enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1070 | * For example, to disable the TX frame interrupt and RX frame interrupt, do the following. |
AnnaBridge | 161:aa5281ff4a02 | 1071 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 1072 | * ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt); |
AnnaBridge | 161:aa5281ff4a02 | 1073 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 1074 | * |
AnnaBridge | 161:aa5281ff4a02 | 1075 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1076 | * @param mask ENET interrupts to disable. This is a logical OR of the |
AnnaBridge | 161:aa5281ff4a02 | 1077 | * enumeration :: enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1078 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1079 | static inline void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 1080 | { |
AnnaBridge | 161:aa5281ff4a02 | 1081 | base->EIMR &= ~mask; |
AnnaBridge | 161:aa5281ff4a02 | 1082 | } |
AnnaBridge | 161:aa5281ff4a02 | 1083 | |
AnnaBridge | 161:aa5281ff4a02 | 1084 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1085 | * @brief Gets the ENET interrupt status flag. |
AnnaBridge | 161:aa5281ff4a02 | 1086 | * |
AnnaBridge | 161:aa5281ff4a02 | 1087 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1088 | * @return The event status of the interrupt source. This is the logical OR of members |
AnnaBridge | 161:aa5281ff4a02 | 1089 | * of the enumeration :: enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1090 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1091 | static inline uint32_t ENET_GetInterruptStatus(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 1092 | { |
AnnaBridge | 161:aa5281ff4a02 | 1093 | return base->EIR; |
AnnaBridge | 161:aa5281ff4a02 | 1094 | } |
AnnaBridge | 161:aa5281ff4a02 | 1095 | |
AnnaBridge | 161:aa5281ff4a02 | 1096 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1097 | * @brief Clears the ENET interrupt events status flag. |
AnnaBridge | 161:aa5281ff4a02 | 1098 | * |
AnnaBridge | 161:aa5281ff4a02 | 1099 | * This function clears enabled ENET interrupts according to the provided mask. The mask |
AnnaBridge | 161:aa5281ff4a02 | 1100 | * is a logical OR of enumeration members. See the @ref enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1101 | * For example, to clear the TX frame interrupt and RX frame interrupt, do the following. |
AnnaBridge | 161:aa5281ff4a02 | 1102 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 1103 | * ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt); |
AnnaBridge | 161:aa5281ff4a02 | 1104 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 1105 | * |
AnnaBridge | 161:aa5281ff4a02 | 1106 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1107 | * @param mask ENET interrupt source to be cleared. |
AnnaBridge | 161:aa5281ff4a02 | 1108 | * This is the logical OR of members of the enumeration :: enet_interrupt_enable_t. |
AnnaBridge | 161:aa5281ff4a02 | 1109 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1110 | static inline void ENET_ClearInterruptStatus(ENET_Type *base, uint32_t mask) |
AnnaBridge | 161:aa5281ff4a02 | 1111 | { |
AnnaBridge | 161:aa5281ff4a02 | 1112 | base->EIR = mask; |
AnnaBridge | 161:aa5281ff4a02 | 1113 | } |
AnnaBridge | 161:aa5281ff4a02 | 1114 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 1115 | |
AnnaBridge | 161:aa5281ff4a02 | 1116 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1117 | * @name Transactional operation |
AnnaBridge | 161:aa5281ff4a02 | 1118 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 1119 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1120 | |
AnnaBridge | 161:aa5281ff4a02 | 1121 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1122 | * @brief Sets the callback function. |
AnnaBridge | 161:aa5281ff4a02 | 1123 | * This API is provided for the application callback required case when ENET |
AnnaBridge | 161:aa5281ff4a02 | 1124 | * interrupt is enabled. This API should be called after calling ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1125 | * |
AnnaBridge | 161:aa5281ff4a02 | 1126 | * @param handle ENET handler pointer. Should be provided by application. |
AnnaBridge | 161:aa5281ff4a02 | 1127 | * @param callback The ENET callback function. |
AnnaBridge | 161:aa5281ff4a02 | 1128 | * @param userData The callback function parameter. |
AnnaBridge | 161:aa5281ff4a02 | 1129 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1130 | void ENET_SetCallback(enet_handle_t *handle, enet_callback_t callback, void *userData); |
AnnaBridge | 161:aa5281ff4a02 | 1131 | |
AnnaBridge | 161:aa5281ff4a02 | 1132 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1133 | * @brief Gets the error statistics of a received frame for ENET single ring. |
AnnaBridge | 161:aa5281ff4a02 | 1134 | * |
AnnaBridge | 161:aa5281ff4a02 | 1135 | * This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame(). |
AnnaBridge | 161:aa5281ff4a02 | 1136 | * If the ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError, |
AnnaBridge | 161:aa5281ff4a02 | 1137 | * the ENET_GetRxErrBeforeReadFrame can be used to get the exact error statistics. |
AnnaBridge | 161:aa5281ff4a02 | 1138 | * This is an example. |
AnnaBridge | 161:aa5281ff4a02 | 1139 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 1140 | * status = ENET_GetRxFrameSize(&g_handle, &length); |
AnnaBridge | 161:aa5281ff4a02 | 1141 | * if (status == kStatus_ENET_RxFrameError) |
AnnaBridge | 161:aa5281ff4a02 | 1142 | * { |
AnnaBridge | 161:aa5281ff4a02 | 1143 | * // Get the error information of the received frame. |
AnnaBridge | 161:aa5281ff4a02 | 1144 | * ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic); |
AnnaBridge | 161:aa5281ff4a02 | 1145 | * // update the receive buffer. |
AnnaBridge | 161:aa5281ff4a02 | 1146 | * ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0); |
AnnaBridge | 161:aa5281ff4a02 | 1147 | * } |
AnnaBridge | 161:aa5281ff4a02 | 1148 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 1149 | * @param handle The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1150 | * @param eErrorStatic The error statistics structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1151 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1152 | void ENET_GetRxErrBeforeReadFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic); |
AnnaBridge | 161:aa5281ff4a02 | 1153 | |
AnnaBridge | 161:aa5281ff4a02 | 1154 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 1155 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1156 | * @brief Gets the ENET transmit frame statistics after the data send for single ring. |
AnnaBridge | 161:aa5281ff4a02 | 1157 | * |
AnnaBridge | 161:aa5281ff4a02 | 1158 | * This interface gets the error statistics of the transmit frame. |
AnnaBridge | 161:aa5281ff4a02 | 1159 | * Because the error information is reported by the uDMA after the data delivery, this interface |
AnnaBridge | 161:aa5281ff4a02 | 1160 | * should be called after the data transmit API. It is recommended to call this function on |
AnnaBridge | 161:aa5281ff4a02 | 1161 | * transmit interrupt handler. After calling the ENET_SendFrame, the |
AnnaBridge | 161:aa5281ff4a02 | 1162 | * transmit interrupt notifies the transmit completion. |
AnnaBridge | 161:aa5281ff4a02 | 1163 | * |
AnnaBridge | 161:aa5281ff4a02 | 1164 | * @param handle The PTP handler pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1165 | * @param eErrorStatic The error statistics structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1166 | * @return The execute status. |
AnnaBridge | 161:aa5281ff4a02 | 1167 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1168 | status_t ENET_GetTxErrAfterSendFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic); |
AnnaBridge | 161:aa5281ff4a02 | 1169 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 1170 | |
AnnaBridge | 161:aa5281ff4a02 | 1171 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1172 | * @brief Gets the size of the read frame for single ring. |
AnnaBridge | 161:aa5281ff4a02 | 1173 | * |
AnnaBridge | 161:aa5281ff4a02 | 1174 | * This function gets a received frame size from the ENET buffer descriptors. |
AnnaBridge | 161:aa5281ff4a02 | 1175 | * @note The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. |
AnnaBridge | 161:aa5281ff4a02 | 1176 | * After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to update the |
AnnaBridge | 161:aa5281ff4a02 | 1177 | * receive buffers If the result is not "kStatus_ENET_RxFrameEmpty". |
AnnaBridge | 161:aa5281ff4a02 | 1178 | * |
AnnaBridge | 161:aa5281ff4a02 | 1179 | * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1180 | * @param length The length of the valid frame received. |
AnnaBridge | 161:aa5281ff4a02 | 1181 | * @retval kStatus_ENET_RxFrameEmpty No frame received. Should not call ENET_ReadFrame to read frame. |
AnnaBridge | 161:aa5281ff4a02 | 1182 | * @retval kStatus_ENET_RxFrameError Data error happens. ENET_ReadFrame should be called with NULL data |
AnnaBridge | 161:aa5281ff4a02 | 1183 | * and NULL length to update the receive buffers. |
AnnaBridge | 161:aa5281ff4a02 | 1184 | * @retval kStatus_Success Receive a frame Successfully then the ENET_ReadFrame |
AnnaBridge | 161:aa5281ff4a02 | 1185 | * should be called with the right data buffer and the captured data length input. |
AnnaBridge | 161:aa5281ff4a02 | 1186 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1187 | status_t ENET_GetRxFrameSize(enet_handle_t *handle, uint32_t *length); |
AnnaBridge | 161:aa5281ff4a02 | 1188 | |
AnnaBridge | 161:aa5281ff4a02 | 1189 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1190 | * @brief Reads a frame from the ENET device for single ring. |
AnnaBridge | 161:aa5281ff4a02 | 1191 | * This function reads a frame (both the data and the length) from the ENET buffer descriptors. |
AnnaBridge | 161:aa5281ff4a02 | 1192 | * The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer. |
AnnaBridge | 161:aa5281ff4a02 | 1193 | * This is an example: |
AnnaBridge | 161:aa5281ff4a02 | 1194 | * @code |
AnnaBridge | 161:aa5281ff4a02 | 1195 | * uint32_t length; |
AnnaBridge | 161:aa5281ff4a02 | 1196 | * enet_handle_t g_handle; |
AnnaBridge | 161:aa5281ff4a02 | 1197 | * //Get the received frame size firstly. |
AnnaBridge | 161:aa5281ff4a02 | 1198 | * status = ENET_GetRxFrameSize(&g_handle, &length); |
AnnaBridge | 161:aa5281ff4a02 | 1199 | * if (length != 0) |
AnnaBridge | 161:aa5281ff4a02 | 1200 | * { |
AnnaBridge | 161:aa5281ff4a02 | 1201 | * //Allocate memory here with the size of "length" |
AnnaBridge | 161:aa5281ff4a02 | 1202 | * uint8_t *data = memory allocate interface; |
AnnaBridge | 161:aa5281ff4a02 | 1203 | * if (!data) |
AnnaBridge | 161:aa5281ff4a02 | 1204 | * { |
AnnaBridge | 161:aa5281ff4a02 | 1205 | * ENET_ReadFrame(ENET, &g_handle, NULL, 0); |
AnnaBridge | 161:aa5281ff4a02 | 1206 | * //Add the console warning log. |
AnnaBridge | 161:aa5281ff4a02 | 1207 | * } |
AnnaBridge | 161:aa5281ff4a02 | 1208 | * else |
AnnaBridge | 161:aa5281ff4a02 | 1209 | * { |
AnnaBridge | 161:aa5281ff4a02 | 1210 | * status = ENET_ReadFrame(ENET, &g_handle, data, length); |
AnnaBridge | 161:aa5281ff4a02 | 1211 | * //Call stack input API to deliver the data to stack |
AnnaBridge | 161:aa5281ff4a02 | 1212 | * } |
AnnaBridge | 161:aa5281ff4a02 | 1213 | * } |
AnnaBridge | 161:aa5281ff4a02 | 1214 | * else if (status == kStatus_ENET_RxFrameError) |
AnnaBridge | 161:aa5281ff4a02 | 1215 | * { |
AnnaBridge | 161:aa5281ff4a02 | 1216 | * //Update the received buffer when a error frame is received. |
AnnaBridge | 161:aa5281ff4a02 | 1217 | * ENET_ReadFrame(ENET, &g_handle, NULL, 0); |
AnnaBridge | 161:aa5281ff4a02 | 1218 | * } |
AnnaBridge | 161:aa5281ff4a02 | 1219 | * @endcode |
AnnaBridge | 161:aa5281ff4a02 | 1220 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1221 | * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1222 | * @param data The data buffer provided by user to store the frame which memory size should be at least "length". |
AnnaBridge | 161:aa5281ff4a02 | 1223 | * @param length The size of the data buffer which is still the length of the received frame. |
AnnaBridge | 161:aa5281ff4a02 | 1224 | * @return The execute status, successful or failure. |
AnnaBridge | 161:aa5281ff4a02 | 1225 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1226 | status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length); |
AnnaBridge | 161:aa5281ff4a02 | 1227 | |
AnnaBridge | 161:aa5281ff4a02 | 1228 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1229 | * @brief Transmits an ENET frame for single ring. |
AnnaBridge | 161:aa5281ff4a02 | 1230 | * @note The CRC is automatically appended to the data. Input the data |
AnnaBridge | 161:aa5281ff4a02 | 1231 | * to send without the CRC. |
AnnaBridge | 161:aa5281ff4a02 | 1232 | * |
AnnaBridge | 161:aa5281ff4a02 | 1233 | * |
AnnaBridge | 161:aa5281ff4a02 | 1234 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1235 | * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1236 | * @param data The data buffer provided by user to be send. |
AnnaBridge | 161:aa5281ff4a02 | 1237 | * @param length The length of the data to be send. |
AnnaBridge | 161:aa5281ff4a02 | 1238 | * @retval kStatus_Success Send frame succeed. |
AnnaBridge | 161:aa5281ff4a02 | 1239 | * @retval kStatus_ENET_TxFrameBusy Transmit buffer descriptor is busy under transmission. |
AnnaBridge | 161:aa5281ff4a02 | 1240 | * The transmit busy happens when the data send rate is over the MAC capacity. |
AnnaBridge | 161:aa5281ff4a02 | 1241 | * The waiting mechanism is recommended to be added after each call return with |
AnnaBridge | 161:aa5281ff4a02 | 1242 | * kStatus_ENET_TxFrameBusy. |
AnnaBridge | 161:aa5281ff4a02 | 1243 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1244 | status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const uint8_t *data, uint32_t length); |
AnnaBridge | 161:aa5281ff4a02 | 1245 | |
AnnaBridge | 161:aa5281ff4a02 | 1246 | #if FSL_FEATURE_ENET_QUEUE > 1 |
AnnaBridge | 161:aa5281ff4a02 | 1247 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1248 | * @brief Gets the error statistics of received frame for extended multi-ring. |
AnnaBridge | 161:aa5281ff4a02 | 1249 | * |
AnnaBridge | 161:aa5281ff4a02 | 1250 | * This API must be called after the ENET_GetRxFrameSizeMultiRing and before the ENET_ReadFrameMultiRing(). |
AnnaBridge | 161:aa5281ff4a02 | 1251 | * If the ENET_GetRxFrameSizeMultiRing returns kStatus_ENET_RxFrameError, |
AnnaBridge | 161:aa5281ff4a02 | 1252 | * the ENET_GetRxErrBeforeReadFrameMultiRing can be used to get the exact error statistics. |
AnnaBridge | 161:aa5281ff4a02 | 1253 | * |
AnnaBridge | 161:aa5281ff4a02 | 1254 | * @param handle The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1255 | * @param eErrorStatic The error statistics structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1256 | * @param ringId The ring index, range from 0 ~ FSL_FEATURE_ENET_QUEUE - 1. |
AnnaBridge | 161:aa5281ff4a02 | 1257 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1258 | void ENET_GetRxErrBeforeReadFrameMultiRing(enet_handle_t *handle, |
AnnaBridge | 161:aa5281ff4a02 | 1259 | enet_data_error_stats_t *eErrorStatic, |
AnnaBridge | 161:aa5281ff4a02 | 1260 | uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1261 | |
AnnaBridge | 161:aa5281ff4a02 | 1262 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1263 | * @brief Transmits an ENET frame for extended multi-ring. |
AnnaBridge | 161:aa5281ff4a02 | 1264 | * @note The CRC is automatically appended to the data. Input the data |
AnnaBridge | 161:aa5281ff4a02 | 1265 | * to send without the CRC. |
AnnaBridge | 161:aa5281ff4a02 | 1266 | * |
AnnaBridge | 161:aa5281ff4a02 | 1267 | * In this API, multiple-ring are mainly used for extended avb frames are supported. |
AnnaBridge | 161:aa5281ff4a02 | 1268 | * The transmit scheme for avb frames is the credit-based scheme, the AVB class A, AVB class B |
AnnaBridge | 161:aa5281ff4a02 | 1269 | * and the non-AVB frame are transmitted in ring 1, ring 2 and ring 0 independently. |
AnnaBridge | 161:aa5281ff4a02 | 1270 | * So application should care about the transmit ring index when use multiple-ring transmission. |
AnnaBridge | 161:aa5281ff4a02 | 1271 | * |
AnnaBridge | 161:aa5281ff4a02 | 1272 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1273 | * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1274 | * @param data The data buffer provided by user to be send. |
AnnaBridge | 161:aa5281ff4a02 | 1275 | * @param length The length of the data to be send. |
AnnaBridge | 161:aa5281ff4a02 | 1276 | * @param ringId The ring index for transmission. |
AnnaBridge | 161:aa5281ff4a02 | 1277 | * @retval kStatus_Success Send frame succeed. |
AnnaBridge | 161:aa5281ff4a02 | 1278 | * @retval kStatus_ENET_TxFrameBusy Transmit buffer descriptor is busy under transmission. |
AnnaBridge | 161:aa5281ff4a02 | 1279 | * The transmit busy happens when the data send rate is over the MAC capacity. |
AnnaBridge | 161:aa5281ff4a02 | 1280 | * The waiting mechanism is recommended to be added after each call return with |
AnnaBridge | 161:aa5281ff4a02 | 1281 | * kStatus_ENET_TxFrameBusy. |
AnnaBridge | 161:aa5281ff4a02 | 1282 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1283 | status_t ENET_SendFrameMultiRing( |
AnnaBridge | 161:aa5281ff4a02 | 1284 | ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1285 | |
AnnaBridge | 161:aa5281ff4a02 | 1286 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 1287 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1288 | * @brief Gets the ENET transmit frame statistics after the data send for extended multi-ring. |
AnnaBridge | 161:aa5281ff4a02 | 1289 | * |
AnnaBridge | 161:aa5281ff4a02 | 1290 | * This interface gets the error statistics of the transmit frame. |
AnnaBridge | 161:aa5281ff4a02 | 1291 | * Because the error information is reported by the uDMA after the data delivery, this interface |
AnnaBridge | 161:aa5281ff4a02 | 1292 | * should be called after the data transmit API and shall be called by transmit interrupt handler. |
AnnaBridge | 161:aa5281ff4a02 | 1293 | * After calling the ENET_SendFrame, the transmit interrupt notifies the transmit completion. |
AnnaBridge | 161:aa5281ff4a02 | 1294 | * |
AnnaBridge | 161:aa5281ff4a02 | 1295 | * @param handle The PTP handler pointer. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1296 | * @param eErrorStatic The error statistics structure pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1297 | * @param ringId The ring index. |
AnnaBridge | 161:aa5281ff4a02 | 1298 | * @return The execute status. |
AnnaBridge | 161:aa5281ff4a02 | 1299 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1300 | status_t ENET_GetTxErrAfterSendFrameMultiRing(enet_handle_t *handle, |
AnnaBridge | 161:aa5281ff4a02 | 1301 | enet_data_error_stats_t *eErrorStatic, |
AnnaBridge | 161:aa5281ff4a02 | 1302 | uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1303 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 1304 | |
AnnaBridge | 161:aa5281ff4a02 | 1305 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1306 | * @brief Gets the size of the read frame for extended mutli-ring. |
AnnaBridge | 161:aa5281ff4a02 | 1307 | * |
AnnaBridge | 161:aa5281ff4a02 | 1308 | * This function gets a received frame size from the ENET buffer descriptors. |
AnnaBridge | 161:aa5281ff4a02 | 1309 | * @note The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. |
AnnaBridge | 161:aa5281ff4a02 | 1310 | * After calling ENET_GetRxFrameSizeMultiRing, ENET_ReadFrameMultiRing() should be called to update the |
AnnaBridge | 161:aa5281ff4a02 | 1311 | * receive buffers If the result is not "kStatus_ENET_RxFrameEmpty". The usage is |
AnnaBridge | 161:aa5281ff4a02 | 1312 | * the same to the single ring, refer to ENET_GetRxFrameSize. |
AnnaBridge | 161:aa5281ff4a02 | 1313 | * |
AnnaBridge | 161:aa5281ff4a02 | 1314 | * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1315 | * @param length The length of the valid frame received. |
AnnaBridge | 161:aa5281ff4a02 | 1316 | * @param ringId The ring index or ring number; |
AnnaBridge | 161:aa5281ff4a02 | 1317 | * @retval kStatus_ENET_RxFrameEmpty No frame received. Should not call ENET_ReadFrameMultiRing to read frame. |
AnnaBridge | 161:aa5281ff4a02 | 1318 | * @retval kStatus_ENET_RxFrameError Data error happens. ENET_ReadFrameMultiRing should be called with NULL data |
AnnaBridge | 161:aa5281ff4a02 | 1319 | * and NULL length to update the receive buffers. |
AnnaBridge | 161:aa5281ff4a02 | 1320 | * @retval kStatus_Success Receive a frame Successfully then the ENET_ReadFrame |
AnnaBridge | 161:aa5281ff4a02 | 1321 | * should be called with the right data buffer and the captured data length input. |
AnnaBridge | 161:aa5281ff4a02 | 1322 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1323 | status_t ENET_GetRxFrameSizeMultiRing(enet_handle_t *handle, uint32_t *length, uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1324 | |
AnnaBridge | 161:aa5281ff4a02 | 1325 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1326 | * @brief Reads a frame from the ENET device for multi-ring. |
AnnaBridge | 161:aa5281ff4a02 | 1327 | * |
AnnaBridge | 161:aa5281ff4a02 | 1328 | * This function reads a frame (both the data and the length) from the ENET buffer descriptors. |
AnnaBridge | 161:aa5281ff4a02 | 1329 | * The ENET_GetRxFrameSizeMultiRing should be used to get the size of the prepared data buffer. |
AnnaBridge | 161:aa5281ff4a02 | 1330 | * This usage is the same as the single ring, refer to ENET_ReadFrame. |
AnnaBridge | 161:aa5281ff4a02 | 1331 | |
AnnaBridge | 161:aa5281ff4a02 | 1332 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1333 | * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1334 | * @param data The data buffer provided by user to store the frame which memory size should be at least "length". |
AnnaBridge | 161:aa5281ff4a02 | 1335 | * @param length The size of the data buffer which is still the length of the received frame. |
AnnaBridge | 161:aa5281ff4a02 | 1336 | * @param ringId The ring index or ring number; |
AnnaBridge | 161:aa5281ff4a02 | 1337 | * @return The execute status, successful or failure. |
AnnaBridge | 161:aa5281ff4a02 | 1338 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1339 | status_t ENET_ReadFrameMultiRing( |
AnnaBridge | 161:aa5281ff4a02 | 1340 | ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1341 | |
AnnaBridge | 161:aa5281ff4a02 | 1342 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1343 | * @brief The transmit IRQ handler. |
AnnaBridge | 161:aa5281ff4a02 | 1344 | * |
AnnaBridge | 161:aa5281ff4a02 | 1345 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1346 | * @param handle The ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1347 | * @param ringId The ring id or ring number. |
AnnaBridge | 161:aa5281ff4a02 | 1348 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1349 | void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle, uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1350 | |
AnnaBridge | 161:aa5281ff4a02 | 1351 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1352 | * @brief The receive IRQ handler. |
AnnaBridge | 161:aa5281ff4a02 | 1353 | * |
AnnaBridge | 161:aa5281ff4a02 | 1354 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1355 | * @param handle The ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1356 | * @param ringId The ring id or ring number. |
AnnaBridge | 161:aa5281ff4a02 | 1357 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1358 | void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle, uint32_t ringId); |
AnnaBridge | 161:aa5281ff4a02 | 1359 | |
AnnaBridge | 161:aa5281ff4a02 | 1360 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1361 | * @brief the common IRQ handler for the tx/rx irq handler. |
AnnaBridge | 161:aa5281ff4a02 | 1362 | * |
AnnaBridge | 161:aa5281ff4a02 | 1363 | * This is used for the combined tx/rx interrupt for multi-ring (frame 1). |
AnnaBridge | 161:aa5281ff4a02 | 1364 | * |
AnnaBridge | 161:aa5281ff4a02 | 1365 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1366 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1367 | void ENET_CommonFrame1IRQHandler(ENET_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 1368 | |
AnnaBridge | 161:aa5281ff4a02 | 1369 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1370 | * @brief the common IRQ handler for the tx/rx irq handler. |
AnnaBridge | 161:aa5281ff4a02 | 1371 | * |
AnnaBridge | 161:aa5281ff4a02 | 1372 | * This is used for the combined tx/rx interrupt for multi-ring (frame 2). |
AnnaBridge | 161:aa5281ff4a02 | 1373 | * |
AnnaBridge | 161:aa5281ff4a02 | 1374 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1375 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1376 | void ENET_CommonFrame2IRQHandler(ENET_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 1377 | #else |
AnnaBridge | 161:aa5281ff4a02 | 1378 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1379 | * @brief The transmit IRQ handler. |
AnnaBridge | 161:aa5281ff4a02 | 1380 | * |
AnnaBridge | 161:aa5281ff4a02 | 1381 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1382 | * @param handle The ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1383 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1384 | void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle); |
AnnaBridge | 161:aa5281ff4a02 | 1385 | |
AnnaBridge | 161:aa5281ff4a02 | 1386 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1387 | * @brief The receive IRQ handler. |
AnnaBridge | 161:aa5281ff4a02 | 1388 | * |
AnnaBridge | 161:aa5281ff4a02 | 1389 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1390 | * @param handle The ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1391 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1392 | void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle); |
AnnaBridge | 161:aa5281ff4a02 | 1393 | #endif /* FSL_FEATURE_ENET_QUEUE > 1 */ |
AnnaBridge | 161:aa5281ff4a02 | 1394 | |
AnnaBridge | 161:aa5281ff4a02 | 1395 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1396 | * @brief Some special IRQ handler including the error, mii, wakeup irq handler. |
AnnaBridge | 161:aa5281ff4a02 | 1397 | * |
AnnaBridge | 161:aa5281ff4a02 | 1398 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1399 | * @param handle The ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1400 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1401 | void ENET_ErrorIRQHandler(ENET_Type *base, enet_handle_t *handle); |
AnnaBridge | 161:aa5281ff4a02 | 1402 | |
AnnaBridge | 161:aa5281ff4a02 | 1403 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1404 | * @brief the common IRQ handler for the tx/rx/error etc irq handler. |
AnnaBridge | 161:aa5281ff4a02 | 1405 | * |
AnnaBridge | 161:aa5281ff4a02 | 1406 | * This is used for the combined tx/rx/error interrupt for single/mutli-ring (frame 0). |
AnnaBridge | 161:aa5281ff4a02 | 1407 | * |
AnnaBridge | 161:aa5281ff4a02 | 1408 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1409 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1410 | void ENET_CommonFrame0IRQHandler(ENET_Type *base); |
AnnaBridge | 161:aa5281ff4a02 | 1411 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 1412 | |
AnnaBridge | 161:aa5281ff4a02 | 1413 | #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE |
AnnaBridge | 161:aa5281ff4a02 | 1414 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1415 | * @name ENET PTP 1588 function operation |
AnnaBridge | 161:aa5281ff4a02 | 1416 | * @{ |
AnnaBridge | 161:aa5281ff4a02 | 1417 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1418 | |
AnnaBridge | 161:aa5281ff4a02 | 1419 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1420 | * @brief Configures the ENET PTP IEEE 1588 feature with the basic configuration. |
AnnaBridge | 161:aa5281ff4a02 | 1421 | * The function sets the clock for PTP 1588 timer and enables |
AnnaBridge | 161:aa5281ff4a02 | 1422 | * time stamp interrupts and transmit interrupts for PTP 1588 features. |
AnnaBridge | 161:aa5281ff4a02 | 1423 | * This API should be called when the 1588 feature is enabled |
AnnaBridge | 161:aa5281ff4a02 | 1424 | * or the ENET_ENHANCEDBUFFERDESCRIPTOR_MODE is defined. |
AnnaBridge | 161:aa5281ff4a02 | 1425 | * ENET_Init should be called before calling this API. |
AnnaBridge | 161:aa5281ff4a02 | 1426 | * |
AnnaBridge | 161:aa5281ff4a02 | 1427 | * @note The PTP 1588 time-stamp second increase though time-stamp interrupt handler |
AnnaBridge | 161:aa5281ff4a02 | 1428 | * and the transmit time-stamp store is done through transmit interrupt handler. |
AnnaBridge | 161:aa5281ff4a02 | 1429 | * As a result, the TS interrupt and TX interrupt are enabled when you call this API. |
AnnaBridge | 161:aa5281ff4a02 | 1430 | * |
AnnaBridge | 161:aa5281ff4a02 | 1431 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1432 | * @param handle ENET handler pointer. |
AnnaBridge | 161:aa5281ff4a02 | 1433 | * @param ptpConfig The ENET PTP1588 configuration. |
AnnaBridge | 161:aa5281ff4a02 | 1434 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1435 | void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_config_t *ptpConfig); |
AnnaBridge | 161:aa5281ff4a02 | 1436 | |
AnnaBridge | 161:aa5281ff4a02 | 1437 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1438 | * @brief Starts the ENET PTP 1588 Timer. |
AnnaBridge | 161:aa5281ff4a02 | 1439 | * This function is used to initialize the PTP timer. After the PTP starts, |
AnnaBridge | 161:aa5281ff4a02 | 1440 | * the PTP timer starts running. |
AnnaBridge | 161:aa5281ff4a02 | 1441 | * |
AnnaBridge | 161:aa5281ff4a02 | 1442 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1443 | * @param ptpClkSrc The clock source of the PTP timer. |
AnnaBridge | 161:aa5281ff4a02 | 1444 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1445 | void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc); |
AnnaBridge | 161:aa5281ff4a02 | 1446 | |
AnnaBridge | 161:aa5281ff4a02 | 1447 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1448 | * @brief Stops the ENET PTP 1588 Timer. |
AnnaBridge | 161:aa5281ff4a02 | 1449 | * This function is used to stops the ENET PTP timer. |
AnnaBridge | 161:aa5281ff4a02 | 1450 | * |
AnnaBridge | 161:aa5281ff4a02 | 1451 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1452 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1453 | static inline void ENET_Ptp1588StopTimer(ENET_Type *base) |
AnnaBridge | 161:aa5281ff4a02 | 1454 | { |
AnnaBridge | 161:aa5281ff4a02 | 1455 | /* Disable PTP timer and reset the timer. */ |
AnnaBridge | 161:aa5281ff4a02 | 1456 | base->ATCR &= ~ENET_ATCR_EN_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 1457 | base->ATCR |= ENET_ATCR_RESTART_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 1458 | } |
AnnaBridge | 161:aa5281ff4a02 | 1459 | |
AnnaBridge | 161:aa5281ff4a02 | 1460 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1461 | * @brief Adjusts the ENET PTP 1588 timer. |
AnnaBridge | 161:aa5281ff4a02 | 1462 | * |
AnnaBridge | 161:aa5281ff4a02 | 1463 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1464 | * @param corrIncrease The correction increment value. This value is added every time the correction |
AnnaBridge | 161:aa5281ff4a02 | 1465 | * timer expires. A value less than the PTP timer frequency(1/ptpClkSrc) slows down the timer, |
AnnaBridge | 161:aa5281ff4a02 | 1466 | * a value greater than the 1/ptpClkSrc speeds up the timer. |
AnnaBridge | 161:aa5281ff4a02 | 1467 | * @param corrPeriod The PTP timer correction counter wrap-around value. This defines after how |
AnnaBridge | 161:aa5281ff4a02 | 1468 | * many timer clock the correction counter should be reset and trigger a correction |
AnnaBridge | 161:aa5281ff4a02 | 1469 | * increment on the timer. A value of 0 disables the correction counter and no correction occurs. |
AnnaBridge | 161:aa5281ff4a02 | 1470 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1471 | void ENET_Ptp1588AdjustTimer(ENET_Type *base, uint32_t corrIncrease, uint32_t corrPeriod); |
AnnaBridge | 161:aa5281ff4a02 | 1472 | |
AnnaBridge | 161:aa5281ff4a02 | 1473 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1474 | * @brief Sets the ENET PTP 1588 timer channel mode. |
AnnaBridge | 161:aa5281ff4a02 | 1475 | * |
AnnaBridge | 161:aa5281ff4a02 | 1476 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1477 | * @param channel The ENET PTP timer channel number. |
AnnaBridge | 161:aa5281ff4a02 | 1478 | * @param mode The PTP timer channel mode, see "enet_ptp_timer_channel_mode_t". |
AnnaBridge | 161:aa5281ff4a02 | 1479 | * @param intEnable Enables or disables the interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 1480 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1481 | static inline void ENET_Ptp1588SetChannelMode(ENET_Type *base, |
AnnaBridge | 161:aa5281ff4a02 | 1482 | enet_ptp_timer_channel_t channel, |
AnnaBridge | 161:aa5281ff4a02 | 1483 | enet_ptp_timer_channel_mode_t mode, |
AnnaBridge | 161:aa5281ff4a02 | 1484 | bool intEnable) |
AnnaBridge | 161:aa5281ff4a02 | 1485 | { |
AnnaBridge | 161:aa5281ff4a02 | 1486 | uint32_t tcrReg = 0; |
AnnaBridge | 161:aa5281ff4a02 | 1487 | |
AnnaBridge | 161:aa5281ff4a02 | 1488 | tcrReg = ENET_TCSR_TMODE(mode) | (intEnable ? ENET_TCSR_TIE_MASK : 0); |
AnnaBridge | 161:aa5281ff4a02 | 1489 | |
AnnaBridge | 161:aa5281ff4a02 | 1490 | /* Disable channel mode first. */ |
AnnaBridge | 161:aa5281ff4a02 | 1491 | base->CHANNEL[channel].TCSR = 0; |
AnnaBridge | 161:aa5281ff4a02 | 1492 | base->CHANNEL[channel].TCSR = tcrReg; |
AnnaBridge | 161:aa5281ff4a02 | 1493 | } |
AnnaBridge | 161:aa5281ff4a02 | 1494 | |
AnnaBridge | 161:aa5281ff4a02 | 1495 | #if defined(FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL) && FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL |
AnnaBridge | 161:aa5281ff4a02 | 1496 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1497 | * @brief Sets ENET PTP 1588 timer channel mode pulse width. |
AnnaBridge | 161:aa5281ff4a02 | 1498 | * |
AnnaBridge | 161:aa5281ff4a02 | 1499 | * For the input "mode" in ENET_Ptp1588SetChannelMode, the kENET_PtpChannelPulseLowonCompare |
AnnaBridge | 161:aa5281ff4a02 | 1500 | * kENET_PtpChannelPulseHighonCompare only support the pulse width for one 1588 clock. |
AnnaBridge | 161:aa5281ff4a02 | 1501 | * this function is extended for control the pulse width from 1 to 32 1588 clock cycles. |
AnnaBridge | 161:aa5281ff4a02 | 1502 | * so call this function if you need to set the timer channel mode for |
AnnaBridge | 161:aa5281ff4a02 | 1503 | * kENET_PtpChannelPulseLowonCompare or kENET_PtpChannelPulseHighonCompare |
AnnaBridge | 161:aa5281ff4a02 | 1504 | * with pulse width more than one 1588 clock, |
AnnaBridge | 161:aa5281ff4a02 | 1505 | * |
AnnaBridge | 161:aa5281ff4a02 | 1506 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1507 | * @param channel The ENET PTP timer channel number. |
AnnaBridge | 161:aa5281ff4a02 | 1508 | * @param isOutputLow True --- timer channel is configured for output compare |
AnnaBridge | 161:aa5281ff4a02 | 1509 | * pulse output low. |
AnnaBridge | 161:aa5281ff4a02 | 1510 | * false --- timer channel is configured for output compare |
AnnaBridge | 161:aa5281ff4a02 | 1511 | * pulse output high. |
AnnaBridge | 161:aa5281ff4a02 | 1512 | * @param pulseWidth The pulse width control value, range from 0 ~ 31. |
AnnaBridge | 161:aa5281ff4a02 | 1513 | * 0 --- pulse width is one 1588 clock cycle. |
AnnaBridge | 161:aa5281ff4a02 | 1514 | * 31 --- pulse width is thirty two 1588 clock cycles. |
AnnaBridge | 161:aa5281ff4a02 | 1515 | * @param intEnable Enables or disables the interrupt. |
AnnaBridge | 161:aa5281ff4a02 | 1516 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1517 | static inline void ENET_Ptp1588SetChannelOutputPulseWidth( |
AnnaBridge | 161:aa5281ff4a02 | 1518 | ENET_Type *base, enet_ptp_timer_channel_t channel, bool isOutputLow, uint8_t pulseWidth, bool intEnable) |
AnnaBridge | 161:aa5281ff4a02 | 1519 | { |
AnnaBridge | 161:aa5281ff4a02 | 1520 | uint32_t tcrReg; |
AnnaBridge | 161:aa5281ff4a02 | 1521 | |
AnnaBridge | 161:aa5281ff4a02 | 1522 | tcrReg = ENET_TCSR_TIE(intEnable) | ENET_TCSR_TPWC(pulseWidth); |
AnnaBridge | 161:aa5281ff4a02 | 1523 | |
AnnaBridge | 161:aa5281ff4a02 | 1524 | if (isOutputLow) |
AnnaBridge | 161:aa5281ff4a02 | 1525 | { |
AnnaBridge | 161:aa5281ff4a02 | 1526 | tcrReg |= ENET_TCSR_TMODE(kENET_PtpChannelPulseLowonCompare); |
AnnaBridge | 161:aa5281ff4a02 | 1527 | } |
AnnaBridge | 161:aa5281ff4a02 | 1528 | else |
AnnaBridge | 161:aa5281ff4a02 | 1529 | { |
AnnaBridge | 161:aa5281ff4a02 | 1530 | tcrReg |= ENET_TCSR_TMODE(kENET_PtpChannelPulseHighonCompare); |
AnnaBridge | 161:aa5281ff4a02 | 1531 | } |
AnnaBridge | 161:aa5281ff4a02 | 1532 | |
AnnaBridge | 161:aa5281ff4a02 | 1533 | /* Disable channel mode first. */ |
AnnaBridge | 161:aa5281ff4a02 | 1534 | base->CHANNEL[channel].TCSR = 0; |
AnnaBridge | 161:aa5281ff4a02 | 1535 | base->CHANNEL[channel].TCSR = tcrReg; |
AnnaBridge | 161:aa5281ff4a02 | 1536 | } |
AnnaBridge | 161:aa5281ff4a02 | 1537 | #endif /* FSL_FEATURE_ENET_HAS_TIMER_PWCONTROL */ |
AnnaBridge | 161:aa5281ff4a02 | 1538 | |
AnnaBridge | 161:aa5281ff4a02 | 1539 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1540 | * @brief Sets the ENET PTP 1588 timer channel comparison value. |
AnnaBridge | 161:aa5281ff4a02 | 1541 | * |
AnnaBridge | 161:aa5281ff4a02 | 1542 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1543 | * @param channel The PTP timer channel, see "enet_ptp_timer_channel_t". |
AnnaBridge | 161:aa5281ff4a02 | 1544 | * @param cmpValue The compare value for the compare setting. |
AnnaBridge | 161:aa5281ff4a02 | 1545 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1546 | static inline void ENET_Ptp1588SetChannelCmpValue(ENET_Type *base, enet_ptp_timer_channel_t channel, uint32_t cmpValue) |
AnnaBridge | 161:aa5281ff4a02 | 1547 | { |
AnnaBridge | 161:aa5281ff4a02 | 1548 | base->CHANNEL[channel].TCCR = cmpValue; |
AnnaBridge | 161:aa5281ff4a02 | 1549 | } |
AnnaBridge | 161:aa5281ff4a02 | 1550 | |
AnnaBridge | 161:aa5281ff4a02 | 1551 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1552 | * @brief Gets the ENET PTP 1588 timer channel status. |
AnnaBridge | 161:aa5281ff4a02 | 1553 | * |
AnnaBridge | 161:aa5281ff4a02 | 1554 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1555 | * @param channel The IEEE 1588 timer channel number. |
AnnaBridge | 161:aa5281ff4a02 | 1556 | * @return True or false, Compare or capture operation status |
AnnaBridge | 161:aa5281ff4a02 | 1557 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1558 | static inline bool ENET_Ptp1588GetChannelStatus(ENET_Type *base, enet_ptp_timer_channel_t channel) |
AnnaBridge | 161:aa5281ff4a02 | 1559 | { |
AnnaBridge | 161:aa5281ff4a02 | 1560 | return (0 != (base->CHANNEL[channel].TCSR & ENET_TCSR_TF_MASK)); |
AnnaBridge | 161:aa5281ff4a02 | 1561 | } |
AnnaBridge | 161:aa5281ff4a02 | 1562 | |
AnnaBridge | 161:aa5281ff4a02 | 1563 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1564 | * @brief Clears the ENET PTP 1588 timer channel status. |
AnnaBridge | 161:aa5281ff4a02 | 1565 | * |
AnnaBridge | 161:aa5281ff4a02 | 1566 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1567 | * @param channel The IEEE 1588 timer channel number. |
AnnaBridge | 161:aa5281ff4a02 | 1568 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1569 | static inline void ENET_Ptp1588ClearChannelStatus(ENET_Type *base, enet_ptp_timer_channel_t channel) |
AnnaBridge | 161:aa5281ff4a02 | 1570 | { |
AnnaBridge | 161:aa5281ff4a02 | 1571 | base->CHANNEL[channel].TCSR |= ENET_TCSR_TF_MASK; |
AnnaBridge | 161:aa5281ff4a02 | 1572 | base->TGSR = (1U << channel); |
AnnaBridge | 161:aa5281ff4a02 | 1573 | } |
AnnaBridge | 161:aa5281ff4a02 | 1574 | |
AnnaBridge | 161:aa5281ff4a02 | 1575 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1576 | * @brief Gets the current ENET time from the PTP 1588 timer. |
AnnaBridge | 161:aa5281ff4a02 | 1577 | * |
AnnaBridge | 161:aa5281ff4a02 | 1578 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1579 | * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1580 | * @param ptpTime The PTP timer structure. |
AnnaBridge | 161:aa5281ff4a02 | 1581 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1582 | void ENET_Ptp1588GetTimer(ENET_Type *base, enet_handle_t *handle, enet_ptp_time_t *ptpTime); |
AnnaBridge | 161:aa5281ff4a02 | 1583 | |
AnnaBridge | 161:aa5281ff4a02 | 1584 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1585 | * @brief Sets the ENET PTP 1588 timer to the assigned time. |
AnnaBridge | 161:aa5281ff4a02 | 1586 | * |
AnnaBridge | 161:aa5281ff4a02 | 1587 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1588 | * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1589 | * @param ptpTime The timer to be set to the PTP timer. |
AnnaBridge | 161:aa5281ff4a02 | 1590 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1591 | void ENET_Ptp1588SetTimer(ENET_Type *base, enet_handle_t *handle, enet_ptp_time_t *ptpTime); |
AnnaBridge | 161:aa5281ff4a02 | 1592 | |
AnnaBridge | 161:aa5281ff4a02 | 1593 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1594 | * @brief The IEEE 1588 PTP time stamp interrupt handler. |
AnnaBridge | 161:aa5281ff4a02 | 1595 | * |
AnnaBridge | 161:aa5281ff4a02 | 1596 | * @param base ENET peripheral base address. |
AnnaBridge | 161:aa5281ff4a02 | 1597 | * @param handle The ENET state pointer. This is the same state pointer used in the ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1598 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1599 | void ENET_Ptp1588TimerIRQHandler(ENET_Type *base, enet_handle_t *handle); |
AnnaBridge | 161:aa5281ff4a02 | 1600 | |
AnnaBridge | 161:aa5281ff4a02 | 1601 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1602 | * @brief Gets the time stamp of the received frame. |
AnnaBridge | 161:aa5281ff4a02 | 1603 | * |
AnnaBridge | 161:aa5281ff4a02 | 1604 | * This function is used for PTP stack to get the timestamp captured by the ENET driver. |
AnnaBridge | 161:aa5281ff4a02 | 1605 | * |
AnnaBridge | 161:aa5281ff4a02 | 1606 | * @param handle The ENET handler pointer.This is the same state pointer used in |
AnnaBridge | 161:aa5281ff4a02 | 1607 | * ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1608 | * @param ptpTimeData The special PTP timestamp data for search the receive timestamp. |
AnnaBridge | 161:aa5281ff4a02 | 1609 | * @retval kStatus_Success Get 1588 timestamp success. |
AnnaBridge | 161:aa5281ff4a02 | 1610 | * @retval kStatus_ENET_PtpTsRingEmpty 1588 timestamp ring empty. |
AnnaBridge | 161:aa5281ff4a02 | 1611 | * @retval kStatus_ENET_PtpTsRingFull 1588 timestamp ring full. |
AnnaBridge | 161:aa5281ff4a02 | 1612 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1613 | status_t ENET_GetRxFrameTime(enet_handle_t *handle, enet_ptp_time_data_t *ptpTimeData); |
AnnaBridge | 161:aa5281ff4a02 | 1614 | |
AnnaBridge | 161:aa5281ff4a02 | 1615 | /*! |
AnnaBridge | 161:aa5281ff4a02 | 1616 | * @brief Gets the time stamp of the transmit frame. |
AnnaBridge | 161:aa5281ff4a02 | 1617 | * |
AnnaBridge | 161:aa5281ff4a02 | 1618 | * This function is used for PTP stack to get the timestamp captured by the ENET driver. |
AnnaBridge | 161:aa5281ff4a02 | 1619 | * |
AnnaBridge | 161:aa5281ff4a02 | 1620 | * @param handle The ENET handler pointer.This is the same state pointer used in |
AnnaBridge | 161:aa5281ff4a02 | 1621 | * ENET_Init. |
AnnaBridge | 161:aa5281ff4a02 | 1622 | * @param ptpTimeData The special PTP timestamp data for search the receive timestamp. |
AnnaBridge | 161:aa5281ff4a02 | 1623 | * @retval kStatus_Success Get 1588 timestamp success. |
AnnaBridge | 161:aa5281ff4a02 | 1624 | * @retval kStatus_ENET_PtpTsRingEmpty 1588 timestamp ring empty. |
AnnaBridge | 161:aa5281ff4a02 | 1625 | * @retval kStatus_ENET_PtpTsRingFull 1588 timestamp ring full. |
AnnaBridge | 161:aa5281ff4a02 | 1626 | */ |
AnnaBridge | 161:aa5281ff4a02 | 1627 | status_t ENET_GetTxFrameTime(enet_handle_t *handle, enet_ptp_time_data_t *ptpTimeData); |
AnnaBridge | 161:aa5281ff4a02 | 1628 | #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ |
AnnaBridge | 161:aa5281ff4a02 | 1629 | /* @} */ |
AnnaBridge | 161:aa5281ff4a02 | 1630 | |
AnnaBridge | 161:aa5281ff4a02 | 1631 | #if defined(__cplusplus) |
AnnaBridge | 161:aa5281ff4a02 | 1632 | } |
AnnaBridge | 161:aa5281ff4a02 | 1633 | #endif |
AnnaBridge | 161:aa5281ff4a02 | 1634 | |
AnnaBridge | 161:aa5281ff4a02 | 1635 | /*! @}*/ |
AnnaBridge | 161:aa5281ff4a02 | 1636 | |
AnnaBridge | 161:aa5281ff4a02 | 1637 | #endif /* _FSL_ENET_H_ */ |