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TARGET_MAX32620FTHR/TOOLCHAIN_GCC_ARM/usb_regs.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /*******************************************************************************
AnnaBridge 167:84c0a372a020 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 3 *
AnnaBridge 167:84c0a372a020 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 10 *
AnnaBridge 167:84c0a372a020 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 12 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 13 *
AnnaBridge 167:84c0a372a020 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 21 *
AnnaBridge 167:84c0a372a020 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 24 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 30 * ownership rights.
AnnaBridge 167:84c0a372a020 31 *
AnnaBridge 167:84c0a372a020 32 * $Date: 2016-03-11 11:46:02 -0600 (Fri, 11 Mar 2016) $
AnnaBridge 167:84c0a372a020 33 * $Revision: 21838 $
AnnaBridge 167:84c0a372a020 34 *
AnnaBridge 167:84c0a372a020 35 ******************************************************************************/
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 #ifndef _MXC_USB_REGS_H_
AnnaBridge 167:84c0a372a020 38 #define _MXC_USB_REGS_H_
AnnaBridge 167:84c0a372a020 39
AnnaBridge 167:84c0a372a020 40 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 41 extern "C" {
AnnaBridge 167:84c0a372a020 42 #endif
AnnaBridge 167:84c0a372a020 43
AnnaBridge 167:84c0a372a020 44 #include <stdint.h>
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /*
AnnaBridge 167:84c0a372a020 47 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 167:84c0a372a020 48 */
AnnaBridge 167:84c0a372a020 49 #ifndef __IO
AnnaBridge 167:84c0a372a020 50 #define __IO volatile
AnnaBridge 167:84c0a372a020 51 #endif
AnnaBridge 167:84c0a372a020 52 #ifndef __I
AnnaBridge 167:84c0a372a020 53 #define __I volatile const
AnnaBridge 167:84c0a372a020 54 #endif
AnnaBridge 167:84c0a372a020 55 #ifndef __O
AnnaBridge 167:84c0a372a020 56 #define __O volatile
AnnaBridge 167:84c0a372a020 57 #endif
AnnaBridge 167:84c0a372a020 58 #ifndef __RO
AnnaBridge 167:84c0a372a020 59 #define __RO volatile const
AnnaBridge 167:84c0a372a020 60 #endif
AnnaBridge 167:84c0a372a020 61
AnnaBridge 167:84c0a372a020 62
AnnaBridge 167:84c0a372a020 63 #define MXC_V_USB_EP_DIR_DISABLE ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 64 #define MXC_V_USB_EP_DIR_OUT ((uint32_t)0x00000001UL)
AnnaBridge 167:84c0a372a020 65 #define MXC_V_USB_EP_DIR_IN ((uint32_t)0x00000002UL)
AnnaBridge 167:84c0a372a020 66 #define MXC_V_USB_EP_DIR_CONTROL ((uint32_t)0x00000003UL)
AnnaBridge 167:84c0a372a020 67
AnnaBridge 167:84c0a372a020 68 #define MXC_S_USB_EP_DIR_DISABLE (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS)
AnnaBridge 167:84c0a372a020 69 #define MXC_S_USB_EP_DIR_OUT (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS)
AnnaBridge 167:84c0a372a020 70 #define MXC_S_USB_EP_DIR_IN (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS)
AnnaBridge 167:84c0a372a020 71 #define MXC_S_USB_EP_DIR_CONTROL (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS)
AnnaBridge 167:84c0a372a020 72
AnnaBridge 167:84c0a372a020 73 /*
AnnaBridge 167:84c0a372a020 74 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 167:84c0a372a020 75 access to each register in module.
AnnaBridge 167:84c0a372a020 76 */
AnnaBridge 167:84c0a372a020 77
AnnaBridge 167:84c0a372a020 78 /* Offset Register Description
AnnaBridge 167:84c0a372a020 79 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 80 typedef struct {
AnnaBridge 167:84c0a372a020 81 __IO uint32_t cn; /* 0x0000 USB Control Register */
AnnaBridge 167:84c0a372a020 82 __RO uint32_t rsv004[127]; /* 0x0004-0x01FC */
AnnaBridge 167:84c0a372a020 83 __IO uint32_t dev_addr; /* 0x0200 USB Device Address Register */
AnnaBridge 167:84c0a372a020 84 __IO uint32_t dev_cn; /* 0x0204 USB Device Control Register */
AnnaBridge 167:84c0a372a020 85 __IO uint32_t dev_intfl; /* 0x0208 USB Device Interrupt */
AnnaBridge 167:84c0a372a020 86 __IO uint32_t dev_inten; /* 0x020C USB Device Interrupt Enable */
AnnaBridge 167:84c0a372a020 87 __RO uint32_t rsv210[4]; /* 0x0210-0x021C */
AnnaBridge 167:84c0a372a020 88 __IO uint32_t ep_base; /* 0x0220 USB Endpoint Descriptor Table Base Address */
AnnaBridge 167:84c0a372a020 89 __IO uint32_t cur_buf; /* 0x0224 USB Current Endpoint Buffer Register */
AnnaBridge 167:84c0a372a020 90 __IO uint32_t in_owner; /* 0x0228 USB IN Endpoint Buffer Owner Register */
AnnaBridge 167:84c0a372a020 91 __IO uint32_t out_owner; /* 0x022C USB OUT Endpoint Buffer Owner Register */
AnnaBridge 167:84c0a372a020 92 __IO uint32_t in_int; /* 0x0230 USB IN Endpoint Buffer Available Interrupt */
AnnaBridge 167:84c0a372a020 93 __IO uint32_t out_int; /* 0x0234 USB OUT Endpoint Data Available Interrupt */
AnnaBridge 167:84c0a372a020 94 __IO uint32_t nak_int; /* 0x0238 USB IN Endpoint NAK Interrupt */
AnnaBridge 167:84c0a372a020 95 __IO uint32_t dma_err_int; /* 0x023C USB DMA Error Interrupt */
AnnaBridge 167:84c0a372a020 96 __IO uint32_t buf_ovr_int; /* 0x0240 USB Buffer Overflow Interrupt */
AnnaBridge 167:84c0a372a020 97 __RO uint32_t rsv244[7]; /* 0x0244-0x025C */
AnnaBridge 167:84c0a372a020 98 __IO uint32_t setup0; /* 0x0260 USB SETUP Packet Bytes 0 to 3 */
AnnaBridge 167:84c0a372a020 99 __IO uint32_t setup1; /* 0x0264 USB SETUP Packet Bytes 4 to 7 */
AnnaBridge 167:84c0a372a020 100 __RO uint32_t rsv268[6]; /* 0x0268-0x027C */
AnnaBridge 167:84c0a372a020 101 __IO uint32_t ep[8]; /* 0x0280-0x029C USB Endpoint[n] Control Register */
AnnaBridge 167:84c0a372a020 102 } mxc_usb_regs_t;
AnnaBridge 167:84c0a372a020 103
AnnaBridge 167:84c0a372a020 104
AnnaBridge 167:84c0a372a020 105 /*
AnnaBridge 167:84c0a372a020 106 Register offsets for module USB.
AnnaBridge 167:84c0a372a020 107 */
AnnaBridge 167:84c0a372a020 108
AnnaBridge 167:84c0a372a020 109 #define MXC_R_USB_OFFS_CN ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 110 #define MXC_R_USB_OFFS_DEV_ADDR ((uint32_t)0x00000200UL)
AnnaBridge 167:84c0a372a020 111 #define MXC_R_USB_OFFS_DEV_CN ((uint32_t)0x00000204UL)
AnnaBridge 167:84c0a372a020 112 #define MXC_R_USB_OFFS_DEV_INTFL ((uint32_t)0x00000208UL)
AnnaBridge 167:84c0a372a020 113 #define MXC_R_USB_OFFS_DEV_INTEN ((uint32_t)0x0000020CUL)
AnnaBridge 167:84c0a372a020 114 #define MXC_R_USB_OFFS_EP_BASE ((uint32_t)0x00000220UL)
AnnaBridge 167:84c0a372a020 115 #define MXC_R_USB_OFFS_CUR_BUF ((uint32_t)0x00000224UL)
AnnaBridge 167:84c0a372a020 116 #define MXC_R_USB_OFFS_IN_OWNER ((uint32_t)0x00000228UL)
AnnaBridge 167:84c0a372a020 117 #define MXC_R_USB_OFFS_OUT_OWNER ((uint32_t)0x0000022CUL)
AnnaBridge 167:84c0a372a020 118 #define MXC_R_USB_OFFS_IN_INT ((uint32_t)0x00000230UL)
AnnaBridge 167:84c0a372a020 119 #define MXC_R_USB_OFFS_OUT_INT ((uint32_t)0x00000234UL)
AnnaBridge 167:84c0a372a020 120 #define MXC_R_USB_OFFS_NAK_INT ((uint32_t)0x00000238UL)
AnnaBridge 167:84c0a372a020 121 #define MXC_R_USB_OFFS_DMA_ERR_INT ((uint32_t)0x0000023CUL)
AnnaBridge 167:84c0a372a020 122 #define MXC_R_USB_OFFS_BUF_OVR_INT ((uint32_t)0x00000240UL)
AnnaBridge 167:84c0a372a020 123 #define MXC_R_USB_OFFS_SETUP0 ((uint32_t)0x00000260UL)
AnnaBridge 167:84c0a372a020 124 #define MXC_R_USB_OFFS_SETUP1 ((uint32_t)0x00000264UL)
AnnaBridge 167:84c0a372a020 125 #define MXC_R_USB_OFFS_EP0 ((uint32_t)0x00000280UL)
AnnaBridge 167:84c0a372a020 126 #define MXC_R_USB_OFFS_EP1 ((uint32_t)0x00000284UL)
AnnaBridge 167:84c0a372a020 127 #define MXC_R_USB_OFFS_EP2 ((uint32_t)0x00000288UL)
AnnaBridge 167:84c0a372a020 128 #define MXC_R_USB_OFFS_EP3 ((uint32_t)0x0000028CUL)
AnnaBridge 167:84c0a372a020 129 #define MXC_R_USB_OFFS_EP4 ((uint32_t)0x00000290UL)
AnnaBridge 167:84c0a372a020 130 #define MXC_R_USB_OFFS_EP5 ((uint32_t)0x00000294UL)
AnnaBridge 167:84c0a372a020 131 #define MXC_R_USB_OFFS_EP6 ((uint32_t)0x00000298UL)
AnnaBridge 167:84c0a372a020 132 #define MXC_R_USB_OFFS_EP7 ((uint32_t)0x0000029CUL)
AnnaBridge 167:84c0a372a020 133
AnnaBridge 167:84c0a372a020 134
AnnaBridge 167:84c0a372a020 135 /*
AnnaBridge 167:84c0a372a020 136 Field positions and masks for module USB.
AnnaBridge 167:84c0a372a020 137 */
AnnaBridge 167:84c0a372a020 138
AnnaBridge 167:84c0a372a020 139 #define MXC_F_USB_CN_USB_EN_POS 0
AnnaBridge 167:84c0a372a020 140 #define MXC_F_USB_CN_USB_EN ((uint32_t)(0x00000001UL << MXC_F_USB_CN_USB_EN_POS))
AnnaBridge 167:84c0a372a020 141 #define MXC_F_USB_CN_HOST_POS 1
AnnaBridge 167:84c0a372a020 142 #define MXC_F_USB_CN_HOST ((uint32_t)(0x00000001UL << MXC_F_USB_CN_HOST_POS))
AnnaBridge 167:84c0a372a020 143
AnnaBridge 167:84c0a372a020 144 #define MXC_F_USB_DEV_ADDR_DEV_ADDR_POS 0
AnnaBridge 167:84c0a372a020 145 #define MXC_F_USB_DEV_ADDR_DEV_ADDR ((uint32_t)(0x0000007FUL << MXC_F_USB_DEV_ADDR_DEV_ADDR_POS))
AnnaBridge 167:84c0a372a020 146
AnnaBridge 167:84c0a372a020 147 #define MXC_F_USB_DEV_CN_SIGRWU_POS 2
AnnaBridge 167:84c0a372a020 148 #define MXC_F_USB_DEV_CN_SIGRWU ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_SIGRWU_POS))
AnnaBridge 167:84c0a372a020 149 #define MXC_F_USB_DEV_CN_CONNECT_POS 3
AnnaBridge 167:84c0a372a020 150 #define MXC_F_USB_DEV_CN_CONNECT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_CONNECT_POS))
AnnaBridge 167:84c0a372a020 151 #define MXC_F_USB_DEV_CN_ULPM_POS 4
AnnaBridge 167:84c0a372a020 152 #define MXC_F_USB_DEV_CN_ULPM ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_ULPM_POS))
AnnaBridge 167:84c0a372a020 153 #define MXC_F_USB_DEV_CN_URST_POS 5
AnnaBridge 167:84c0a372a020 154 #define MXC_F_USB_DEV_CN_URST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_URST_POS))
AnnaBridge 167:84c0a372a020 155 #define MXC_F_USB_DEV_CN_VBGATE_POS 6
AnnaBridge 167:84c0a372a020 156 #define MXC_F_USB_DEV_CN_VBGATE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_VBGATE_POS))
AnnaBridge 167:84c0a372a020 157 #define MXC_F_USB_DEV_CN_OSCEN_POS 7
AnnaBridge 167:84c0a372a020 158 #define MXC_F_USB_DEV_CN_OSCEN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_OSCEN_POS))
AnnaBridge 167:84c0a372a020 159 #define MXC_F_USB_DEV_CN_BACT_OE_POS 8
AnnaBridge 167:84c0a372a020 160 #define MXC_F_USB_DEV_CN_BACT_OE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_BACT_OE_POS))
AnnaBridge 167:84c0a372a020 161 #define MXC_F_USB_DEV_CN_FIFO_MODE_POS 9
AnnaBridge 167:84c0a372a020 162 #define MXC_F_USB_DEV_CN_FIFO_MODE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_FIFO_MODE_POS))
AnnaBridge 167:84c0a372a020 163
AnnaBridge 167:84c0a372a020 164 #define MXC_F_USB_DEV_INTFL_DPACT_POS 0
AnnaBridge 167:84c0a372a020 165 #define MXC_F_USB_DEV_INTFL_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DPACT_POS))
AnnaBridge 167:84c0a372a020 166 #define MXC_F_USB_DEV_INTFL_RWU_DN_POS 1
AnnaBridge 167:84c0a372a020 167 #define MXC_F_USB_DEV_INTFL_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_RWU_DN_POS))
AnnaBridge 167:84c0a372a020 168 #define MXC_F_USB_DEV_INTFL_BACT_POS 2
AnnaBridge 167:84c0a372a020 169 #define MXC_F_USB_DEV_INTFL_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BACT_POS))
AnnaBridge 167:84c0a372a020 170 #define MXC_F_USB_DEV_INTFL_BRST_POS 3
AnnaBridge 167:84c0a372a020 171 #define MXC_F_USB_DEV_INTFL_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_POS))
AnnaBridge 167:84c0a372a020 172 #define MXC_F_USB_DEV_INTFL_SUSP_POS 4
AnnaBridge 167:84c0a372a020 173 #define MXC_F_USB_DEV_INTFL_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SUSP_POS))
AnnaBridge 167:84c0a372a020 174 #define MXC_F_USB_DEV_INTFL_NO_VBUS_POS 5
AnnaBridge 167:84c0a372a020 175 #define MXC_F_USB_DEV_INTFL_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_NO_VBUS_POS))
AnnaBridge 167:84c0a372a020 176 #define MXC_F_USB_DEV_INTFL_VBUS_POS 6
AnnaBridge 167:84c0a372a020 177 #define MXC_F_USB_DEV_INTFL_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_POS))
AnnaBridge 167:84c0a372a020 178 #define MXC_F_USB_DEV_INTFL_BRST_DN_POS 7
AnnaBridge 167:84c0a372a020 179 #define MXC_F_USB_DEV_INTFL_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_DN_POS))
AnnaBridge 167:84c0a372a020 180 #define MXC_F_USB_DEV_INTFL_SETUP_POS 8
AnnaBridge 167:84c0a372a020 181 #define MXC_F_USB_DEV_INTFL_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SETUP_POS))
AnnaBridge 167:84c0a372a020 182 #define MXC_F_USB_DEV_INTFL_EP_IN_POS 9
AnnaBridge 167:84c0a372a020 183 #define MXC_F_USB_DEV_INTFL_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_IN_POS))
AnnaBridge 167:84c0a372a020 184 #define MXC_F_USB_DEV_INTFL_EP_OUT_POS 10
AnnaBridge 167:84c0a372a020 185 #define MXC_F_USB_DEV_INTFL_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_OUT_POS))
AnnaBridge 167:84c0a372a020 186 #define MXC_F_USB_DEV_INTFL_EP_NAK_POS 11
AnnaBridge 167:84c0a372a020 187 #define MXC_F_USB_DEV_INTFL_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_NAK_POS))
AnnaBridge 167:84c0a372a020 188 #define MXC_F_USB_DEV_INTFL_DMA_ERR_POS 12
AnnaBridge 167:84c0a372a020 189 #define MXC_F_USB_DEV_INTFL_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DMA_ERR_POS))
AnnaBridge 167:84c0a372a020 190 #define MXC_F_USB_DEV_INTFL_BUF_OVR_POS 13
AnnaBridge 167:84c0a372a020 191 #define MXC_F_USB_DEV_INTFL_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BUF_OVR_POS))
AnnaBridge 167:84c0a372a020 192 #define MXC_F_USB_DEV_INTFL_VBUS_ST_POS 16
AnnaBridge 167:84c0a372a020 193 #define MXC_F_USB_DEV_INTFL_VBUS_ST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_ST_POS))
AnnaBridge 167:84c0a372a020 194
AnnaBridge 167:84c0a372a020 195 #define MXC_F_USB_DEV_INTEN_DPACT_POS 0
AnnaBridge 167:84c0a372a020 196 #define MXC_F_USB_DEV_INTEN_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DPACT_POS))
AnnaBridge 167:84c0a372a020 197 #define MXC_F_USB_DEV_INTEN_RWU_DN_POS 1
AnnaBridge 167:84c0a372a020 198 #define MXC_F_USB_DEV_INTEN_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_RWU_DN_POS))
AnnaBridge 167:84c0a372a020 199 #define MXC_F_USB_DEV_INTEN_BACT_POS 2
AnnaBridge 167:84c0a372a020 200 #define MXC_F_USB_DEV_INTEN_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BACT_POS))
AnnaBridge 167:84c0a372a020 201 #define MXC_F_USB_DEV_INTEN_BRST_POS 3
AnnaBridge 167:84c0a372a020 202 #define MXC_F_USB_DEV_INTEN_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_POS))
AnnaBridge 167:84c0a372a020 203 #define MXC_F_USB_DEV_INTEN_SUSP_POS 4
AnnaBridge 167:84c0a372a020 204 #define MXC_F_USB_DEV_INTEN_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SUSP_POS))
AnnaBridge 167:84c0a372a020 205 #define MXC_F_USB_DEV_INTEN_NO_VBUS_POS 5
AnnaBridge 167:84c0a372a020 206 #define MXC_F_USB_DEV_INTEN_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_NO_VBUS_POS))
AnnaBridge 167:84c0a372a020 207 #define MXC_F_USB_DEV_INTEN_VBUS_POS 6
AnnaBridge 167:84c0a372a020 208 #define MXC_F_USB_DEV_INTEN_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_VBUS_POS))
AnnaBridge 167:84c0a372a020 209 #define MXC_F_USB_DEV_INTEN_BRST_DN_POS 7
AnnaBridge 167:84c0a372a020 210 #define MXC_F_USB_DEV_INTEN_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_DN_POS))
AnnaBridge 167:84c0a372a020 211 #define MXC_F_USB_DEV_INTEN_SETUP_POS 8
AnnaBridge 167:84c0a372a020 212 #define MXC_F_USB_DEV_INTEN_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SETUP_POS))
AnnaBridge 167:84c0a372a020 213 #define MXC_F_USB_DEV_INTEN_EP_IN_POS 9
AnnaBridge 167:84c0a372a020 214 #define MXC_F_USB_DEV_INTEN_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_IN_POS))
AnnaBridge 167:84c0a372a020 215 #define MXC_F_USB_DEV_INTEN_EP_OUT_POS 10
AnnaBridge 167:84c0a372a020 216 #define MXC_F_USB_DEV_INTEN_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_OUT_POS))
AnnaBridge 167:84c0a372a020 217 #define MXC_F_USB_DEV_INTEN_EP_NAK_POS 11
AnnaBridge 167:84c0a372a020 218 #define MXC_F_USB_DEV_INTEN_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_NAK_POS))
AnnaBridge 167:84c0a372a020 219 #define MXC_F_USB_DEV_INTEN_DMA_ERR_POS 12
AnnaBridge 167:84c0a372a020 220 #define MXC_F_USB_DEV_INTEN_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DMA_ERR_POS))
AnnaBridge 167:84c0a372a020 221 #define MXC_F_USB_DEV_INTEN_BUF_OVR_POS 13
AnnaBridge 167:84c0a372a020 222 #define MXC_F_USB_DEV_INTEN_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BUF_OVR_POS))
AnnaBridge 167:84c0a372a020 223
AnnaBridge 167:84c0a372a020 224 #define MXC_F_USB_EP_BASE_EP_BASE_POS 9
AnnaBridge 167:84c0a372a020 225 #define MXC_F_USB_EP_BASE_EP_BASE ((uint32_t)(0x007FFFFFUL << MXC_F_USB_EP_BASE_EP_BASE_POS))
AnnaBridge 167:84c0a372a020 226
AnnaBridge 167:84c0a372a020 227 #define MXC_F_USB_CUR_BUF_OUT_BUF_POS 0
AnnaBridge 167:84c0a372a020 228 #define MXC_F_USB_CUR_BUF_OUT_BUF ((uint32_t)(0x0000FFFFUL << MXC_F_USB_CUR_BUF_OUT_BUF_POS))
AnnaBridge 167:84c0a372a020 229 #define MXC_F_USB_CUR_BUF_IN_BUF_POS 16
AnnaBridge 167:84c0a372a020 230 #define MXC_F_USB_CUR_BUF_IN_BUF ((uint32_t)(0x0000FFFFUL << MXC_F_USB_CUR_BUF_IN_BUF_POS))
AnnaBridge 167:84c0a372a020 231
AnnaBridge 167:84c0a372a020 232 #define MXC_F_USB_IN_OWNER_BUF0_OWNER_POS 0
AnnaBridge 167:84c0a372a020 233 #define MXC_F_USB_IN_OWNER_BUF0_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_IN_OWNER_BUF0_OWNER_POS))
AnnaBridge 167:84c0a372a020 234 #define MXC_F_USB_IN_OWNER_BUF1_OWNER_POS 16
AnnaBridge 167:84c0a372a020 235 #define MXC_F_USB_IN_OWNER_BUF1_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_IN_OWNER_BUF1_OWNER_POS))
AnnaBridge 167:84c0a372a020 236
AnnaBridge 167:84c0a372a020 237 #define MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS 0
AnnaBridge 167:84c0a372a020 238 #define MXC_F_USB_OUT_OWNER_BUF0_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS))
AnnaBridge 167:84c0a372a020 239 #define MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS 16
AnnaBridge 167:84c0a372a020 240 #define MXC_F_USB_OUT_OWNER_BUF1_OWNER ((uint32_t)(0x0000FFFFUL << MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS))
AnnaBridge 167:84c0a372a020 241
AnnaBridge 167:84c0a372a020 242 #define MXC_F_USB_IN_INT_INBAV_POS 0
AnnaBridge 167:84c0a372a020 243 #define MXC_F_USB_IN_INT_INBAV ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_INT_INBAV_POS))
AnnaBridge 167:84c0a372a020 244
AnnaBridge 167:84c0a372a020 245 #define MXC_F_USB_OUT_INT_OUTDAV_POS 0
AnnaBridge 167:84c0a372a020 246 #define MXC_F_USB_OUT_INT_OUTDAV ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_INT_OUTDAV_POS))
AnnaBridge 167:84c0a372a020 247
AnnaBridge 167:84c0a372a020 248 #define MXC_F_USB_NAK_INT_NAK_POS 0
AnnaBridge 167:84c0a372a020 249 #define MXC_F_USB_NAK_INT_NAK ((uint32_t)(0x000000FFUL << MXC_F_USB_NAK_INT_NAK_POS))
AnnaBridge 167:84c0a372a020 250
AnnaBridge 167:84c0a372a020 251 #define MXC_F_USB_DMA_ERR_INT_DMA_ERR_POS 0
AnnaBridge 167:84c0a372a020 252 #define MXC_F_USB_DMA_ERR_INT_DMA_ERR ((uint32_t)(0x000000FFUL << MXC_F_USB_DMA_ERR_INT_DMA_ERR_POS))
AnnaBridge 167:84c0a372a020 253
AnnaBridge 167:84c0a372a020 254 #define MXC_F_USB_BUF_OVR_INT_BUF_OVR_POS 0
AnnaBridge 167:84c0a372a020 255 #define MXC_F_USB_BUF_OVR_INT_BUF_OVR ((uint32_t)(0x000000FFUL << MXC_F_USB_BUF_OVR_INT_BUF_OVR_POS))
AnnaBridge 167:84c0a372a020 256
AnnaBridge 167:84c0a372a020 257 #define MXC_F_USB_SETUP0_BYTE0_POS 0
AnnaBridge 167:84c0a372a020 258 #define MXC_F_USB_SETUP0_BYTE0 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE0_POS))
AnnaBridge 167:84c0a372a020 259 #define MXC_F_USB_SETUP0_BYTE1_POS 8
AnnaBridge 167:84c0a372a020 260 #define MXC_F_USB_SETUP0_BYTE1 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE1_POS))
AnnaBridge 167:84c0a372a020 261 #define MXC_F_USB_SETUP0_BYTE2_POS 16
AnnaBridge 167:84c0a372a020 262 #define MXC_F_USB_SETUP0_BYTE2 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE2_POS))
AnnaBridge 167:84c0a372a020 263 #define MXC_F_USB_SETUP0_BYTE3_POS 24
AnnaBridge 167:84c0a372a020 264 #define MXC_F_USB_SETUP0_BYTE3 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE3_POS))
AnnaBridge 167:84c0a372a020 265
AnnaBridge 167:84c0a372a020 266 #define MXC_F_USB_SETUP1_BYTE0_POS 0
AnnaBridge 167:84c0a372a020 267 #define MXC_F_USB_SETUP1_BYTE0 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE0_POS))
AnnaBridge 167:84c0a372a020 268 #define MXC_F_USB_SETUP1_BYTE1_POS 8
AnnaBridge 167:84c0a372a020 269 #define MXC_F_USB_SETUP1_BYTE1 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE1_POS))
AnnaBridge 167:84c0a372a020 270 #define MXC_F_USB_SETUP1_BYTE2_POS 16
AnnaBridge 167:84c0a372a020 271 #define MXC_F_USB_SETUP1_BYTE2 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE2_POS))
AnnaBridge 167:84c0a372a020 272 #define MXC_F_USB_SETUP1_BYTE3_POS 24
AnnaBridge 167:84c0a372a020 273 #define MXC_F_USB_SETUP1_BYTE3 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE3_POS))
AnnaBridge 167:84c0a372a020 274
AnnaBridge 167:84c0a372a020 275 #define MXC_F_USB_EP_DIR_POS 0
AnnaBridge 167:84c0a372a020 276 #define MXC_F_USB_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS))
AnnaBridge 167:84c0a372a020 277 #define MXC_F_USB_EP_BUF2_POS 3
AnnaBridge 167:84c0a372a020 278 #define MXC_F_USB_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS))
AnnaBridge 167:84c0a372a020 279 #define MXC_F_USB_EP_INT_EN_POS 4
AnnaBridge 167:84c0a372a020 280 #define MXC_F_USB_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INT_EN_POS))
AnnaBridge 167:84c0a372a020 281 #define MXC_F_USB_EP_NAK_EN_POS 5
AnnaBridge 167:84c0a372a020 282 #define MXC_F_USB_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS))
AnnaBridge 167:84c0a372a020 283 #define MXC_F_USB_EP_DT_POS 6
AnnaBridge 167:84c0a372a020 284 #define MXC_F_USB_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS))
AnnaBridge 167:84c0a372a020 285 #define MXC_F_USB_EP_STALL_POS 8
AnnaBridge 167:84c0a372a020 286 #define MXC_F_USB_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS))
AnnaBridge 167:84c0a372a020 287 #define MXC_F_USB_EP_ST_STALL_POS 9
AnnaBridge 167:84c0a372a020 288 #define MXC_F_USB_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS))
AnnaBridge 167:84c0a372a020 289 #define MXC_F_USB_EP_ST_ACK_POS 10
AnnaBridge 167:84c0a372a020 290 #define MXC_F_USB_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS))
AnnaBridge 167:84c0a372a020 291
AnnaBridge 167:84c0a372a020 292
AnnaBridge 167:84c0a372a020 293
AnnaBridge 167:84c0a372a020 294 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 295 }
AnnaBridge 167:84c0a372a020 296 #endif
AnnaBridge 167:84c0a372a020 297
AnnaBridge 167:84c0a372a020 298 #endif /* _MXC_USB_REGS_H_ */
AnnaBridge 167:84c0a372a020 299