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TARGET_GR_LYCHEE/TOOLCHAIN_IAR/rspi_iobitmask.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 2 * DISCLAIMER
AnnaBridge 161:aa5281ff4a02 3 * This software is supplied by Renesas Electronics Corporation and is only
AnnaBridge 161:aa5281ff4a02 4 * intended for use with Renesas products. No other uses are authorized. This
AnnaBridge 161:aa5281ff4a02 5 * software is owned by Renesas Electronics Corporation and is protected under
AnnaBridge 161:aa5281ff4a02 6 * all applicable laws, including copyright laws.
AnnaBridge 161:aa5281ff4a02 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
AnnaBridge 161:aa5281ff4a02 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
AnnaBridge 161:aa5281ff4a02 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 161:aa5281ff4a02 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
AnnaBridge 161:aa5281ff4a02 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
AnnaBridge 161:aa5281ff4a02 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
AnnaBridge 161:aa5281ff4a02 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
AnnaBridge 161:aa5281ff4a02 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
AnnaBridge 161:aa5281ff4a02 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
AnnaBridge 161:aa5281ff4a02 16 * Renesas reserves the right, without notice, to make changes to this software
AnnaBridge 161:aa5281ff4a02 17 * and to discontinue the availability of this software. By using this software,
AnnaBridge 161:aa5281ff4a02 18 * you agree to the additional terms and conditions found by accessing the
AnnaBridge 161:aa5281ff4a02 19 * following link:
AnnaBridge 161:aa5281ff4a02 20 * http://www.renesas.com/disclaimer
AnnaBridge 161:aa5281ff4a02 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
AnnaBridge 161:aa5281ff4a02 22 *******************************************************************************/
AnnaBridge 161:aa5281ff4a02 23 /*******************************************************************************
AnnaBridge 161:aa5281ff4a02 24 * File Name : rspi_iobitmask.h
AnnaBridge 161:aa5281ff4a02 25 * $Rev: 1114 $
AnnaBridge 161:aa5281ff4a02 26 * $Date:: 2014-07-09 14:56:39 +0900#$
AnnaBridge 161:aa5281ff4a02 27 * Description : Renesas Serial Peripheral Interface register define header
AnnaBridge 161:aa5281ff4a02 28 *******************************************************************************/
AnnaBridge 161:aa5281ff4a02 29 #ifndef RSPI_IOBITMASK_H
AnnaBridge 161:aa5281ff4a02 30 #define RSPI_IOBITMASK_H
AnnaBridge 161:aa5281ff4a02 31
AnnaBridge 161:aa5281ff4a02 32
AnnaBridge 161:aa5281ff4a02 33 /* ==== Mask values for IO registers ==== */
AnnaBridge 161:aa5281ff4a02 34 #define RSPIn_SPCR_MODFEN (0x04u)
AnnaBridge 161:aa5281ff4a02 35 #define RSPIn_SPCR_MSTR (0x08u)
AnnaBridge 161:aa5281ff4a02 36 #define RSPIn_SPCR_SPEIE (0x10u)
AnnaBridge 161:aa5281ff4a02 37 #define RSPIn_SPCR_SPTIE (0x20u)
AnnaBridge 161:aa5281ff4a02 38 #define RSPIn_SPCR_SPE (0x40u)
AnnaBridge 161:aa5281ff4a02 39 #define RSPIn_SPCR_SPRIE (0x80u)
AnnaBridge 161:aa5281ff4a02 40
AnnaBridge 161:aa5281ff4a02 41 #define RSPIn_SSLP_SSL0P (0x01u)
AnnaBridge 161:aa5281ff4a02 42
AnnaBridge 161:aa5281ff4a02 43 #define RSPIn_SPPCR_SPLP (0x01u)
AnnaBridge 161:aa5281ff4a02 44 #define RSPIn_SPPCR_MOIFV (0x10u)
AnnaBridge 161:aa5281ff4a02 45 #define RSPIn_SPPCR_MOIFE (0x20u)
AnnaBridge 161:aa5281ff4a02 46
AnnaBridge 161:aa5281ff4a02 47 #define RSPIn_SPSR_OVRF (0x01u)
AnnaBridge 161:aa5281ff4a02 48 #define RSPIn_SPSR_MODF (0x04u)
AnnaBridge 161:aa5281ff4a02 49 #define RSPIn_SPSR_SPTEF (0x20u)
AnnaBridge 161:aa5281ff4a02 50 #define RSPIn_SPSR_TEND (0x40u)
AnnaBridge 161:aa5281ff4a02 51 #define RSPIn_SPSR_SPRF (0x80u)
AnnaBridge 161:aa5281ff4a02 52
AnnaBridge 161:aa5281ff4a02 53 #define RSPIn_SPDR_UINT32 (0xFFFFFFFFuL)
AnnaBridge 161:aa5281ff4a02 54
AnnaBridge 161:aa5281ff4a02 55 #define RSPIn_SPDR_UINT16 (0xFFFFu)
AnnaBridge 161:aa5281ff4a02 56
AnnaBridge 161:aa5281ff4a02 57 #define RSPIn_SPDR_UINT8 (0xFFu)
AnnaBridge 161:aa5281ff4a02 58
AnnaBridge 161:aa5281ff4a02 59 #define RSPIn_SPSCR_SPSLN (0x03u)
AnnaBridge 161:aa5281ff4a02 60
AnnaBridge 161:aa5281ff4a02 61 #define RSPIn_SPSSR_SPCP (0x03u)
AnnaBridge 161:aa5281ff4a02 62
AnnaBridge 161:aa5281ff4a02 63 #define RSPIn_SPBR_SPR (0xFFu)
AnnaBridge 161:aa5281ff4a02 64
AnnaBridge 161:aa5281ff4a02 65 #define RSPIn_SPDCR_SPLW (0x60u)
AnnaBridge 161:aa5281ff4a02 66 #define RSPIn_SPDCR_TXDMY (0x80u)
AnnaBridge 161:aa5281ff4a02 67
AnnaBridge 161:aa5281ff4a02 68 #define RSPIn_SPCKD_SCKDL (0x07u)
AnnaBridge 161:aa5281ff4a02 69
AnnaBridge 161:aa5281ff4a02 70 #define RSPIn_SSLND_SLNDL (0x07u)
AnnaBridge 161:aa5281ff4a02 71
AnnaBridge 161:aa5281ff4a02 72 #define RSPIn_SPND_SPNDL (0x07u)
AnnaBridge 161:aa5281ff4a02 73
AnnaBridge 161:aa5281ff4a02 74 #define RSPIn_SPCMD0_CPHA (0x0001u)
AnnaBridge 161:aa5281ff4a02 75 #define RSPIn_SPCMD0_CPOL (0x0002u)
AnnaBridge 161:aa5281ff4a02 76 #define RSPIn_SPCMD0_BRDV (0x000Cu)
AnnaBridge 161:aa5281ff4a02 77 #define RSPIn_SPCMD0_SSLKP (0x0080u)
AnnaBridge 161:aa5281ff4a02 78 #define RSPIn_SPCMD0_SPB (0x0F00u)
AnnaBridge 161:aa5281ff4a02 79 #define RSPIn_SPCMD0_LSBF (0x1000u)
AnnaBridge 161:aa5281ff4a02 80 #define RSPIn_SPCMD0_SPNDEN (0x2000u)
AnnaBridge 161:aa5281ff4a02 81 #define RSPIn_SPCMD0_SLNDEN (0x4000u)
AnnaBridge 161:aa5281ff4a02 82 #define RSPIn_SPCMD0_SCKDEN (0x8000u)
AnnaBridge 161:aa5281ff4a02 83
AnnaBridge 161:aa5281ff4a02 84 #define RSPIn_SPCMD1_CPHA (0x0001u)
AnnaBridge 161:aa5281ff4a02 85 #define RSPIn_SPCMD1_CPOL (0x0002u)
AnnaBridge 161:aa5281ff4a02 86 #define RSPIn_SPCMD1_BRDV (0x000Cu)
AnnaBridge 161:aa5281ff4a02 87 #define RSPIn_SPCMD1_SSLKP (0x0080u)
AnnaBridge 161:aa5281ff4a02 88 #define RSPIn_SPCMD1_SPB (0x0F00u)
AnnaBridge 161:aa5281ff4a02 89 #define RSPIn_SPCMD1_LSBF (0x1000u)
AnnaBridge 161:aa5281ff4a02 90 #define RSPIn_SPCMD1_SPNDEN (0x2000u)
AnnaBridge 161:aa5281ff4a02 91 #define RSPIn_SPCMD1_SLNDEN (0x4000u)
AnnaBridge 161:aa5281ff4a02 92 #define RSPIn_SPCMD1_SCKDEN (0x8000u)
AnnaBridge 161:aa5281ff4a02 93
AnnaBridge 161:aa5281ff4a02 94 #define RSPIn_SPCMD2_CPHA (0x0001u)
AnnaBridge 161:aa5281ff4a02 95 #define RSPIn_SPCMD2_CPOL (0x0002u)
AnnaBridge 161:aa5281ff4a02 96 #define RSPIn_SPCMD2_BRDV (0x000Cu)
AnnaBridge 161:aa5281ff4a02 97 #define RSPIn_SPCMD2_SSLKP (0x0080u)
AnnaBridge 161:aa5281ff4a02 98 #define RSPIn_SPCMD2_SPB (0x0F00u)
AnnaBridge 161:aa5281ff4a02 99 #define RSPIn_SPCMD2_LSBF (0x1000u)
AnnaBridge 161:aa5281ff4a02 100 #define RSPIn_SPCMD2_SPNDEN (0x2000u)
AnnaBridge 161:aa5281ff4a02 101 #define RSPIn_SPCMD2_SLNDEN (0x4000u)
AnnaBridge 161:aa5281ff4a02 102 #define RSPIn_SPCMD2_SCKDEN (0x8000u)
AnnaBridge 161:aa5281ff4a02 103
AnnaBridge 161:aa5281ff4a02 104 #define RSPIn_SPCMD3_CPHA (0x0001u)
AnnaBridge 161:aa5281ff4a02 105 #define RSPIn_SPCMD3_CPOL (0x0002u)
AnnaBridge 161:aa5281ff4a02 106 #define RSPIn_SPCMD3_BRDV (0x000Cu)
AnnaBridge 161:aa5281ff4a02 107 #define RSPIn_SPCMD3_SSLKP (0x0080u)
AnnaBridge 161:aa5281ff4a02 108 #define RSPIn_SPCMD3_SPB (0x0F00u)
AnnaBridge 161:aa5281ff4a02 109 #define RSPIn_SPCMD3_LSBF (0x1000u)
AnnaBridge 161:aa5281ff4a02 110 #define RSPIn_SPCMD3_SPNDEN (0x2000u)
AnnaBridge 161:aa5281ff4a02 111 #define RSPIn_SPCMD3_SLNDEN (0x4000u)
AnnaBridge 161:aa5281ff4a02 112 #define RSPIn_SPCMD3_SCKDEN (0x8000u)
AnnaBridge 161:aa5281ff4a02 113
AnnaBridge 161:aa5281ff4a02 114 #define RSPIn_SPBFCR_RXTRG (0x07u)
AnnaBridge 161:aa5281ff4a02 115 #define RSPIn_SPBFCR_TXTRG (0x30u)
AnnaBridge 161:aa5281ff4a02 116 #define RSPIn_SPBFCR_RXRST (0x40u)
AnnaBridge 161:aa5281ff4a02 117 #define RSPIn_SPBFCR_TXRST (0x80u)
AnnaBridge 161:aa5281ff4a02 118
AnnaBridge 161:aa5281ff4a02 119 #define RSPIn_SPBFDR_R (0x003Fu)
AnnaBridge 161:aa5281ff4a02 120 #define RSPIn_SPBFDR_T (0x0F00u)
AnnaBridge 161:aa5281ff4a02 121
AnnaBridge 161:aa5281ff4a02 122
AnnaBridge 161:aa5281ff4a02 123 /* ==== Shift values for IO registers ==== */
AnnaBridge 161:aa5281ff4a02 124 #define RSPIn_SPCR_MODFEN_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 125 #define RSPIn_SPCR_MSTR_SHIFT (3u)
AnnaBridge 161:aa5281ff4a02 126 #define RSPIn_SPCR_SPEIE_SHIFT (4u)
AnnaBridge 161:aa5281ff4a02 127 #define RSPIn_SPCR_SPTIE_SHIFT (5u)
AnnaBridge 161:aa5281ff4a02 128 #define RSPIn_SPCR_SPE_SHIFT (6u)
AnnaBridge 161:aa5281ff4a02 129 #define RSPIn_SPCR_SPRIE_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 130
AnnaBridge 161:aa5281ff4a02 131 #define RSPIn_SSLP_SSL0P_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 132
AnnaBridge 161:aa5281ff4a02 133 #define RSPIn_SPPCR_SPLP_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 134 #define RSPIn_SPPCR_MOIFV_SHIFT (4u)
AnnaBridge 161:aa5281ff4a02 135 #define RSPIn_SPPCR_MOIFE_SHIFT (5u)
AnnaBridge 161:aa5281ff4a02 136
AnnaBridge 161:aa5281ff4a02 137 #define RSPIn_SPSR_OVRF_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 138 #define RSPIn_SPSR_MODF_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 139 #define RSPIn_SPSR_SPTEF_SHIFT (5u)
AnnaBridge 161:aa5281ff4a02 140 #define RSPIn_SPSR_TEND_SHIFT (6u)
AnnaBridge 161:aa5281ff4a02 141 #define RSPIn_SPSR_SPRF_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 142
AnnaBridge 161:aa5281ff4a02 143 #define RSPIn_SPDR_UINT32_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 144
AnnaBridge 161:aa5281ff4a02 145 #define RSPIn_SPDR_UINT16_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 146
AnnaBridge 161:aa5281ff4a02 147 #define RSPIn_SPDR_UINT8_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 148
AnnaBridge 161:aa5281ff4a02 149 #define RSPIn_SPSCR_SPSLN_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 150
AnnaBridge 161:aa5281ff4a02 151 #define RSPIn_SPSSR_SPCP_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 152
AnnaBridge 161:aa5281ff4a02 153 #define RSPIn_SPBR_SPR_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 154
AnnaBridge 161:aa5281ff4a02 155 #define RSPIn_SPDCR_SPLW_SHIFT (5u)
AnnaBridge 161:aa5281ff4a02 156 #define RSPIn_SPDCR_TXDMY_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 157
AnnaBridge 161:aa5281ff4a02 158 #define RSPIn_SPCKD_SCKDL_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 159
AnnaBridge 161:aa5281ff4a02 160 #define RSPIn_SSLND_SLNDL_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 161
AnnaBridge 161:aa5281ff4a02 162 #define RSPIn_SPND_SPNDL_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 163
AnnaBridge 161:aa5281ff4a02 164 #define RSPIn_SPCMD0_CPHA_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 165 #define RSPIn_SPCMD0_CPOL_SHIFT (1u)
AnnaBridge 161:aa5281ff4a02 166 #define RSPIn_SPCMD0_BRDV_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 167 #define RSPIn_SPCMD0_SSLKP_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 168 #define RSPIn_SPCMD0_SPB_SHIFT (8u)
AnnaBridge 161:aa5281ff4a02 169 #define RSPIn_SPCMD0_LSBF_SHIFT (12u)
AnnaBridge 161:aa5281ff4a02 170 #define RSPIn_SPCMD0_SPNDEN_SHIFT (13u)
AnnaBridge 161:aa5281ff4a02 171 #define RSPIn_SPCMD0_SLNDEN_SHIFT (14u)
AnnaBridge 161:aa5281ff4a02 172 #define RSPIn_SPCMD0_SCKDEN_SHIFT (15u)
AnnaBridge 161:aa5281ff4a02 173
AnnaBridge 161:aa5281ff4a02 174 #define RSPIn_SPCMD1_CPHA_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 175 #define RSPIn_SPCMD1_CPOL_SHIFT (1u)
AnnaBridge 161:aa5281ff4a02 176 #define RSPIn_SPCMD1_BRDV_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 177 #define RSPIn_SPCMD1_SSLKP_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 178 #define RSPIn_SPCMD1_SPB_SHIFT (8u)
AnnaBridge 161:aa5281ff4a02 179 #define RSPIn_SPCMD1_LSBF_SHIFT (12u)
AnnaBridge 161:aa5281ff4a02 180 #define RSPIn_SPCMD1_SPNDEN_SHIFT (13u)
AnnaBridge 161:aa5281ff4a02 181 #define RSPIn_SPCMD1_SLNDEN_SHIFT (14u)
AnnaBridge 161:aa5281ff4a02 182 #define RSPIn_SPCMD1_SCKDEN_SHIFT (15u)
AnnaBridge 161:aa5281ff4a02 183
AnnaBridge 161:aa5281ff4a02 184 #define RSPIn_SPCMD2_CPHA_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 185 #define RSPIn_SPCMD2_CPOL_SHIFT (1u)
AnnaBridge 161:aa5281ff4a02 186 #define RSPIn_SPCMD2_BRDV_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 187 #define RSPIn_SPCMD2_SSLKP_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 188 #define RSPIn_SPCMD2_SPB_SHIFT (8u)
AnnaBridge 161:aa5281ff4a02 189 #define RSPIn_SPCMD2_LSBF_SHIFT (12u)
AnnaBridge 161:aa5281ff4a02 190 #define RSPIn_SPCMD2_SPNDEN_SHIFT (13u)
AnnaBridge 161:aa5281ff4a02 191 #define RSPIn_SPCMD2_SLNDEN_SHIFT (14u)
AnnaBridge 161:aa5281ff4a02 192 #define RSPIn_SPCMD2_SCKDEN_SHIFT (15u)
AnnaBridge 161:aa5281ff4a02 193
AnnaBridge 161:aa5281ff4a02 194 #define RSPIn_SPCMD3_CPHA_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 195 #define RSPIn_SPCMD3_CPOL_SHIFT (1u)
AnnaBridge 161:aa5281ff4a02 196 #define RSPIn_SPCMD3_BRDV_SHIFT (2u)
AnnaBridge 161:aa5281ff4a02 197 #define RSPIn_SPCMD3_SSLKP_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 198 #define RSPIn_SPCMD3_SPB_SHIFT (8u)
AnnaBridge 161:aa5281ff4a02 199 #define RSPIn_SPCMD3_LSBF_SHIFT (12u)
AnnaBridge 161:aa5281ff4a02 200 #define RSPIn_SPCMD3_SPNDEN_SHIFT (13u)
AnnaBridge 161:aa5281ff4a02 201 #define RSPIn_SPCMD3_SLNDEN_SHIFT (14u)
AnnaBridge 161:aa5281ff4a02 202 #define RSPIn_SPCMD3_SCKDEN_SHIFT (15u)
AnnaBridge 161:aa5281ff4a02 203
AnnaBridge 161:aa5281ff4a02 204 #define RSPIn_SPBFCR_RXTRG_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 205 #define RSPIn_SPBFCR_TXTRG_SHIFT (4u)
AnnaBridge 161:aa5281ff4a02 206 #define RSPIn_SPBFCR_RXRST_SHIFT (6u)
AnnaBridge 161:aa5281ff4a02 207 #define RSPIn_SPBFCR_TXRST_SHIFT (7u)
AnnaBridge 161:aa5281ff4a02 208
AnnaBridge 161:aa5281ff4a02 209 #define RSPIn_SPBFDR_R_SHIFT (0u)
AnnaBridge 161:aa5281ff4a02 210 #define RSPIn_SPBFDR_T_SHIFT (8u)
AnnaBridge 161:aa5281ff4a02 211
AnnaBridge 161:aa5281ff4a02 212
AnnaBridge 161:aa5281ff4a02 213 #endif /* RSPI_IOBITMASK_H */
AnnaBridge 161:aa5281ff4a02 214
AnnaBridge 161:aa5281ff4a02 215 /* End of File */