Diff: targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/i2c/fsl_i2c_hal.h

Revision:

324:406fd2029f23

Parent:

149:1fb5f62b92bd

--- a/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/i2c/fsl_i2c_hal.h	Mon Sep 15 15:30:06 2014 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/i2c/fsl_i2c_hal.h	Thu Sep 18 14:00:17 2014 +0100
@@ -43,54 +43,36 @@
 /*******************************************************************************
  * Definitions
  ******************************************************************************/
-
-/*! @brief I2C status return codes*/
-typedef enum _i2c_status
-{
-    kStatus_I2C_Success = 0,
-    kStatus_I2C_OutOfRange,
-    kStatus_I2C_InvalidArgument,
-    kStatus_I2C_Fail,
-    kStatus_I2C_Busy,                /*!< The master is already performing a transfer.*/
-    kStatus_I2C_Timeout,             /*!< The transfer timed out.*/
-    kStatus_I2C_ReceivedNak,         /*!< The slave device sent a NAK in response to a byte.*/
-    kStatus_I2C_SlaveTxUnderrun,     /*!< I2C Slave TX Underrun error.*/
-    kStatus_I2C_SlaveRxOverrun,      /*!< I2C Slave RX Overrun error.*/
-    kStatus_I2C_AribtrationLost,     /*!< I2C Arbitration Lost error.*/
+/*! @brief I2C status return codes.*/
+typedef enum _i2c_status {
+    kStatus_I2C_Success            = 0x0U,
+    kStatus_I2C_OutOfRange         = 0x1U,
+    kStatus_I2C_Fail               = 0x2U,
+    kStatus_I2C_Busy               = 0x3U, /*!< The master is already performing a transfer.*/
+    kStatus_I2C_Timeout            = 0x4U, /*!< The transfer timed out.*/
+    kStatus_I2C_ReceivedNak        = 0x5U, /*!< The slave device sent a NAK in response to a byte.*/
+    kStatus_I2C_SlaveTxUnderrun    = 0x6U, /*!< I2C Slave TX Underrun error.*/
+    kStatus_I2C_SlaveRxOverrun     = 0x7U, /*!< I2C Slave RX Overrun error.*/
+    kStatus_I2C_AribtrationLost    = 0x8U, /*!< I2C Arbitration Lost error.*/
 } i2c_status_t;
 
-/*! @brief Direction of master and slave transfers*/
-typedef enum _i2c_transmit_receive_mode {
-    kI2CReceive = 0,    /*!< Master and slave receive.*/
-    kI2CTransmit = 1    /*!< Master and slave transmit.*/
-} i2c_transmit_receive_mode_t;
+/*! @brief I2C status flags. */
+typedef enum _i2c_status_flag {
+    kI2CTransferComplete = BP_I2C_S_TCF,
+    kI2CAddressAsSlave   = BP_I2C_S_IAAS,
+    kI2CBusBusy          = BP_I2C_S_BUSY,
+    kI2CArbitrationLost  = BP_I2C_S_ARBL,
+    kI2CAddressMatch     = BP_I2C_S_RAM,
+    kI2CSlaveTransmit    = BP_I2C_S_SRW,
+    kI2CInterruptPending = BP_I2C_S_IICIF,
+    kI2CReceivedNak      = BP_I2C_S_RXAK 
+} i2c_status_flag_t;
 
-/*!
- * @brief I2C module configuration
- *
- * Pass an instance of this structure  to the i2c_hal_init() to configure the entire I2C peripheral
- * in a single function call.
- */
-typedef struct I2CConfig {
-    bool enableModule;              /*!< Whether the I2C peripheral operation is enabled.*/
-    uint32_t baudRate_kbps;         /*!< Requested baud rate in kilobits per second, for example, 100 or 400. Pass zero to not set the baud rate.*/
-    bool useIndependentSlaveBaud;   /*!< Enables independent slave mode baud rate at maximum frequency.*/
-    bool enableInterrupt;           /*!< Enable for the I2C interrupt.*/
-    bool enableDma;                 /*!< Enable DMA transfer signalling.*/
-    bool enableHighDrive;           /*!< Enable high drive pin mode.*/
-    bool enableWakeup;              /*!< Enable low power wakeup.*/
-    uint8_t glitchFilterWidth;      /*!< Specify the glitch filter width in terms of bus clock cycles. Set this value to zero to disable the glitch filter.*/
-    uint16_t slaveAddress;          /*!< 7-bit or 10-bit slave address.*/
-    uint8_t upperSlaveAddress;      /*!< 7-bit upper slave address, or zero to disable. If 10-bit addresses are enabled, the top 3 bits are provided by the @a slaveAddress field.*/
-    bool use10bitSlaveAddress;      /*!< Controls whether 10-bit slave addresses are enabled.*/
-    bool enableGeneralCallAddress;  /*!< Enable general call address matching.*/
-    bool enableRangeAddressMatch;   /*!< Determines if addresses between @a slaveAddress and @a upperSlaveAddress are matched. Both of those fields must be non-zero.*/
-
-#if FSL_FEATURE_I2C_HAS_STOP_DETECT
-    bool enableStopModeHoldoff;     /*!< Option to hold off CPU low power stop mode until the current byte transfer is complete.*/
-    bool enableBusStopInterrupt;    /*!< Enable for the bus stop detection interrupt.*/
-#endif /* FSL_FEATURE_I2C_HAS_STOP_DETECT*/
-} i2c_config_t;
+/*! @brief Direction of master and slave transfers.*/
+typedef enum _i2c_direction {
+    kI2CReceive = 0U,   /*!< Master and slave receive.*/
+    kI2CSend    = 1U    /*!< Master and slave transmit.*/
+} i2c_direction_t;
 
 /*******************************************************************************
  * API
@@ -100,80 +82,85 @@
 extern "C" {
 #endif
 
-/*! @name Module controls*/
-/*@{*/
-
 /*!
- * @brief Initializes and configures the I2C peripheral.
- *
- * @param instance The I2C peripheral instance number
- * @param config Pointer to the configuration settings
- * @param sourceClockInHz I2C source input clock in Hertz.
+ * @name Module controls
+ * @{
  */
-void i2c_hal_init(uint32_t instance, const i2c_config_t * config, uint32_t sourceClockInHz);
 
 /*!
  * @brief Restores the I2C peripheral to reset state.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-void i2c_hal_reset(uint32_t instance);
+void I2C_HAL_Init(uint32_t baseAddr);
 
 /*!
  * @brief Enables the I2C module operation.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_enable(uint32_t instance)
+static inline void I2C_HAL_Enable(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_SET(instance, BM_I2C_C1_IICEN);
+    BW_I2C_C1_IICEN(baseAddr, 0x1U);
 }
 
 /*!
  * @brief Disables the I2C module operation.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_disable(uint32_t instance)
+static inline void I2C_HAL_Disable(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_CLR(instance, BM_I2C_C1_IICEN);
+    BW_I2C_C1_IICEN(baseAddr, 0x0U);
 }
 
 /*@}*/
 
-/*! @name DMA*/
-/*@{*/
+/*!
+ * @name DMA
+ * @{
+ */
 
 /*!
  * @brief Enables or disables the DMA support.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param enable Pass true to enable DMA transfer signalling
  */
-static inline void i2c_hal_set_dma_enable(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetDmaCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C1_DMAEN(instance, (uint8_t)enable);
+    BW_I2C_C1_DMAEN(baseAddr, (uint8_t)enable);
+}
+
+/*!
+ * @brief Returns whether I2C DMA support is enabled.
+ *
+ * @param baseAddr The I2C peripheral base address.
+ * @retval true I2C DMA is enabled.
+ * @retval false I2C DMA is disabled.
+ */
+static inline bool I2C_HAL_GetDmaCmd(uint32_t baseAddr)
+{
+    return BR_I2C_C1_DMAEN(baseAddr);
 }
 
 /*@}*/
 
-/*! @name Pin functions*/
-/*@{*/
+/*!
+ * @name Pin functions
+ * @{
+ */
 
 /*!
  * @brief Controls the drive capability of the I2C pads.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param enable Passing true will enable high drive mode of the I2C pads. False sets normal
  *     drive mode.
  */
-static inline void i2c_hal_set_high_drive(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetHighDriveCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C2_HDRS(instance, (uint8_t)enable);
+    BW_I2C_C2_HDRS(baseAddr, (uint8_t)enable);
 }
 
 /*!
@@ -183,20 +170,21 @@
  * The filter does not allow any glitch whose size is less than or equal to this width setting, 
  * to pass.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param glitchWidth Maximum width in bus clock cycles of the glitches that is filtered.
  *     Pass zero to disable the glitch filter.
  */
-static inline void i2c_hal_set_glitch_filter(uint32_t instance, uint8_t glitchWidth)
+static inline void I2C_HAL_SetGlitchWidth(uint32_t baseAddr, uint8_t glitchWidth)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_FLT_FLT(instance, glitchWidth);
+    BW_I2C_FLT_FLT(baseAddr, glitchWidth);
 }
 
 /*@}*/
 
-/*! @name Low power*/
-/*@{*/
+/*!
+ * @name Low power
+ * @{
+ */
 
 /*!
  * @brief Controls the I2C wakeup enable.
@@ -204,15 +192,14 @@
  * The I2C module can wake the MCU from low power mode with no peripheral bus running when
  * slave address matching occurs. 
  *
- * @param instance The I2C peripheral instance number.
+ * @param baseAddr The I2C peripheral base address.
  * @param enable true - Enables the wakeup function in low power mode.<br>
  *     false - Normal operation. No interrupt is  generated when address matching in
  *     low power mode.
  */
-static inline void i2c_hal_set_wakeup_enable(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetWakeupCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C1_WUEN(instance, (uint8_t)enable);
+    BW_I2C_C1_WUEN(baseAddr, (uint8_t)enable);
 }
 
 #if FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF
@@ -222,36 +209,28 @@
  * This function lets you enable the hold off entry to low power stop mode when any data transmission
  * or reception is occurring.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param enable false - Stop hold off is disabled. The MCU's entry to stop mode is not gated.<br>
  *     true - Stop hold off is enabled.
  */
 
-static inline void i2c_hal_set_stop_holdoff(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetStopHoldoffCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_FLT_SHEN(instance, (uint8_t)enable);
+    BW_I2C_FLT_SHEN(baseAddr, (uint8_t)enable);
 }
 #endif /* FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF*/
 
 /*@}*/
 
-/*! @name Baud rate*/
-/*@{*/
-
 /*!
- * brief Returns the maximum supported baud rate in kilohertz.
- *
- * @param   instance        The I2C peripheral instance number
- * @param   sourceClockInHz I2C source input clock in Hertz
- * @return The maximum baud rate in kilohertz
+ * @name Baud rate
+ * @{
  */
-uint32_t i2c_hal_get_max_baud(uint32_t instance, uint32_t sourceClockInHz);
 
 /*!
  * @brief Sets the I2C bus frequency for master transactions.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param sourceClockInHz I2C source input clock in Hertz
  * @param kbps Requested bus frequency in kilohertz. Common values are either 100 or 400.
  * @param absoluteError_Hz If this parameter is not NULL, it is filled in with the
@@ -264,7 +243,7 @@
  * @retval kStatus_OutOfRange The requested baud rate was not within the range of rates
  *      supported by the peripheral.
  */
-i2c_status_t i2c_hal_set_baud(uint32_t instance, uint32_t sourceClockInHz, uint32_t kbps,
+i2c_status_t I2C_HAL_SetBaudRate(uint32_t baseAddr, uint32_t sourceClockInHz, uint32_t kbps,
                                   uint32_t * absoluteError_Hz);
 
 /*!
@@ -273,15 +252,14 @@
  * Use this function to set the I2C bus frequency register values directly, if they are
  * known in advance.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param mult Value of the MULT bitfield, ranging from 0-2. 
  * @param icr The ICR bitfield value, which is the index into an internal table in the I2C
  *     hardware that selects the baud rate divisor and SCL hold time.
  */
-static inline void i2c_hal_set_baud_icr(uint32_t instance, uint8_t mult, uint8_t icr)
+static inline void I2C_HAL_SetFreqDiv(uint32_t baseAddr, uint8_t mult, uint8_t icr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_F_WR(instance, BF_I2C_F_MULT(mult) | BF_I2C_F_ICR(icr));
+    HW_I2C_F_WR(baseAddr, BF_I2C_F_MULT(mult) | BF_I2C_F_ICR(icr));
 }
 
 /*!
@@ -290,20 +268,21 @@
  * Enables an independent slave mode baud rate at the maximum frequency. This forces clock stretching
  * on the SCL in very fast I2C modes.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param enable true - Slave baud rate is independent of the master baud rate;<br>
  *     false - The slave baud rate follows the master baud rate and clock stretching may occur.
  */
-static inline void i2c_hal_set_independent_slave_baud(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetSlaveBaudCtrlCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C2_SBRC(instance, (uint8_t)enable);
+    BW_I2C_C2_SBRC(baseAddr, (uint8_t)enable);
 }
 
 /*@}*/
 
-/*! @name Bus operations*/
-/*@{*/
+/*!
+ * @name Bus operations
+ * @{
+ */
 
 /*!
  * @brief Sends a START or a Repeated START signal on the I2C bus.
@@ -311,47 +290,21 @@
  * This function is used to initiate a new master mode transfer by sending the START signal. It
  * is also used to send a Repeated START signal when a transfer is already in progress.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-void i2c_hal_send_start(uint32_t instance);
+void I2C_HAL_SendStart(uint32_t baseAddr);
 
 /*!
  * @brief Sends a STOP signal on the I2C bus.
  *
- * @param instance The I2C peripheral instance number
- */
-static inline void i2c_hal_send_stop(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    assert(HW_I2C_C1(instance).B.MST == 1);
-    HW_I2C_C1_CLR(instance, BM_I2C_C1_MST | BM_I2C_C1_TX);
-}
-
-/*!
- * @brief Selects either transmit or receive modes.
+ * This function changes the direction to receive.
  *
- * @param instance The I2C peripheral instance number
- * @param mode Specifies either transmit mode or receive mode. The valid values are:
- *     - #kI2CTransmit
- *     - #kI2CReceive
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_set_direction(uint32_t instance, i2c_transmit_receive_mode_t mode)
+static inline void I2C_HAL_SendStop(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C1_TX(instance, (uint8_t)mode);
-}
-
-/*!
- * @brief Returns the currently selected transmit or receive mode.
- *
- * @param instance The I2C peripheral instance number
- * @retval #kI2CTransmit I2C is configured for master or slave transmit mode.
- * @retval #kI2CReceive I2C is configured for master or slave receive mode.
- */
-static inline i2c_transmit_receive_mode_t i2c_hal_get_direction(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return HW_I2C_C1(instance).B.TX ? kI2CTransmit : kI2CReceive;
+    assert(BR_I2C_C1_MST(baseAddr) == 1);
+    HW_I2C_C1_CLR(baseAddr, BM_I2C_C1_MST | BM_I2C_C1_TX);
 }
 
 /*!
@@ -363,12 +316,11 @@
  * Fast ACK mode. In this case, this function causes an ACK signal to be sent in
  * response to the current byte, rather than the next received byte.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_send_ack(uint32_t instance)
+static inline void I2C_HAL_SendAck(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_CLR(instance, BM_I2C_C1_TXAK);
+    BW_I2C_C1_TXAK(baseAddr, 0x0U);
 }
 
 /*!
@@ -380,32 +332,57 @@
  * Fast ACK mode. In this case, this function causes an NAK signal to be sent in
  * response to the current byte, rather than the next received byte.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
+ */
+static inline void I2C_HAL_SendNak(uint32_t baseAddr)
+{
+    BW_I2C_C1_TXAK(baseAddr, 0x1U);
+}
+
+/*!
+ * @brief Selects either transmit or receive mode.
+ *
+ * @param baseAddr The I2C peripheral base address.
+ * @param direction Specifies either transmit mode or receive mode. The valid values are:
+ *     - #kI2CTransmit
+ *     - #kI2CReceive
  */
-static inline void i2c_hal_send_nak(uint32_t instance)
+static inline void I2C_HAL_SetDirMode(uint32_t baseAddr, i2c_direction_t direction)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_SET(instance, BM_I2C_C1_TXAK);
+    BW_I2C_C1_TX(baseAddr, (uint8_t)direction);
+}
+
+/*!
+ * @brief Returns the currently selected transmit or receive mode.
+ *
+ * @param baseAddr The I2C peripheral base address.
+ * @retval #kI2CTransmit I2C is configured for master or slave transmit mode.
+ * @retval #kI2CReceive I2C is configured for master or slave receive mode.
+ */
+static inline i2c_direction_t I2C_HAL_GetDirMode(uint32_t baseAddr)
+{
+    return (i2c_direction_t)BR_I2C_C1_TX(baseAddr);
 }
 
 /*@}*/
 
-/*! @name Data transfer*/
-/*@{*/
+/*!
+ * @name Data transfer
+ * @{
+ */
 
 /*!
  * @brief Returns the last byte of data read from the bus and initiate another read.
  *
  * In a master receive mode, calling this function initiates receiving  the next byte of data.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @return This function returns the last byte received while the I2C module is configured in master
  *     receive or slave receive mode.
  */
-static inline uint8_t i2c_hal_read(uint32_t instance)
+static inline uint8_t I2C_HAL_ReadByte(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return HW_I2C_D_RD(instance);
+    return HW_I2C_D_RD(baseAddr);
 }
 
 /*!
@@ -418,59 +395,82 @@
  * start bit is used for the address transfer and must consist of the slave address (in bits 7-1)
  * concatenated with the required R/\#W bit (in position bit 0).
  *
- * @param instance The I2C peripheral instance number
- * @param data The byte of data to transmit
+ * @param baseAddr The I2C peripheral base address.
+ * @param byte The byte of data to transmit.
  */
-static inline void i2c_hal_write(uint32_t instance, uint8_t data)
+static inline void I2C_HAL_WriteByte(uint32_t baseAddr, uint8_t byte)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_D_WR(instance, data);
+    HW_I2C_D_WR(baseAddr, byte);
 }
 
 /*@}*/
 
-/*! @name Slave address*/
-/*@{*/
+/*!
+ * @name Slave address
+ * @{
+ */
 
 /*!
  * @brief Sets the primary 7-bit slave address.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param address The slave address in the upper 7 bits. Bit 0 of this value must be 0.
  */
-void i2c_hal_set_slave_address_7bit(uint32_t instance, uint8_t address);
+void I2C_HAL_SetAddress7bit(uint32_t baseAddr, uint8_t address);
 
 /*!
  * @brief Sets the primary slave address and enables 10-bit address mode.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param address The 10-bit slave address, in bits [10:1] of the value. Bit 0 must be 0.
  */
-void i2c_hal_set_slave_address_10bit(uint32_t instance, uint16_t address);
+void I2C_HAL_SetAddress10bit(uint32_t baseAddr, uint16_t address);
+
+/*!
+ * @brief Enables or disables the extension address (10-bit).
+ *
+ * @param baseAddr The I2C peripheral base address
+ * @param enable true: 10-bit address is enabled.
+ *               false: 10-bit address is not enabled.
+ */
+static inline void I2C_HAL_SetExtensionAddrCmd(uint32_t baseAddr, bool enable)
+{
+    BW_I2C_C2_ADEXT(baseAddr, (uint8_t)enable);
+}
+
+/*!
+ * @brief Returns whether the extension address is enabled or not.
+ *
+ * @param baseAddr The I2C peripheral base address
+ * @return true: 10-bit address is enabled.
+ *         false: 10-bit address is not enabled.
+ */
+static inline bool I2C_HAL_GetExtensionAddrCmd(uint32_t baseAddr)
+{
+    return BR_I2C_C2_ADEXT(baseAddr);
+}
 
 /*!
  * @brief Controls whether the general call address is recognized.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param enable Whether to enable the general call address.
  */
-static inline void i2c_hal_set_general_call_enable(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetGeneralCallCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C2_GCAEN(instance, (uint8_t)enable);
+    BW_I2C_C2_GCAEN(baseAddr, (uint8_t)enable);
 }
 
 /*!
  * @brief Enables or disables the slave address range matching.
  *
- * @param instance The I2C peripheral instance number
- * @param enable Pass true to enable the range address matching. You must also call the
- *     i2c_hal_set_upper_slave_address_7bit() to set the upper address.
+ * @param baseAddr The I2C peripheral base address.
+ * @param enable Pass true to enable range address matching. You must also call
+ *     I2C_HAL_SetUpperAddress7bit() to set the upper address.
  */
-static inline void i2c_hal_set_slave_range_address_enable(uint32_t instance, bool enable)
+static inline void I2C_HAL_SetRangeMatchCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    BW_I2C_C2_RMEN(instance, (uint8_t)enable);
+    BW_I2C_C2_RMEN(baseAddr, (uint8_t)enable);
 }
 
 /*!
@@ -480,280 +480,180 @@
  * matching is enabled, this slave address acts as the upper bound on the slave address
  * range.
  *
- * This function sets only a 7-bit slave address. If 10-bit addressing was enabled by calling the
- * i2c_hal_set_slave_address_10bit(), then the top 3 bits set with that function are also used
+ * This function sets only a 7-bit slave address. If 10-bit addressing was enabled by calling
+ * I2C_HAL_SetAddress10bit(), then the top 3 bits set with that function are also used
  * with the address set with this function to form a 10-bit address.
  *
  * Passing 0 for the @a address parameter  disables  matching the upper slave address.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @param address The upper slave address in the upper 7 bits. Bit 0 of this value must be 0.
- *     This address must be greater than the primary slave address that is set by
- *     calling the i2c_hal_set_slave_address_7bit().
+ *     In addition, this address must be greater than the primary slave address that is set by
+ *     calling I2C_HAL_SetAddress7bit().
  */
-static inline void i2c_hal_set_upper_slave_address_7bit(uint32_t instance, uint8_t address)
+static inline void I2C_HAL_SetUpperAddress7bit(uint32_t baseAddr, uint8_t address)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
     assert((address & 1) == 0);
-    assert((address == 0) || (address > HW_I2C_A1_RD(instance)));
-    HW_I2C_RA_WR(instance, address);
+    assert((address == 0) || (address > HW_I2C_A1_RD(baseAddr)));
+    HW_I2C_RA_WR(baseAddr, address);
 }
 
 /*@}*/
 
-/*! @name Status*/
-/*@{*/
+/*!
+ * @name Status
+ * @{
+ */
+
+/*!
+ * @brief Gets the I2C status flag state.
+ *
+ * @param baseAddr The I2C peripheral base address.
+ * @param statusFlag The status flag, defined in type i2c_status_flag_t.
+ * @return State of the status flag: asserted (true) or not-asserted (false).
+ *         - true: related status flag is being set.
+ *         - false: related status flag is not set.
+ */
+static inline bool I2C_HAL_GetStatusFlag(uint32_t baseAddr, i2c_status_flag_t statusFlag)
+{
+    return (bool)((HW_I2C_S_RD(baseAddr) >> statusFlag) & 0x1U);
+}
 
 /*!
  * @brief Returns whether the I2C module is in master mode.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address.
  * @retval true The module is in master mode, which implies it is also performing a transfer.
  * @retval false The module is in slave mode.
  */
-static inline bool i2c_hal_is_master(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_C1(instance).B.MST;
-}
-
-/*!
- * @brief Gets the transfer complete flag.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Transfer is complete.
- * @retval false Transfer is in progress.
- */
-static inline bool i2c_hal_is_transfer_complete(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.TCF;
-}
-
-/*!
- * @brief Returns whether the I2C slave was addressed.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Addressed as slave.
- * @retval false Not addressed.
- */
-static inline bool i2c_hal_is_addressed_as_slave(uint32_t instance)
+static inline bool I2C_HAL_IsMaster(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.IAAS;
-}
-
-/*!
- * @brief Determines whether the I2C bus is busy.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Bus is busy.
- * @retval false Bus is idle.
- */
-static inline bool i2c_hal_is_bus_busy(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.BUSY;
-}
-
-/*!
- * @brief Returns whether the arbitration procedure was lost.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Loss of arbitration
- * @retval false Standard bus operation
- */
-static inline bool i2c_hal_was_arbitration_lost(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.ARBL;
+    return (bool)BR_I2C_C1_MST(baseAddr);
 }
 
 /*!
  * @brief Clears the arbitration lost flag.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_clear_arbitration_lost(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_S_WR(instance, BM_I2C_S_ARBL);
-}
-
-/*!
- * @brief Get the range address match flag.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Addressed as slave.
- * @retval false Not addressed.
- */
-static inline bool i2c_hal_is_range_address_match(uint32_t instance)
+static inline void I2C_HAL_ClearArbitrationLost(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.RAM;
-}
-
-/*!
- * @brief Returns whether the I2C slave was addressed in read or write mode.
- *
- * @param instance The I2C peripheral instance number
- * @retval #kI2CReceive Slave receive, master writing to slave
- * @retval #kI2CTransmit Slave transmit, master reading from slave
- */
-static inline i2c_transmit_receive_mode_t i2c_hal_get_slave_direction(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return HW_I2C_S(instance).B.SRW ? kI2CTransmit : kI2CReceive;
-}
-
-/*!
- * @brief Returns whether an ACK was received after the last byte was transmitted.
- *
- * @param instance The I2C peripheral instance number
- * @retval true Acknowledges that the signal was received after the completion of one byte of data
- *     transmission on the bus.
- * @retval false No acknowledgement of the signal is detected.
- */
-static inline bool i2c_hal_get_receive_ack(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)!(HW_I2C_S(instance).B.RXAK);
+    BW_I2C_S_ARBL(baseAddr, 0x1U);
 }
 
 /*@}*/
 
-/*! @name Interrupt*/
-/*@{*/
+/*!
+ * @name Interrupt
+ * @{
+ */
 
 /*!
- * @brief Enables the I2C interrupt requests.
+ * @brief Enables or disables I2C interrupt requests.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
+ * @param enable   Pass true to enable interrupt, flase to disable.
  */
-static inline void i2c_hal_enable_interrupt(uint32_t instance)
+static inline void I2C_HAL_SetIntCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_SET(instance, BM_I2C_C1_IICIE);
-}
-
-/*!
- * @brief Disables the I2C interrupt requests.
- *
- * @param instance The I2C peripheral instance number
- */
-static inline void i2c_hal_disable_interrupt(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_C1_CLR(instance, BM_I2C_C1_IICIE);
+    BW_I2C_C1_IICIE(baseAddr, (uint8_t)enable);
 }
 
 /*!
  * @brief Returns whether the I2C interrupts are enabled.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @retval true I2C interrupts are enabled.
  * @retval false I2C interrupts are disabled.
  */
-static inline bool i2c_hal_is_interrupt_enabled(uint32_t instance)
+static inline bool I2C_HAL_GetIntCmd(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_C1(instance).B.IICIE;
+    return (bool)BR_I2C_C1_IICIE(baseAddr);
 }
 
 /*!
  * @brief Returns the current I2C interrupt flag.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @retval true An interrupt is pending.
  * @retval false No interrupt is pending.
  */
-static inline bool i2c_hal_get_interrupt_status(uint32_t instance)
+static inline bool I2C_HAL_IsIntPending(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_S(instance).B.IICIF;
+    return (bool)BR_I2C_S_IICIF(baseAddr);
 }
 
 /*!
  * @brief Clears the I2C interrupt if set.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_clear_interrupt(uint32_t instance)
+static inline void I2C_HAL_ClearInt(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_S_SET(instance, BM_I2C_S_IICIF);
+    BW_I2C_S_IICIF(baseAddr, 0x1U);
 }
 
 /*@}*/
 
 #if FSL_FEATURE_I2C_HAS_STOP_DETECT
 
-/*! @name Bus stop detection status*/
-/*@{*/
+/*!
+ * @name Bus stop detection status
+ * @{
+ */
 
 /*!
  * @brief Gets the flag indicating a STOP signal was detected on the I2C bus.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @retval true STOP signal detected on bus.
  * @retval false No STOP signal was detected on the bus.
  */
-static inline bool i2c_hal_get_stop_detect(uint32_t instance)
+static inline bool I2C_HAL_GetStopFlag(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_FLT(instance).B.STOPF;
+    return (bool)BR_I2C_FLT_STOPF(baseAddr);
 }
 
 /*!
  * @brief Clears the bus STOP signal detected flag.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_clear_stop_detect(uint32_t instance)
+static inline void I2C_HAL_ClearStopFlag(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_FLT_SET(instance, BM_I2C_FLT_STOPF);
+    BW_I2C_FLT_STOPF(baseAddr, 0x1U);
 }
 
 /*@}*/
+
 #if FSL_FEATURE_I2C_HAS_START_DETECT
 
-/*! @name Bus stop detection interrupt*/
-/*@{*/
+/*!
+ * @name Bus stop detection interrupt
+ * @{
+ */
 
 /*!
  * @brief Enables the I2C bus stop detection interrupt.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
+ * @param enable   Pass true to enable interrupt, flase to disable.
  */
-static inline void i2c_hal_enable_bus_stop_interrupt(uint32_t instance)
+static inline void I2C_HAL_SetStopIntCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_FLT_SET(instance, BM_I2C_FLT_SSIE);
-}
-
-/*!
- * @brief Disables the I2C bus stop detection interrupt.
- *
- * @param instance The I2C peripheral instance number
- */
-static inline void i2c_hal_disable_bus_stop_interrupt(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_FLT_CLR(instance, BM_I2C_FLT_SSIE);
+    BW_I2C_FLT_SSIE(baseAddr, enable);
 }
 
 /*!
  * @brief Returns whether  the I2C bus stop detection interrupts are enabled.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @retval true Stop detect interrupts are enabled.
  * @retval false Stop detect interrupts are disabled.
  */
-static inline bool i2c_hal_is_bus_stop_interrupt_enabled(uint32_t instance)
+static inline bool I2C_HAL_GetStopIntCmd(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_FLT(instance).B.SSIE;
+    return (bool)BR_I2C_FLT_SSIE(baseAddr);
 }
 
 #else
@@ -764,36 +664,23 @@
 /*!
  * @brief Enables the I2C bus stop detection interrupt.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  */
-static inline void i2c_hal_enable_bus_stop_interrupt(uint32_t instance)
+static inline void I2C_HAL_SetStopIntCmd(uint32_t baseAddr, bool enable)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_FLT_SET(instance, BM_I2C_FLT_STOPIE);
-}
-
-/*!
- * @brief Disables the I2C bus stop detection interrupt.
- *
- * @param instance The I2C peripheral instance number
- */
-static inline void i2c_hal_disable_bus_stop_interrupt(uint32_t instance)
-{
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    HW_I2C_FLT_CLR(instance, BM_I2C_FLT_STOPIE);
+    BW_I2C_FLT_STOPIE(baseAddr, enable);
 }
 
 /*!
  * @brief Returns whether the I2C bus stop detection interrupts are enabled.
  *
- * @param instance The I2C peripheral instance number
+ * @param baseAddr The I2C peripheral base address
  * @retval true Stop detect interrupts are enabled.
  * @retval false Stop detect interrupts are disabled.
  */
-static inline bool i2c_hal_is_bus_stop_interrupt_enabled(uint32_t instance)
+static inline bool I2C_HAL_GetStopIntCmd(uint32_t baseAddr)
 {
-    assert(instance < HW_I2C_INSTANCE_COUNT);
-    return (bool)HW_I2C_FLT(instance).B.STOPIE;
+    return (bool)BR_I2C_FLT_STOPIE(baseAddr);
 }
 
 #endif  /* FSL_FEATURE_I2C_HAS_START_DETECT*/
@@ -805,10 +692,11 @@
 }
 #endif
 
-/*! @}*/
+/*! @} */
 
 #endif /* __FSL_I2C_HAL_H__*/
 /*******************************************************************************
  * EOF
  ******************************************************************************/
 
+