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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_KSDK_CODE/hal/dspi/fsl_dspi_hal.h@146:f64d43ff0c18, 2014-04-02 (annotated)

Committer:
mbed_official
Date:
Wed Apr 02 21:00:08 2014 +0100
Revision:
146:f64d43ff0c18
Synchronized with git revision d537c51d26da35e031d537f7fc90380fc74cb207



Full URL: https://github.com/mbedmicro/mbed/commit/d537c51d26da35e031d537f7fc90380fc74cb207/



target K64F

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30 #if !defined(__FSL_DSPI_HAL_H__)
mbed_official 146:f64d43ff0c18 31 #define __FSL_DSPI_HAL_H__
mbed_official 146:f64d43ff0c18 32
mbed_official 146:f64d43ff0c18 33 #include <assert.h>
mbed_official 146:f64d43ff0c18 34 #include <stdint.h>
mbed_official 146:f64d43ff0c18 35 #include <stdbool.h>
mbed_official 146:f64d43ff0c18 36 #include "fsl_dspi_features.h"
mbed_official 146:f64d43ff0c18 37 #include "fsl_device_registers.h"
mbed_official 146:f64d43ff0c18 38
mbed_official 146:f64d43ff0c18 39 /*!
mbed_official 146:f64d43ff0c18 40 * @addtogroup dspi_hal
mbed_official 146:f64d43ff0c18 41 * @{
mbed_official 146:f64d43ff0c18 42 */
mbed_official 146:f64d43ff0c18 43
mbed_official 146:f64d43ff0c18 44 /*! @file*/
mbed_official 146:f64d43ff0c18 45
mbed_official 146:f64d43ff0c18 46 /*******************************************************************************
mbed_official 146:f64d43ff0c18 47 * Definitions
mbed_official 146:f64d43ff0c18 48 ******************************************************************************/
mbed_official 146:f64d43ff0c18 49
mbed_official 146:f64d43ff0c18 50 /* Defines constant value arrays for the baud rate pre-scalar and scalar divider values.*/
mbed_official 146:f64d43ff0c18 51 static const uint32_t s_baudratePrescaler[] = { 2, 3, 5, 7 };
mbed_official 146:f64d43ff0c18 52 static const uint32_t s_baudrateScaler[] = { 2, 4, 6, 8, 16, 32, 64, 128, 256, 512, 1024, 2048,
mbed_official 146:f64d43ff0c18 53 4096, 8192, 16384, 32768 };
mbed_official 146:f64d43ff0c18 54
mbed_official 146:f64d43ff0c18 55 /*! @brief Error codes for the DSPI driver.*/
mbed_official 146:f64d43ff0c18 56 typedef enum _dspi_status
mbed_official 146:f64d43ff0c18 57 {
mbed_official 146:f64d43ff0c18 58 kStatus_DSPI_Success = 0,
mbed_official 146:f64d43ff0c18 59 kStatus_DSPI_SlaveTxUnderrun, /*!< DSPI Slave Tx Under run error*/
mbed_official 146:f64d43ff0c18 60 kStatus_DSPI_SlaveRxOverrun, /*!< DSPI Slave Rx Overrun error*/
mbed_official 146:f64d43ff0c18 61 kStatus_DSPI_Timeout, /*!< DSPI transfer timed out*/
mbed_official 146:f64d43ff0c18 62 kStatus_DSPI_Busy, /*!< DSPI instance is already busy performing a
mbed_official 146:f64d43ff0c18 63 transfer.*/
mbed_official 146:f64d43ff0c18 64 kStatus_DSPI_NoTransferInProgress, /*!< Attempt to abort a transfer when no transfer
mbed_official 146:f64d43ff0c18 65 was in progress*/
mbed_official 146:f64d43ff0c18 66 kStatus_DSPI_InvalidBitCount, /*!< bits-per-frame value not valid*/
mbed_official 146:f64d43ff0c18 67 kStatus_DSPI_InvalidInstanceNumber, /*!< DSPI instance number does not match current count*/
mbed_official 146:f64d43ff0c18 68 kStatus_DSPI_OutOfRange /*< DSPI out-of-range error used in slave callback */
mbed_official 146:f64d43ff0c18 69 } dspi_status_t;
mbed_official 146:f64d43ff0c18 70
mbed_official 146:f64d43ff0c18 71 /*! @brief DSPI master or slave configuration*/
mbed_official 146:f64d43ff0c18 72 typedef enum _dspi_master_slave_mode {
mbed_official 146:f64d43ff0c18 73 kDspiMaster = 1, /*!< DSPI peripheral operates in master mode*/
mbed_official 146:f64d43ff0c18 74 kDspiSlave = 0 /*!< DSPI peripheral operates in slave mode*/
mbed_official 146:f64d43ff0c18 75 } dspi_master_slave_mode_t;
mbed_official 146:f64d43ff0c18 76
mbed_official 146:f64d43ff0c18 77 /*! @brief DSPI clock polarity configuration for a given CTAR*/
mbed_official 146:f64d43ff0c18 78 typedef enum _dspi_clock_polarity {
mbed_official 146:f64d43ff0c18 79 kDspiClockPolarity_ActiveHigh = 0, /*!< Active-high DSPI clock (idles low)*/
mbed_official 146:f64d43ff0c18 80 kDspiClockPolarity_ActiveLow = 1 /*!< Active-low DSPI clock (idles high)*/
mbed_official 146:f64d43ff0c18 81 } dspi_clock_polarity_t;
mbed_official 146:f64d43ff0c18 82
mbed_official 146:f64d43ff0c18 83 /*! @brief DSPI clock phase configuration for a given CTAR*/
mbed_official 146:f64d43ff0c18 84 typedef enum _dspi_clock_phase {
mbed_official 146:f64d43ff0c18 85 kDspiClockPhase_FirstEdge = 0, /*!< Data is captured on the leading edge of the SCK and
mbed_official 146:f64d43ff0c18 86 changed on the following edge.*/
mbed_official 146:f64d43ff0c18 87 kDspiClockPhase_SecondEdge = 1 /*!< Data is changed on the leading edge of the SCK and
mbed_official 146:f64d43ff0c18 88 captured on the following edge.*/
mbed_official 146:f64d43ff0c18 89 } dspi_clock_phase_t;
mbed_official 146:f64d43ff0c18 90
mbed_official 146:f64d43ff0c18 91 /*! @brief DSPI data shifter direction options for a given CTAR*/
mbed_official 146:f64d43ff0c18 92 typedef enum _dspi_shift_direction {
mbed_official 146:f64d43ff0c18 93 kDspiMsbFirst = 0, /*!< Data transfers start with most significant bit.*/
mbed_official 146:f64d43ff0c18 94 kDspiLsbFirst = 1 /*!< Data transfers start with least significant bit.*/
mbed_official 146:f64d43ff0c18 95 } dspi_shift_direction_t;
mbed_official 146:f64d43ff0c18 96
mbed_official 146:f64d43ff0c18 97 /*! @brief DSPI Clock and Transfer Attributes Register (CTAR) selection*/
mbed_official 146:f64d43ff0c18 98 typedef enum _dspi_ctar_selection {
mbed_official 146:f64d43ff0c18 99 kDspiCtar0 = 0, /*!< CTAR0 selection option for master or slave mode*/
mbed_official 146:f64d43ff0c18 100 kDspiCtar1 = 1 /*!< CTAR1 selection option for master mode only*/
mbed_official 146:f64d43ff0c18 101 } dspi_ctar_selection_t;
mbed_official 146:f64d43ff0c18 102
mbed_official 146:f64d43ff0c18 103 /*! @brief DSPI Peripheral Chip Select (PCS) Polarity configuration.*/
mbed_official 146:f64d43ff0c18 104 typedef enum _dspi_pcs_polarity_config {
mbed_official 146:f64d43ff0c18 105 kDspiPcs_ActiveHigh = 0, /*!< PCS Active High (idles low)*/
mbed_official 146:f64d43ff0c18 106 kDspiPcs_ActiveLow = 1 /*!< PCS Active Low (idles high)*/
mbed_official 146:f64d43ff0c18 107 } dspi_pcs_polarity_config_t;
mbed_official 146:f64d43ff0c18 108
mbed_official 146:f64d43ff0c18 109 /*! @brief DSPI Peripheral Chip Select (PCS) configuration (which PCS to configure)*/
mbed_official 146:f64d43ff0c18 110 typedef enum _dspi_which_pcs_config {
mbed_official 146:f64d43ff0c18 111 kDspiPcs0 = 1 << 0, /*!< PCS[0] */
mbed_official 146:f64d43ff0c18 112 kDspiPcs1 = 1 << 1, /*!< PCS[1] */
mbed_official 146:f64d43ff0c18 113 kDspiPcs2 = 1 << 2, /*!< PCS[2] */
mbed_official 146:f64d43ff0c18 114 kDspiPcs3 = 1 << 3, /*!< PCS[3] */
mbed_official 146:f64d43ff0c18 115 kDspiPcs4 = 1 << 4, /*!< PCS[4] */
mbed_official 146:f64d43ff0c18 116 kDspiPcs5 = 1 << 5 /*!< PCS[5] */
mbed_official 146:f64d43ff0c18 117 } dspi_which_pcs_config_t;
mbed_official 146:f64d43ff0c18 118
mbed_official 146:f64d43ff0c18 119 /*!
mbed_official 146:f64d43ff0c18 120 * @brief DSPI Sample Point: Controls when the DSPI master samples SIN in Modified Transfer
mbed_official 146:f64d43ff0c18 121 * Format. This field is valid only when CPHA bit in CTAR register is 0.
mbed_official 146:f64d43ff0c18 122 */
mbed_official 146:f64d43ff0c18 123 typedef enum _dspi_master_sample_point {
mbed_official 146:f64d43ff0c18 124 kDspiSckToSin_0Clock = 0, /*!< 0 system clocks between SCK edge and SIN sample*/
mbed_official 146:f64d43ff0c18 125 kDspiSckToSin_1Clock = 1, /*!< 1 system clock between SCK edge and SIN sample*/
mbed_official 146:f64d43ff0c18 126 kDspiSckToSin_2Clock = 2 /*!< 2 system clocks between SCK edge and SIN sample*/
mbed_official 146:f64d43ff0c18 127 } dspi_master_sample_point_t;
mbed_official 146:f64d43ff0c18 128
mbed_official 146:f64d43ff0c18 129 /*! @brief DSPI FIFO selects*/
mbed_official 146:f64d43ff0c18 130 typedef enum _dspi_fifo {
mbed_official 146:f64d43ff0c18 131 kDspiTxFifo = 0, /*!< DSPI Tx FIFO*/
mbed_official 146:f64d43ff0c18 132 kDspiRxFifo = 1 /*!< DSPI Rx FIFO.*/
mbed_official 146:f64d43ff0c18 133 } dspi_fifo_t;
mbed_official 146:f64d43ff0c18 134
mbed_official 146:f64d43ff0c18 135 /*! @brief DSPI status flags and interrupt request enable*/
mbed_official 146:f64d43ff0c18 136 typedef enum _dspi_status_and_interrupt_request {
mbed_official 146:f64d43ff0c18 137 kDspiTxComplete = BP_SPI_RSER_TCF_RE, /*!< TCF status/interrupt enable */
mbed_official 146:f64d43ff0c18 138 kDspiTxAndRxStatus = BP_SPI_SR_TXRXS, /*!< TXRXS status only, no interrupt*/
mbed_official 146:f64d43ff0c18 139 kDspiEndOfQueue = BP_SPI_RSER_EOQF_RE, /*!< EOQF status/interrupt enable*/
mbed_official 146:f64d43ff0c18 140 kDspiTxFifoUnderflow = BP_SPI_RSER_TFUF_RE, /*!< TFUF status/interrupt enable*/
mbed_official 146:f64d43ff0c18 141 kDspiTxFifoFillRequest = BP_SPI_RSER_TFFF_RE, /*!< TFFF status/interrupt enable*/
mbed_official 146:f64d43ff0c18 142 kDspiRxFifoOverflow = BP_SPI_RSER_RFOF_RE, /*!< RFOF status/interrupt enable*/
mbed_official 146:f64d43ff0c18 143 kDspiRxFifoDrainRequest = BP_SPI_RSER_RFDF_RE /*!< RFDF status/interrupt enable*/
mbed_official 146:f64d43ff0c18 144
mbed_official 146:f64d43ff0c18 145 } dspi_status_and_interrupt_request_t;
mbed_official 146:f64d43ff0c18 146
mbed_official 146:f64d43ff0c18 147 /*! @brief DSPI FIFO counter or pointer defines based on bit positions*/
mbed_official 146:f64d43ff0c18 148 typedef enum _dspi_fifo_counter_pointer {
mbed_official 146:f64d43ff0c18 149 kDspiRxFifoPointer = BP_SPI_SR_POPNXTPTR, /*!< Rx FIFO pointer*/
mbed_official 146:f64d43ff0c18 150 kDspiRxFifoCounter = BP_SPI_SR_RXCTR, /*!< Rx FIFO counter*/
mbed_official 146:f64d43ff0c18 151 kDspiTxFifoPointer = BP_SPI_SR_TXNXTPTR, /*!< Tx FIFO pointer*/
mbed_official 146:f64d43ff0c18 152 kDspiTxFifoCounter = BP_SPI_SR_TXCTR /*!< Tx FIFO counter*/
mbed_official 146:f64d43ff0c18 153 } dspi_fifo_counter_pointer_t;
mbed_official 146:f64d43ff0c18 154
mbed_official 146:f64d43ff0c18 155 /*!
mbed_official 146:f64d43ff0c18 156 * @brief DSPI data format settings configuration structure
mbed_official 146:f64d43ff0c18 157 *
mbed_official 146:f64d43ff0c18 158 * This structure contains the data format settings. These settings apply to a specific
mbed_official 146:f64d43ff0c18 159 * CTARn register, which the user must provide in this structure.
mbed_official 146:f64d43ff0c18 160 */
mbed_official 146:f64d43ff0c18 161 typedef struct DspiDataFormatConfig {
mbed_official 146:f64d43ff0c18 162 uint32_t bitsPerFrame; /*!< Bits per frame, minimum 4, maximum 16 (master), 32 (slave) */
mbed_official 146:f64d43ff0c18 163 dspi_clock_polarity_t clkPolarity; /*!< Active high or low clock polarity*/
mbed_official 146:f64d43ff0c18 164 dspi_clock_phase_t clkPhase; /*!< Clock phase setting to change and capture data*/
mbed_official 146:f64d43ff0c18 165 dspi_shift_direction_t direction; /*!< MSB or LSB data shift direction
mbed_official 146:f64d43ff0c18 166 This setting relevant only in master mode and
mbed_official 146:f64d43ff0c18 167 can be ignored in slave mode */
mbed_official 146:f64d43ff0c18 168 } dspi_data_format_config_t;
mbed_official 146:f64d43ff0c18 169
mbed_official 146:f64d43ff0c18 170 /*!
mbed_official 146:f64d43ff0c18 171 * @brief DSPI hardware configuration settings for master mode
mbed_official 146:f64d43ff0c18 172 *
mbed_official 146:f64d43ff0c18 173 * Use an instance of this structure with the dspi_hal_master_init() to configure the
mbed_official 146:f64d43ff0c18 174 * most common settings of the DSPI peripheral in master mode with a single function call.
mbed_official 146:f64d43ff0c18 175 *
mbed_official 146:f64d43ff0c18 176 * The @c bitsPerSec member is handled in a special way. If this value is set to 0, then the baud is
mbed_official 146:f64d43ff0c18 177 * not set by the dspi_hal_master_init(), and must be set with a separate call to either the
mbed_official 146:f64d43ff0c18 178 * dspi_hal_set_baud() or the dspi_hal_set_baud_divisors(). This can be useful when you know the
mbed_official 146:f64d43ff0c18 179 * divisors in advance and don't want to spend the time to compute them for the provided rate
mbed_official 146:f64d43ff0c18 180 * in bits/sec.
mbed_official 146:f64d43ff0c18 181 *
mbed_official 146:f64d43ff0c18 182 * This structure also contains another structure template as a member:
mbed_official 146:f64d43ff0c18 183 * @c dspi_data_format_config_t @c dataConfig.
mbed_official 146:f64d43ff0c18 184 * An example usage for this is assuming declaration @c dspi_master_config_t
mbed_official 146:f64d43ff0c18 185 * @c dspiConfig:
mbed_official 146:f64d43ff0c18 186 @code
mbed_official 146:f64d43ff0c18 187 dspiConfig.dataConfig.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 188 dspiConfig.dataConfig.clkPolarity = kDspiClockPolarity_ActiveHigh;
mbed_official 146:f64d43ff0c18 189 dspiConfig.dataConfig.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 190 dspiConfig.dataConfig.direction = kDspiMsbFirst;
mbed_official 146:f64d43ff0c18 191 @endcode
mbed_official 146:f64d43ff0c18 192 */
mbed_official 146:f64d43ff0c18 193 typedef struct DspiMasterConfig {
mbed_official 146:f64d43ff0c18 194 bool isEnabled; /*!< Set to true to enable the DSPI peripheral.*/
mbed_official 146:f64d43ff0c18 195 dspi_ctar_selection_t whichCtar; /*!< Desired Clock and Transfer Attributes Register (CTAR)*/
mbed_official 146:f64d43ff0c18 196 uint32_t bitsPerSec; /*!< Baud rate in bits per second*/
mbed_official 146:f64d43ff0c18 197 uint32_t sourceClockInHz; /*!< Module source clock */
mbed_official 146:f64d43ff0c18 198 dspi_data_format_config_t dataConfig; /*!< Data format configuration structure*/
mbed_official 146:f64d43ff0c18 199 bool isSckContinuous; /*!< Disable(0) or Enable(1) continuous SCK operation*/
mbed_official 146:f64d43ff0c18 200 dspi_which_pcs_config_t whichPcs; /*!< Desired Peripheral Chip Select (PCS) */
mbed_official 146:f64d43ff0c18 201 dspi_pcs_polarity_config_t pcsPolarity; /*!< Peripheral Chip Select (PCS) polarity setting.*/
mbed_official 146:f64d43ff0c18 202 dspi_master_sample_point_t masterInSample; /*!< Master data-in (SIN) sample point setting.*/
mbed_official 146:f64d43ff0c18 203 bool isModifiedTimingFormatEnabled; /*!< Disable(0) or Enable(1) modified timing format.*/
mbed_official 146:f64d43ff0c18 204 bool isTxFifoDisabled; /*!< Disable(1) or Enable(0) Tx FIFO */
mbed_official 146:f64d43ff0c18 205 bool isRxFifoDisabled; /*!< Disable(1) or Enable(0) Rx FIFO */
mbed_official 146:f64d43ff0c18 206 } dspi_master_config_t;
mbed_official 146:f64d43ff0c18 207
mbed_official 146:f64d43ff0c18 208 /*!
mbed_official 146:f64d43ff0c18 209 * @brief DSPI hardware configuration settings for slave mode.
mbed_official 146:f64d43ff0c18 210 *
mbed_official 146:f64d43ff0c18 211 * Use an instance of this structure with the dspi_hal_slave_init() to configure the
mbed_official 146:f64d43ff0c18 212 * most common settings of the DSPI peripheral in slave mode with a single function call.
mbed_official 146:f64d43ff0c18 213 */
mbed_official 146:f64d43ff0c18 214 typedef struct DspiSlaveConfig {
mbed_official 146:f64d43ff0c18 215 bool isEnabled; /*!< Set to true to enable the DSPI peripheral. */
mbed_official 146:f64d43ff0c18 216 dspi_data_format_config_t dataConfig; /*!< Data format configuration structure */
mbed_official 146:f64d43ff0c18 217 bool isTxFifoDisabled; /*!< Disable(1) or Enable(0) Tx FIFO */
mbed_official 146:f64d43ff0c18 218 bool isRxFifoDisabled; /*!< Disable(1) or Enable(0) Rx FIFO */
mbed_official 146:f64d43ff0c18 219 } dspi_slave_config_t;
mbed_official 146:f64d43ff0c18 220
mbed_official 146:f64d43ff0c18 221 /*!
mbed_official 146:f64d43ff0c18 222 * @brief DSPI baud rate divisors settings configuration structure.
mbed_official 146:f64d43ff0c18 223 *
mbed_official 146:f64d43ff0c18 224 * Note: These settings are relevant only in master mode.
mbed_official 146:f64d43ff0c18 225 * This structure contains the baud rate divisor settings, which provides the user with the option to
mbed_official 146:f64d43ff0c18 226 * explicitly set these baud rate divisors. In addition, the user must also set the
mbed_official 146:f64d43ff0c18 227 * CTARn register with the divisor settings.
mbed_official 146:f64d43ff0c18 228 */
mbed_official 146:f64d43ff0c18 229 typedef struct DspiBaudRateDivisors {
mbed_official 146:f64d43ff0c18 230 bool doubleBaudRate; /*!< Double Baud rate parameter setting */
mbed_official 146:f64d43ff0c18 231 uint32_t prescaleDivisor; /*!< Baud Rate Pre-scalar parameter setting*/
mbed_official 146:f64d43ff0c18 232 uint32_t baudRateDivisor; /*!< Baud Rate scaler parameter setting */
mbed_official 146:f64d43ff0c18 233 } dspi_baud_rate_divisors_t;
mbed_official 146:f64d43ff0c18 234
mbed_official 146:f64d43ff0c18 235 /*!
mbed_official 146:f64d43ff0c18 236 * @brief DSPI delay settings configuration structure
mbed_official 146:f64d43ff0c18 237 *
mbed_official 146:f64d43ff0c18 238 * Note: These settings are relevant only in master mode.
mbed_official 146:f64d43ff0c18 239 * This structure contains the various delay settings. These settings apply to a specific
mbed_official 146:f64d43ff0c18 240 * CTARn register, which the user must provide in this structure.
mbed_official 146:f64d43ff0c18 241 */
mbed_official 146:f64d43ff0c18 242 typedef struct DspiDelaySettingsConfig {
mbed_official 146:f64d43ff0c18 243 uint32_t pcsToSckPre; /*!< PCS to SCK delay pre-scalar (PCSSCK) */
mbed_official 146:f64d43ff0c18 244 uint32_t pcsToSck; /*!< PCS to SCK Delay scalar (CSSCK) */
mbed_official 146:f64d43ff0c18 245 uint32_t afterSckPre; /*!< After SCK delay pre-scalar (PASC)*/
mbed_official 146:f64d43ff0c18 246 uint32_t afterSck; /*!< After SCK delay scalar (ASC)*/
mbed_official 146:f64d43ff0c18 247 uint32_t afterTransferPre; /*!< Delay after transfer pre-scalar (PDT)*/
mbed_official 146:f64d43ff0c18 248 uint32_t afterTransfer; /*!< Delay after transfer scalar (DT) */
mbed_official 146:f64d43ff0c18 249 } dspi_delay_settings_config_t;
mbed_official 146:f64d43ff0c18 250
mbed_official 146:f64d43ff0c18 251 /*!
mbed_official 146:f64d43ff0c18 252 * @brief DSPI command and data configuration structure
mbed_official 146:f64d43ff0c18 253 *
mbed_official 146:f64d43ff0c18 254 * Note: This structure is used with the PUSHR register, which
mbed_official 146:f64d43ff0c18 255 * provides the means to write to the Tx FIFO. Data written to this register is
mbed_official 146:f64d43ff0c18 256 * transferred to the Tx FIFO. Eight or sixteen-bit write accesses to the PUSHR transfer all
mbed_official 146:f64d43ff0c18 257 * 32 register bits to the Tx FIFO. The register structure is different in master and slave
mbed_official 146:f64d43ff0c18 258 * modes. In master mode, the register provides 16-bit command and 16-bit data to the Tx
mbed_official 146:f64d43ff0c18 259 * FIFO. In slave mode all 32 register bits can be used as data, supporting up to 32-bit SPI
mbed_official 146:f64d43ff0c18 260 * frame operation.
mbed_official 146:f64d43ff0c18 261 */
mbed_official 146:f64d43ff0c18 262 typedef struct DspiCommandDataConfig {
mbed_official 146:f64d43ff0c18 263 bool isChipSelectContinuous; /*!< Option to enable the continuous assertion of chip select
mbed_official 146:f64d43ff0c18 264 between transfers*/
mbed_official 146:f64d43ff0c18 265 dspi_ctar_selection_t whichCtar; /*!< The desired Clock and Transfer Attributes
mbed_official 146:f64d43ff0c18 266 Register (CTAR) to use for CTAS*/
mbed_official 146:f64d43ff0c18 267 dspi_which_pcs_config_t whichPcs; /*!< The desired PCS signal to use for the data transfer*/
mbed_official 146:f64d43ff0c18 268 bool isEndOfQueue; /*!< Signals that the current transfer is the last in the queue*/
mbed_official 146:f64d43ff0c18 269 bool clearTransferCount; /*!< Clears SPI_TCNT field; cleared before transmission starts*/
mbed_official 146:f64d43ff0c18 270 } dspi_command_config_t;
mbed_official 146:f64d43ff0c18 271
mbed_official 146:f64d43ff0c18 272 /*******************************************************************************
mbed_official 146:f64d43ff0c18 273 * API
mbed_official 146:f64d43ff0c18 274 ******************************************************************************/
mbed_official 146:f64d43ff0c18 275
mbed_official 146:f64d43ff0c18 276 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 277 extern "C" {
mbed_official 146:f64d43ff0c18 278 #endif
mbed_official 146:f64d43ff0c18 279
mbed_official 146:f64d43ff0c18 280 /*!
mbed_official 146:f64d43ff0c18 281 * @name Configuration
mbed_official 146:f64d43ff0c18 282 * @{
mbed_official 146:f64d43ff0c18 283 */
mbed_official 146:f64d43ff0c18 284
mbed_official 146:f64d43ff0c18 285 /*!
mbed_official 146:f64d43ff0c18 286 * @brief Configure the DSPI peripheral in master mode
mbed_official 146:f64d43ff0c18 287 *
mbed_official 146:f64d43ff0c18 288 * This function initializes the module to the user defined settings and default settings in master
mbed_official 146:f64d43ff0c18 289 * mode. This is an example demonstrating how to define the dspi_master_config_t structure and call
mbed_official 146:f64d43ff0c18 290 * the dspi_hal_master_init function:
mbed_official 146:f64d43ff0c18 291 @code
mbed_official 146:f64d43ff0c18 292 dspi_master_config_t dspiConfig;
mbed_official 146:f64d43ff0c18 293 dspiConfig.isEnabled = false;
mbed_official 146:f64d43ff0c18 294 dspiConfig.whichCtar = kDspiCtar0;
mbed_official 146:f64d43ff0c18 295 dspiConfig.bitsPerSec = 0;
mbed_official 146:f64d43ff0c18 296 dspiConfig.sourceClockInHz = dspiSourceClock;
mbed_official 146:f64d43ff0c18 297 dspiConfig.isSckContinuous = false;
mbed_official 146:f64d43ff0c18 298 dspiConfig.whichPcs = kDspiPcs0;
mbed_official 146:f64d43ff0c18 299 dspiConfig.pcsPolarity = kDspiPcs_ActiveLow;
mbed_official 146:f64d43ff0c18 300 dspiConfig.masterInSample = kDspiSckToSin_0Clock;
mbed_official 146:f64d43ff0c18 301 dspiConfig.isModifiedTimingFormatEnabled = false;
mbed_official 146:f64d43ff0c18 302 dspiConfig.isTxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 303 dspiConfig.isRxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 304 dspiConfig.dataConfig.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 305 dspiConfig.dataConfig.clkPolarity = kDspiClockPolarity_ActiveHigh;
mbed_official 146:f64d43ff0c18 306 dspiConfig.dataConfig.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 307 dspiConfig.dataConfig.direction = kDspiMsbFirst;
mbed_official 146:f64d43ff0c18 308 dspi_hal_master_init(instance, &dspiConfig, calculatedBaudRate);
mbed_official 146:f64d43ff0c18 309 @endcode
mbed_official 146:f64d43ff0c18 310 *
mbed_official 146:f64d43ff0c18 311 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 312 * @param config Pointer to the master mode configuration data structure
mbed_official 146:f64d43ff0c18 313 * @param calculatedBaudRate The calculated baud rate passed back to the user for them to determine
mbed_official 146:f64d43ff0c18 314 * if the calculated baud rate is close enough to meet their needs.
mbed_official 146:f64d43ff0c18 315 * @return An error code or kStatus_DSPI_Success.
mbed_official 146:f64d43ff0c18 316 */
mbed_official 146:f64d43ff0c18 317 dspi_status_t dspi_hal_master_init(uint32_t instance, const dspi_master_config_t * config,
mbed_official 146:f64d43ff0c18 318 uint32_t * calculatedBaudRate);
mbed_official 146:f64d43ff0c18 319
mbed_official 146:f64d43ff0c18 320 /*!
mbed_official 146:f64d43ff0c18 321 * @brief Configures the DSPI peripheral in slave mode.
mbed_official 146:f64d43ff0c18 322 *
mbed_official 146:f64d43ff0c18 323 * This function initializes the DSPI module for slave mode. This is an example demonstrating how
mbed_official 146:f64d43ff0c18 324 * to define the dspi_slave_config_t structure and call the dspi_hal_slave_init function:
mbed_official 146:f64d43ff0c18 325 @code
mbed_official 146:f64d43ff0c18 326 dspi_slave_config_t dspiConfig;
mbed_official 146:f64d43ff0c18 327 dspiConfig.isEnabled = false;
mbed_official 146:f64d43ff0c18 328 dspiConfig.isTxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 329 dspiConfig.isRxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 330 dspiConfig.dataConfig.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 331 dspiConfig.dataConfig.clkPolarity = kDspiClockPolarity_ActiveHigh;
mbed_official 146:f64d43ff0c18 332 dspiConfig.dataConfig.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 333 dspi_hal_slave_init(instance, &dspiConfig);
mbed_official 146:f64d43ff0c18 334 @endcode
mbed_official 146:f64d43ff0c18 335 *
mbed_official 146:f64d43ff0c18 336 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 337 * @param config Pointer to the slave mode configuration data structure
mbed_official 146:f64d43ff0c18 338 * @return An error code or kStatus_DSPI_Success.
mbed_official 146:f64d43ff0c18 339 */
mbed_official 146:f64d43ff0c18 340 dspi_status_t dspi_hal_slave_init(uint32_t instance, const dspi_slave_config_t * config);
mbed_official 146:f64d43ff0c18 341
mbed_official 146:f64d43ff0c18 342 /*!
mbed_official 146:f64d43ff0c18 343 * @brief Restores the DSPI to reset the configuration.
mbed_official 146:f64d43ff0c18 344 *
mbed_official 146:f64d43ff0c18 345 * This function basically resets all of the DSPI registers to their default setting including
mbed_official 146:f64d43ff0c18 346 * disabling the module.
mbed_official 146:f64d43ff0c18 347 *
mbed_official 146:f64d43ff0c18 348 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 349 */
mbed_official 146:f64d43ff0c18 350 void dspi_hal_reset(uint32_t instance);
mbed_official 146:f64d43ff0c18 351
mbed_official 146:f64d43ff0c18 352 /*!
mbed_official 146:f64d43ff0c18 353 * @brief Enable the DSPI peripheral, set MCR MDIS to 0.
mbed_official 146:f64d43ff0c18 354 *
mbed_official 146:f64d43ff0c18 355 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 356 */
mbed_official 146:f64d43ff0c18 357 static inline void dspi_hal_enable(uint32_t instance)
mbed_official 146:f64d43ff0c18 358 {
mbed_official 146:f64d43ff0c18 359 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 360 HW_SPI_MCR_CLR(instance, BM_SPI_MCR_MDIS);
mbed_official 146:f64d43ff0c18 361 }
mbed_official 146:f64d43ff0c18 362
mbed_official 146:f64d43ff0c18 363 /*!
mbed_official 146:f64d43ff0c18 364 * @brief Disables the DSPI peripheral, sets MCR MDIS to 1.
mbed_official 146:f64d43ff0c18 365 *
mbed_official 146:f64d43ff0c18 366 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 367 */
mbed_official 146:f64d43ff0c18 368 static inline void dspi_hal_disable(uint32_t instance)
mbed_official 146:f64d43ff0c18 369 {
mbed_official 146:f64d43ff0c18 370 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 371 HW_SPI_MCR_SET(instance, BM_SPI_MCR_MDIS);
mbed_official 146:f64d43ff0c18 372 }
mbed_official 146:f64d43ff0c18 373
mbed_official 146:f64d43ff0c18 374 /*!
mbed_official 146:f64d43ff0c18 375 * @brief Sets the DSPI baud rate in bits per second.
mbed_official 146:f64d43ff0c18 376 *
mbed_official 146:f64d43ff0c18 377 * This function takes in the desired bitsPerSec (baud rate) and calculates the nearest
mbed_official 146:f64d43ff0c18 378 * possible baud rate without exceeding the desired baud rate, and returns the calculated
mbed_official 146:f64d43ff0c18 379 * baud rate in bits-per-second. It requires that the caller also provide the frequency of the
mbed_official 146:f64d43ff0c18 380 * module source clock (in Hertz).
mbed_official 146:f64d43ff0c18 381 *
mbed_official 146:f64d43ff0c18 382 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 383 * @param whichCtar The desired Clock and Transfer Attributes Register (CTAR) of the type
mbed_official 146:f64d43ff0c18 384 * dspi_ctar_selection_t
mbed_official 146:f64d43ff0c18 385 * @param bitsPerSec The desired baud rate in bits per second
mbed_official 146:f64d43ff0c18 386 * @param sourceClockInHz Module source input clock in Hertz
mbed_official 146:f64d43ff0c18 387 * @return The actual calculated baud rate
mbed_official 146:f64d43ff0c18 388 */
mbed_official 146:f64d43ff0c18 389 uint32_t dspi_hal_set_baud(uint32_t instance, dspi_ctar_selection_t whichCtar, uint32_t bitsPerSec,
mbed_official 146:f64d43ff0c18 390 uint32_t sourceClockInHz);
mbed_official 146:f64d43ff0c18 391
mbed_official 146:f64d43ff0c18 392 /*!
mbed_official 146:f64d43ff0c18 393 * @brief Configures the baud rate divisors manually.
mbed_official 146:f64d43ff0c18 394 *
mbed_official 146:f64d43ff0c18 395 * This function allows the caller to manually set the baud rate divisors in the event that
mbed_official 146:f64d43ff0c18 396 * these dividers are known and the caller does not wish to call the dspi_hal_set_baud function.
mbed_official 146:f64d43ff0c18 397 *
mbed_official 146:f64d43ff0c18 398 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 399 * @param whichCtar The desired Clock and Transfer Attributes Register (CTAR) of type
mbed_official 146:f64d43ff0c18 400 * dspi_ctar_selection_t
mbed_official 146:f64d43ff0c18 401 * @param divisors Pointer to a structure containing the user defined baud rate divisor settings
mbed_official 146:f64d43ff0c18 402 */
mbed_official 146:f64d43ff0c18 403 void dspi_hal_set_baud_divisors(uint32_t instance,
mbed_official 146:f64d43ff0c18 404 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 405 const dspi_baud_rate_divisors_t * divisors);
mbed_official 146:f64d43ff0c18 406
mbed_official 146:f64d43ff0c18 407 /*!
mbed_official 146:f64d43ff0c18 408 * @brief Configures the DSPI for master or slave.
mbed_official 146:f64d43ff0c18 409 *
mbed_official 146:f64d43ff0c18 410 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 411 * @param mode Mode setting (master or slave) of type dspi_master_slave_mode_t
mbed_official 146:f64d43ff0c18 412 */
mbed_official 146:f64d43ff0c18 413 static inline void dspi_hal_set_master_slave(uint32_t instance, dspi_master_slave_mode_t mode)
mbed_official 146:f64d43ff0c18 414 {
mbed_official 146:f64d43ff0c18 415 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 416 BW_SPI_MCR_MSTR(instance, (uint32_t)mode);
mbed_official 146:f64d43ff0c18 417 }
mbed_official 146:f64d43ff0c18 418
mbed_official 146:f64d43ff0c18 419 /*!
mbed_official 146:f64d43ff0c18 420 * @brief Configures the DSPI for the continuous SCK operation.
mbed_official 146:f64d43ff0c18 421 *
mbed_official 146:f64d43ff0c18 422 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 423 * @param enable Enables (true) or disables(false) continuous SCK operation.
mbed_official 146:f64d43ff0c18 424 */
mbed_official 146:f64d43ff0c18 425 static inline void dspi_hal_configure_continuous_sck(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 426 {
mbed_official 146:f64d43ff0c18 427 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 428 BW_SPI_MCR_CONT_SCKE(instance, (enable == true));
mbed_official 146:f64d43ff0c18 429 }
mbed_official 146:f64d43ff0c18 430
mbed_official 146:f64d43ff0c18 431 /*!
mbed_official 146:f64d43ff0c18 432 * @brief Configures the DSPI to enable modified timing format.
mbed_official 146:f64d43ff0c18 433 *
mbed_official 146:f64d43ff0c18 434 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 435 * @param enable Enables (true) or disables(false) modified timing format.
mbed_official 146:f64d43ff0c18 436 */
mbed_official 146:f64d43ff0c18 437 static inline void dspi_hal_configure_modified_timing_format(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 438 {
mbed_official 146:f64d43ff0c18 439 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 440 BW_SPI_MCR_MTFE(instance, (enable == true));
mbed_official 146:f64d43ff0c18 441 }
mbed_official 146:f64d43ff0c18 442
mbed_official 146:f64d43ff0c18 443 /*!
mbed_official 146:f64d43ff0c18 444 * @brief Configures the DSPI peripheral chip select strobe enable. Configures the PCS[5] to be the
mbed_official 146:f64d43ff0c18 445 * active-low PCS Strobe output.
mbed_official 146:f64d43ff0c18 446 *
mbed_official 146:f64d43ff0c18 447 * PCS[5] is a special case that can be configured as an active low PCS strobe or as a Peripheral
mbed_official 146:f64d43ff0c18 448 * Chip Select in master mode. When configured as a strobe, it provides a signal to an external
mbed_official 146:f64d43ff0c18 449 * demultiplexer to decode PCS[0] to PCS[4] signals into as many as 128 glitch-free PCS signals.
mbed_official 146:f64d43ff0c18 450 *
mbed_official 146:f64d43ff0c18 451 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 452 * @param enable Enable (true) PCS[5] to operate as the peripheral chip select (PCS) strobe
mbed_official 146:f64d43ff0c18 453 * If disable (false), PCS[5] operates as a peripheral chip select
mbed_official 146:f64d43ff0c18 454 */
mbed_official 146:f64d43ff0c18 455 static inline void dspi_hal_configure_pcs_strobe(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 456 {
mbed_official 146:f64d43ff0c18 457 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 458 BW_SPI_MCR_PCSSE(instance, (enable == true));
mbed_official 146:f64d43ff0c18 459 }
mbed_official 146:f64d43ff0c18 460
mbed_official 146:f64d43ff0c18 461 /*!
mbed_official 146:f64d43ff0c18 462 * @brief Configures the DSPI received FIFO overflow overwrite enable.
mbed_official 146:f64d43ff0c18 463 *
mbed_official 146:f64d43ff0c18 464 * When enabled, this function allows incoming receive data to overwrite the existing data in the
mbed_official 146:f64d43ff0c18 465 * receive shift register when the Rx FIFO is full. Otherwise when disabled, the incoming data
mbed_official 146:f64d43ff0c18 466 * is ignored when the RX FIFO is full.
mbed_official 146:f64d43ff0c18 467 *
mbed_official 146:f64d43ff0c18 468 * @param instance Module instance number.
mbed_official 146:f64d43ff0c18 469 * @param enable If enabled (true), allows incoming data to overwrite Rx FIFO contents when full,
mbed_official 146:f64d43ff0c18 470 * else incoming data is ignored.
mbed_official 146:f64d43ff0c18 471 */
mbed_official 146:f64d43ff0c18 472 static inline void dspi_hal_configure_rx_fifo_overwrite(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 473 {
mbed_official 146:f64d43ff0c18 474 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 475 BW_SPI_MCR_ROOE(instance, (enable == true));
mbed_official 146:f64d43ff0c18 476 }
mbed_official 146:f64d43ff0c18 477
mbed_official 146:f64d43ff0c18 478 /*!
mbed_official 146:f64d43ff0c18 479 * @brief Configures the DSPI peripheral chip select polarity.
mbed_official 146:f64d43ff0c18 480 *
mbed_official 146:f64d43ff0c18 481 * This function takes in the desired peripheral chip select (PCS) and it's
mbed_official 146:f64d43ff0c18 482 * corresponding desired polarity and configures the PCS signal to operate with the
mbed_official 146:f64d43ff0c18 483 * desired characteristic.
mbed_official 146:f64d43ff0c18 484 *
mbed_official 146:f64d43ff0c18 485 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 486 * @param pcs The particular peripheral chip select (parameter value is of type
mbed_official 146:f64d43ff0c18 487 * dspi_which_pcs_config_t) for which we wish to apply the active high or active
mbed_official 146:f64d43ff0c18 488 * low characteristic.
mbed_official 146:f64d43ff0c18 489 * @param activeLowOrHigh The setting for either "active high, inactive low (0)" or
mbed_official 146:f64d43ff0c18 490 * "active low, inactive high(1)" of type dspi_pcs_polarity_config_t.
mbed_official 146:f64d43ff0c18 491 */
mbed_official 146:f64d43ff0c18 492 void dspi_hal_configure_pcs_polarity(uint32_t instance, dspi_which_pcs_config_t pcs,
mbed_official 146:f64d43ff0c18 493 dspi_pcs_polarity_config_t activeLowOrHigh);
mbed_official 146:f64d43ff0c18 494
mbed_official 146:f64d43ff0c18 495 /*!
mbed_official 146:f64d43ff0c18 496 * @brief Configures the DSPI FIFOs.
mbed_official 146:f64d43ff0c18 497 *
mbed_official 146:f64d43ff0c18 498 * This function allows the caller to disable/enable the Tx and Rx FIFOs (independently).
mbed_official 146:f64d43ff0c18 499 * Note that to disable, the caller must pass in a logic 1 (true) for the particular FIFO
mbed_official 146:f64d43ff0c18 500 * configuration. To enable, the caller must pass in a logic 0 (false). For example, to enable
mbed_official 146:f64d43ff0c18 501 * both the Tx and Rx FIFOs, the caller makes this function call (where instance is the
mbed_official 146:f64d43ff0c18 502 * desired module instance number):
mbed_official 146:f64d43ff0c18 503 @code
mbed_official 146:f64d43ff0c18 504 dspi_hal_configure_fifos(instance, false, false);
mbed_official 146:f64d43ff0c18 505 @endcode
mbed_official 146:f64d43ff0c18 506 *
mbed_official 146:f64d43ff0c18 507 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 508 * @param disableTxFifo Disables (false) the TX FIFO, else enables (true) the TX FIFO
mbed_official 146:f64d43ff0c18 509 * @param disableRxFifo Disables (false) the RX FIFO, else enables (true) the RX FIFO
mbed_official 146:f64d43ff0c18 510 */
mbed_official 146:f64d43ff0c18 511 void dspi_hal_configure_fifos(uint32_t instance, bool disableTxFifo, bool disableRxFifo);
mbed_official 146:f64d43ff0c18 512
mbed_official 146:f64d43ff0c18 513 /*!
mbed_official 146:f64d43ff0c18 514 * @brief Flushes the DSPI FIFOs.
mbed_official 146:f64d43ff0c18 515 *
mbed_official 146:f64d43ff0c18 516 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 517 * @param enableFlushTxFifo Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO
mbed_official 146:f64d43ff0c18 518 * @param enableFlushRxFifo Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO
mbed_official 146:f64d43ff0c18 519 */
mbed_official 146:f64d43ff0c18 520 void dspi_hal_flush_fifos(uint32_t instance, bool enableFlushTxFifo, bool enableFlushRxFifo);
mbed_official 146:f64d43ff0c18 521
mbed_official 146:f64d43ff0c18 522
mbed_official 146:f64d43ff0c18 523 /*!
mbed_official 146:f64d43ff0c18 524 * @brief Configures when the DSPI master samples SIN in the Modified Transfer Format
mbed_official 146:f64d43ff0c18 525 *
mbed_official 146:f64d43ff0c18 526 * This function controls when the DSPI master samples SIN (data in) in the Modified Transfer
mbed_official 146:f64d43ff0c18 527 * Format. Note that this is valid only when the CPHA bit in the CTAR register is 0.
mbed_official 146:f64d43ff0c18 528 *
mbed_official 146:f64d43ff0c18 529 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 530 * @param samplePnt selects when the data in (SIN) is sampled, of type dspi_master_sample_point_t.
mbed_official 146:f64d43ff0c18 531 * This value selects either 0, 1, or 2 system clocks between the SCK edge
mbed_official 146:f64d43ff0c18 532 * and the SIN (data in) sample.
mbed_official 146:f64d43ff0c18 533 */
mbed_official 146:f64d43ff0c18 534 static inline void dspi_hal_set_datain_samplepoint(uint32_t instance,
mbed_official 146:f64d43ff0c18 535 dspi_master_sample_point_t samplePnt)
mbed_official 146:f64d43ff0c18 536 {
mbed_official 146:f64d43ff0c18 537 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 538 BW_SPI_MCR_SMPL_PT(instance, samplePnt);
mbed_official 146:f64d43ff0c18 539 }
mbed_official 146:f64d43ff0c18 540
mbed_official 146:f64d43ff0c18 541
mbed_official 146:f64d43ff0c18 542 /*!
mbed_official 146:f64d43ff0c18 543 * @brief Starts the DSPI transfers, clears HALT bit in MCR.
mbed_official 146:f64d43ff0c18 544 *
mbed_official 146:f64d43ff0c18 545 * This function call called whenever the module is ready to begin data transfers in either master
mbed_official 146:f64d43ff0c18 546 * or slave mode.
mbed_official 146:f64d43ff0c18 547 *
mbed_official 146:f64d43ff0c18 548 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 549 */
mbed_official 146:f64d43ff0c18 550 static inline void dspi_hal_start_transfer(uint32_t instance)
mbed_official 146:f64d43ff0c18 551 {
mbed_official 146:f64d43ff0c18 552 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 553 HW_SPI_MCR_CLR(instance, BM_SPI_MCR_HALT);
mbed_official 146:f64d43ff0c18 554 }
mbed_official 146:f64d43ff0c18 555
mbed_official 146:f64d43ff0c18 556 /*!
mbed_official 146:f64d43ff0c18 557 * @brief Stops (halts) DSPI transfers, sets HALT bit in MCR.
mbed_official 146:f64d43ff0c18 558 *
mbed_official 146:f64d43ff0c18 559 * This function call stops data transfers in either master or slave mode.
mbed_official 146:f64d43ff0c18 560 *
mbed_official 146:f64d43ff0c18 561 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 562 */
mbed_official 146:f64d43ff0c18 563 static inline void dspi_hal_stop_transfer(uint32_t instance)
mbed_official 146:f64d43ff0c18 564 {
mbed_official 146:f64d43ff0c18 565 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 566 HW_SPI_MCR_SET(instance, BM_SPI_MCR_HALT);
mbed_official 146:f64d43ff0c18 567 }
mbed_official 146:f64d43ff0c18 568
mbed_official 146:f64d43ff0c18 569 /*!
mbed_official 146:f64d43ff0c18 570 * @brief Configures the data format for a particular CTAR.
mbed_official 146:f64d43ff0c18 571 *
mbed_official 146:f64d43ff0c18 572 * This function configures the bits-per-frame, polarity, phase, and shift direction for a
mbed_official 146:f64d43ff0c18 573 * particular CTAR. An example use case is as follows:
mbed_official 146:f64d43ff0c18 574 @code
mbed_official 146:f64d43ff0c18 575 dspi_data_format_config_t dataFormat;
mbed_official 146:f64d43ff0c18 576 dataFormat.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 577 dataFormat.clkPolarity = kDspiClockPolarity_ActiveLow;
mbed_official 146:f64d43ff0c18 578 dataFormat.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 579 dataFormat.direction = kDspiMsbFirst;
mbed_official 146:f64d43ff0c18 580 dspi_hal_configure_data_format(instance, kDspiCtar0, &dataFormat);
mbed_official 146:f64d43ff0c18 581 @endcode
mbed_official 146:f64d43ff0c18 582 *
mbed_official 146:f64d43ff0c18 583 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 584 * @param whichCtar The desired Clock and Transfer Attributes Register (CTAR) of type
mbed_official 146:f64d43ff0c18 585 * dspi_ctar_selection_t.
mbed_official 146:f64d43ff0c18 586 * @param config Pointer to a structure containing the user defined data format configuration settings.
mbed_official 146:f64d43ff0c18 587 * @return An error code or kStatus_DSPI_Success
mbed_official 146:f64d43ff0c18 588 */
mbed_official 146:f64d43ff0c18 589 dspi_status_t dspi_hal_configure_data_format(uint32_t instance,
mbed_official 146:f64d43ff0c18 590 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 591 const dspi_data_format_config_t * config);
mbed_official 146:f64d43ff0c18 592
mbed_official 146:f64d43ff0c18 593 /*!
mbed_official 146:f64d43ff0c18 594 * @brief Configures the delays for a particular CTAR, master mode only.
mbed_official 146:f64d43ff0c18 595 *
mbed_official 146:f64d43ff0c18 596 * This function configures the PCS to SCK delay pre-scalar (PCSSCK),
mbed_official 146:f64d43ff0c18 597 * the PCS to SCK Delay scalar (CSSCK),
mbed_official 146:f64d43ff0c18 598 * the After SCK delay pre-scalar (PASC),
mbed_official 146:f64d43ff0c18 599 * the After SCK delay scalar (ASC),
mbed_official 146:f64d43ff0c18 600 * the Delay after transfer pre-scalar (PDT),
mbed_official 146:f64d43ff0c18 601 * and the Delay after transfer scalar (DT).
mbed_official 146:f64d43ff0c18 602 * The following is an example use case of this function:
mbed_official 146:f64d43ff0c18 603 * @code
mbed_official 146:f64d43ff0c18 604 dspi_delay_settings_config_t delayConfig;
mbed_official 146:f64d43ff0c18 605 delayConfig.pcsToSckPre = 0x3;
mbed_official 146:f64d43ff0c18 606 delayConfig.pcsToSck = 0xF;
mbed_official 146:f64d43ff0c18 607 delayConfig.afterSckPre = 0x2;
mbed_official 146:f64d43ff0c18 608 delayConfig.afterSck = 0xA;
mbed_official 146:f64d43ff0c18 609 delayConfig.afterTransferPre = 0x1;
mbed_official 146:f64d43ff0c18 610 delayConfig.afterTransfer = 0x5;
mbed_official 146:f64d43ff0c18 611 dspi_hal_configure_delays(instance, kDspiCtar0, &delayConfig);
mbed_official 146:f64d43ff0c18 612 * @endcode
mbed_official 146:f64d43ff0c18 613 *
mbed_official 146:f64d43ff0c18 614 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 615 * @param whichCtar The desired Clock and Transfer Attributes Register (CTAR) of type
mbed_official 146:f64d43ff0c18 616 * dspi_ctar_selection_t.
mbed_official 146:f64d43ff0c18 617 * @param config Pointer to a structure containing the user defined delay configuration settings.
mbed_official 146:f64d43ff0c18 618 */
mbed_official 146:f64d43ff0c18 619 void dspi_hal_configure_delays(uint32_t instance,
mbed_official 146:f64d43ff0c18 620 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 621 const dspi_delay_settings_config_t * config);
mbed_official 146:f64d43ff0c18 622
mbed_official 146:f64d43ff0c18 623 /*@}*/
mbed_official 146:f64d43ff0c18 624
mbed_official 146:f64d43ff0c18 625 /*!
mbed_official 146:f64d43ff0c18 626 * @name DMA
mbed_official 146:f64d43ff0c18 627 * @{
mbed_official 146:f64d43ff0c18 628 */
mbed_official 146:f64d43ff0c18 629
mbed_official 146:f64d43ff0c18 630 /*!
mbed_official 146:f64d43ff0c18 631 * @brief Configures transmit and receive DMA requests.
mbed_official 146:f64d43ff0c18 632 *
mbed_official 146:f64d43ff0c18 633 * This function configures the FIFOs to generate a DMA or an interrupt request. Note that the
mbed_official 146:f64d43ff0c18 634 * corresponding request enable must also be set. For the Transmit FIFO Fill, in order
mbed_official 146:f64d43ff0c18 635 * to generate a DMA request, the Transmit FIFO Fill Request Enable (TFFF_RE) must also be set.
mbed_official 146:f64d43ff0c18 636 * Similarly for the Receive FIFO Drain Request, to generate a DMA request, the Receive FIFO Drain
mbed_official 146:f64d43ff0c18 637 * Request Enable (RFDF_RE) must also be set. These requests can be configured with
mbed_official 146:f64d43ff0c18 638 * the function dspi_hal_configure_interrupt(). To enable DMA operation, first enable
mbed_official 146:f64d43ff0c18 639 * the desired request enable by using the dspi_hal_configure_interrupt() function and then use
mbed_official 146:f64d43ff0c18 640 * the dspi_hal_configure_dma() to configure the request and generate a DMA request.
mbed_official 146:f64d43ff0c18 641 *
mbed_official 146:f64d43ff0c18 642 * @param enableTransmit Configures Tx FIFO fill request to generate a DMA or interrupt request
mbed_official 146:f64d43ff0c18 643 * @param enableReceive Configures Rx FIFO fill request to generate a DMA or interrupt request
mbed_official 146:f64d43ff0c18 644 */
mbed_official 146:f64d43ff0c18 645 void dspi_hal_configure_dma(uint32_t instance, bool enableTransmit, bool enableReceive);
mbed_official 146:f64d43ff0c18 646
mbed_official 146:f64d43ff0c18 647 /*@}*/
mbed_official 146:f64d43ff0c18 648
mbed_official 146:f64d43ff0c18 649 /*!
mbed_official 146:f64d43ff0c18 650 * @name Low power
mbed_official 146:f64d43ff0c18 651 * @{
mbed_official 146:f64d43ff0c18 652 */
mbed_official 146:f64d43ff0c18 653
mbed_official 146:f64d43ff0c18 654 /*!
mbed_official 146:f64d43ff0c18 655 * @brief Configures the DSPI operation during doze mode.
mbed_official 146:f64d43ff0c18 656 *
mbed_official 146:f64d43ff0c18 657 * This function provides support for an externally controlled doze mode, power-saving, mechanism.
mbed_official 146:f64d43ff0c18 658 * When disabled, the doze mode has no effect on the DSPI, and when enabled, the Doze mode
mbed_official 146:f64d43ff0c18 659 * disables the DSPI.
mbed_official 146:f64d43ff0c18 660 *
mbed_official 146:f64d43ff0c18 661 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 662 * @param enable If disabled (false), the doze mode has no effect on the DSPI, if enabled (true), the doze mode
mbed_official 146:f64d43ff0c18 663 * disables the DSPI.
mbed_official 146:f64d43ff0c18 664 */
mbed_official 146:f64d43ff0c18 665 static inline void dspi_hal_configure_doze_mode(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 666 {
mbed_official 146:f64d43ff0c18 667 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 668 BW_SPI_MCR_DOZE(instance, (enable == true));
mbed_official 146:f64d43ff0c18 669 }
mbed_official 146:f64d43ff0c18 670
mbed_official 146:f64d43ff0c18 671 /*@}*/
mbed_official 146:f64d43ff0c18 672
mbed_official 146:f64d43ff0c18 673 /*!
mbed_official 146:f64d43ff0c18 674 * @name Interrupts
mbed_official 146:f64d43ff0c18 675 * @{
mbed_official 146:f64d43ff0c18 676 */
mbed_official 146:f64d43ff0c18 677
mbed_official 146:f64d43ff0c18 678 /*!
mbed_official 146:f64d43ff0c18 679 * @brief Configures the DSPI interrupts.
mbed_official 146:f64d43ff0c18 680 *
mbed_official 146:f64d43ff0c18 681 * This function configures the various interrupt sources of the DSPI. The parameters are instance, interrupt source, and enable/disable setting.
mbed_official 146:f64d43ff0c18 682 * The interrupt source is a typedef enum whose value is the bit position of the
mbed_official 146:f64d43ff0c18 683 * interrupt source setting within the RSER register. In the DSPI, all interrupt
mbed_official 146:f64d43ff0c18 684 * configuration settings are in one register. The typedef enum equates each
mbed_official 146:f64d43ff0c18 685 * interrupt source to the bit position defined in the device header file.
mbed_official 146:f64d43ff0c18 686 * The function uses these bit positions in its algorithm to enable/disable the
mbed_official 146:f64d43ff0c18 687 * interrupt source, where interrupt source is the dspi_status_and_interrupt_request_t type.
mbed_official 146:f64d43ff0c18 688 * @code
mbed_official 146:f64d43ff0c18 689 temp = (HW_SPI_RSER_RD(instance) & ~interruptSrc) | (enable << interruptSrc);
mbed_official 146:f64d43ff0c18 690 HW_SPI_RSER_WR(instance, temp);
mbed_official 146:f64d43ff0c18 691
mbed_official 146:f64d43ff0c18 692 dspi_hal_configure_interrupt(instance, kDspiTxComplete, true); <- example use-case
mbed_official 146:f64d43ff0c18 693 * @endcode
mbed_official 146:f64d43ff0c18 694 *
mbed_official 146:f64d43ff0c18 695 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 696 * @param interruptSrc The interrupt source, of type dspi_status_and_interrupt_request_t
mbed_official 146:f64d43ff0c18 697 * @param enable Enable (true) or disable (false) the interrupt source to generate requests
mbed_official 146:f64d43ff0c18 698 */
mbed_official 146:f64d43ff0c18 699 void dspi_hal_configure_interrupt(uint32_t instance,
mbed_official 146:f64d43ff0c18 700 dspi_status_and_interrupt_request_t interruptSrc,
mbed_official 146:f64d43ff0c18 701 bool enable);
mbed_official 146:f64d43ff0c18 702
mbed_official 146:f64d43ff0c18 703
mbed_official 146:f64d43ff0c18 704 /*!
mbed_official 146:f64d43ff0c18 705 * @brief Gets the DSPI interrupt configuration, returns if interrupt request is enabled or disabled.
mbed_official 146:f64d43ff0c18 706 *
mbed_official 146:f64d43ff0c18 707 * This function returns the requested interrupt source setting (enabled or disabled, of
mbed_official 146:f64d43ff0c18 708 * type bool). The parameters to pass in are instance and interrupt source. It utilizes the
mbed_official 146:f64d43ff0c18 709 * same enum definitions for the interrupt sources as described in the "interrupt configuration"
mbed_official 146:f64d43ff0c18 710 * function. The function uses these bit positions in its algorithm to obtain the desired
mbed_official 146:f64d43ff0c18 711 * interrupt source setting.
mbed_official 146:f64d43ff0c18 712 * @code
mbed_official 146:f64d43ff0c18 713 return ((HW_SPI_RSER_RD(instance) & interruptSrc) >> interruptSrc);
mbed_official 146:f64d43ff0c18 714
mbed_official 146:f64d43ff0c18 715 getInterruptSetting = dspi_hal_get_interrupt_config(instance, kDspiTxComplete);
mbed_official 146:f64d43ff0c18 716 * @endcode
mbed_official 146:f64d43ff0c18 717 *
mbed_official 146:f64d43ff0c18 718 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 719 * @param interruptSrc The interrupt source, of type dspi_status_and_interrupt_request_t
mbed_official 146:f64d43ff0c18 720 * @return Configuration of interrupt request: enable (true) or disable (false).
mbed_official 146:f64d43ff0c18 721 */
mbed_official 146:f64d43ff0c18 722 static inline bool dspi_hal_get_interrupt_config(uint32_t instance,
mbed_official 146:f64d43ff0c18 723 dspi_status_and_interrupt_request_t interruptSrc)
mbed_official 146:f64d43ff0c18 724 {
mbed_official 146:f64d43ff0c18 725 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 726 return ((HW_SPI_RSER_RD(instance) >> interruptSrc) & 0x1);
mbed_official 146:f64d43ff0c18 727 }
mbed_official 146:f64d43ff0c18 728
mbed_official 146:f64d43ff0c18 729 /*@}*/
mbed_official 146:f64d43ff0c18 730
mbed_official 146:f64d43ff0c18 731 /*!
mbed_official 146:f64d43ff0c18 732 * @name Status
mbed_official 146:f64d43ff0c18 733 * @{
mbed_official 146:f64d43ff0c18 734 */
mbed_official 146:f64d43ff0c18 735
mbed_official 146:f64d43ff0c18 736 /*!
mbed_official 146:f64d43ff0c18 737 * @brief Gets the DSPI status flag state.
mbed_official 146:f64d43ff0c18 738 *
mbed_official 146:f64d43ff0c18 739 * The status flag is defined in the same enum as the interrupt source enable because the bit
mbed_official 146:f64d43ff0c18 740 * position of the interrupt source and corresponding status flag are the same in the RSER and
mbed_official 146:f64d43ff0c18 741 * SR registers. The function uses these bit positions in its algorithm to obtain the desired
mbed_official 146:f64d43ff0c18 742 * flag state, similar to the dspi_get_interrupt_config function.
mbed_official 146:f64d43ff0c18 743 * @code
mbed_official 146:f64d43ff0c18 744 return ((HW_SPI_SR_RD(instance) & statusFlag) >> statusFlag);
mbed_official 146:f64d43ff0c18 745
mbed_official 146:f64d43ff0c18 746 getStatus = dspi_hal_get_status_flag(instance, kDspiTxComplete);
mbed_official 146:f64d43ff0c18 747 * @endcode
mbed_official 146:f64d43ff0c18 748 *
mbed_official 146:f64d43ff0c18 749 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 750 * @param statusFlag The status flag, of type dspi_status_and_interrupt_request_t
mbed_official 146:f64d43ff0c18 751 * @return State of the status flag: asserted (true) or not-asserted (false)
mbed_official 146:f64d43ff0c18 752 */
mbed_official 146:f64d43ff0c18 753 static inline bool dspi_hal_get_status_flag(uint32_t instance,
mbed_official 146:f64d43ff0c18 754 dspi_status_and_interrupt_request_t statusFlag)
mbed_official 146:f64d43ff0c18 755 {
mbed_official 146:f64d43ff0c18 756 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 757 return ((HW_SPI_SR_RD(instance) >> statusFlag) & 0x1);
mbed_official 146:f64d43ff0c18 758 }
mbed_official 146:f64d43ff0c18 759
mbed_official 146:f64d43ff0c18 760 /*!
mbed_official 146:f64d43ff0c18 761 * @brief Clears the DSPI status flag.
mbed_official 146:f64d43ff0c18 762 *
mbed_official 146:f64d43ff0c18 763 * This function clears the desired status bit by using a write-1-to-clear. The user passes in
mbed_official 146:f64d43ff0c18 764 * the instance and the desired status bit to clear. The list of status bits is defined in the
mbed_official 146:f64d43ff0c18 765 * dspi_status_and_interrupt_request_t. The function uses these bit positions in its algorithm
mbed_official 146:f64d43ff0c18 766 * to clear the desired flag state. It uses this macro:
mbed_official 146:f64d43ff0c18 767 * @code
mbed_official 146:f64d43ff0c18 768 HW_SPI_SR_WR(instance, statusFlag);
mbed_official 146:f64d43ff0c18 769
mbed_official 146:f64d43ff0c18 770 dspi_hal_clear_status_flag(instance, kDspiTxComplete);
mbed_official 146:f64d43ff0c18 771 * @endcode
mbed_official 146:f64d43ff0c18 772 *
mbed_official 146:f64d43ff0c18 773 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 774 * @param statusFlag The status flag, of type dspi_status_and_interrupt_request_t
mbed_official 146:f64d43ff0c18 775 */
mbed_official 146:f64d43ff0c18 776 static inline void dspi_hal_clear_status_flag(uint32_t instance,
mbed_official 146:f64d43ff0c18 777 dspi_status_and_interrupt_request_t statusFlag)
mbed_official 146:f64d43ff0c18 778 {
mbed_official 146:f64d43ff0c18 779 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 780 HW_SPI_SR_SET(instance, (0x1U << statusFlag));
mbed_official 146:f64d43ff0c18 781 }
mbed_official 146:f64d43ff0c18 782
mbed_official 146:f64d43ff0c18 783
mbed_official 146:f64d43ff0c18 784 /*!
mbed_official 146:f64d43ff0c18 785 * @brief Gets the DSPI FIFO counter or pointer.
mbed_official 146:f64d43ff0c18 786 *
mbed_official 146:f64d43ff0c18 787 * This function returns the number of entries or the next pointer in the Tx or Rx FIFO.
mbed_official 146:f64d43ff0c18 788 * The parameters to pass in are the instance and either the Tx or Rx FIFO counter or a
mbed_official 146:f64d43ff0c18 789 * pointer. The latter is an enum type defined as the bitmask of
mbed_official 146:f64d43ff0c18 790 * those particular bit fields found in the device header file. For example:
mbed_official 146:f64d43ff0c18 791 * @code
mbed_official 146:f64d43ff0c18 792 return ((HW_SPI_SR_RD(instance) >> desiredParamter) & 0xF);
mbed_official 146:f64d43ff0c18 793
mbed_official 146:f64d43ff0c18 794 dspi_hal_get_fifo_counter_or_pointer(instance, kDspiRxFifoCounter);
mbed_official 146:f64d43ff0c18 795 * @endcode
mbed_official 146:f64d43ff0c18 796 *
mbed_official 146:f64d43ff0c18 797 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 798 * @param desiredParameter Desired parameter to obtain, of type dspi_fifo_counter_pointer_t
mbed_official 146:f64d43ff0c18 799 */
mbed_official 146:f64d43ff0c18 800 static inline uint32_t dspi_hal_get_fifo_counter_or_pointer(uint32_t instance,
mbed_official 146:f64d43ff0c18 801 dspi_fifo_counter_pointer_t desiredParameter)
mbed_official 146:f64d43ff0c18 802 {
mbed_official 146:f64d43ff0c18 803 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 804 return ((HW_SPI_SR_RD(instance) >> desiredParameter) & 0xFU);
mbed_official 146:f64d43ff0c18 805 }
mbed_official 146:f64d43ff0c18 806
mbed_official 146:f64d43ff0c18 807
mbed_official 146:f64d43ff0c18 808 /*@}*/
mbed_official 146:f64d43ff0c18 809
mbed_official 146:f64d43ff0c18 810 /*!
mbed_official 146:f64d43ff0c18 811 * @name Data transfer
mbed_official 146:f64d43ff0c18 812 * @{
mbed_official 146:f64d43ff0c18 813 */
mbed_official 146:f64d43ff0c18 814
mbed_official 146:f64d43ff0c18 815 /*!
mbed_official 146:f64d43ff0c18 816 * @brief Reads data from the data buffer.
mbed_official 146:f64d43ff0c18 817 *
mbed_official 146:f64d43ff0c18 818 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 819 */
mbed_official 146:f64d43ff0c18 820 static inline uint32_t dspi_hal_read_data(uint32_t instance)
mbed_official 146:f64d43ff0c18 821 {
mbed_official 146:f64d43ff0c18 822 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 823 return HW_SPI_POPR_RD(instance);
mbed_official 146:f64d43ff0c18 824 }
mbed_official 146:f64d43ff0c18 825
mbed_official 146:f64d43ff0c18 826 /*!
mbed_official 146:f64d43ff0c18 827 * @brief Writes data into the data buffer, slave mode.
mbed_official 146:f64d43ff0c18 828 *
mbed_official 146:f64d43ff0c18 829 * In slave mode, up to 32-bit words may be written.
mbed_official 146:f64d43ff0c18 830 *
mbed_official 146:f64d43ff0c18 831 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 832 * @param data The data to send
mbed_official 146:f64d43ff0c18 833 */
mbed_official 146:f64d43ff0c18 834 static inline void dspi_hal_write_data_slave_mode(uint32_t instance, uint32_t data)
mbed_official 146:f64d43ff0c18 835 {
mbed_official 146:f64d43ff0c18 836 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 837 HW_SPI_PUSHR_SLAVE_WR(instance, data);
mbed_official 146:f64d43ff0c18 838 }
mbed_official 146:f64d43ff0c18 839
mbed_official 146:f64d43ff0c18 840 /*!
mbed_official 146:f64d43ff0c18 841 * @brief Writes data into the data buffer, master mode.
mbed_official 146:f64d43ff0c18 842 *
mbed_official 146:f64d43ff0c18 843 * In master mode, the 16-bit data is appended to the 16-bit command info. The command portion
mbed_official 146:f64d43ff0c18 844 * provides characteristics of the data such as: optional continuous chip select
mbed_official 146:f64d43ff0c18 845 * operation between transfers, the desired Clock and Transfer Attributes register to use for the
mbed_official 146:f64d43ff0c18 846 * associated SPI frame, the desired PCS signal to use for the data transfer, whether the current
mbed_official 146:f64d43ff0c18 847 * transfer is the last in the queue, and whether to clear the transfer count (normally needed when
mbed_official 146:f64d43ff0c18 848 * sending the first frame of a data packet). This is an example:
mbed_official 146:f64d43ff0c18 849 * @code
mbed_official 146:f64d43ff0c18 850 dspi_command_config_t commandConfig;
mbed_official 146:f64d43ff0c18 851 commandConfig.isChipSelectContinuous = true;
mbed_official 146:f64d43ff0c18 852 commandConfig.whichCtar = kDspiCtar0;
mbed_official 146:f64d43ff0c18 853 commandConfig.whichPcs = kDspiPcs1;
mbed_official 146:f64d43ff0c18 854 commandConfig.clearTransferCount = false;
mbed_official 146:f64d43ff0c18 855 commandConfig.isEndOfQueue = false;
mbed_official 146:f64d43ff0c18 856 dspi_hal_write_data_master_mode(instance, &commandConfig, dataWord);
mbed_official 146:f64d43ff0c18 857 * endcode
mbed_official 146:f64d43ff0c18 858 *
mbed_official 146:f64d43ff0c18 859 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 860 * @param command Pointer to command structure
mbed_official 146:f64d43ff0c18 861 * @param data The data word to be sent
mbed_official 146:f64d43ff0c18 862 */
mbed_official 146:f64d43ff0c18 863 void dspi_hal_write_data_master_mode(uint32_t instance,
mbed_official 146:f64d43ff0c18 864 dspi_command_config_t * command,
mbed_official 146:f64d43ff0c18 865 uint16_t data);
mbed_official 146:f64d43ff0c18 866
mbed_official 146:f64d43ff0c18 867 /*!
mbed_official 146:f64d43ff0c18 868 * @brief Gets the transfer count.
mbed_official 146:f64d43ff0c18 869 *
mbed_official 146:f64d43ff0c18 870 * This function returns the current value of the DSPI Transfer Count Register.
mbed_official 146:f64d43ff0c18 871 *
mbed_official 146:f64d43ff0c18 872 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 873 * @return The current transfer count
mbed_official 146:f64d43ff0c18 874 */
mbed_official 146:f64d43ff0c18 875 static inline uint32_t dspi_hal_get_transfer_count(uint32_t instance)
mbed_official 146:f64d43ff0c18 876 {
mbed_official 146:f64d43ff0c18 877 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 878 return BR_SPI_TCR_SPI_TCNT(instance);
mbed_official 146:f64d43ff0c18 879 }
mbed_official 146:f64d43ff0c18 880
mbed_official 146:f64d43ff0c18 881 /*!
mbed_official 146:f64d43ff0c18 882 * @brief Pre-sets the transfer count.
mbed_official 146:f64d43ff0c18 883 *
mbed_official 146:f64d43ff0c18 884 * This function allows the caller to pre-set the DSI Transfer Count Register to a desired value up
mbed_official 146:f64d43ff0c18 885 * to 65535; Incrementing past this resets the counter back to 0.
mbed_official 146:f64d43ff0c18 886 *
mbed_official 146:f64d43ff0c18 887 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 888 * @param presetValue The desired pre-set value for the transfer counter
mbed_official 146:f64d43ff0c18 889 */
mbed_official 146:f64d43ff0c18 890 static inline void dspi_hal_preset_transfer_count(uint32_t instance, uint16_t presetValue)
mbed_official 146:f64d43ff0c18 891 {
mbed_official 146:f64d43ff0c18 892 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 893 BW_SPI_TCR_SPI_TCNT(instance, presetValue);
mbed_official 146:f64d43ff0c18 894 }
mbed_official 146:f64d43ff0c18 895
mbed_official 146:f64d43ff0c18 896 /*@}*/
mbed_official 146:f64d43ff0c18 897
mbed_official 146:f64d43ff0c18 898 /*!
mbed_official 146:f64d43ff0c18 899 * @name Debug
mbed_official 146:f64d43ff0c18 900 * @{
mbed_official 146:f64d43ff0c18 901 */
mbed_official 146:f64d43ff0c18 902
mbed_official 146:f64d43ff0c18 903 /*!
mbed_official 146:f64d43ff0c18 904 * @brief Read FIFO registers for debug purposes.
mbed_official 146:f64d43ff0c18 905 *
mbed_official 146:f64d43ff0c18 906 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 907 * @param whichFifo Selects Tx or Rx FIFO, of type dspi_fifo_t.
mbed_official 146:f64d43ff0c18 908 * @param whichFifoEntry Selects which FIFO entry to read: 0, 1, 2, or 3.
mbed_official 146:f64d43ff0c18 909 * @retrun The desired FIFO register contents
mbed_official 146:f64d43ff0c18 910 */
mbed_official 146:f64d43ff0c18 911 uint32_t dspi_hal_get_fifo_data(uint32_t instance, dspi_fifo_t whichFifo, uint32_t whichFifoEntry);
mbed_official 146:f64d43ff0c18 912
mbed_official 146:f64d43ff0c18 913 /*!
mbed_official 146:f64d43ff0c18 914 * @brief Configures the DSPI to halt during debug mode.
mbed_official 146:f64d43ff0c18 915 *
mbed_official 146:f64d43ff0c18 916 * @param instance Module instance number
mbed_official 146:f64d43ff0c18 917 * @param enable Enables (true) debug mode to halt transfers, else disable to not halt transfer
mbed_official 146:f64d43ff0c18 918 * in debug mode.
mbed_official 146:f64d43ff0c18 919 */
mbed_official 146:f64d43ff0c18 920 static inline void dspi_hal_configure_halt_in_debug_mode(uint32_t instance, bool enable)
mbed_official 146:f64d43ff0c18 921 {
mbed_official 146:f64d43ff0c18 922 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 923 BW_SPI_MCR_FRZ(instance, (enable == true));
mbed_official 146:f64d43ff0c18 924 }
mbed_official 146:f64d43ff0c18 925
mbed_official 146:f64d43ff0c18 926 /* @}*/
mbed_official 146:f64d43ff0c18 927
mbed_official 146:f64d43ff0c18 928 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 929 }
mbed_official 146:f64d43ff0c18 930 #endif
mbed_official 146:f64d43ff0c18 931
mbed_official 146:f64d43ff0c18 932 /*! @}*/
mbed_official 146:f64d43ff0c18 933
mbed_official 146:f64d43ff0c18 934 #endif /* __FSL_DSPI_HAL_H__*/
mbed_official 146:f64d43ff0c18 935 /*******************************************************************************
mbed_official 146:f64d43ff0c18 936 * EOF
mbed_official 146:f64d43ff0c18 937 ******************************************************************************/
mbed_official 146:f64d43ff0c18 938