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mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_GCC_CR/LPC1768.ld@628:d925a6dbb7c8, 2015-09-28 (annotated)

Committer:
mbed_official
Date:
Mon Sep 28 06:30:09 2015 +0100
Revision:
628:d925a6dbb7c8
Parent:
67:78dfdb5b4d9e 
Synchronized with git revision 6e52baedf0dc432749ab3f064b65587fd1bd76f6



Full URL: https://github.com/mbedmicro/mbed/commit/6e52baedf0dc432749ab3f064b65587fd1bd76f6/



Support microbit BOOT and OTA modes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed - LPC1768 linker script
emilmont 10:3bc89ef62ce7 2 * Based linker script generated by Code Red Technologies Red Suite 4.1
emilmont 10:3bc89ef62ce7 3 */
emilmont 10:3bc89ef62ce7 4 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
emilmont 10:3bc89ef62ce7 5
emilmont 10:3bc89ef62ce7 6 MEMORY
emilmont 10:3bc89ef62ce7 7 {
emilmont 10:3bc89ef62ce7 8 /* Define each memory region */
emilmont 10:3bc89ef62ce7 9 MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */
emilmont 10:3bc89ef62ce7 10 RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */
mbed_official 628:d925a6dbb7c8 11 RamAHB_USB (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x4000 /* 16k */
mbed_official 628:d925a6dbb7c8 12 RamAHB_Eth (rwx) : ORIGIN = 0x20080000, LENGTH = 0x4000 /* 16k */
emilmont 10:3bc89ef62ce7 13
emilmont 10:3bc89ef62ce7 14 }
emilmont 10:3bc89ef62ce7 15 /* Define a symbol for the top of each memory region */
emilmont 10:3bc89ef62ce7 16 __top_MFlash512 = 0x0 + 0x80000;
emilmont 10:3bc89ef62ce7 17 __top_RamLoc32 = 0x10000000 + 0x8000;
emilmont 10:3bc89ef62ce7 18 __top_RamAHB32 = 0x2007c000 + 0x8000;
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 ENTRY(ResetISR)
emilmont 10:3bc89ef62ce7 21
emilmont 10:3bc89ef62ce7 22 SECTIONS
emilmont 10:3bc89ef62ce7 23 {
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 /* MAIN TEXT SECTION */
emilmont 10:3bc89ef62ce7 26 .text : ALIGN(4)
emilmont 10:3bc89ef62ce7 27 {
emilmont 10:3bc89ef62ce7 28 FILL(0xff)
emilmont 10:3bc89ef62ce7 29 KEEP(*(.isr_vector))
emilmont 10:3bc89ef62ce7 30
emilmont 10:3bc89ef62ce7 31 /* Global Section Table */
emilmont 10:3bc89ef62ce7 32 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 33 __section_table_start = .;
emilmont 10:3bc89ef62ce7 34 __data_section_table = .;
emilmont 10:3bc89ef62ce7 35 LONG(LOADADDR(.data));
emilmont 10:3bc89ef62ce7 36 LONG( ADDR(.data)) ;
emilmont 10:3bc89ef62ce7 37 LONG( SIZEOF(.data));
emilmont 10:3bc89ef62ce7 38 LONG(LOADADDR(.data_RAM2));
emilmont 10:3bc89ef62ce7 39 LONG( ADDR(.data_RAM2)) ;
emilmont 10:3bc89ef62ce7 40 LONG( SIZEOF(.data_RAM2));
emilmont 10:3bc89ef62ce7 41 __data_section_table_end = .;
emilmont 10:3bc89ef62ce7 42 __bss_section_table = .;
emilmont 10:3bc89ef62ce7 43 LONG( ADDR(.bss));
emilmont 10:3bc89ef62ce7 44 LONG( SIZEOF(.bss));
emilmont 10:3bc89ef62ce7 45 LONG( ADDR(.bss_RAM2));
emilmont 10:3bc89ef62ce7 46 LONG( SIZEOF(.bss_RAM2));
emilmont 10:3bc89ef62ce7 47 __bss_section_table_end = .;
emilmont 10:3bc89ef62ce7 48 __section_table_end = . ;
emilmont 10:3bc89ef62ce7 49 /* End of Global Section Table */
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51
emilmont 10:3bc89ef62ce7 52 *(.after_vectors*)
emilmont 10:3bc89ef62ce7 53
emilmont 10:3bc89ef62ce7 54 *(.text*)
emilmont 10:3bc89ef62ce7 55 *(.rodata .rodata.*)
emilmont 10:3bc89ef62ce7 56 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 57
emilmont 10:3bc89ef62ce7 58 /* C++ constructors etc */
emilmont 10:3bc89ef62ce7 59 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 60 KEEP(*(.init))
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 63 __preinit_array_start = .;
emilmont 10:3bc89ef62ce7 64 KEEP (*(.preinit_array))
emilmont 10:3bc89ef62ce7 65 __preinit_array_end = .;
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 68 __init_array_start = .;
emilmont 10:3bc89ef62ce7 69 KEEP (*(SORT(.init_array.*)))
emilmont 10:3bc89ef62ce7 70 KEEP (*(.init_array))
emilmont 10:3bc89ef62ce7 71 __init_array_end = .;
emilmont 10:3bc89ef62ce7 72
emilmont 10:3bc89ef62ce7 73 KEEP(*(.fini));
emilmont 10:3bc89ef62ce7 74
emilmont 10:3bc89ef62ce7 75 . = ALIGN(0x4);
emilmont 10:3bc89ef62ce7 76 KEEP (*crtbegin.o(.ctors))
emilmont 10:3bc89ef62ce7 77 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
emilmont 10:3bc89ef62ce7 78 KEEP (*(SORT(.ctors.*)))
emilmont 10:3bc89ef62ce7 79 KEEP (*crtend.o(.ctors))
emilmont 10:3bc89ef62ce7 80
emilmont 10:3bc89ef62ce7 81 . = ALIGN(0x4);
emilmont 10:3bc89ef62ce7 82 KEEP (*crtbegin.o(.dtors))
emilmont 10:3bc89ef62ce7 83 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
emilmont 10:3bc89ef62ce7 84 KEEP (*(SORT(.dtors.*)))
emilmont 10:3bc89ef62ce7 85 KEEP (*crtend.o(.dtors))
emilmont 10:3bc89ef62ce7 86 /* End C++ */
emilmont 10:3bc89ef62ce7 87 } > MFlash512
emilmont 10:3bc89ef62ce7 88
emilmont 10:3bc89ef62ce7 89 /*
emilmont 10:3bc89ef62ce7 90 * for exception handling/unwind - some Newlib functions (in common
emilmont 10:3bc89ef62ce7 91 * with C++ and STDC++) use this.
emilmont 10:3bc89ef62ce7 92 */
emilmont 10:3bc89ef62ce7 93 .ARM.extab : ALIGN(4)
emilmont 10:3bc89ef62ce7 94 {
emilmont 10:3bc89ef62ce7 95 *(.ARM.extab* .gnu.linkonce.armextab.*)
emilmont 10:3bc89ef62ce7 96 } > MFlash512
emilmont 10:3bc89ef62ce7 97 __exidx_start = .;
emilmont 10:3bc89ef62ce7 98
emilmont 10:3bc89ef62ce7 99 .ARM.exidx : ALIGN(4)
emilmont 10:3bc89ef62ce7 100 {
emilmont 10:3bc89ef62ce7 101 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
emilmont 10:3bc89ef62ce7 102 } > MFlash512
emilmont 10:3bc89ef62ce7 103 __exidx_end = .;
emilmont 10:3bc89ef62ce7 104
emilmont 10:3bc89ef62ce7 105 _etext = .;
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 .data_RAM2 : ALIGN(4)
emilmont 10:3bc89ef62ce7 109 {
emilmont 10:3bc89ef62ce7 110 FILL(0xff)
emilmont 10:3bc89ef62ce7 111 *(.data.$RAM2*)
emilmont 10:3bc89ef62ce7 112 *(.data.$RamAHB32*)
emilmont 10:3bc89ef62ce7 113 . = ALIGN(4) ;
mbed_official 628:d925a6dbb7c8 114 } > RamAHB_USB AT>MFlash512
emilmont 10:3bc89ef62ce7 115
emilmont 10:3bc89ef62ce7 116 /* MAIN DATA SECTION */
emilmont 10:3bc89ef62ce7 117
mbed_official 628:d925a6dbb7c8 118 .uninit_RESERVED(NOLOAD) : ALIGN(4)
emilmont 10:3bc89ef62ce7 119 {
emilmont 10:3bc89ef62ce7 120 KEEP(*(.bss.$RESERVED*))
emilmont 10:3bc89ef62ce7 121 } > RamLoc32
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123 .data : ALIGN(4)
emilmont 10:3bc89ef62ce7 124 {
emilmont 10:3bc89ef62ce7 125 FILL(0xff)
emilmont 10:3bc89ef62ce7 126 _data = .;
emilmont 10:3bc89ef62ce7 127 *(vtable)
emilmont 10:3bc89ef62ce7 128 *(.data*)
emilmont 10:3bc89ef62ce7 129 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 130 _edata = .;
emilmont 10:3bc89ef62ce7 131 } > RamLoc32 AT>MFlash512
emilmont 10:3bc89ef62ce7 132
emilmont 10:3bc89ef62ce7 133
mbed_official 628:d925a6dbb7c8 134 .bss_RAM2(NOLOAD) : ALIGN(4)
emilmont 10:3bc89ef62ce7 135 {
emilmont 10:3bc89ef62ce7 136 *(.bss.$RAM2*)
emilmont 10:3bc89ef62ce7 137 *(.bss.$RamAHB32*)
mbed_official 628:d925a6dbb7c8 138 *(AHBSRAM0)
emilmont 10:3bc89ef62ce7 139 . = ALIGN(4) ;
mbed_official 628:d925a6dbb7c8 140 } > RamAHB_USB
emilmont 10:3bc89ef62ce7 141
mbed_official 628:d925a6dbb7c8 142 .bss_RAM3(NOLOAD) : ALIGN(4)
mbed_official 628:d925a6dbb7c8 143 {
mbed_official 628:d925a6dbb7c8 144 *(AHBSRAM1)
mbed_official 628:d925a6dbb7c8 145 . = ALIGN(4) ;
mbed_official 628:d925a6dbb7c8 146 } > RamAHB_Eth
emilmont 10:3bc89ef62ce7 147 /* MAIN BSS SECTION */
mbed_official 628:d925a6dbb7c8 148 .bss(NOLOAD) : ALIGN(4)
emilmont 10:3bc89ef62ce7 149 {
emilmont 10:3bc89ef62ce7 150 _bss = .;
emilmont 10:3bc89ef62ce7 151 *(.bss*)
emilmont 10:3bc89ef62ce7 152 *(COMMON)
emilmont 10:3bc89ef62ce7 153 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 154 _ebss = .;
emilmont 10:3bc89ef62ce7 155 PROVIDE(end = .);
mbed_official 67:78dfdb5b4d9e 156 __end__ = .;
emilmont 10:3bc89ef62ce7 157 } > RamLoc32
emilmont 10:3bc89ef62ce7 158
emilmont 10:3bc89ef62ce7 159 PROVIDE(_pvHeapStart = .);
emilmont 10:3bc89ef62ce7 160 PROVIDE(_vStackTop = __top_RamLoc32 - 0);
emilmont 10:3bc89ef62ce7 161 }