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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.h@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_dma2d.h
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 87:085cde657901 7 * @brief Header file of DMA2D HAL module.
mbed_official 87:085cde657901 8 ******************************************************************************
mbed_official 87:085cde657901 9 * @attention
mbed_official 87:085cde657901 10 *
mbed_official 532:fe11edbda85c 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 12 *
mbed_official 87:085cde657901 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 14 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 16 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 19 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 21 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 22 * without specific prior written permission.
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 34 *
mbed_official 87:085cde657901 35 ******************************************************************************
mbed_official 87:085cde657901 36 */
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 87:085cde657901 39 #ifndef __STM32F4xx_HAL_DMA2D_H
mbed_official 87:085cde657901 40 #define __STM32F4xx_HAL_DMA2D_H
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 #ifdef __cplusplus
mbed_official 87:085cde657901 43 extern "C" {
mbed_official 87:085cde657901 44 #endif
mbed_official 87:085cde657901 45
mbed_official 106:ced8cbb51063 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 47 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 48 #include "stm32f4xx_hal_def.h"
mbed_official 87:085cde657901 49
mbed_official 87:085cde657901 50 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 51 * @{
mbed_official 87:085cde657901 52 */
mbed_official 87:085cde657901 53
mbed_official 532:fe11edbda85c 54 /** @defgroup DMA2D DMA2D
mbed_official 532:fe11edbda85c 55 * @brief DMA2D HAL module driver
mbed_official 87:085cde657901 56 * @{
mbed_official 532:fe11edbda85c 57 */
mbed_official 532:fe11edbda85c 58
mbed_official 87:085cde657901 59 /* Exported types ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 60 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
mbed_official 532:fe11edbda85c 61 * @{
mbed_official 532:fe11edbda85c 62 */
mbed_official 87:085cde657901 63 #define MAX_DMA2D_LAYER 2
mbed_official 226:b062af740e40 64
mbed_official 87:085cde657901 65 /**
mbed_official 226:b062af740e40 66 * @brief DMA2D color Structure definition
mbed_official 87:085cde657901 67 */
mbed_official 87:085cde657901 68 typedef struct
mbed_official 87:085cde657901 69 {
mbed_official 87:085cde657901 70 uint32_t Blue; /*!< Configures the blue value.
mbed_official 87:085cde657901 71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
mbed_official 87:085cde657901 72
mbed_official 226:b062af740e40 73 uint32_t Green; /*!< Configures the green value.
mbed_official 87:085cde657901 74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
mbed_official 226:b062af740e40 75
mbed_official 226:b062af740e40 76 uint32_t Red; /*!< Configures the red value.
mbed_official 87:085cde657901 77 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
mbed_official 87:085cde657901 78 } DMA2D_ColorTypeDef;
mbed_official 87:085cde657901 79
mbed_official 87:085cde657901 80 /**
mbed_official 226:b062af740e40 81 * @brief DMA2D CLUT Structure definition
mbed_official 87:085cde657901 82 */
mbed_official 87:085cde657901 83 typedef struct
mbed_official 87:085cde657901 84 {
mbed_official 226:b062af740e40 85 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
mbed_official 87:085cde657901 86
mbed_official 226:b062af740e40 87 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
mbed_official 87:085cde657901 88 This parameter can be one value of @ref DMA2D_CLUT_CM */
mbed_official 226:b062af740e40 89
mbed_official 87:085cde657901 90 uint32_t Size; /*!< configures the DMA2D CLUT size.
mbed_official 226:b062af740e40 91 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
mbed_official 87:085cde657901 92 } DMA2D_CLUTCfgTypeDef;
mbed_official 87:085cde657901 93
mbed_official 87:085cde657901 94 /**
mbed_official 226:b062af740e40 95 * @brief DMA2D Init structure definition
mbed_official 87:085cde657901 96 */
mbed_official 87:085cde657901 97 typedef struct
mbed_official 87:085cde657901 98 {
mbed_official 87:085cde657901 99 uint32_t Mode; /*!< configures the DMA2D transfer mode.
mbed_official 87:085cde657901 100 This parameter can be one value of @ref DMA2D_Mode */
mbed_official 226:b062af740e40 101
mbed_official 87:085cde657901 102 uint32_t ColorMode; /*!< configures the color format of the output image.
mbed_official 87:085cde657901 103 This parameter can be one value of @ref DMA2D_Color_Mode */
mbed_official 87:085cde657901 104
mbed_official 87:085cde657901 105 uint32_t OutputOffset; /*!< Specifies the Offset value.
mbed_official 87:085cde657901 106 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
mbed_official 87:085cde657901 107 } DMA2D_InitTypeDef;
mbed_official 87:085cde657901 108
mbed_official 87:085cde657901 109 /**
mbed_official 226:b062af740e40 110 * @brief DMA2D Layer structure definition
mbed_official 87:085cde657901 111 */
mbed_official 87:085cde657901 112 typedef struct
mbed_official 87:085cde657901 113 {
mbed_official 87:085cde657901 114 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
mbed_official 87:085cde657901 115 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
mbed_official 87:085cde657901 116
mbed_official 87:085cde657901 117 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
mbed_official 87:085cde657901 118 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
mbed_official 226:b062af740e40 119
mbed_official 87:085cde657901 120 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
mbed_official 87:085cde657901 121 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
mbed_official 87:085cde657901 122
mbed_official 369:2e96f1b71984 123 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
mbed_official 369:2e96f1b71984 124 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
mbed_official 369:2e96f1b71984 125 in case of A8 or A4 color mode (ARGB).
mbed_official 369:2e96f1b71984 126 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
mbed_official 226:b062af740e40 127
mbed_official 87:085cde657901 128 } DMA2D_LayerCfgTypeDef;
mbed_official 87:085cde657901 129
mbed_official 87:085cde657901 130 /**
mbed_official 226:b062af740e40 131 * @brief HAL DMA2D State structures definition
mbed_official 226:b062af740e40 132 */
mbed_official 87:085cde657901 133 typedef enum
mbed_official 87:085cde657901 134 {
mbed_official 87:085cde657901 135 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
mbed_official 87:085cde657901 136 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
mbed_official 226:b062af740e40 137 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
mbed_official 226:b062af740e40 138 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
mbed_official 87:085cde657901 139 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
mbed_official 87:085cde657901 140 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
mbed_official 87:085cde657901 141 }HAL_DMA2D_StateTypeDef;
mbed_official 87:085cde657901 142
mbed_official 87:085cde657901 143 /**
mbed_official 226:b062af740e40 144 * @brief DMA2D handle Structure definition
mbed_official 226:b062af740e40 145 */
mbed_official 87:085cde657901 146 typedef struct __DMA2D_HandleTypeDef
mbed_official 226:b062af740e40 147 {
mbed_official 87:085cde657901 148 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
mbed_official 226:b062af740e40 149
mbed_official 87:085cde657901 150 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
mbed_official 226:b062af740e40 151
mbed_official 87:085cde657901 152 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
mbed_official 226:b062af740e40 153
mbed_official 87:085cde657901 154 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
mbed_official 226:b062af740e40 155
mbed_official 87:085cde657901 156 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
mbed_official 226:b062af740e40 157
mbed_official 87:085cde657901 158 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
mbed_official 226:b062af740e40 159
mbed_official 87:085cde657901 160 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
mbed_official 226:b062af740e40 161
mbed_official 87:085cde657901 162 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
mbed_official 226:b062af740e40 163 } DMA2D_HandleTypeDef;
mbed_official 87:085cde657901 164 /**
mbed_official 87:085cde657901 165 * @}
mbed_official 87:085cde657901 166 */
mbed_official 87:085cde657901 167
mbed_official 532:fe11edbda85c 168 /* Exported constants --------------------------------------------------------*/
mbed_official 532:fe11edbda85c 169 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
mbed_official 532:fe11edbda85c 170 * @{
mbed_official 532:fe11edbda85c 171 */
mbed_official 532:fe11edbda85c 172
mbed_official 532:fe11edbda85c 173 /** @defgroup DMA2D_Error_Code DMA2D Error Code
mbed_official 87:085cde657901 174 * @{
mbed_official 87:085cde657901 175 */
mbed_official 87:085cde657901 176 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 87:085cde657901 177 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 226:b062af740e40 178 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
mbed_official 87:085cde657901 179 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 87:085cde657901 180 /**
mbed_official 87:085cde657901 181 * @}
mbed_official 87:085cde657901 182 */
mbed_official 226:b062af740e40 183
mbed_official 532:fe11edbda85c 184 /** @defgroup DMA2D_Mode DMA2D Mode
mbed_official 87:085cde657901 185 * @{
mbed_official 87:085cde657901 186 */
mbed_official 87:085cde657901 187 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
mbed_official 87:085cde657901 188 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
mbed_official 87:085cde657901 189 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
mbed_official 87:085cde657901 190 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
mbed_official 87:085cde657901 191 /**
mbed_official 87:085cde657901 192 * @}
mbed_official 226:b062af740e40 193 */
mbed_official 87:085cde657901 194
mbed_official 532:fe11edbda85c 195 /** @defgroup DMA2D_Color_Mode DMA2D Color Mode
mbed_official 87:085cde657901 196 * @{
mbed_official 87:085cde657901 197 */
mbed_official 87:085cde657901 198 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
mbed_official 87:085cde657901 199 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
mbed_official 87:085cde657901 200 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
mbed_official 87:085cde657901 201 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
mbed_official 87:085cde657901 202 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
mbed_official 87:085cde657901 203 /**
mbed_official 87:085cde657901 204 * @}
mbed_official 87:085cde657901 205 */
mbed_official 87:085cde657901 206
mbed_official 532:fe11edbda85c 207 /** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
mbed_official 87:085cde657901 208 * @{
mbed_official 87:085cde657901 209 */
mbed_official 87:085cde657901 210 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
mbed_official 87:085cde657901 211 /**
mbed_official 87:085cde657901 212 * @}
mbed_official 87:085cde657901 213 */
mbed_official 87:085cde657901 214
mbed_official 532:fe11edbda85c 215 /** @defgroup DMA2D_SIZE DMA2D SIZE
mbed_official 87:085cde657901 216 * @{
mbed_official 87:085cde657901 217 */
mbed_official 87:085cde657901 218 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
mbed_official 87:085cde657901 219 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
mbed_official 87:085cde657901 220 /**
mbed_official 87:085cde657901 221 * @}
mbed_official 87:085cde657901 222 */
mbed_official 87:085cde657901 223
mbed_official 532:fe11edbda85c 224 /** @defgroup DMA2D_Offset DMA2D Offset
mbed_official 87:085cde657901 225 * @{
mbed_official 87:085cde657901 226 */
mbed_official 87:085cde657901 227 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
mbed_official 87:085cde657901 228 /**
mbed_official 87:085cde657901 229 * @}
mbed_official 87:085cde657901 230 */
mbed_official 87:085cde657901 231
mbed_official 532:fe11edbda85c 232 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
mbed_official 87:085cde657901 233 * @{
mbed_official 87:085cde657901 234 */
mbed_official 87:085cde657901 235 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
mbed_official 87:085cde657901 236 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
mbed_official 87:085cde657901 237 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
mbed_official 87:085cde657901 238 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
mbed_official 87:085cde657901 239 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
mbed_official 87:085cde657901 240 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
mbed_official 87:085cde657901 241 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
mbed_official 87:085cde657901 242 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
mbed_official 87:085cde657901 243 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
mbed_official 87:085cde657901 244 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
mbed_official 87:085cde657901 245 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
mbed_official 87:085cde657901 246 /**
mbed_official 87:085cde657901 247 * @}
mbed_official 87:085cde657901 248 */
mbed_official 87:085cde657901 249
mbed_official 532:fe11edbda85c 250 /** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
mbed_official 87:085cde657901 251 * @{
mbed_official 87:085cde657901 252 */
mbed_official 87:085cde657901 253 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
mbed_official 87:085cde657901 254 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
mbed_official 87:085cde657901 255 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
mbed_official 87:085cde657901 256 with original alpha channel value */
mbed_official 87:085cde657901 257 /**
mbed_official 87:085cde657901 258 * @}
mbed_official 87:085cde657901 259 */
mbed_official 87:085cde657901 260
mbed_official 532:fe11edbda85c 261 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
mbed_official 87:085cde657901 262 * @{
mbed_official 87:085cde657901 263 */
mbed_official 87:085cde657901 264 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
mbed_official 87:085cde657901 265 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
mbed_official 87:085cde657901 266 /**
mbed_official 87:085cde657901 267 * @}
mbed_official 87:085cde657901 268 */
mbed_official 87:085cde657901 269
mbed_official 532:fe11edbda85c 270 /** @defgroup DMA2D_Size_Clut DMA2D Size Clut
mbed_official 87:085cde657901 271 * @{
mbed_official 87:085cde657901 272 */
mbed_official 87:085cde657901 273 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
mbed_official 87:085cde657901 274 /**
mbed_official 87:085cde657901 275 * @}
mbed_official 87:085cde657901 276 */
mbed_official 87:085cde657901 277
mbed_official 532:fe11edbda85c 278 /** @defgroup DMA2D_DeadTime DMA2D DeadTime
mbed_official 87:085cde657901 279 * @{
mbed_official 87:085cde657901 280 */
mbed_official 87:085cde657901 281 #define LINE_WATERMARK DMA2D_LWR_LW
mbed_official 87:085cde657901 282 /**
mbed_official 87:085cde657901 283 * @}
mbed_official 226:b062af740e40 284 */
mbed_official 226:b062af740e40 285
mbed_official 532:fe11edbda85c 286 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
mbed_official 87:085cde657901 287 * @{
mbed_official 87:085cde657901 288 */
mbed_official 87:085cde657901 289 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
mbed_official 87:085cde657901 290 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
mbed_official 87:085cde657901 291 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
mbed_official 87:085cde657901 292 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
mbed_official 87:085cde657901 293 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
mbed_official 87:085cde657901 294 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
mbed_official 87:085cde657901 295 /**
mbed_official 87:085cde657901 296 * @}
mbed_official 87:085cde657901 297 */
mbed_official 226:b062af740e40 298
mbed_official 532:fe11edbda85c 299 /** @defgroup DMA2D_Flag DMA2D Flag
mbed_official 87:085cde657901 300 * @{
mbed_official 87:085cde657901 301 */
mbed_official 87:085cde657901 302 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
mbed_official 87:085cde657901 303 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
mbed_official 87:085cde657901 304 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
mbed_official 87:085cde657901 305 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
mbed_official 87:085cde657901 306 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
mbed_official 87:085cde657901 307 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
mbed_official 87:085cde657901 308 /**
mbed_official 87:085cde657901 309 * @}
mbed_official 87:085cde657901 310 */
mbed_official 87:085cde657901 311
mbed_official 87:085cde657901 312 /**
mbed_official 87:085cde657901 313 * @}
mbed_official 87:085cde657901 314 */
mbed_official 87:085cde657901 315 /* Exported macro ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 316 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
mbed_official 532:fe11edbda85c 317 * @{
mbed_official 532:fe11edbda85c 318 */
mbed_official 226:b062af740e40 319
mbed_official 226:b062af740e40 320 /** @brief Reset DMA2D handle state
mbed_official 226:b062af740e40 321 * @param __HANDLE__: specifies the DMA2D handle.
mbed_official 226:b062af740e40 322 * @retval None
mbed_official 226:b062af740e40 323 */
mbed_official 226:b062af740e40 324 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
mbed_official 226:b062af740e40 325
mbed_official 87:085cde657901 326 /**
mbed_official 87:085cde657901 327 * @brief Enable the DMA2D.
mbed_official 87:085cde657901 328 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 329 * @retval None.
mbed_official 87:085cde657901 330 */
mbed_official 87:085cde657901 331 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
mbed_official 87:085cde657901 332
mbed_official 87:085cde657901 333 /**
mbed_official 87:085cde657901 334 * @brief Disable the DMA2D.
mbed_official 87:085cde657901 335 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 336 * @retval None.
mbed_official 87:085cde657901 337 */
mbed_official 87:085cde657901 338 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
mbed_official 87:085cde657901 339
mbed_official 87:085cde657901 340 /* Interrupt & Flag management */
mbed_official 87:085cde657901 341 /**
mbed_official 87:085cde657901 342 * @brief Get the DMA2D pending flags.
mbed_official 87:085cde657901 343 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 344 * @param __FLAG__: Get the specified flag.
mbed_official 87:085cde657901 345 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 346 * @arg DMA2D_FLAG_CE: Configuration error flag
mbed_official 87:085cde657901 347 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
mbed_official 87:085cde657901 348 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
mbed_official 87:085cde657901 349 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
mbed_official 87:085cde657901 350 * @arg DMA2D_FLAG_TC: Transfer complete flag
mbed_official 87:085cde657901 351 * @arg DMA2D_FLAG_TE: Transfer error flag
mbed_official 87:085cde657901 352 * @retval The state of FLAG.
mbed_official 87:085cde657901 353 */
mbed_official 87:085cde657901 354 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
mbed_official 87:085cde657901 355
mbed_official 87:085cde657901 356 /**
mbed_official 87:085cde657901 357 * @brief Clears the DMA2D pending flags.
mbed_official 87:085cde657901 358 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 359 * @param __FLAG__: specifies the flag to clear.
mbed_official 87:085cde657901 360 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 361 * @arg DMA2D_FLAG_CE: Configuration error flag
mbed_official 87:085cde657901 362 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
mbed_official 87:085cde657901 363 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
mbed_official 87:085cde657901 364 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
mbed_official 87:085cde657901 365 * @arg DMA2D_FLAG_TC: Transfer complete flag
mbed_official 87:085cde657901 366 * @arg DMA2D_FLAG_TE: Transfer error flag
mbed_official 87:085cde657901 367 * @retval None
mbed_official 87:085cde657901 368 */
mbed_official 369:2e96f1b71984 369 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
mbed_official 87:085cde657901 370
mbed_official 87:085cde657901 371 /**
mbed_official 87:085cde657901 372 * @brief Enables the specified DMA2D interrupts.
mbed_official 87:085cde657901 373 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 374 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
mbed_official 87:085cde657901 375 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 376 * @arg DMA2D_IT_CE: Configuration error interrupt mask
mbed_official 87:085cde657901 377 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
mbed_official 87:085cde657901 378 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
mbed_official 87:085cde657901 379 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
mbed_official 87:085cde657901 380 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
mbed_official 87:085cde657901 381 * @arg DMA2D_IT_TE: Transfer error interrupt mask
mbed_official 87:085cde657901 382 * @retval None
mbed_official 87:085cde657901 383 */
mbed_official 87:085cde657901 384 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
mbed_official 87:085cde657901 385
mbed_official 87:085cde657901 386 /**
mbed_official 87:085cde657901 387 * @brief Disables the specified DMA2D interrupts.
mbed_official 87:085cde657901 388 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 389 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
mbed_official 87:085cde657901 390 * This parameter can be any combination of the following values:
mbed_official 87:085cde657901 391 * @arg DMA2D_IT_CE: Configuration error interrupt mask
mbed_official 87:085cde657901 392 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
mbed_official 87:085cde657901 393 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
mbed_official 87:085cde657901 394 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
mbed_official 87:085cde657901 395 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
mbed_official 87:085cde657901 396 * @arg DMA2D_IT_TE: Transfer error interrupt mask
mbed_official 87:085cde657901 397 * @retval None
mbed_official 87:085cde657901 398 */
mbed_official 87:085cde657901 399 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
mbed_official 87:085cde657901 400
mbed_official 87:085cde657901 401 /**
mbed_official 87:085cde657901 402 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
mbed_official 87:085cde657901 403 * @param __HANDLE__: DMA2D handle
mbed_official 87:085cde657901 404 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
mbed_official 87:085cde657901 405 * This parameter can be one of the following values:
mbed_official 87:085cde657901 406 * @arg DMA2D_IT_CE: Configuration error interrupt mask
mbed_official 87:085cde657901 407 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
mbed_official 87:085cde657901 408 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
mbed_official 87:085cde657901 409 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
mbed_official 87:085cde657901 410 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
mbed_official 87:085cde657901 411 * @arg DMA2D_IT_TE: Transfer error interrupt mask
mbed_official 87:085cde657901 412 * @retval The state of INTERRUPT.
mbed_official 87:085cde657901 413 */
mbed_official 106:ced8cbb51063 414 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
mbed_official 532:fe11edbda85c 415 /**
mbed_official 532:fe11edbda85c 416 * @}
mbed_official 532:fe11edbda85c 417 */
mbed_official 87:085cde657901 418
mbed_official 87:085cde657901 419 /* Exported functions --------------------------------------------------------*/
mbed_official 532:fe11edbda85c 420 /** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
mbed_official 532:fe11edbda85c 421 * @{
mbed_official 532:fe11edbda85c 422 */
mbed_official 87:085cde657901 423 /* Initialization and de-initialization functions *******************************/
mbed_official 87:085cde657901 424 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 425 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
mbed_official 106:ced8cbb51063 426 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
mbed_official 106:ced8cbb51063 427 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
mbed_official 87:085cde657901 428
mbed_official 87:085cde657901 429 /* IO operation functions *******************************************************/
mbed_official 532:fe11edbda85c 430 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
mbed_official 532:fe11edbda85c 431 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
mbed_official 532:fe11edbda85c 432 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
mbed_official 532:fe11edbda85c 433 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
mbed_official 87:085cde657901 434 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 435 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 436 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 437 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
mbed_official 87:085cde657901 438 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 439
mbed_official 87:085cde657901 440 /* Peripheral Control functions *************************************************/
mbed_official 87:085cde657901 441 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
mbed_official 87:085cde657901 442 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
mbed_official 87:085cde657901 443 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
mbed_official 87:085cde657901 444 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
mbed_official 87:085cde657901 445 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
mbed_official 87:085cde657901 446
mbed_official 87:085cde657901 447 /* Peripheral State functions ***************************************************/
mbed_official 87:085cde657901 448 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
mbed_official 87:085cde657901 449 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
mbed_official 532:fe11edbda85c 450 /**
mbed_official 532:fe11edbda85c 451 * @}
mbed_official 532:fe11edbda85c 452 */
mbed_official 87:085cde657901 453
mbed_official 532:fe11edbda85c 454 /* Private types -------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 455 /** @defgroup DMA2D_Private_Types DMA2D Private Types
mbed_official 532:fe11edbda85c 456 * @{
mbed_official 532:fe11edbda85c 457 */
mbed_official 532:fe11edbda85c 458
mbed_official 532:fe11edbda85c 459 /**
mbed_official 532:fe11edbda85c 460 * @}
mbed_official 532:fe11edbda85c 461 */
mbed_official 532:fe11edbda85c 462
mbed_official 532:fe11edbda85c 463 /* Private defines -------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 464 /** @defgroup DMA2D_Private_Defines DMA2D Private Defines
mbed_official 532:fe11edbda85c 465 * @{
mbed_official 532:fe11edbda85c 466 */
mbed_official 532:fe11edbda85c 467
mbed_official 532:fe11edbda85c 468 /**
mbed_official 532:fe11edbda85c 469 * @}
mbed_official 532:fe11edbda85c 470 */
mbed_official 532:fe11edbda85c 471
mbed_official 532:fe11edbda85c 472 /* Private variables ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 473 /** @defgroup DMA2D_Private_Variables DMA2D Private Variables
mbed_official 532:fe11edbda85c 474 * @{
mbed_official 532:fe11edbda85c 475 */
mbed_official 532:fe11edbda85c 476
mbed_official 532:fe11edbda85c 477 /**
mbed_official 532:fe11edbda85c 478 * @}
mbed_official 532:fe11edbda85c 479 */
mbed_official 532:fe11edbda85c 480
mbed_official 532:fe11edbda85c 481 /* Private constants ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 482 /** @defgroup DMA2D_Private_Constants DMA2D Private Constants
mbed_official 532:fe11edbda85c 483 * @{
mbed_official 532:fe11edbda85c 484 */
mbed_official 532:fe11edbda85c 485
mbed_official 532:fe11edbda85c 486 /**
mbed_official 532:fe11edbda85c 487 * @}
mbed_official 532:fe11edbda85c 488 */
mbed_official 532:fe11edbda85c 489
mbed_official 532:fe11edbda85c 490 /* Private macros ------------------------------------------------------------*/
mbed_official 532:fe11edbda85c 491 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
mbed_official 532:fe11edbda85c 492 * @{
mbed_official 532:fe11edbda85c 493 */
mbed_official 532:fe11edbda85c 494 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
mbed_official 532:fe11edbda85c 495 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
mbed_official 532:fe11edbda85c 496 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
mbed_official 532:fe11edbda85c 497 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
mbed_official 532:fe11edbda85c 498 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
mbed_official 532:fe11edbda85c 499 ((MODE_ARGB) == DMA2D_ARGB4444))
mbed_official 532:fe11edbda85c 500 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
mbed_official 532:fe11edbda85c 501 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
mbed_official 532:fe11edbda85c 502 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
mbed_official 532:fe11edbda85c 503 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
mbed_official 532:fe11edbda85c 504 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
mbed_official 532:fe11edbda85c 505 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
mbed_official 532:fe11edbda85c 506 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
mbed_official 532:fe11edbda85c 507 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
mbed_official 532:fe11edbda85c 508 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
mbed_official 532:fe11edbda85c 509 ((INPUT_CM) == CM_A4))
mbed_official 532:fe11edbda85c 510 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
mbed_official 532:fe11edbda85c 511 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
mbed_official 532:fe11edbda85c 512 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
mbed_official 532:fe11edbda85c 513 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
mbed_official 532:fe11edbda85c 514 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
mbed_official 532:fe11edbda85c 515 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
mbed_official 532:fe11edbda85c 516 /**
mbed_official 532:fe11edbda85c 517 * @}
mbed_official 532:fe11edbda85c 518 */
mbed_official 532:fe11edbda85c 519
mbed_official 532:fe11edbda85c 520 /* Private functions prototypes ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 521 /** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
mbed_official 532:fe11edbda85c 522 * @{
mbed_official 532:fe11edbda85c 523 */
mbed_official 532:fe11edbda85c 524
mbed_official 532:fe11edbda85c 525 /**
mbed_official 532:fe11edbda85c 526 * @}
mbed_official 532:fe11edbda85c 527 */
mbed_official 532:fe11edbda85c 528
mbed_official 532:fe11edbda85c 529 /* Private functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 530 /** @defgroup DMA2D_Private_Functions DMA2D Private Functions
mbed_official 532:fe11edbda85c 531 * @{
mbed_official 532:fe11edbda85c 532 */
mbed_official 532:fe11edbda85c 533
mbed_official 532:fe11edbda85c 534 /**
mbed_official 532:fe11edbda85c 535 * @}
mbed_official 532:fe11edbda85c 536 */
mbed_official 87:085cde657901 537
mbed_official 87:085cde657901 538 /**
mbed_official 87:085cde657901 539 * @}
mbed_official 87:085cde657901 540 */
mbed_official 87:085cde657901 541
mbed_official 87:085cde657901 542 /**
mbed_official 87:085cde657901 543 * @}
mbed_official 87:085cde657901 544 */
mbed_official 532:fe11edbda85c 545
mbed_official 532:fe11edbda85c 546 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 532:fe11edbda85c 547
mbed_official 87:085cde657901 548 #ifdef __cplusplus
mbed_official 87:085cde657901 549 }
mbed_official 87:085cde657901 550 #endif
mbed_official 87:085cde657901 551
mbed_official 87:085cde657901 552 #endif /* __STM32F4xx_HAL_DMA2D_H */
mbed_official 87:085cde657901 553
mbed_official 87:085cde657901 554 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/