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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_ll_fmc.h@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_ll_fmc.h
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief Header file of FMC HAL module.
mbed_official 610:813dcc80987e 8 ******************************************************************************
mbed_official 610:813dcc80987e 9 * @attention
mbed_official 610:813dcc80987e 10 *
mbed_official 610:813dcc80987e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 12 *
mbed_official 610:813dcc80987e 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 14 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 16 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 19 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 21 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 22 * without specific prior written permission.
mbed_official 610:813dcc80987e 23 *
mbed_official 610:813dcc80987e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 34 *
mbed_official 610:813dcc80987e 35 ******************************************************************************
mbed_official 610:813dcc80987e 36 */
mbed_official 610:813dcc80987e 37
mbed_official 610:813dcc80987e 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 610:813dcc80987e 39 #ifndef __STM32L4xx_LL_FMC_H
mbed_official 610:813dcc80987e 40 #define __STM32L4xx_LL_FMC_H
mbed_official 610:813dcc80987e 41
mbed_official 610:813dcc80987e 42 #ifdef __cplusplus
mbed_official 610:813dcc80987e 43 extern "C" {
mbed_official 610:813dcc80987e 44 #endif
mbed_official 610:813dcc80987e 45
mbed_official 610:813dcc80987e 46 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 47 #include "stm32l4xx_hal_def.h"
mbed_official 610:813dcc80987e 48
mbed_official 610:813dcc80987e 49 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 50 * @{
mbed_official 610:813dcc80987e 51 */
mbed_official 610:813dcc80987e 52
mbed_official 610:813dcc80987e 53 /** @addtogroup FMC_LL FMC Low Layer
mbed_official 610:813dcc80987e 54 * @{
mbed_official 610:813dcc80987e 55 */
mbed_official 610:813dcc80987e 56
mbed_official 610:813dcc80987e 57 /** @addtogroup FMC_LL_Private_Macros FMC Low Layer Private Macros
mbed_official 610:813dcc80987e 58 * @{
mbed_official 610:813dcc80987e 59 */
mbed_official 610:813dcc80987e 60 #define IS_FMC_NORSRAM_BANK(__BANK__) (((__BANK__) == FMC_NORSRAM_BANK1) || \
mbed_official 610:813dcc80987e 61 ((__BANK__) == FMC_NORSRAM_BANK2) || \
mbed_official 610:813dcc80987e 62 ((__BANK__) == FMC_NORSRAM_BANK3) || \
mbed_official 610:813dcc80987e 63 ((__BANK__) == FMC_NORSRAM_BANK4))
mbed_official 610:813dcc80987e 64
mbed_official 610:813dcc80987e 65
mbed_official 610:813dcc80987e 66 #define IS_FMC_MUX(__MUX__) (((__MUX__) == FMC_DATA_ADDRESS_MUX_DISABLE) || \
mbed_official 610:813dcc80987e 67 ((__MUX__) == FMC_DATA_ADDRESS_MUX_ENABLE))
mbed_official 610:813dcc80987e 68
mbed_official 610:813dcc80987e 69
mbed_official 610:813dcc80987e 70 #define IS_FMC_MEMORY(__MEMORY__) (((__MEMORY__) == FMC_MEMORY_TYPE_SRAM) || \
mbed_official 610:813dcc80987e 71 ((__MEMORY__) == FMC_MEMORY_TYPE_PSRAM)|| \
mbed_official 610:813dcc80987e 72 ((__MEMORY__) == FMC_MEMORY_TYPE_NOR))
mbed_official 610:813dcc80987e 73
mbed_official 610:813dcc80987e 74 #define IS_FMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \
mbed_official 610:813dcc80987e 75 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \
mbed_official 610:813dcc80987e 76 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_32))
mbed_official 610:813dcc80987e 77
mbed_official 610:813dcc80987e 78 #define IS_FMC_PAGESIZE(__SIZE__) (((__SIZE__) == FMC_PAGE_SIZE_NONE) || \
mbed_official 610:813dcc80987e 79 ((__SIZE__) == FMC_PAGE_SIZE_128) || \
mbed_official 610:813dcc80987e 80 ((__SIZE__) == FMC_PAGE_SIZE_256) || \
mbed_official 610:813dcc80987e 81 ((__SIZE__) == FMC_PAGE_SIZE_1024))
mbed_official 610:813dcc80987e 82
mbed_official 610:813dcc80987e 83 #define IS_FMC_WRITE_BURST(__BURST__) (((__BURST__) == FMC_WRITE_BURST_DISABLE) || \
mbed_official 610:813dcc80987e 84 ((__BURST__) == FMC_WRITE_BURST_ENABLE))
mbed_official 610:813dcc80987e 85
mbed_official 610:813dcc80987e 86 #define IS_FMC_CONTINOUS_CLOCK(__CCLOCK__) (((__CCLOCK__) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
mbed_official 610:813dcc80987e 87 ((__CCLOCK__) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
mbed_official 610:813dcc80987e 88
mbed_official 610:813dcc80987e 89 #define IS_FMC_WRITE_FIFO(__FIFO__) (((__FIFO__) == FMC_WRITE_FIFO_DISABLE) || \
mbed_official 610:813dcc80987e 90 ((__FIFO__) == FMC_WRITE_FIFO_ENABLE))
mbed_official 610:813dcc80987e 91
mbed_official 610:813dcc80987e 92
mbed_official 610:813dcc80987e 93 #define IS_FMC_ACCESS_MODE(__MODE__) (((__MODE__) == FMC_ACCESS_MODE_A) || \
mbed_official 610:813dcc80987e 94 ((__MODE__) == FMC_ACCESS_MODE_B) || \
mbed_official 610:813dcc80987e 95 ((__MODE__) == FMC_ACCESS_MODE_C) || \
mbed_official 610:813dcc80987e 96 ((__MODE__) == FMC_ACCESS_MODE_D))
mbed_official 610:813dcc80987e 97
mbed_official 610:813dcc80987e 98
mbed_official 610:813dcc80987e 99 #define IS_FMC_NAND_BANK(__BANK__) ((__BANK__) == FMC_NAND_BANK3)
mbed_official 610:813dcc80987e 100
mbed_official 610:813dcc80987e 101 #define IS_FMC_WAIT_FEATURE(__FEATURE__) (((__FEATURE__) == FMC_NAND_WAIT_FEATURE_DISABLE) || \
mbed_official 610:813dcc80987e 102 ((__FEATURE__) == FMC_NAND_WAIT_FEATURE_ENABLE))
mbed_official 610:813dcc80987e 103
mbed_official 610:813dcc80987e 104 #define IS_FMC_NAND_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NAND_MEM_BUS_WIDTH_8) || \
mbed_official 610:813dcc80987e 105 ((__WIDTH__) == FMC_NAND_MEM_BUS_WIDTH_16))
mbed_official 610:813dcc80987e 106
mbed_official 610:813dcc80987e 107 #define IS_FMC_ECC_STATE(__STATE__) (((__STATE__) == FMC_NAND_ECC_DISABLE) || \
mbed_official 610:813dcc80987e 108 ((__STATE__) == FMC_NAND_ECC_ENABLE))
mbed_official 610:813dcc80987e 109
mbed_official 610:813dcc80987e 110
mbed_official 610:813dcc80987e 111 #define IS_FMC_ECCPAGE_SIZE(__SIZE__) (((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
mbed_official 610:813dcc80987e 112 ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
mbed_official 610:813dcc80987e 113 ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
mbed_official 610:813dcc80987e 114 ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
mbed_official 610:813dcc80987e 115 ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
mbed_official 610:813dcc80987e 116 ((__SIZE__) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE))
mbed_official 610:813dcc80987e 117
mbed_official 610:813dcc80987e 118
mbed_official 610:813dcc80987e 119 /** @defgroup FMC_NORSRAM_Device_Instance FMC NOR/SRAM Device Instance
mbed_official 610:813dcc80987e 120 * @{
mbed_official 610:813dcc80987e 121 */
mbed_official 610:813dcc80987e 122 #define IS_FMC_NORSRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_DEVICE)
mbed_official 610:813dcc80987e 123 /**
mbed_official 610:813dcc80987e 124 * @}
mbed_official 610:813dcc80987e 125 */
mbed_official 610:813dcc80987e 126
mbed_official 610:813dcc80987e 127 /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance FMC NOR/SRAM EXTENDED Device Instance
mbed_official 610:813dcc80987e 128 * @{
mbed_official 610:813dcc80987e 129 */
mbed_official 610:813dcc80987e 130 #define IS_FMC_NORSRAM_EXTENDED_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_EXTENDED_DEVICE)
mbed_official 610:813dcc80987e 131 /**
mbed_official 610:813dcc80987e 132 * @}
mbed_official 610:813dcc80987e 133 */
mbed_official 610:813dcc80987e 134
mbed_official 610:813dcc80987e 135 /** @defgroup FMC_NAND_Device_Instance FMC NAND Device Instance
mbed_official 610:813dcc80987e 136 * @{
mbed_official 610:813dcc80987e 137 */
mbed_official 610:813dcc80987e 138 #define IS_FMC_NAND_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NAND_DEVICE)
mbed_official 610:813dcc80987e 139 /**
mbed_official 610:813dcc80987e 140 * @}
mbed_official 610:813dcc80987e 141 */
mbed_official 610:813dcc80987e 142
mbed_official 610:813dcc80987e 143 #define IS_FMC_BURSTMODE(__STATE__) (((__STATE__) == FMC_BURST_ACCESS_MODE_DISABLE) || \
mbed_official 610:813dcc80987e 144 ((__STATE__) == FMC_BURST_ACCESS_MODE_ENABLE))
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 #define IS_FMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \
mbed_official 610:813dcc80987e 147 ((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_HIGH))
mbed_official 610:813dcc80987e 148
mbed_official 610:813dcc80987e 149 #define IS_FMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FMC_WAIT_TIMING_BEFORE_WS) || \
mbed_official 610:813dcc80987e 150 ((__ACTIVE__) == FMC_WAIT_TIMING_DURING_WS))
mbed_official 610:813dcc80987e 151
mbed_official 610:813dcc80987e 152
mbed_official 610:813dcc80987e 153 #define IS_FMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FMC_WRITE_OPERATION_DISABLE) || \
mbed_official 610:813dcc80987e 154 ((__OPERATION__) == FMC_WRITE_OPERATION_ENABLE))
mbed_official 610:813dcc80987e 155
mbed_official 610:813dcc80987e 156 #define IS_FMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FMC_WAIT_SIGNAL_DISABLE) || \
mbed_official 610:813dcc80987e 157 ((__SIGNAL__) == FMC_WAIT_SIGNAL_ENABLE))
mbed_official 610:813dcc80987e 158
mbed_official 610:813dcc80987e 159 #define IS_FMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FMC_EXTENDED_MODE_DISABLE) || \
mbed_official 610:813dcc80987e 160 ((__MODE__) == FMC_EXTENDED_MODE_ENABLE))
mbed_official 610:813dcc80987e 161
mbed_official 610:813dcc80987e 162 #define IS_FMC_ASYNWAIT(__STATE__) (((__STATE__) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \
mbed_official 610:813dcc80987e 163 ((__STATE__) == FMC_ASYNCHRONOUS_WAIT_ENABLE))
mbed_official 610:813dcc80987e 164
mbed_official 610:813dcc80987e 165 /** @defgroup FMC_Address_Setup_Time
mbed_official 610:813dcc80987e 166 * @{
mbed_official 610:813dcc80987e 167 */
mbed_official 610:813dcc80987e 168 #define IS_FMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15)
mbed_official 610:813dcc80987e 169 /**
mbed_official 610:813dcc80987e 170 * @}
mbed_official 610:813dcc80987e 171 */
mbed_official 610:813dcc80987e 172
mbed_official 610:813dcc80987e 173 /** @defgroup FMC_Address_Hold_Time
mbed_official 610:813dcc80987e 174 * @{
mbed_official 610:813dcc80987e 175 */
mbed_official 610:813dcc80987e 176 #define IS_FMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 15))
mbed_official 610:813dcc80987e 177 /**
mbed_official 610:813dcc80987e 178 * @}
mbed_official 610:813dcc80987e 179 */
mbed_official 610:813dcc80987e 180
mbed_official 610:813dcc80987e 181 /** @defgroup FMC_Data_Setup_Time
mbed_official 610:813dcc80987e 182 * @{
mbed_official 610:813dcc80987e 183 */
mbed_official 610:813dcc80987e 184 #define IS_FMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 255))
mbed_official 610:813dcc80987e 185 /**
mbed_official 610:813dcc80987e 186 * @}
mbed_official 610:813dcc80987e 187 */
mbed_official 610:813dcc80987e 188
mbed_official 610:813dcc80987e 189 /** @defgroup FMC_Bus_Turn_around_Duration
mbed_official 610:813dcc80987e 190 * @{
mbed_official 610:813dcc80987e 191 */
mbed_official 610:813dcc80987e 192 #define IS_FMC_TURNAROUND_TIME(__TIME__) ((__TIME__) <= 15)
mbed_official 610:813dcc80987e 193 /**
mbed_official 610:813dcc80987e 194 * @}
mbed_official 610:813dcc80987e 195 */
mbed_official 610:813dcc80987e 196
mbed_official 610:813dcc80987e 197 /** @defgroup FMC_CLK_Division
mbed_official 610:813dcc80987e 198 * @{
mbed_official 610:813dcc80987e 199 */
mbed_official 610:813dcc80987e 200 #define IS_FMC_CLK_DIV(__DIV__) (((__DIV__) > 1) && ((__DIV__) <= 16))
mbed_official 610:813dcc80987e 201 /**
mbed_official 610:813dcc80987e 202 * @}
mbed_official 610:813dcc80987e 203 */
mbed_official 610:813dcc80987e 204
mbed_official 610:813dcc80987e 205 /** @defgroup FMC_Data_Latency
mbed_official 610:813dcc80987e 206 * @{
mbed_official 610:813dcc80987e 207 */
mbed_official 610:813dcc80987e 208 #define IS_FMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1) && ((__LATENCY__) <= 17))
mbed_official 610:813dcc80987e 209 /**
mbed_official 610:813dcc80987e 210 * @}
mbed_official 610:813dcc80987e 211 */
mbed_official 610:813dcc80987e 212
mbed_official 610:813dcc80987e 213 /** @defgroup FMC_TCLR_Setup_Time FMC TCLR Setup Time
mbed_official 610:813dcc80987e 214 * @{
mbed_official 610:813dcc80987e 215 */
mbed_official 610:813dcc80987e 216 #define IS_FMC_TCLR_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 217 /**
mbed_official 610:813dcc80987e 218 * @}
mbed_official 610:813dcc80987e 219 */
mbed_official 610:813dcc80987e 220
mbed_official 610:813dcc80987e 221 /** @defgroup FMC_TAR_Setup_Time
mbed_official 610:813dcc80987e 222 * @{
mbed_official 610:813dcc80987e 223 */
mbed_official 610:813dcc80987e 224 #define IS_FMC_TAR_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 225 /**
mbed_official 610:813dcc80987e 226 * @}
mbed_official 610:813dcc80987e 227 */
mbed_official 610:813dcc80987e 228
mbed_official 610:813dcc80987e 229 /** @defgroup FMC_Setup_Time
mbed_official 610:813dcc80987e 230 * @{
mbed_official 610:813dcc80987e 231 */
mbed_official 610:813dcc80987e 232 #define IS_FMC_SETUP_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 233 /**
mbed_official 610:813dcc80987e 234 * @}
mbed_official 610:813dcc80987e 235 */
mbed_official 610:813dcc80987e 236
mbed_official 610:813dcc80987e 237 /** @defgroup FMC_Wait_Setup_Time
mbed_official 610:813dcc80987e 238 * @{
mbed_official 610:813dcc80987e 239 */
mbed_official 610:813dcc80987e 240 #define IS_FMC_WAIT_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 241 /**
mbed_official 610:813dcc80987e 242 * @}
mbed_official 610:813dcc80987e 243 */
mbed_official 610:813dcc80987e 244
mbed_official 610:813dcc80987e 245 /** @defgroup FMC_Hold_Setup_Time
mbed_official 610:813dcc80987e 246 * @{
mbed_official 610:813dcc80987e 247 */
mbed_official 610:813dcc80987e 248 #define IS_FMC_HOLD_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 249 /**
mbed_official 610:813dcc80987e 250 * @}
mbed_official 610:813dcc80987e 251 */
mbed_official 610:813dcc80987e 252
mbed_official 610:813dcc80987e 253 /** @defgroup FMC_HiZ_Setup_Time
mbed_official 610:813dcc80987e 254 * @{
mbed_official 610:813dcc80987e 255 */
mbed_official 610:813dcc80987e 256 #define IS_FMC_HIZ_TIME(__TIME__) ((__TIME__) <= 255)
mbed_official 610:813dcc80987e 257 /**
mbed_official 610:813dcc80987e 258 * @}
mbed_official 610:813dcc80987e 259 */
mbed_official 610:813dcc80987e 260
mbed_official 610:813dcc80987e 261 /**
mbed_official 610:813dcc80987e 262 * @}
mbed_official 610:813dcc80987e 263 */
mbed_official 610:813dcc80987e 264
mbed_official 610:813dcc80987e 265 /* Exported typedef ----------------------------------------------------------*/
mbed_official 610:813dcc80987e 266 /** @addtogroup FMC_LL_Exported_Typedef FMC Low Layer Exported Typedef
mbed_official 610:813dcc80987e 267 * @{
mbed_official 610:813dcc80987e 268 */
mbed_official 610:813dcc80987e 269 #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef
mbed_official 610:813dcc80987e 270 #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef
mbed_official 610:813dcc80987e 271 #define FMC_NAND_TypeDef FMC_Bank3_TypeDef
mbed_official 610:813dcc80987e 272
mbed_official 610:813dcc80987e 273 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
mbed_official 610:813dcc80987e 274 #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E_R
mbed_official 610:813dcc80987e 275 #define FMC_NAND_DEVICE FMC_Bank3_R
mbed_official 610:813dcc80987e 276
mbed_official 610:813dcc80987e 277 /**
mbed_official 610:813dcc80987e 278 * @brief FMC_NORSRAM Configuration Structure definition
mbed_official 610:813dcc80987e 279 */
mbed_official 610:813dcc80987e 280 typedef struct
mbed_official 610:813dcc80987e 281 {
mbed_official 610:813dcc80987e 282 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
mbed_official 610:813dcc80987e 283 This parameter can be a value of @ref FMC_NORSRAM_Bank */
mbed_official 610:813dcc80987e 284
mbed_official 610:813dcc80987e 285 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
mbed_official 610:813dcc80987e 286 multiplexed on the data bus or not.
mbed_official 610:813dcc80987e 287 This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */
mbed_official 610:813dcc80987e 288
mbed_official 610:813dcc80987e 289 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
mbed_official 610:813dcc80987e 290 the corresponding memory device.
mbed_official 610:813dcc80987e 291 This parameter can be a value of @ref FMC_Memory_Type */
mbed_official 610:813dcc80987e 292
mbed_official 610:813dcc80987e 293 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
mbed_official 610:813dcc80987e 294 This parameter can be a value of @ref FMC_NORSRAM_Data_Width */
mbed_official 610:813dcc80987e 295
mbed_official 610:813dcc80987e 296 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
mbed_official 610:813dcc80987e 297 valid only with synchronous burst Flash memories.
mbed_official 610:813dcc80987e 298 This parameter can be a value of @ref FMC_Burst_Access_Mode */
mbed_official 610:813dcc80987e 299
mbed_official 610:813dcc80987e 300 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
mbed_official 610:813dcc80987e 301 the Flash memory in burst mode.
mbed_official 610:813dcc80987e 302 This parameter can be a value of @ref FMC_Wait_Signal_Polarity */
mbed_official 610:813dcc80987e 303
mbed_official 610:813dcc80987e 304 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
mbed_official 610:813dcc80987e 305 clock cycle before the wait state or during the wait state,
mbed_official 610:813dcc80987e 306 valid only when accessing memories in burst mode.
mbed_official 610:813dcc80987e 307 This parameter can be a value of @ref FMC_Wait_Timing */
mbed_official 610:813dcc80987e 308
mbed_official 610:813dcc80987e 309 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC.
mbed_official 610:813dcc80987e 310 This parameter can be a value of @ref FMC_Write_Operation */
mbed_official 610:813dcc80987e 311
mbed_official 610:813dcc80987e 312 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
mbed_official 610:813dcc80987e 313 signal, valid for Flash memory access in burst mode.
mbed_official 610:813dcc80987e 314 This parameter can be a value of @ref FMC_Wait_Signal */
mbed_official 610:813dcc80987e 315
mbed_official 610:813dcc80987e 316 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
mbed_official 610:813dcc80987e 317 This parameter can be a value of @ref FMC_Extended_Mode */
mbed_official 610:813dcc80987e 318
mbed_official 610:813dcc80987e 319 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
mbed_official 610:813dcc80987e 320 valid only with asynchronous Flash memories.
mbed_official 610:813dcc80987e 321 This parameter can be a value of @ref FMC_AsynchronousWait */
mbed_official 610:813dcc80987e 322
mbed_official 610:813dcc80987e 323 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
mbed_official 610:813dcc80987e 324 This parameter can be a value of @ref FMC_Write_Burst */
mbed_official 610:813dcc80987e 325
mbed_official 610:813dcc80987e 326 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
mbed_official 610:813dcc80987e 327 This parameter is only enabled through the FMC_BCR1 register, and don't care
mbed_official 610:813dcc80987e 328 through FMC_BCR2..4 registers.
mbed_official 610:813dcc80987e 329 This parameter can be a value of @ref FMC_Continous_Clock */
mbed_official 610:813dcc80987e 330
mbed_official 610:813dcc80987e 331 uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller.
mbed_official 610:813dcc80987e 332 This parameter is only enabled through the FMC_BCR1 register, and don't care
mbed_official 610:813dcc80987e 333 through FMC_BCR2..4 registers.
mbed_official 610:813dcc80987e 334 This parameter can be a value of @ref FMC_Write_FIFO */
mbed_official 610:813dcc80987e 335
mbed_official 610:813dcc80987e 336 uint32_t PageSize; /*!< Specifies the memory page size.
mbed_official 610:813dcc80987e 337 This parameter can be a value of @ref FMC_Page_Size */
mbed_official 610:813dcc80987e 338
mbed_official 610:813dcc80987e 339 }FMC_NORSRAM_InitTypeDef;
mbed_official 610:813dcc80987e 340
mbed_official 610:813dcc80987e 341 /**
mbed_official 610:813dcc80987e 342 * @brief FMC_NORSRAM Timing parameters structure definition
mbed_official 610:813dcc80987e 343 */
mbed_official 610:813dcc80987e 344 typedef struct
mbed_official 610:813dcc80987e 345 {
mbed_official 610:813dcc80987e 346 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 610:813dcc80987e 347 the duration of the address setup time.
mbed_official 610:813dcc80987e 348 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
mbed_official 610:813dcc80987e 349 @note This parameter is not used with synchronous NOR Flash memories. */
mbed_official 610:813dcc80987e 350
mbed_official 610:813dcc80987e 351 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 610:813dcc80987e 352 the duration of the address hold time.
mbed_official 610:813dcc80987e 353 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
mbed_official 610:813dcc80987e 354 @note This parameter is not used with synchronous NOR Flash memories. */
mbed_official 610:813dcc80987e 355
mbed_official 610:813dcc80987e 356 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 610:813dcc80987e 357 the duration of the data setup time.
mbed_official 610:813dcc80987e 358 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
mbed_official 610:813dcc80987e 359 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
mbed_official 610:813dcc80987e 360 NOR Flash memories. */
mbed_official 610:813dcc80987e 361
mbed_official 610:813dcc80987e 362 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
mbed_official 610:813dcc80987e 363 the duration of the bus turnaround.
mbed_official 610:813dcc80987e 364 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
mbed_official 610:813dcc80987e 365 @note This parameter is only used for multiplexed NOR Flash memories. */
mbed_official 610:813dcc80987e 366
mbed_official 610:813dcc80987e 367 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
mbed_official 610:813dcc80987e 368 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
mbed_official 610:813dcc80987e 369 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
mbed_official 610:813dcc80987e 370 accesses. */
mbed_official 610:813dcc80987e 371
mbed_official 610:813dcc80987e 372 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
mbed_official 610:813dcc80987e 373 to the memory before getting the first data.
mbed_official 610:813dcc80987e 374 The parameter value depends on the memory type as shown below:
mbed_official 610:813dcc80987e 375 - It must be set to 0 in case of a CRAM
mbed_official 610:813dcc80987e 376 - It is don't care in asynchronous NOR, SRAM or ROM accesses
mbed_official 610:813dcc80987e 377 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
mbed_official 610:813dcc80987e 378 with synchronous burst mode enable */
mbed_official 610:813dcc80987e 379
mbed_official 610:813dcc80987e 380 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
mbed_official 610:813dcc80987e 381 This parameter can be a value of @ref FMC_Access_Mode */
mbed_official 610:813dcc80987e 382 }FMC_NORSRAM_TimingTypeDef;
mbed_official 610:813dcc80987e 383
mbed_official 610:813dcc80987e 384 /**
mbed_official 610:813dcc80987e 385 * @brief FMC_NAND Configuration Structure definition
mbed_official 610:813dcc80987e 386 */
mbed_official 610:813dcc80987e 387 typedef struct
mbed_official 610:813dcc80987e 388 {
mbed_official 610:813dcc80987e 389 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
mbed_official 610:813dcc80987e 390 This parameter can be a value of @ref FMC_NAND_Bank */
mbed_official 610:813dcc80987e 391
mbed_official 610:813dcc80987e 392 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
mbed_official 610:813dcc80987e 393 This parameter can be any value of @ref FMC_Wait_feature */
mbed_official 610:813dcc80987e 394
mbed_official 610:813dcc80987e 395 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
mbed_official 610:813dcc80987e 396 This parameter can be any value of @ref FMC_NAND_Data_Width */
mbed_official 610:813dcc80987e 397
mbed_official 610:813dcc80987e 398 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
mbed_official 610:813dcc80987e 399 This parameter can be any value of @ref FMC_ECC */
mbed_official 610:813dcc80987e 400
mbed_official 610:813dcc80987e 401 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
mbed_official 610:813dcc80987e 402 This parameter can be any value of @ref FMC_ECC_Page_Size */
mbed_official 610:813dcc80987e 403
mbed_official 610:813dcc80987e 404 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
mbed_official 610:813dcc80987e 405 delay between CLE low and RE low.
mbed_official 610:813dcc80987e 406 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 407
mbed_official 610:813dcc80987e 408 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
mbed_official 610:813dcc80987e 409 delay between ALE low and RE low.
mbed_official 610:813dcc80987e 410 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 411 }FMC_NAND_InitTypeDef;
mbed_official 610:813dcc80987e 412
mbed_official 610:813dcc80987e 413 /**
mbed_official 610:813dcc80987e 414 * @brief FMC_NAND Timing parameters structure definition
mbed_official 610:813dcc80987e 415 */
mbed_official 610:813dcc80987e 416 typedef struct
mbed_official 610:813dcc80987e 417 {
mbed_official 610:813dcc80987e 418 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
mbed_official 610:813dcc80987e 419 the command assertion for NAND-Flash read or write access
mbed_official 610:813dcc80987e 420 to common/Attribute or I/O memory space (depending on
mbed_official 610:813dcc80987e 421 the memory space timing to be configured).
mbed_official 610:813dcc80987e 422 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 423
mbed_official 610:813dcc80987e 424 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
mbed_official 610:813dcc80987e 425 command for NAND-Flash read or write access to
mbed_official 610:813dcc80987e 426 common/Attribute or I/O memory space (depending on the
mbed_official 610:813dcc80987e 427 memory space timing to be configured).
mbed_official 610:813dcc80987e 428 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 429
mbed_official 610:813dcc80987e 430 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
mbed_official 610:813dcc80987e 431 (and data for write access) after the command de-assertion
mbed_official 610:813dcc80987e 432 for NAND-Flash read or write access to common/Attribute
mbed_official 610:813dcc80987e 433 or I/O memory space (depending on the memory space timing
mbed_official 610:813dcc80987e 434 to be configured).
mbed_official 610:813dcc80987e 435 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 436
mbed_official 610:813dcc80987e 437 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
mbed_official 610:813dcc80987e 438 data bus is kept in HiZ after the start of a NAND-Flash
mbed_official 610:813dcc80987e 439 write access to common/Attribute or I/O memory space (depending
mbed_official 610:813dcc80987e 440 on the memory space timing to be configured).
mbed_official 610:813dcc80987e 441 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
mbed_official 610:813dcc80987e 442 }FMC_NAND_PCC_TimingTypeDef;
mbed_official 610:813dcc80987e 443
mbed_official 610:813dcc80987e 444 /**
mbed_official 610:813dcc80987e 445 * @}
mbed_official 610:813dcc80987e 446 */
mbed_official 610:813dcc80987e 447
mbed_official 610:813dcc80987e 448 /* Exported constants --------------------------------------------------------*/
mbed_official 610:813dcc80987e 449 /** @addtogroup FMC_LL_Exported_Constants FMC Low Layer Exported Constants
mbed_official 610:813dcc80987e 450 * @{
mbed_official 610:813dcc80987e 451 */
mbed_official 610:813dcc80987e 452
mbed_official 610:813dcc80987e 453 /** @defgroup FMC_NOR_SRAM_Exported_constants FMC NOR/SRAM Exported constants
mbed_official 610:813dcc80987e 454 * @{
mbed_official 610:813dcc80987e 455 */
mbed_official 610:813dcc80987e 456
mbed_official 610:813dcc80987e 457 /** @defgroup FMC_NORSRAM_Bank FMC NOR/SRAM Bank
mbed_official 610:813dcc80987e 458 * @{
mbed_official 610:813dcc80987e 459 */
mbed_official 610:813dcc80987e 460 #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 461 #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002)
mbed_official 610:813dcc80987e 462 #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004)
mbed_official 610:813dcc80987e 463 #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006)
mbed_official 610:813dcc80987e 464 /**
mbed_official 610:813dcc80987e 465 * @}
mbed_official 610:813dcc80987e 466 */
mbed_official 610:813dcc80987e 467
mbed_official 610:813dcc80987e 468 /** @defgroup FMC_Data_Address_Bus_Multiplexing FMC Data Address Bus Multiplexing
mbed_official 610:813dcc80987e 469 * @{
mbed_official 610:813dcc80987e 470 */
mbed_official 610:813dcc80987e 471 #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 472 #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)FMC_BCRx_MUXEN)
mbed_official 610:813dcc80987e 473 /**
mbed_official 610:813dcc80987e 474 * @}
mbed_official 610:813dcc80987e 475 */
mbed_official 610:813dcc80987e 476
mbed_official 610:813dcc80987e 477 /** @defgroup FMC_Memory_Type FMC Memory Type
mbed_official 610:813dcc80987e 478 * @{
mbed_official 610:813dcc80987e 479 */
mbed_official 610:813dcc80987e 480 #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 481 #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)FMC_BCRx_MTYP_0)
mbed_official 610:813dcc80987e 482 #define FMC_MEMORY_TYPE_NOR ((uint32_t)FMC_BCRx_MTYP_1)
mbed_official 610:813dcc80987e 483 /**
mbed_official 610:813dcc80987e 484 * @}
mbed_official 610:813dcc80987e 485 */
mbed_official 610:813dcc80987e 486
mbed_official 610:813dcc80987e 487 /** @defgroup FMC_NORSRAM_Data_Width FMC NORSRAM Data Width
mbed_official 610:813dcc80987e 488 * @{
mbed_official 610:813dcc80987e 489 */
mbed_official 610:813dcc80987e 490 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 491 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)FMC_BCRx_MWID_0)
mbed_official 610:813dcc80987e 492 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)FMC_BCRx_MWID_1)
mbed_official 610:813dcc80987e 493 /**
mbed_official 610:813dcc80987e 494 * @}
mbed_official 610:813dcc80987e 495 */
mbed_official 610:813dcc80987e 496
mbed_official 610:813dcc80987e 497 /** @defgroup FMC_NORSRAM_Flash_Access FMC NORSRAM Flash Access
mbed_official 610:813dcc80987e 498 * @{
mbed_official 610:813dcc80987e 499 */
mbed_official 610:813dcc80987e 500 #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)FMC_BCRx_FACCEN)
mbed_official 610:813dcc80987e 501 #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 502 /**
mbed_official 610:813dcc80987e 503 * @}
mbed_official 610:813dcc80987e 504 */
mbed_official 610:813dcc80987e 505
mbed_official 610:813dcc80987e 506 /** @defgroup FMC_Burst_Access_Mode FMC Burst Access Mode
mbed_official 610:813dcc80987e 507 * @{
mbed_official 610:813dcc80987e 508 */
mbed_official 610:813dcc80987e 509 #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 510 #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)FMC_BCRx_BURSTEN)
mbed_official 610:813dcc80987e 511 /**
mbed_official 610:813dcc80987e 512 * @}
mbed_official 610:813dcc80987e 513 */
mbed_official 610:813dcc80987e 514
mbed_official 610:813dcc80987e 515
mbed_official 610:813dcc80987e 516 /** @defgroup FMC_Wait_Signal_Polarity FMC Wait Signal Polarity
mbed_official 610:813dcc80987e 517 * @{
mbed_official 610:813dcc80987e 518 */
mbed_official 610:813dcc80987e 519 #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 520 #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)FMC_BCRx_WAITPOL)
mbed_official 610:813dcc80987e 521 /**
mbed_official 610:813dcc80987e 522 * @}
mbed_official 610:813dcc80987e 523 */
mbed_official 610:813dcc80987e 524
mbed_official 610:813dcc80987e 525 /** @defgroup FMC_Wait_Timing FMC Wait Timing
mbed_official 610:813dcc80987e 526 * @{
mbed_official 610:813dcc80987e 527 */
mbed_official 610:813dcc80987e 528 #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 529 #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)FMC_BCRx_WAITCFG)
mbed_official 610:813dcc80987e 530
mbed_official 610:813dcc80987e 531 /**
mbed_official 610:813dcc80987e 532 * @}
mbed_official 610:813dcc80987e 533 */
mbed_official 610:813dcc80987e 534
mbed_official 610:813dcc80987e 535 /** @defgroup FMC_Write_Operation FMC Write Operation
mbed_official 610:813dcc80987e 536 * @{
mbed_official 610:813dcc80987e 537 */
mbed_official 610:813dcc80987e 538 #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 539 #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)FMC_BCRx_WREN)
mbed_official 610:813dcc80987e 540 /**
mbed_official 610:813dcc80987e 541 * @}
mbed_official 610:813dcc80987e 542 */
mbed_official 610:813dcc80987e 543
mbed_official 610:813dcc80987e 544 /** @defgroup FMC_Wait_Signal FMC Wait Signal
mbed_official 610:813dcc80987e 545 * @{
mbed_official 610:813dcc80987e 546 */
mbed_official 610:813dcc80987e 547 #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 548 #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)FMC_BCRx_WAITEN)
mbed_official 610:813dcc80987e 549 /**
mbed_official 610:813dcc80987e 550 * @}
mbed_official 610:813dcc80987e 551 */
mbed_official 610:813dcc80987e 552
mbed_official 610:813dcc80987e 553 /** @defgroup FMC_Extended_Mode FMC Extended Mode
mbed_official 610:813dcc80987e 554 * @{
mbed_official 610:813dcc80987e 555 */
mbed_official 610:813dcc80987e 556 #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 557 #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)FMC_BCRx_EXTMOD)
mbed_official 610:813dcc80987e 558 /**
mbed_official 610:813dcc80987e 559 * @}
mbed_official 610:813dcc80987e 560 */
mbed_official 610:813dcc80987e 561
mbed_official 610:813dcc80987e 562 /** @defgroup FMC_AsynchronousWait FMC Asynchronous Wait
mbed_official 610:813dcc80987e 563 * @{
mbed_official 610:813dcc80987e 564 */
mbed_official 610:813dcc80987e 565 #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 566 #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)FMC_BCRx_ASYNCWAIT)
mbed_official 610:813dcc80987e 567 /**
mbed_official 610:813dcc80987e 568 * @}
mbed_official 610:813dcc80987e 569 */
mbed_official 610:813dcc80987e 570
mbed_official 610:813dcc80987e 571 /** @defgroup FMC_Page_Size FMC Page Size
mbed_official 610:813dcc80987e 572 * @{
mbed_official 610:813dcc80987e 573 */
mbed_official 610:813dcc80987e 574 #define FMC_PAGE_SIZE_NONE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 575 #define FMC_PAGE_SIZE_128 ((uint32_t)FMC_BCRx_CPSIZE_0)
mbed_official 610:813dcc80987e 576 #define FMC_PAGE_SIZE_256 ((uint32_t)FMC_BCRx_CPSIZE_1)
mbed_official 610:813dcc80987e 577 #define FMC_PAGE_SIZE_1024 ((uint32_t)FMC_BCRx_CPSIZE_2)
mbed_official 610:813dcc80987e 578 /**
mbed_official 610:813dcc80987e 579 * @}
mbed_official 610:813dcc80987e 580 */
mbed_official 610:813dcc80987e 581
mbed_official 610:813dcc80987e 582 /** @defgroup FMC_Write_Burst FMC Write Burst
mbed_official 610:813dcc80987e 583 * @{
mbed_official 610:813dcc80987e 584 */
mbed_official 610:813dcc80987e 585 #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 586 #define FMC_WRITE_BURST_ENABLE ((uint32_t)FMC_BCRx_CBURSTRW)
mbed_official 610:813dcc80987e 587 /**
mbed_official 610:813dcc80987e 588 * @}
mbed_official 610:813dcc80987e 589 */
mbed_official 610:813dcc80987e 590
mbed_official 610:813dcc80987e 591 /** @defgroup FMC_Continous_Clock FMC Continous Clock
mbed_official 610:813dcc80987e 592 * @{
mbed_official 610:813dcc80987e 593 */
mbed_official 610:813dcc80987e 594 #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 595 #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)FMC_BCR1_CCLKEN)
mbed_official 610:813dcc80987e 596 /**
mbed_official 610:813dcc80987e 597 * @}
mbed_official 610:813dcc80987e 598 */
mbed_official 610:813dcc80987e 599
mbed_official 610:813dcc80987e 600 /** @defgroup FMC_Write_FIFO FMC Write FIFO
mbed_official 610:813dcc80987e 601 * @{
mbed_official 610:813dcc80987e 602 */
mbed_official 610:813dcc80987e 603 #define FMC_WRITE_FIFO_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 604 #define FMC_WRITE_FIFO_ENABLE ((uint32_t)FMC_BCR1_WFDIS)
mbed_official 610:813dcc80987e 605 /**
mbed_official 610:813dcc80987e 606 * @}
mbed_official 610:813dcc80987e 607 */
mbed_official 610:813dcc80987e 608
mbed_official 610:813dcc80987e 609 /** @defgroup FMC_Access_Mode FMC Access Mode
mbed_official 610:813dcc80987e 610 * @{
mbed_official 610:813dcc80987e 611 */
mbed_official 610:813dcc80987e 612 #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 613 #define FMC_ACCESS_MODE_B ((uint32_t)FMC_BTRx_ACCMOD_0)
mbed_official 610:813dcc80987e 614 #define FMC_ACCESS_MODE_C ((uint32_t)FMC_BTRx_ACCMOD_1)
mbed_official 610:813dcc80987e 615 #define FMC_ACCESS_MODE_D ((uint32_t)(FMC_BTRx_ACCMOD_0|FMC_BTRx_ACCMOD_1))
mbed_official 610:813dcc80987e 616 /**
mbed_official 610:813dcc80987e 617 * @}
mbed_official 610:813dcc80987e 618 */
mbed_official 610:813dcc80987e 619
mbed_official 610:813dcc80987e 620 /**
mbed_official 610:813dcc80987e 621 * @}
mbed_official 610:813dcc80987e 622 */
mbed_official 610:813dcc80987e 623
mbed_official 610:813dcc80987e 624 /**
mbed_official 610:813dcc80987e 625 * @}
mbed_official 610:813dcc80987e 626 */
mbed_official 610:813dcc80987e 627
mbed_official 610:813dcc80987e 628 /** @defgroup FMC_NAND_Controller FMC NAND Exported constants
mbed_official 610:813dcc80987e 629 * @{
mbed_official 610:813dcc80987e 630 */
mbed_official 610:813dcc80987e 631
mbed_official 610:813dcc80987e 632 /** @defgroup FMC_NAND_Bank FMC NAND Bank
mbed_official 610:813dcc80987e 633 * @{
mbed_official 610:813dcc80987e 634 */
mbed_official 610:813dcc80987e 635 #define FMC_NAND_BANK3 ((uint32_t)0x00000100)
mbed_official 610:813dcc80987e 636 /**
mbed_official 610:813dcc80987e 637 * @}
mbed_official 610:813dcc80987e 638 */
mbed_official 610:813dcc80987e 639
mbed_official 610:813dcc80987e 640 /** @defgroup FMC_Wait_feature FMC Wait feature
mbed_official 610:813dcc80987e 641 * @{
mbed_official 610:813dcc80987e 642 */
mbed_official 610:813dcc80987e 643 #define FMC_NAND_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 644 #define FMC_NAND_WAIT_FEATURE_ENABLE ((uint32_t)FMC_PCR_PWAITEN)
mbed_official 610:813dcc80987e 645 /**
mbed_official 610:813dcc80987e 646 * @}
mbed_official 610:813dcc80987e 647 */
mbed_official 610:813dcc80987e 648
mbed_official 610:813dcc80987e 649 /** @defgroup FMC_PCR_Memory_Type FMC PCR Memory Type
mbed_official 610:813dcc80987e 650 * @{
mbed_official 610:813dcc80987e 651 */
mbed_official 610:813dcc80987e 652 #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)FMC_PCR_PTYP)
mbed_official 610:813dcc80987e 653 /**
mbed_official 610:813dcc80987e 654 * @}
mbed_official 610:813dcc80987e 655 */
mbed_official 610:813dcc80987e 656
mbed_official 610:813dcc80987e 657 /** @defgroup FMC_NAND_Data_Width FMC NAND Data Width
mbed_official 610:813dcc80987e 658 * @{
mbed_official 610:813dcc80987e 659 */
mbed_official 610:813dcc80987e 660 #define FMC_NAND_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 661 #define FMC_NAND_MEM_BUS_WIDTH_16 ((uint32_t)FMC_PCR_PWID_0)
mbed_official 610:813dcc80987e 662 /**
mbed_official 610:813dcc80987e 663 * @}
mbed_official 610:813dcc80987e 664 */
mbed_official 610:813dcc80987e 665
mbed_official 610:813dcc80987e 666 /** @defgroup FMC_ECC FMC NAND ECC
mbed_official 610:813dcc80987e 667 * @{
mbed_official 610:813dcc80987e 668 */
mbed_official 610:813dcc80987e 669 #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 670 #define FMC_NAND_ECC_ENABLE ((uint32_t)FMC_PCR_ECCEN)
mbed_official 610:813dcc80987e 671 /**
mbed_official 610:813dcc80987e 672 * @}
mbed_official 610:813dcc80987e 673 */
mbed_official 610:813dcc80987e 674
mbed_official 610:813dcc80987e 675 /** @defgroup FMC_ECC_Page_Size FMC NAND ECC Page Size
mbed_official 610:813dcc80987e 676 * @{
mbed_official 610:813dcc80987e 677 */
mbed_official 610:813dcc80987e 678 #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 679 #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)FMC_PCR_ECCPS_0)
mbed_official 610:813dcc80987e 680 #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)FMC_PCR_ECCPS_1)
mbed_official 610:813dcc80987e 681 #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)FMC_PCR_ECCPS_0|FMC_PCR_ECCPS_1)
mbed_official 610:813dcc80987e 682 #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)FMC_PCR_ECCPS_2)
mbed_official 610:813dcc80987e 683 #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)FMC_PCR_ECCPS_0|FMC_PCR_ECCPS_2)
mbed_official 610:813dcc80987e 684 /**
mbed_official 610:813dcc80987e 685 * @}
mbed_official 610:813dcc80987e 686 */
mbed_official 610:813dcc80987e 687
mbed_official 610:813dcc80987e 688 /**
mbed_official 610:813dcc80987e 689 * @}
mbed_official 610:813dcc80987e 690 */
mbed_official 610:813dcc80987e 691
mbed_official 610:813dcc80987e 692 /**
mbed_official 610:813dcc80987e 693 * @}
mbed_official 610:813dcc80987e 694 */
mbed_official 610:813dcc80987e 695
mbed_official 610:813dcc80987e 696 /** @defgroup FMC_Interrupt_definition FMC Interrupt definition
mbed_official 610:813dcc80987e 697 * @brief FMC Interrupt definition
mbed_official 610:813dcc80987e 698 * @{
mbed_official 610:813dcc80987e 699 */
mbed_official 610:813dcc80987e 700 #define FMC_IT_RISING_EDGE ((uint32_t)FMC_SR_IREN)
mbed_official 610:813dcc80987e 701 #define FMC_IT_LEVEL ((uint32_t)FMC_SR_ILEN)
mbed_official 610:813dcc80987e 702 #define FMC_IT_FALLING_EDGE ((uint32_t)FMC_SR_IFEN)
mbed_official 610:813dcc80987e 703 /**
mbed_official 610:813dcc80987e 704 * @}
mbed_official 610:813dcc80987e 705 */
mbed_official 610:813dcc80987e 706
mbed_official 610:813dcc80987e 707 /** @defgroup FMC_Flag_definition FMC Flag definition
mbed_official 610:813dcc80987e 708 * @brief FMC Flag definition
mbed_official 610:813dcc80987e 709 * @{
mbed_official 610:813dcc80987e 710 */
mbed_official 610:813dcc80987e 711 #define FMC_FLAG_RISING_EDGE ((uint32_t)FMC_SR_IRS)
mbed_official 610:813dcc80987e 712 #define FMC_FLAG_LEVEL ((uint32_t)FMC_SR_ILS)
mbed_official 610:813dcc80987e 713 #define FMC_FLAG_FALLING_EDGE ((uint32_t)FMC_SR_IFS)
mbed_official 610:813dcc80987e 714 #define FMC_FLAG_FEMPT ((uint32_t)FMC_SR_FEMPT)
mbed_official 610:813dcc80987e 715 /**
mbed_official 610:813dcc80987e 716 * @}
mbed_official 610:813dcc80987e 717 */
mbed_official 610:813dcc80987e 718
mbed_official 610:813dcc80987e 719 /* Exported macro ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 720
mbed_official 610:813dcc80987e 721 /** @defgroup FMC_Exported_Macros FMC Low Layer Exported Macros
mbed_official 610:813dcc80987e 722 * @{
mbed_official 610:813dcc80987e 723 */
mbed_official 610:813dcc80987e 724
mbed_official 610:813dcc80987e 725 /** @defgroup FMC_NOR_Macros FMC NOR/SRAM Exported Macros
mbed_official 610:813dcc80987e 726 * @brief macros to handle NOR device enable/disable and read/write operations
mbed_official 610:813dcc80987e 727 * @{
mbed_official 610:813dcc80987e 728 */
mbed_official 610:813dcc80987e 729
mbed_official 610:813dcc80987e 730 /**
mbed_official 610:813dcc80987e 731 * @brief Enable the NORSRAM device access.
mbed_official 610:813dcc80987e 732 * @param __INSTANCE__: FMC_NORSRAM Instance
mbed_official 610:813dcc80987e 733 * @param __BANK__: FMC_NORSRAM Bank
mbed_official 610:813dcc80987e 734 * @retval none
mbed_official 610:813dcc80987e 735 */
mbed_official 610:813dcc80987e 736 #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) SET_BIT((__INSTANCE__)->BTCR[(__BANK__)], FMC_BCRx_MBKEN)
mbed_official 610:813dcc80987e 737
mbed_official 610:813dcc80987e 738 /**
mbed_official 610:813dcc80987e 739 * @brief Disable the NORSRAM device access.
mbed_official 610:813dcc80987e 740 * @param __INSTANCE__: FMC_NORSRAM Instance
mbed_official 610:813dcc80987e 741 * @param __BANK__: FMC_NORSRAM Bank
mbed_official 610:813dcc80987e 742 * @retval none
mbed_official 610:813dcc80987e 743 */
mbed_official 610:813dcc80987e 744 #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->BTCR[(__BANK__)], FMC_BCRx_MBKEN)
mbed_official 610:813dcc80987e 745
mbed_official 610:813dcc80987e 746 /**
mbed_official 610:813dcc80987e 747 * @}
mbed_official 610:813dcc80987e 748 */
mbed_official 610:813dcc80987e 749
mbed_official 610:813dcc80987e 750 /** @defgroup FMC_NAND_Macros FMC NAND Macros
mbed_official 610:813dcc80987e 751 * @brief macros to handle NAND device enable/disable
mbed_official 610:813dcc80987e 752 * @{
mbed_official 610:813dcc80987e 753 */
mbed_official 610:813dcc80987e 754
mbed_official 610:813dcc80987e 755 /**
mbed_official 610:813dcc80987e 756 * @brief Enable the NAND device access.
mbed_official 610:813dcc80987e 757 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 758 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 759 * @retval none
mbed_official 610:813dcc80987e 760 */
mbed_official 610:813dcc80987e 761 #define __FMC_NAND_ENABLE(__INSTANCE__, __BANK__) SET_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
mbed_official 610:813dcc80987e 762
mbed_official 610:813dcc80987e 763 /**
mbed_official 610:813dcc80987e 764 * @brief Disable the NAND device access.
mbed_official 610:813dcc80987e 765 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 766 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 767 * @retval None
mbed_official 610:813dcc80987e 768 */
mbed_official 610:813dcc80987e 769 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
mbed_official 610:813dcc80987e 770
mbed_official 610:813dcc80987e 771 /**
mbed_official 610:813dcc80987e 772 * @}
mbed_official 610:813dcc80987e 773 */
mbed_official 610:813dcc80987e 774
mbed_official 610:813dcc80987e 775 /** @defgroup FMC_Interrupt FMC Interrupt
mbed_official 610:813dcc80987e 776 * @brief macros to handle FMC interrupts
mbed_official 610:813dcc80987e 777 * @{
mbed_official 610:813dcc80987e 778 */
mbed_official 610:813dcc80987e 779
mbed_official 610:813dcc80987e 780 /**
mbed_official 610:813dcc80987e 781 * @brief Enable the NAND device interrupt.
mbed_official 610:813dcc80987e 782 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 783 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 784 * @param __INTERRUPT__: FMC_NAND interrupt
mbed_official 610:813dcc80987e 785 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 786 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
mbed_official 610:813dcc80987e 787 * @arg FMC_IT_LEVEL: Interrupt level.
mbed_official 610:813dcc80987e 788 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
mbed_official 610:813dcc80987e 789 * @retval None
mbed_official 610:813dcc80987e 790 */
mbed_official 610:813dcc80987e 791 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) SET_BIT((__INSTANCE__)->SR, (__INTERRUPT__))
mbed_official 610:813dcc80987e 792
mbed_official 610:813dcc80987e 793 /**
mbed_official 610:813dcc80987e 794 * @brief Disable the NAND device interrupt.
mbed_official 610:813dcc80987e 795 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 796 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 797 * @param __INTERRUPT__: FMC_NAND interrupt
mbed_official 610:813dcc80987e 798 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 799 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
mbed_official 610:813dcc80987e 800 * @arg FMC_IT_LEVEL: Interrupt level.
mbed_official 610:813dcc80987e 801 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
mbed_official 610:813dcc80987e 802 * @retval None
mbed_official 610:813dcc80987e 803 */
mbed_official 610:813dcc80987e 804 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __BANK__, __INTERRUPT__) CLEAR_BIT((__INSTANCE__)->SR, (__INTERRUPT__))
mbed_official 610:813dcc80987e 805
mbed_official 610:813dcc80987e 806 /**
mbed_official 610:813dcc80987e 807 * @brief Get flag status of the NAND device.
mbed_official 610:813dcc80987e 808 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 809 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 810 * @param __FLAG__: FMC_NAND flag
mbed_official 610:813dcc80987e 811 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 812 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
mbed_official 610:813dcc80987e 813 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
mbed_official 610:813dcc80987e 814 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
mbed_official 610:813dcc80987e 815 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
mbed_official 610:813dcc80987e 816 * @retval The state of FLAG (SET or RESET).
mbed_official 610:813dcc80987e 817 */
mbed_official 610:813dcc80987e 818 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__INSTANCE__)->SR &(__FLAG__)) == (__FLAG__))
mbed_official 610:813dcc80987e 819
mbed_official 610:813dcc80987e 820 /**
mbed_official 610:813dcc80987e 821 * @brief Clear flag status of the NAND device.
mbed_official 610:813dcc80987e 822 * @param __INSTANCE__: FMC_NAND Instance
mbed_official 610:813dcc80987e 823 * @param __BANK__: FMC_NAND Bank
mbed_official 610:813dcc80987e 824 * @param __FLAG__: FMC_NAND flag
mbed_official 610:813dcc80987e 825 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 826 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
mbed_official 610:813dcc80987e 827 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
mbed_official 610:813dcc80987e 828 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
mbed_official 610:813dcc80987e 829 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
mbed_official 610:813dcc80987e 830 * @retval None
mbed_official 610:813dcc80987e 831 */
mbed_official 610:813dcc80987e 832 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __BANK__, __FLAG__) CLEAR_BIT((__INSTANCE__)->SR, (__FLAG__))
mbed_official 610:813dcc80987e 833
mbed_official 610:813dcc80987e 834
mbed_official 610:813dcc80987e 835 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 836 /** @addgroup FMC_LL_Exported_Functions FMC Low Layer Exported Functions
mbed_official 610:813dcc80987e 837 * @{
mbed_official 610:813dcc80987e 838 */
mbed_official 610:813dcc80987e 839
mbed_official 610:813dcc80987e 840 /* FMC_LL_NORSRAM Controller functions *******************************************/
mbed_official 610:813dcc80987e 841 /** @addgroup FMC_LL_NORSRAM_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 842 * @{
mbed_official 610:813dcc80987e 843 */
mbed_official 610:813dcc80987e 844 /* Initialization/de-initialization functions */
mbed_official 610:813dcc80987e 845 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init);
mbed_official 610:813dcc80987e 846 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
mbed_official 610:813dcc80987e 847 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
mbed_official 610:813dcc80987e 848 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
mbed_official 610:813dcc80987e 849 /**
mbed_official 610:813dcc80987e 850 * @}
mbed_official 610:813dcc80987e 851 */
mbed_official 610:813dcc80987e 852
mbed_official 610:813dcc80987e 853 /** @addtogroup FMC_LL_NORSRAM_Exported_Functions_Group2 Peripheral Control functions
mbed_official 610:813dcc80987e 854 * @{
mbed_official 610:813dcc80987e 855 */
mbed_official 610:813dcc80987e 856 /* FMC_NORSRAM Control functions */
mbed_official 610:813dcc80987e 857 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
mbed_official 610:813dcc80987e 858 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
mbed_official 610:813dcc80987e 859 /**
mbed_official 610:813dcc80987e 860 * @}
mbed_official 610:813dcc80987e 861 */
mbed_official 610:813dcc80987e 862
mbed_official 610:813dcc80987e 863 /* FMC_NAND Controller functions **********************************************/
mbed_official 610:813dcc80987e 864 /** @addtogroup FMC_LL_NAND_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 865 * @{
mbed_official 610:813dcc80987e 866 */
mbed_official 610:813dcc80987e 867 /* Initialization/de-initialization functions */
mbed_official 610:813dcc80987e 868 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init);
mbed_official 610:813dcc80987e 869 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
mbed_official 610:813dcc80987e 870 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
mbed_official 610:813dcc80987e 871 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
mbed_official 610:813dcc80987e 872 /**
mbed_official 610:813dcc80987e 873 * @}
mbed_official 610:813dcc80987e 874 */
mbed_official 610:813dcc80987e 875
mbed_official 610:813dcc80987e 876 /** @defgroup FMC_LL_NAND_Exported_Functions_Group2 FMC Low Layer Peripheral Control functions
mbed_official 610:813dcc80987e 877 * @{
mbed_official 610:813dcc80987e 878 */
mbed_official 610:813dcc80987e 879 /* FMC_NAND Control functions */
mbed_official 610:813dcc80987e 880 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
mbed_official 610:813dcc80987e 881 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
mbed_official 610:813dcc80987e 882 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
mbed_official 610:813dcc80987e 883 /**
mbed_official 610:813dcc80987e 884 * @}
mbed_official 610:813dcc80987e 885 */
mbed_official 610:813dcc80987e 886
mbed_official 610:813dcc80987e 887 /**
mbed_official 610:813dcc80987e 888 * @}
mbed_official 610:813dcc80987e 889 */
mbed_official 610:813dcc80987e 890
mbed_official 610:813dcc80987e 891 /**
mbed_official 610:813dcc80987e 892 * @}
mbed_official 610:813dcc80987e 893 */
mbed_official 610:813dcc80987e 894
mbed_official 610:813dcc80987e 895 /**
mbed_official 610:813dcc80987e 896 * @}
mbed_official 610:813dcc80987e 897 */
mbed_official 610:813dcc80987e 898
mbed_official 610:813dcc80987e 899 #ifdef __cplusplus
mbed_official 610:813dcc80987e 900 }
mbed_official 610:813dcc80987e 901 #endif
mbed_official 610:813dcc80987e 902
mbed_official 610:813dcc80987e 903 #endif /* __STM32L4xx_LL_FMC_H */
mbed_official 610:813dcc80987e 904
mbed_official 610:813dcc80987e 905 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/