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targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_tim.h@610:813dcc80987e, 2015-08-14 (annotated)

Committer:: mbed_official
Date:: Fri Aug 14 13:15:17 2015 +0100
Revision:: 610:813dcc80987e

Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599

Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/

DISCO_F746NG - Improvements

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	610:813dcc80987e	1	/**
mbed_official	610:813dcc80987e	2	******************************************************************************
mbed_official	610:813dcc80987e	3	* @file stm32l4xx_hal_tim.h
mbed_official	610:813dcc80987e	4	* @author MCD Application Team
mbed_official	610:813dcc80987e	5	* @version V1.0.0
mbed_official	610:813dcc80987e	6	* @date 26-June-2015
mbed_official	610:813dcc80987e	7	* @brief Header file of TIM HAL module.
mbed_official	610:813dcc80987e	8	******************************************************************************
mbed_official	610:813dcc80987e	9	* @attention
mbed_official	610:813dcc80987e	10	*
mbed_official	610:813dcc80987e	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official	610:813dcc80987e	12	*
mbed_official	610:813dcc80987e	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	610:813dcc80987e	14	* are permitted provided that the following conditions are met:
mbed_official	610:813dcc80987e	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	610:813dcc80987e	16	* this list of conditions and the following disclaimer.
mbed_official	610:813dcc80987e	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	610:813dcc80987e	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	610:813dcc80987e	19	* and/or other materials provided with the distribution.
mbed_official	610:813dcc80987e	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	610:813dcc80987e	21	* may be used to endorse or promote products derived from this software
mbed_official	610:813dcc80987e	22	* without specific prior written permission.
mbed_official	610:813dcc80987e	23	*
mbed_official	610:813dcc80987e	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	610:813dcc80987e	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	610:813dcc80987e	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	610:813dcc80987e	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	610:813dcc80987e	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	610:813dcc80987e	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	610:813dcc80987e	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	610:813dcc80987e	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	610:813dcc80987e	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	610:813dcc80987e	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	610:813dcc80987e	34	*
mbed_official	610:813dcc80987e	35	******************************************************************************
mbed_official	610:813dcc80987e	36	*/
mbed_official	610:813dcc80987e	37
mbed_official	610:813dcc80987e	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	610:813dcc80987e	39	#ifndef __STM32L4xx_HAL_TIM_H
mbed_official	610:813dcc80987e	40	#define __STM32L4xx_HAL_TIM_H
mbed_official	610:813dcc80987e	41
mbed_official	610:813dcc80987e	42	#ifdef __cplusplus
mbed_official	610:813dcc80987e	43	extern "C" {
mbed_official	610:813dcc80987e	44	#endif
mbed_official	610:813dcc80987e	45
mbed_official	610:813dcc80987e	46	/* Includes ------------------------------------------------------------------*/
mbed_official	610:813dcc80987e	47	#include "stm32l4xx_hal_def.h"
mbed_official	610:813dcc80987e	48
mbed_official	610:813dcc80987e	49	/** @addtogroup STM32L4xx_HAL_Driver
mbed_official	610:813dcc80987e	50	* @{
mbed_official	610:813dcc80987e	51	*/
mbed_official	610:813dcc80987e	52
mbed_official	610:813dcc80987e	53	/** @addtogroup TIM
mbed_official	610:813dcc80987e	54	* @{
mbed_official	610:813dcc80987e	55	*/
mbed_official	610:813dcc80987e	56
mbed_official	610:813dcc80987e	57	/* Exported types ------------------------------------------------------------*/
mbed_official	610:813dcc80987e	58	/** @defgroup TIM_Exported_Types TIM Exported Types
mbed_official	610:813dcc80987e	59	* @{
mbed_official	610:813dcc80987e	60	*/
mbed_official	610:813dcc80987e	61
mbed_official	610:813dcc80987e	62	/**
mbed_official	610:813dcc80987e	63	* @brief TIM Time base Configuration Structure definition
mbed_official	610:813dcc80987e	64	*/
mbed_official	610:813dcc80987e	65	typedef struct
mbed_official	610:813dcc80987e	66	{
mbed_official	610:813dcc80987e	67	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	610:813dcc80987e	68	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	610:813dcc80987e	69
mbed_official	610:813dcc80987e	70	uint32_t CounterMode; /*!< Specifies the counter mode.
mbed_official	610:813dcc80987e	71	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	610:813dcc80987e	72
mbed_official	610:813dcc80987e	73	uint32_t Period; /*!< Specifies the period value to be loaded into the active
mbed_official	610:813dcc80987e	74	Auto-Reload Register at the next update event.
mbed_official	610:813dcc80987e	75	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
mbed_official	610:813dcc80987e	76
mbed_official	610:813dcc80987e	77	uint32_t ClockDivision; /*!< Specifies the clock division.
mbed_official	610:813dcc80987e	78	This parameter can be a value of @ref TIM_ClockDivision */
mbed_official	610:813dcc80987e	79
mbed_official	610:813dcc80987e	80	uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
mbed_official	610:813dcc80987e	81	reaches zero, an update event is generated and counting restarts
mbed_official	610:813dcc80987e	82	from the RCR value (N).
mbed_official	610:813dcc80987e	83	This means in PWM mode that (N+1) corresponds to:
mbed_official	610:813dcc80987e	84	- the number of PWM periods in edge-aligned mode
mbed_official	610:813dcc80987e	85	- the number of half PWM period in center-aligned mode
mbed_official	610:813dcc80987e	86	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
mbed_official	610:813dcc80987e	87	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	88	} TIM_Base_InitTypeDef;
mbed_official	610:813dcc80987e	89
mbed_official	610:813dcc80987e	90	/**
mbed_official	610:813dcc80987e	91	* @brief TIM Output Compare Configuration Structure definition
mbed_official	610:813dcc80987e	92	*/
mbed_official	610:813dcc80987e	93	typedef struct
mbed_official	610:813dcc80987e	94	{
mbed_official	610:813dcc80987e	95	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	610:813dcc80987e	96	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	610:813dcc80987e	97
mbed_official	610:813dcc80987e	98	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	610:813dcc80987e	99	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	610:813dcc80987e	100
mbed_official	610:813dcc80987e	101	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	610:813dcc80987e	102	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	610:813dcc80987e	103
mbed_official	610:813dcc80987e	104	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	610:813dcc80987e	105	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	610:813dcc80987e	106	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	107
mbed_official	610:813dcc80987e	108	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
mbed_official	610:813dcc80987e	109	This parameter can be a value of @ref TIM_Output_Fast_State
mbed_official	610:813dcc80987e	110	@note This parameter is valid only in PWM1 and PWM2 mode. */
mbed_official	610:813dcc80987e	111
mbed_official	610:813dcc80987e	112
mbed_official	610:813dcc80987e	113	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	610:813dcc80987e	114	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	610:813dcc80987e	115	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	116
mbed_official	610:813dcc80987e	117	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	610:813dcc80987e	118	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	610:813dcc80987e	119	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	120	} TIM_OC_InitTypeDef;
mbed_official	610:813dcc80987e	121
mbed_official	610:813dcc80987e	122	/**
mbed_official	610:813dcc80987e	123	* @brief TIM One Pulse Mode Configuration Structure definition
mbed_official	610:813dcc80987e	124	*/
mbed_official	610:813dcc80987e	125	typedef struct
mbed_official	610:813dcc80987e	126	{
mbed_official	610:813dcc80987e	127	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	610:813dcc80987e	128	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	610:813dcc80987e	129
mbed_official	610:813dcc80987e	130	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	610:813dcc80987e	131	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	610:813dcc80987e	132
mbed_official	610:813dcc80987e	133	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	610:813dcc80987e	134	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	610:813dcc80987e	135
mbed_official	610:813dcc80987e	136	uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
mbed_official	610:813dcc80987e	137	This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
mbed_official	610:813dcc80987e	138	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	139
mbed_official	610:813dcc80987e	140	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	610:813dcc80987e	141	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	610:813dcc80987e	142	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	143
mbed_official	610:813dcc80987e	144	uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	610:813dcc80987e	145	This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
mbed_official	610:813dcc80987e	146	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	610:813dcc80987e	147
mbed_official	610:813dcc80987e	148	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	610:813dcc80987e	149	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	610:813dcc80987e	150
mbed_official	610:813dcc80987e	151	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	610:813dcc80987e	152	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	610:813dcc80987e	153
mbed_official	610:813dcc80987e	154	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	610:813dcc80987e	155	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	156	} TIM_OnePulse_InitTypeDef;
mbed_official	610:813dcc80987e	157
mbed_official	610:813dcc80987e	158
mbed_official	610:813dcc80987e	159	/**
mbed_official	610:813dcc80987e	160	* @brief TIM Input Capture Configuration Structure definition
mbed_official	610:813dcc80987e	161	*/
mbed_official	610:813dcc80987e	162	typedef struct
mbed_official	610:813dcc80987e	163	{
mbed_official	610:813dcc80987e	164	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	610:813dcc80987e	165	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	610:813dcc80987e	166
mbed_official	610:813dcc80987e	167	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	610:813dcc80987e	168	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	610:813dcc80987e	169
mbed_official	610:813dcc80987e	170	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	610:813dcc80987e	171	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	610:813dcc80987e	172
mbed_official	610:813dcc80987e	173	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	610:813dcc80987e	174	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	175	} TIM_IC_InitTypeDef;
mbed_official	610:813dcc80987e	176
mbed_official	610:813dcc80987e	177	/**
mbed_official	610:813dcc80987e	178	* @brief TIM Encoder Configuration Structure definition
mbed_official	610:813dcc80987e	179	*/
mbed_official	610:813dcc80987e	180	typedef struct
mbed_official	610:813dcc80987e	181	{
mbed_official	610:813dcc80987e	182	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
mbed_official	610:813dcc80987e	183	This parameter can be a value of @ref TIM_Encoder_Mode */
mbed_official	610:813dcc80987e	184
mbed_official	610:813dcc80987e	185	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	610:813dcc80987e	186	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	610:813dcc80987e	187
mbed_official	610:813dcc80987e	188	uint32_t IC1Selection; /*!< Specifies the input.
mbed_official	610:813dcc80987e	189	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	610:813dcc80987e	190
mbed_official	610:813dcc80987e	191	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	610:813dcc80987e	192	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	610:813dcc80987e	193
mbed_official	610:813dcc80987e	194	uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official	610:813dcc80987e	195	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	196
mbed_official	610:813dcc80987e	197	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	610:813dcc80987e	198	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	610:813dcc80987e	199
mbed_official	610:813dcc80987e	200	uint32_t IC2Selection; /*!< Specifies the input.
mbed_official	610:813dcc80987e	201	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	610:813dcc80987e	202
mbed_official	610:813dcc80987e	203	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	610:813dcc80987e	204	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	610:813dcc80987e	205
mbed_official	610:813dcc80987e	206	uint32_t IC2Filter; /*!< Specifies the input capture filter.
mbed_official	610:813dcc80987e	207	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	208	} TIM_Encoder_InitTypeDef;
mbed_official	610:813dcc80987e	209
mbed_official	610:813dcc80987e	210
mbed_official	610:813dcc80987e	211	/**
mbed_official	610:813dcc80987e	212	* @brief Clock Configuration Handle Structure definition
mbed_official	610:813dcc80987e	213	*/
mbed_official	610:813dcc80987e	214	typedef struct
mbed_official	610:813dcc80987e	215	{
mbed_official	610:813dcc80987e	216	uint32_t ClockSource; /*!< TIM clock sources
mbed_official	610:813dcc80987e	217	This parameter can be a value of @ref TIM_Clock_Source */
mbed_official	610:813dcc80987e	218	uint32_t ClockPolarity; /*!< TIM clock polarity
mbed_official	610:813dcc80987e	219	This parameter can be a value of @ref TIM_Clock_Polarity */
mbed_official	610:813dcc80987e	220	uint32_t ClockPrescaler; /*!< TIM clock prescaler
mbed_official	610:813dcc80987e	221	This parameter can be a value of @ref TIM_Clock_Prescaler */
mbed_official	610:813dcc80987e	222	uint32_t ClockFilter; /*!< TIM clock filter
mbed_official	610:813dcc80987e	223	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	224	}TIM_ClockConfigTypeDef;
mbed_official	610:813dcc80987e	225
mbed_official	610:813dcc80987e	226	/**
mbed_official	610:813dcc80987e	227	* @brief Clear Input Configuration Handle Structure definition
mbed_official	610:813dcc80987e	228	*/
mbed_official	610:813dcc80987e	229	typedef struct
mbed_official	610:813dcc80987e	230	{
mbed_official	610:813dcc80987e	231	uint32_t ClearInputState; /*!< TIM clear Input state
mbed_official	610:813dcc80987e	232	This parameter can be ENABLE or DISABLE */
mbed_official	610:813dcc80987e	233	uint32_t ClearInputSource; /*!< TIM clear Input sources
mbed_official	610:813dcc80987e	234	This parameter can be a value of @ref TIM_ClearInput_Source */
mbed_official	610:813dcc80987e	235	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
mbed_official	610:813dcc80987e	236	This parameter can be a value of @ref TIM_ClearInput_Polarity */
mbed_official	610:813dcc80987e	237	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
mbed_official	610:813dcc80987e	238	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
mbed_official	610:813dcc80987e	239	uint32_t ClearInputFilter; /*!< TIM Clear Input filter
mbed_official	610:813dcc80987e	240	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	241	}TIM_ClearInputConfigTypeDef;
mbed_official	610:813dcc80987e	242
mbed_official	610:813dcc80987e	243	/**
mbed_official	610:813dcc80987e	244	* @brief TIM Master configuration Structure definition
mbed_official	610:813dcc80987e	245	* @note Advanced timers provide TRGO2 internal line which is redirected
mbed_official	610:813dcc80987e	246	* to the ADC
mbed_official	610:813dcc80987e	247	*/
mbed_official	610:813dcc80987e	248	typedef struct {
mbed_official	610:813dcc80987e	249	uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
mbed_official	610:813dcc80987e	250	This parameter can be a value of @ref TIM_Master_Mode_Selection */
mbed_official	610:813dcc80987e	251	uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
mbed_official	610:813dcc80987e	252	This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */
mbed_official	610:813dcc80987e	253	uint32_t MasterSlaveMode; /*!< Master/slave mode selection
mbed_official	610:813dcc80987e	254	This parameter can be a value of @ref TIM_Master_Slave_Mode */
mbed_official	610:813dcc80987e	255	}TIM_MasterConfigTypeDef;
mbed_official	610:813dcc80987e	256
mbed_official	610:813dcc80987e	257	/**
mbed_official	610:813dcc80987e	258	* @brief TIM Slave configuration Structure definition
mbed_official	610:813dcc80987e	259	*/
mbed_official	610:813dcc80987e	260	typedef struct {
mbed_official	610:813dcc80987e	261	uint32_t SlaveMode; /*!< Slave mode selection
mbed_official	610:813dcc80987e	262	This parameter can be a value of @ref TIM_Slave_Mode */
mbed_official	610:813dcc80987e	263	uint32_t InputTrigger; /*!< Input Trigger source
mbed_official	610:813dcc80987e	264	This parameter can be a value of @ref TIM_Trigger_Selection */
mbed_official	610:813dcc80987e	265	uint32_t TriggerPolarity; /*!< Input Trigger polarity
mbed_official	610:813dcc80987e	266	This parameter can be a value of @ref TIM_Trigger_Polarity */
mbed_official	610:813dcc80987e	267	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
mbed_official	610:813dcc80987e	268	This parameter can be a value of @ref TIM_Trigger_Prescaler */
mbed_official	610:813dcc80987e	269	uint32_t TriggerFilter; /*!< Input trigger filter
mbed_official	610:813dcc80987e	270	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	271
mbed_official	610:813dcc80987e	272	}TIM_SlaveConfigTypeDef;
mbed_official	610:813dcc80987e	273
mbed_official	610:813dcc80987e	274	/**
mbed_official	610:813dcc80987e	275	* @brief TIM Break input(s) and Dead time configuration Structure definition
mbed_official	610:813dcc80987e	276	* @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
mbed_official	610:813dcc80987e	277	* filter and polarity.
mbed_official	610:813dcc80987e	278	*/
mbed_official	610:813dcc80987e	279	typedef struct
mbed_official	610:813dcc80987e	280	{
mbed_official	610:813dcc80987e	281	uint32_t OffStateRunMode; /*!< TIM off state in run mode
mbed_official	610:813dcc80987e	282	This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official	610:813dcc80987e	283	uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
mbed_official	610:813dcc80987e	284	This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official	610:813dcc80987e	285	uint32_t LockLevel; /*!< TIM Lock level
mbed_official	610:813dcc80987e	286	This parameter can be a value of @ref TIM_Lock_level */
mbed_official	610:813dcc80987e	287	uint32_t DeadTime; /*!< TIM dead Time
mbed_official	610:813dcc80987e	288	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
mbed_official	610:813dcc80987e	289	uint32_t BreakState; /*!< TIM Break State
mbed_official	610:813dcc80987e	290	This parameter can be a value of @ref TIM_Break_Input_enable_disable */
mbed_official	610:813dcc80987e	291	uint32_t BreakPolarity; /*!< TIM Break input polarity
mbed_official	610:813dcc80987e	292	This parameter can be a value of @ref TIM_Break_Polarity */
mbed_official	610:813dcc80987e	293	uint32_t BreakFilter; /*!< Specifies the break input filter.
mbed_official	610:813dcc80987e	294	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	295	uint32_t Break2State; /*!< TIM Break2 State
mbed_official	610:813dcc80987e	296	This parameter can be a value of @ref TIM_Break2_Input_enable_disable */
mbed_official	610:813dcc80987e	297	uint32_t Break2Polarity; /*!< TIM Break2 input polarity
mbed_official	610:813dcc80987e	298	This parameter can be a value of @ref TIM_Break2_Polarity */
mbed_official	610:813dcc80987e	299	uint32_t Break2Filter; /*!< TIM break2 input filter.
mbed_official	610:813dcc80987e	300	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	610:813dcc80987e	301	uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
mbed_official	610:813dcc80987e	302	This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
mbed_official	610:813dcc80987e	303	} TIM_BreakDeadTimeConfigTypeDef;
mbed_official	610:813dcc80987e	304
mbed_official	610:813dcc80987e	305	/**
mbed_official	610:813dcc80987e	306	* @brief HAL State structures definition
mbed_official	610:813dcc80987e	307	*/
mbed_official	610:813dcc80987e	308	typedef enum
mbed_official	610:813dcc80987e	309	{
mbed_official	610:813dcc80987e	310	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
mbed_official	610:813dcc80987e	311	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	610:813dcc80987e	312	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
mbed_official	610:813dcc80987e	313	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
mbed_official	610:813dcc80987e	314	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
mbed_official	610:813dcc80987e	315	}HAL_TIM_StateTypeDef;
mbed_official	610:813dcc80987e	316
mbed_official	610:813dcc80987e	317	/**
mbed_official	610:813dcc80987e	318	* @brief HAL Active channel structures definition
mbed_official	610:813dcc80987e	319	*/
mbed_official	610:813dcc80987e	320	typedef enum
mbed_official	610:813dcc80987e	321	{
mbed_official	610:813dcc80987e	322	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
mbed_official	610:813dcc80987e	323	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
mbed_official	610:813dcc80987e	324	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
mbed_official	610:813dcc80987e	325	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
mbed_official	610:813dcc80987e	326	HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /!< The active channel is 5 /
mbed_official	610:813dcc80987e	327	HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /!< The active channel is 6 /
mbed_official	610:813dcc80987e	328	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
mbed_official	610:813dcc80987e	329	}HAL_TIM_ActiveChannel;
mbed_official	610:813dcc80987e	330
mbed_official	610:813dcc80987e	331	/**
mbed_official	610:813dcc80987e	332	* @brief TIM Time Base Handle Structure definition
mbed_official	610:813dcc80987e	333	*/
mbed_official	610:813dcc80987e	334	typedef struct
mbed_official	610:813dcc80987e	335	{
mbed_official	610:813dcc80987e	336	TIM_TypeDef Instance; /!< Register base address */
mbed_official	610:813dcc80987e	337	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
mbed_official	610:813dcc80987e	338	HAL_TIM_ActiveChannel Channel; /!< Active channel /
mbed_official	610:813dcc80987e	339	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
mbed_official	610:813dcc80987e	340	This array is accessed by a @ref DMA_Handle_index */
mbed_official	610:813dcc80987e	341	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	610:813dcc80987e	342	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
mbed_official	610:813dcc80987e	343	}TIM_HandleTypeDef;
mbed_official	610:813dcc80987e	344
mbed_official	610:813dcc80987e	345	/**
mbed_official	610:813dcc80987e	346	* @}
mbed_official	610:813dcc80987e	347	*/
mbed_official	610:813dcc80987e	348	/* End of exported types -----------------------------------------------------*/
mbed_official	610:813dcc80987e	349
mbed_official	610:813dcc80987e	350	/* Exported constants --------------------------------------------------------*/
mbed_official	610:813dcc80987e	351	/** @defgroup TIM_Exported_Constants TIM Exported Constants
mbed_official	610:813dcc80987e	352	* @{
mbed_official	610:813dcc80987e	353	*/
mbed_official	610:813dcc80987e	354
mbed_official	610:813dcc80987e	355	/** @defgroup TIM_ClearInput_Source TIM Clear Input Source
mbed_official	610:813dcc80987e	356	* @{
mbed_official	610:813dcc80987e	357	*/
mbed_official	610:813dcc80987e	358	#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
mbed_official	610:813dcc80987e	359	#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
mbed_official	610:813dcc80987e	360	#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	361	/**
mbed_official	610:813dcc80987e	362	* @}
mbed_official	610:813dcc80987e	363	*/
mbed_official	610:813dcc80987e	364
mbed_official	610:813dcc80987e	365	/** @defgroup TIM_DMA_Base_address TIM DMA Base Address
mbed_official	610:813dcc80987e	366	* @{
mbed_official	610:813dcc80987e	367	*/
mbed_official	610:813dcc80987e	368	#define TIM_DMABASE_CR1 (0x00000000)
mbed_official	610:813dcc80987e	369	#define TIM_DMABASE_CR2 (0x00000001)
mbed_official	610:813dcc80987e	370	#define TIM_DMABASE_SMCR (0x00000002)
mbed_official	610:813dcc80987e	371	#define TIM_DMABASE_DIER (0x00000003)
mbed_official	610:813dcc80987e	372	#define TIM_DMABASE_SR (0x00000004)
mbed_official	610:813dcc80987e	373	#define TIM_DMABASE_EGR (0x00000005)
mbed_official	610:813dcc80987e	374	#define TIM_DMABASE_CCMR1 (0x00000006)
mbed_official	610:813dcc80987e	375	#define TIM_DMABASE_CCMR2 (0x00000007)
mbed_official	610:813dcc80987e	376	#define TIM_DMABASE_CCER (0x00000008)
mbed_official	610:813dcc80987e	377	#define TIM_DMABASE_CNT (0x00000009)
mbed_official	610:813dcc80987e	378	#define TIM_DMABASE_PSC (0x0000000A)
mbed_official	610:813dcc80987e	379	#define TIM_DMABASE_ARR (0x0000000B)
mbed_official	610:813dcc80987e	380	#define TIM_DMABASE_RCR (0x0000000C)
mbed_official	610:813dcc80987e	381	#define TIM_DMABASE_CCR1 (0x0000000D)
mbed_official	610:813dcc80987e	382	#define TIM_DMABASE_CCR2 (0x0000000E)
mbed_official	610:813dcc80987e	383	#define TIM_DMABASE_CCR3 (0x0000000F)
mbed_official	610:813dcc80987e	384	#define TIM_DMABASE_CCR4 (0x00000010)
mbed_official	610:813dcc80987e	385	#define TIM_DMABASE_BDTR (0x00000011)
mbed_official	610:813dcc80987e	386	#define TIM_DMABASE_DCR (0x00000012)
mbed_official	610:813dcc80987e	387	#define TIM_DMABASE_DMAR (0x00000013)
mbed_official	610:813dcc80987e	388	#define TIM_DMABASE_OR1 (0x00000014)
mbed_official	610:813dcc80987e	389	#define TIM_DMABASE_CCMR3 (0x00000015)
mbed_official	610:813dcc80987e	390	#define TIM_DMABASE_CCR5 (0x00000016)
mbed_official	610:813dcc80987e	391	#define TIM_DMABASE_CCR6 (0x00000017)
mbed_official	610:813dcc80987e	392	#define TIM_DMABASE_OR2 (0x00000018)
mbed_official	610:813dcc80987e	393	#define TIM_DMABASE_OR3 (0x00000019)
mbed_official	610:813dcc80987e	394	/**
mbed_official	610:813dcc80987e	395	* @}
mbed_official	610:813dcc80987e	396	*/
mbed_official	610:813dcc80987e	397
mbed_official	610:813dcc80987e	398	/** @defgroup TIM_Event_Source TIM Extended Event Source
mbed_official	610:813dcc80987e	399	* @{
mbed_official	610:813dcc80987e	400	*/
mbed_official	610:813dcc80987e	401	#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /!< Reinitialize the counter and generates an update of the registers /
mbed_official	610:813dcc80987e	402	#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /!< A capture/compare event is generated on channel 1 /
mbed_official	610:813dcc80987e	403	#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /!< A capture/compare event is generated on channel 2 /
mbed_official	610:813dcc80987e	404	#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /!< A capture/compare event is generated on channel 3 /
mbed_official	610:813dcc80987e	405	#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /!< A capture/compare event is generated on channel 4 /
mbed_official	610:813dcc80987e	406	#define TIM_EVENTSOURCE_COM TIM_EGR_COMG /!< A commutation event is generated /
mbed_official	610:813dcc80987e	407	#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /!< A trigger event is generated /
mbed_official	610:813dcc80987e	408	#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /!< A break event is generated /
mbed_official	610:813dcc80987e	409	#define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /!< A break 2 event is generated /
mbed_official	610:813dcc80987e	410	/**
mbed_official	610:813dcc80987e	411	* @}
mbed_official	610:813dcc80987e	412	*/
mbed_official	610:813dcc80987e	413
mbed_official	610:813dcc80987e	414	/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity
mbed_official	610:813dcc80987e	415	* @{
mbed_official	610:813dcc80987e	416	*/
mbed_official	610:813dcc80987e	417	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
mbed_official	610:813dcc80987e	418	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
mbed_official	610:813dcc80987e	419	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
mbed_official	610:813dcc80987e	420	/**
mbed_official	610:813dcc80987e	421	* @}
mbed_official	610:813dcc80987e	422	*/
mbed_official	610:813dcc80987e	423
mbed_official	610:813dcc80987e	424	/** @defgroup TIM_ETR_Polarity TIM ETR Polarity
mbed_official	610:813dcc80987e	425	* @{
mbed_official	610:813dcc80987e	426	*/
mbed_official	610:813dcc80987e	427	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
mbed_official	610:813dcc80987e	428	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
mbed_official	610:813dcc80987e	429	/**
mbed_official	610:813dcc80987e	430	* @}
mbed_official	610:813dcc80987e	431	*/
mbed_official	610:813dcc80987e	432
mbed_official	610:813dcc80987e	433	/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
mbed_official	610:813dcc80987e	434	* @{
mbed_official	610:813dcc80987e	435	*/
mbed_official	610:813dcc80987e	436	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
mbed_official	610:813dcc80987e	437	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
mbed_official	610:813dcc80987e	438	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
mbed_official	610:813dcc80987e	439	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
mbed_official	610:813dcc80987e	440	/**
mbed_official	610:813dcc80987e	441	* @}
mbed_official	610:813dcc80987e	442	*/
mbed_official	610:813dcc80987e	443
mbed_official	610:813dcc80987e	444	/** @defgroup TIM_Counter_Mode TIM Counter Mode
mbed_official	610:813dcc80987e	445	* @{
mbed_official	610:813dcc80987e	446	*/
mbed_official	610:813dcc80987e	447	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	448	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
mbed_official	610:813dcc80987e	449	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
mbed_official	610:813dcc80987e	450	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
mbed_official	610:813dcc80987e	451	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
mbed_official	610:813dcc80987e	452	/**
mbed_official	610:813dcc80987e	453	* @}
mbed_official	610:813dcc80987e	454	*/
mbed_official	610:813dcc80987e	455
mbed_official	610:813dcc80987e	456	/** @defgroup TIM_ClockDivision TIM Clock Division
mbed_official	610:813dcc80987e	457	* @{
mbed_official	610:813dcc80987e	458	*/
mbed_official	610:813dcc80987e	459	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	460	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
mbed_official	610:813dcc80987e	461	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
mbed_official	610:813dcc80987e	462	/**
mbed_official	610:813dcc80987e	463	* @}
mbed_official	610:813dcc80987e	464	*/
mbed_official	610:813dcc80987e	465
mbed_official	610:813dcc80987e	466	/** @defgroup TIM_Output_Compare_State TIM Output Compare State
mbed_official	610:813dcc80987e	467	* @{
mbed_official	610:813dcc80987e	468	*/
mbed_official	610:813dcc80987e	469	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	470	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official	610:813dcc80987e	471	/**
mbed_official	610:813dcc80987e	472	* @}
mbed_official	610:813dcc80987e	473	*/
mbed_official	610:813dcc80987e	474
mbed_official	610:813dcc80987e	475	/** @defgroup TIM_Output_Fast_State TIM Output Fast State
mbed_official	610:813dcc80987e	476	* @{
mbed_official	610:813dcc80987e	477	*/
mbed_official	610:813dcc80987e	478	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	479	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
mbed_official	610:813dcc80987e	480	/**
mbed_official	610:813dcc80987e	481	* @}
mbed_official	610:813dcc80987e	482	*/
mbed_official	610:813dcc80987e	483
mbed_official	610:813dcc80987e	484	/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State
mbed_official	610:813dcc80987e	485	* @{
mbed_official	610:813dcc80987e	486	*/
mbed_official	610:813dcc80987e	487	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	488	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
mbed_official	610:813dcc80987e	489	/**
mbed_official	610:813dcc80987e	490	* @}
mbed_official	610:813dcc80987e	491	*/
mbed_official	610:813dcc80987e	492
mbed_official	610:813dcc80987e	493	/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
mbed_official	610:813dcc80987e	494	* @{
mbed_official	610:813dcc80987e	495	*/
mbed_official	610:813dcc80987e	496	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	497	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
mbed_official	610:813dcc80987e	498	/**
mbed_official	610:813dcc80987e	499	* @}
mbed_official	610:813dcc80987e	500	*/
mbed_official	610:813dcc80987e	501
mbed_official	610:813dcc80987e	502	/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
mbed_official	610:813dcc80987e	503	* @{
mbed_official	610:813dcc80987e	504	*/
mbed_official	610:813dcc80987e	505	#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	506	#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
mbed_official	610:813dcc80987e	507	/**
mbed_official	610:813dcc80987e	508	* @}
mbed_official	610:813dcc80987e	509	*/
mbed_official	610:813dcc80987e	510
mbed_official	610:813dcc80987e	511	/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
mbed_official	610:813dcc80987e	512	* @{
mbed_official	610:813dcc80987e	513	*/
mbed_official	610:813dcc80987e	514	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
mbed_official	610:813dcc80987e	515	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	516	/**
mbed_official	610:813dcc80987e	517	* @}
mbed_official	610:813dcc80987e	518	*/
mbed_official	610:813dcc80987e	519
mbed_official	610:813dcc80987e	520	/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
mbed_official	610:813dcc80987e	521	* @{
mbed_official	610:813dcc80987e	522	*/
mbed_official	610:813dcc80987e	523	#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
mbed_official	610:813dcc80987e	524	#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	525	/**
mbed_official	610:813dcc80987e	526	* @}
mbed_official	610:813dcc80987e	527	*/
mbed_official	610:813dcc80987e	528
mbed_official	610:813dcc80987e	529	/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
mbed_official	610:813dcc80987e	530	* @{
mbed_official	610:813dcc80987e	531	*/
mbed_official	610:813dcc80987e	532	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
mbed_official	610:813dcc80987e	533	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
mbed_official	610:813dcc80987e	534	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
mbed_official	610:813dcc80987e	535	/**
mbed_official	610:813dcc80987e	536	* @}
mbed_official	610:813dcc80987e	537	*/
mbed_official	610:813dcc80987e	538
mbed_official	610:813dcc80987e	539	/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
mbed_official	610:813dcc80987e	540	* @{
mbed_official	610:813dcc80987e	541	*/
mbed_official	610:813dcc80987e	542	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	610:813dcc80987e	543	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	610:813dcc80987e	544	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	610:813dcc80987e	545	connected to IC2, IC1, IC4 or IC3, respectively */
mbed_official	610:813dcc80987e	546	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
mbed_official	610:813dcc80987e	547	/**
mbed_official	610:813dcc80987e	548	* @}
mbed_official	610:813dcc80987e	549	*/
mbed_official	610:813dcc80987e	550
mbed_official	610:813dcc80987e	551	/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
mbed_official	610:813dcc80987e	552	* @{
mbed_official	610:813dcc80987e	553	*/
mbed_official	610:813dcc80987e	554	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
mbed_official	610:813dcc80987e	555	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
mbed_official	610:813dcc80987e	556	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
mbed_official	610:813dcc80987e	557	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
mbed_official	610:813dcc80987e	558	/**
mbed_official	610:813dcc80987e	559	* @}
mbed_official	610:813dcc80987e	560	*/
mbed_official	610:813dcc80987e	561
mbed_official	610:813dcc80987e	562	/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
mbed_official	610:813dcc80987e	563	* @{
mbed_official	610:813dcc80987e	564	*/
mbed_official	610:813dcc80987e	565	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
mbed_official	610:813dcc80987e	566	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	567	/**
mbed_official	610:813dcc80987e	568	* @}
mbed_official	610:813dcc80987e	569	*/
mbed_official	610:813dcc80987e	570
mbed_official	610:813dcc80987e	571	/** @defgroup TIM_Encoder_Mode TIM Encoder Mode
mbed_official	610:813dcc80987e	572	* @{
mbed_official	610:813dcc80987e	573	*/
mbed_official	610:813dcc80987e	574	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
mbed_official	610:813dcc80987e	575	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
mbed_official	610:813dcc80987e	576	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
mbed_official	610:813dcc80987e	577	/**
mbed_official	610:813dcc80987e	578	* @}
mbed_official	610:813dcc80987e	579	*/
mbed_official	610:813dcc80987e	580
mbed_official	610:813dcc80987e	581	/** @defgroup TIM_Interrupt_definition TIM interrupt Definition
mbed_official	610:813dcc80987e	582	* @{
mbed_official	610:813dcc80987e	583	*/
mbed_official	610:813dcc80987e	584	#define TIM_IT_UPDATE (TIM_DIER_UIE)
mbed_official	610:813dcc80987e	585	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
mbed_official	610:813dcc80987e	586	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
mbed_official	610:813dcc80987e	587	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
mbed_official	610:813dcc80987e	588	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
mbed_official	610:813dcc80987e	589	#define TIM_IT_COM (TIM_DIER_COMIE)
mbed_official	610:813dcc80987e	590	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
mbed_official	610:813dcc80987e	591	#define TIM_IT_BREAK (TIM_DIER_BIE)
mbed_official	610:813dcc80987e	592	/**
mbed_official	610:813dcc80987e	593	* @}
mbed_official	610:813dcc80987e	594	*/
mbed_official	610:813dcc80987e	595
mbed_official	610:813dcc80987e	596	/** @defgroup TIM_Commutation_Source TIM Commutation Source
mbed_official	610:813dcc80987e	597	* @{
mbed_official	610:813dcc80987e	598	*/
mbed_official	610:813dcc80987e	599	#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
mbed_official	610:813dcc80987e	600	#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	601	/**
mbed_official	610:813dcc80987e	602	* @}
mbed_official	610:813dcc80987e	603	*/
mbed_official	610:813dcc80987e	604
mbed_official	610:813dcc80987e	605	/** @defgroup TIM_DMA_sources TIM DMA Sources
mbed_official	610:813dcc80987e	606	* @{
mbed_official	610:813dcc80987e	607	*/
mbed_official	610:813dcc80987e	608	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
mbed_official	610:813dcc80987e	609	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
mbed_official	610:813dcc80987e	610	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
mbed_official	610:813dcc80987e	611	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
mbed_official	610:813dcc80987e	612	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
mbed_official	610:813dcc80987e	613	#define TIM_DMA_COM (TIM_DIER_COMDE)
mbed_official	610:813dcc80987e	614	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
mbed_official	610:813dcc80987e	615	/**
mbed_official	610:813dcc80987e	616	* @}
mbed_official	610:813dcc80987e	617	*/
mbed_official	610:813dcc80987e	618
mbed_official	610:813dcc80987e	619	/** @defgroup TIM_Flag_definition TIM Flag Definition
mbed_official	610:813dcc80987e	620	* @{
mbed_official	610:813dcc80987e	621	*/
mbed_official	610:813dcc80987e	622	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
mbed_official	610:813dcc80987e	623	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
mbed_official	610:813dcc80987e	624	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
mbed_official	610:813dcc80987e	625	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
mbed_official	610:813dcc80987e	626	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
mbed_official	610:813dcc80987e	627	#define TIM_FLAG_CC5 (TIM_SR_CC5IF)
mbed_official	610:813dcc80987e	628	#define TIM_FLAG_CC6 (TIM_SR_CC6IF)
mbed_official	610:813dcc80987e	629	#define TIM_FLAG_COM (TIM_SR_COMIF)
mbed_official	610:813dcc80987e	630	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
mbed_official	610:813dcc80987e	631	#define TIM_FLAG_BREAK (TIM_SR_BIF)
mbed_official	610:813dcc80987e	632	#define TIM_FLAG_BREAK2 (TIM_SR_B2IF)
mbed_official	610:813dcc80987e	633	#define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF)
mbed_official	610:813dcc80987e	634	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
mbed_official	610:813dcc80987e	635	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
mbed_official	610:813dcc80987e	636	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
mbed_official	610:813dcc80987e	637	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
mbed_official	610:813dcc80987e	638	/**
mbed_official	610:813dcc80987e	639	* @}
mbed_official	610:813dcc80987e	640	*/
mbed_official	610:813dcc80987e	641
mbed_official	610:813dcc80987e	642	/** @defgroup TIM_Channel TIM Channel
mbed_official	610:813dcc80987e	643	* @{
mbed_official	610:813dcc80987e	644	*/
mbed_official	610:813dcc80987e	645	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	646	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
mbed_official	610:813dcc80987e	647	#define TIM_CHANNEL_3 ((uint32_t)0x0008)
mbed_official	610:813dcc80987e	648	#define TIM_CHANNEL_4 ((uint32_t)0x000C)
mbed_official	610:813dcc80987e	649	#define TIM_CHANNEL_5 ((uint32_t)0x0010)
mbed_official	610:813dcc80987e	650	#define TIM_CHANNEL_6 ((uint32_t)0x0014)
mbed_official	610:813dcc80987e	651	#define TIM_CHANNEL_ALL ((uint32_t)0x003C)
mbed_official	610:813dcc80987e	652	/**
mbed_official	610:813dcc80987e	653	* @}
mbed_official	610:813dcc80987e	654	*/
mbed_official	610:813dcc80987e	655
mbed_official	610:813dcc80987e	656	/** @defgroup TIM_Clock_Source TIM Clock Source
mbed_official	610:813dcc80987e	657	* @{
mbed_official	610:813dcc80987e	658	*/
mbed_official	610:813dcc80987e	659	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
mbed_official	610:813dcc80987e	660	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
mbed_official	610:813dcc80987e	661	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	662	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
mbed_official	610:813dcc80987e	663	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
mbed_official	610:813dcc80987e	664	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
mbed_official	610:813dcc80987e	665	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
mbed_official	610:813dcc80987e	666	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
mbed_official	610:813dcc80987e	667	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
mbed_official	610:813dcc80987e	668	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
mbed_official	610:813dcc80987e	669	/**
mbed_official	610:813dcc80987e	670	* @}
mbed_official	610:813dcc80987e	671	*/
mbed_official	610:813dcc80987e	672
mbed_official	610:813dcc80987e	673	/** @defgroup TIM_Clock_Polarity TIM Clock Polarity
mbed_official	610:813dcc80987e	674	* @{
mbed_official	610:813dcc80987e	675	*/
mbed_official	610:813dcc80987e	676	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
mbed_official	610:813dcc80987e	677	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
mbed_official	610:813dcc80987e	678	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
mbed_official	610:813dcc80987e	679	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
mbed_official	610:813dcc80987e	680	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
mbed_official	610:813dcc80987e	681	/**
mbed_official	610:813dcc80987e	682	* @}
mbed_official	610:813dcc80987e	683	*/
mbed_official	610:813dcc80987e	684
mbed_official	610:813dcc80987e	685	/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
mbed_official	610:813dcc80987e	686	* @{
mbed_official	610:813dcc80987e	687	*/
mbed_official	610:813dcc80987e	688	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	610:813dcc80987e	689	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
mbed_official	610:813dcc80987e	690	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
mbed_official	610:813dcc80987e	691	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
mbed_official	610:813dcc80987e	692	/**
mbed_official	610:813dcc80987e	693	* @}
mbed_official	610:813dcc80987e	694	*/
mbed_official	610:813dcc80987e	695
mbed_official	610:813dcc80987e	696	/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
mbed_official	610:813dcc80987e	697	* @{
mbed_official	610:813dcc80987e	698	*/
mbed_official	610:813dcc80987e	699	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
mbed_official	610:813dcc80987e	700	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
mbed_official	610:813dcc80987e	701	/**
mbed_official	610:813dcc80987e	702	* @}
mbed_official	610:813dcc80987e	703	*/
mbed_official	610:813dcc80987e	704
mbed_official	610:813dcc80987e	705	/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
mbed_official	610:813dcc80987e	706	* @{
mbed_official	610:813dcc80987e	707	*/
mbed_official	610:813dcc80987e	708	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	610:813dcc80987e	709	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
mbed_official	610:813dcc80987e	710	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
mbed_official	610:813dcc80987e	711	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
mbed_official	610:813dcc80987e	712	/**
mbed_official	610:813dcc80987e	713	* @}
mbed_official	610:813dcc80987e	714	*/
mbed_official	610:813dcc80987e	715
mbed_official	610:813dcc80987e	716	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state
mbed_official	610:813dcc80987e	717	* @{
mbed_official	610:813dcc80987e	718	*/
mbed_official	610:813dcc80987e	719	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
mbed_official	610:813dcc80987e	720	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	721	/**
mbed_official	610:813dcc80987e	722	* @}
mbed_official	610:813dcc80987e	723	*/
mbed_official	610:813dcc80987e	724
mbed_official	610:813dcc80987e	725	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state
mbed_official	610:813dcc80987e	726	* @{
mbed_official	610:813dcc80987e	727	*/
mbed_official	610:813dcc80987e	728	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
mbed_official	610:813dcc80987e	729	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	730	/**
mbed_official	610:813dcc80987e	731	* @}
mbed_official	610:813dcc80987e	732	*/
mbed_official	610:813dcc80987e	733	/** @defgroup TIM_Lock_level TIM Lock level
mbed_official	610:813dcc80987e	734	* @{
mbed_official	610:813dcc80987e	735	*/
mbed_official	610:813dcc80987e	736	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	737	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
mbed_official	610:813dcc80987e	738	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
mbed_official	610:813dcc80987e	739	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
mbed_official	610:813dcc80987e	740	/**
mbed_official	610:813dcc80987e	741	* @}
mbed_official	610:813dcc80987e	742	*/
mbed_official	610:813dcc80987e	743
mbed_official	610:813dcc80987e	744	/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable
mbed_official	610:813dcc80987e	745	* @{
mbed_official	610:813dcc80987e	746	*/
mbed_official	610:813dcc80987e	747	#define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
mbed_official	610:813dcc80987e	748	#define TIM_BREAK_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	749	/**
mbed_official	610:813dcc80987e	750	* @}
mbed_official	610:813dcc80987e	751	*/
mbed_official	610:813dcc80987e	752
mbed_official	610:813dcc80987e	753	/** @defgroup TIM_Break_Polarity TIM Break Input Polarity
mbed_official	610:813dcc80987e	754	* @{
mbed_official	610:813dcc80987e	755	*/
mbed_official	610:813dcc80987e	756	#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	757	#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
mbed_official	610:813dcc80987e	758	/**
mbed_official	610:813dcc80987e	759	* @}
mbed_official	610:813dcc80987e	760	*/
mbed_official	610:813dcc80987e	761
mbed_official	610:813dcc80987e	762	/** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable
mbed_official	610:813dcc80987e	763	* @{
mbed_official	610:813dcc80987e	764	*/
mbed_official	610:813dcc80987e	765	#define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
mbed_official	610:813dcc80987e	766	#define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
mbed_official	610:813dcc80987e	767	/**
mbed_official	610:813dcc80987e	768	* @}
mbed_official	610:813dcc80987e	769	*/
mbed_official	610:813dcc80987e	770
mbed_official	610:813dcc80987e	771	/** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity
mbed_official	610:813dcc80987e	772	* @{
mbed_official	610:813dcc80987e	773	*/
mbed_official	610:813dcc80987e	774	#define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
mbed_official	610:813dcc80987e	775	#define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
mbed_official	610:813dcc80987e	776	/**
mbed_official	610:813dcc80987e	777	* @}
mbed_official	610:813dcc80987e	778	*/
mbed_official	610:813dcc80987e	779
mbed_official	610:813dcc80987e	780	/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
mbed_official	610:813dcc80987e	781	* @{
mbed_official	610:813dcc80987e	782	*/
mbed_official	610:813dcc80987e	783	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
mbed_official	610:813dcc80987e	784	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	785	/**
mbed_official	610:813dcc80987e	786	* @}
mbed_official	610:813dcc80987e	787	*/
mbed_official	610:813dcc80987e	788
mbed_official	610:813dcc80987e	789	/** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
mbed_official	610:813dcc80987e	790	* @{
mbed_official	610:813dcc80987e	791	*/
mbed_official	610:813dcc80987e	792	#define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
mbed_official	610:813dcc80987e	793	#define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
mbed_official	610:813dcc80987e	794	#define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
mbed_official	610:813dcc80987e	795	#define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
mbed_official	610:813dcc80987e	796	/**
mbed_official	610:813dcc80987e	797	* @}
mbed_official	610:813dcc80987e	798	*/
mbed_official	610:813dcc80987e	799
mbed_official	610:813dcc80987e	800	/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
mbed_official	610:813dcc80987e	801	* @{
mbed_official	610:813dcc80987e	802	*/
mbed_official	610:813dcc80987e	803	#define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	804	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official	610:813dcc80987e	805	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official	610:813dcc80987e	806	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	610:813dcc80987e	807	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official	610:813dcc80987e	808	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
mbed_official	610:813dcc80987e	809	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
mbed_official	610:813dcc80987e	810	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	610:813dcc80987e	811	/**
mbed_official	610:813dcc80987e	812	* @}
mbed_official	610:813dcc80987e	813	*/
mbed_official	610:813dcc80987e	814
mbed_official	610:813dcc80987e	815	/** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2)
mbed_official	610:813dcc80987e	816	* @{
mbed_official	610:813dcc80987e	817	*/
mbed_official	610:813dcc80987e	818	#define TIM_TRGO2_RESET ((uint32_t)0x00000000)
mbed_official	610:813dcc80987e	819	#define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	820	#define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
mbed_official	610:813dcc80987e	821	#define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	822	#define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
mbed_official	610:813dcc80987e	823	#define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	824	#define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1))
mbed_official	610:813dcc80987e	825	#define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	826	#define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
mbed_official	610:813dcc80987e	827	#define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	828	#define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1))
mbed_official	610:813dcc80987e	829	#define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	830	#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2))
mbed_official	610:813dcc80987e	831	#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	832	#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \|TIM_CR2_MMS2_1))
mbed_official	610:813dcc80987e	833	#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 \| TIM_CR2_MMS2_2 \| TIM_CR2_MMS2_1 \| TIM_CR2_MMS2_0))
mbed_official	610:813dcc80987e	834	/**
mbed_official	610:813dcc80987e	835	* @}
mbed_official	610:813dcc80987e	836	*/
mbed_official	610:813dcc80987e	837
mbed_official	610:813dcc80987e	838	/** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode
mbed_official	610:813dcc80987e	839	* @{
mbed_official	610:813dcc80987e	840	*/
mbed_official	610:813dcc80987e	841	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official	610:813dcc80987e	842	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	843	/**
mbed_official	610:813dcc80987e	844	* @}
mbed_official	610:813dcc80987e	845	*/
mbed_official	610:813dcc80987e	846
mbed_official	610:813dcc80987e	847	/** @defgroup TIM_Slave_Mode TIM Slave mode
mbed_official	610:813dcc80987e	848	* @{
mbed_official	610:813dcc80987e	849	*/
mbed_official	610:813dcc80987e	850	#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	851	#define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
mbed_official	610:813dcc80987e	852	#define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_0))
mbed_official	610:813dcc80987e	853	#define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1))
mbed_official	610:813dcc80987e	854	#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 \| TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0))
mbed_official	610:813dcc80987e	855	#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
mbed_official	610:813dcc80987e	856	/**
mbed_official	610:813dcc80987e	857	* @}
mbed_official	610:813dcc80987e	858	*/
mbed_official	610:813dcc80987e	859
mbed_official	610:813dcc80987e	860	/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes
mbed_official	610:813dcc80987e	861	* @{
mbed_official	610:813dcc80987e	862	*/
mbed_official	610:813dcc80987e	863	#define TIM_OCMODE_TIMING ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	864	#define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
mbed_official	610:813dcc80987e	865	#define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
mbed_official	610:813dcc80987e	866	#define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)
mbed_official	610:813dcc80987e	867	#define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)
mbed_official	610:813dcc80987e	868	#define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)
mbed_official	610:813dcc80987e	869	#define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)
mbed_official	610:813dcc80987e	870	#define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
mbed_official	610:813dcc80987e	871
mbed_official	610:813dcc80987e	872	#define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
mbed_official	610:813dcc80987e	873	#define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0)
mbed_official	610:813dcc80987e	874	#define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2)
mbed_official	610:813dcc80987e	875	#define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)
mbed_official	610:813dcc80987e	876	#define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)
mbed_official	610:813dcc80987e	877	#define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M)
mbed_official	610:813dcc80987e	878	/**
mbed_official	610:813dcc80987e	879	* @}
mbed_official	610:813dcc80987e	880	*/
mbed_official	610:813dcc80987e	881
mbed_official	610:813dcc80987e	882	/** @defgroup TIM_Trigger_Selection TIM Trigger Selection
mbed_official	610:813dcc80987e	883	* @{
mbed_official	610:813dcc80987e	884	*/
mbed_official	610:813dcc80987e	885	#define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	886	#define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official	610:813dcc80987e	887	#define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official	610:813dcc80987e	888	#define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official	610:813dcc80987e	889	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
mbed_official	610:813dcc80987e	890	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
mbed_official	610:813dcc80987e	891	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
mbed_official	610:813dcc80987e	892	#define TIM_TS_ETRF ((uint32_t)0x0070)
mbed_official	610:813dcc80987e	893	#define TIM_TS_NONE ((uint32_t)0xFFFF)
mbed_official	610:813dcc80987e	894	/**
mbed_official	610:813dcc80987e	895	* @}
mbed_official	610:813dcc80987e	896	*/
mbed_official	610:813dcc80987e	897
mbed_official	610:813dcc80987e	898	/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
mbed_official	610:813dcc80987e	899	* @{
mbed_official	610:813dcc80987e	900	*/
mbed_official	610:813dcc80987e	901	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
mbed_official	610:813dcc80987e	902	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
mbed_official	610:813dcc80987e	903	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	610:813dcc80987e	904	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	610:813dcc80987e	905	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	610:813dcc80987e	906	/**
mbed_official	610:813dcc80987e	907	* @}
mbed_official	610:813dcc80987e	908	*/
mbed_official	610:813dcc80987e	909
mbed_official	610:813dcc80987e	910	/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
mbed_official	610:813dcc80987e	911	* @{
mbed_official	610:813dcc80987e	912	*/
mbed_official	610:813dcc80987e	913	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	610:813dcc80987e	914	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
mbed_official	610:813dcc80987e	915	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
mbed_official	610:813dcc80987e	916	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
mbed_official	610:813dcc80987e	917	/**
mbed_official	610:813dcc80987e	918	* @}
mbed_official	610:813dcc80987e	919	*/
mbed_official	610:813dcc80987e	920
mbed_official	610:813dcc80987e	921	/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
mbed_official	610:813dcc80987e	922	* @{
mbed_official	610:813dcc80987e	923	*/
mbed_official	610:813dcc80987e	924	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	925	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
mbed_official	610:813dcc80987e	926	/**
mbed_official	610:813dcc80987e	927	* @}
mbed_official	610:813dcc80987e	928	*/
mbed_official	610:813dcc80987e	929
mbed_official	610:813dcc80987e	930	/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
mbed_official	610:813dcc80987e	931	* @{
mbed_official	610:813dcc80987e	932	*/
mbed_official	610:813dcc80987e	933	#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000)
mbed_official	610:813dcc80987e	934	#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100)
mbed_official	610:813dcc80987e	935	#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200)
mbed_official	610:813dcc80987e	936	#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300)
mbed_official	610:813dcc80987e	937	#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400)
mbed_official	610:813dcc80987e	938	#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500)
mbed_official	610:813dcc80987e	939	#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600)
mbed_official	610:813dcc80987e	940	#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700)
mbed_official	610:813dcc80987e	941	#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800)
mbed_official	610:813dcc80987e	942	#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900)
mbed_official	610:813dcc80987e	943	#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00)
mbed_official	610:813dcc80987e	944	#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00)
mbed_official	610:813dcc80987e	945	#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00)
mbed_official	610:813dcc80987e	946	#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00)
mbed_official	610:813dcc80987e	947	#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00)
mbed_official	610:813dcc80987e	948	#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00)
mbed_official	610:813dcc80987e	949	#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000)
mbed_official	610:813dcc80987e	950	#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100)
mbed_official	610:813dcc80987e	951	/**
mbed_official	610:813dcc80987e	952	* @}
mbed_official	610:813dcc80987e	953	*/
mbed_official	610:813dcc80987e	954
mbed_official	610:813dcc80987e	955	/** @defgroup DMA_Handle_index TIM DMA Handle Index
mbed_official	610:813dcc80987e	956	* @{
mbed_official	610:813dcc80987e	957	*/
mbed_official	610:813dcc80987e	958	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
mbed_official	610:813dcc80987e	959	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
mbed_official	610:813dcc80987e	960	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
mbed_official	610:813dcc80987e	961	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
mbed_official	610:813dcc80987e	962	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
mbed_official	610:813dcc80987e	963	#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /!< Index of the DMA handle used for Commutation DMA requests /
mbed_official	610:813dcc80987e	964	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
mbed_official	610:813dcc80987e	965	/**
mbed_official	610:813dcc80987e	966	* @}
mbed_official	610:813dcc80987e	967	*/
mbed_official	610:813dcc80987e	968
mbed_official	610:813dcc80987e	969	/** @defgroup Channel_CC_State TIM Capture/Compare Channel State
mbed_official	610:813dcc80987e	970	* @{
mbed_official	610:813dcc80987e	971	*/
mbed_official	610:813dcc80987e	972	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
mbed_official	610:813dcc80987e	973	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	974	#define TIM_CCxN_ENABLE ((uint32_t)0x0004)
mbed_official	610:813dcc80987e	975	#define TIM_CCxN_DISABLE ((uint32_t)0x0000)
mbed_official	610:813dcc80987e	976	/**
mbed_official	610:813dcc80987e	977	* @}
mbed_official	610:813dcc80987e	978	*/
mbed_official	610:813dcc80987e	979
mbed_official	610:813dcc80987e	980	/** @defgroup TIM_Break_System
mbed_official	610:813dcc80987e	981	* @{
mbed_official	610:813dcc80987e	982	*/
mbed_official	610:813dcc80987e	983	#define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 /
mbed_official	610:813dcc80987e	984	#define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface /
mbed_official	610:813dcc80987e	985	#define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 /
mbed_official	610:813dcc80987e	986	#define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 /
mbed_official	610:813dcc80987e	987	/**
mbed_official	610:813dcc80987e	988	* @}
mbed_official	610:813dcc80987e	989	*/
mbed_official	610:813dcc80987e	990
mbed_official	610:813dcc80987e	991	/**
mbed_official	610:813dcc80987e	992	* @}
mbed_official	610:813dcc80987e	993	*/
mbed_official	610:813dcc80987e	994	/* End of exported constants -------------------------------------------------*/
mbed_official	610:813dcc80987e	995
mbed_official	610:813dcc80987e	996	/* Exported macros -----------------------------------------------------------*/
mbed_official	610:813dcc80987e	997	/** @defgroup TIM_Exported_Macros TIM Exported Macros
mbed_official	610:813dcc80987e	998	* @{
mbed_official	610:813dcc80987e	999	*/
mbed_official	610:813dcc80987e	1000
mbed_official	610:813dcc80987e	1001	/** @brief Reset TIM handle state.
mbed_official	610:813dcc80987e	1002	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1003	* @retval None
mbed_official	610:813dcc80987e	1004	*/
mbed_official	610:813dcc80987e	1005	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
mbed_official	610:813dcc80987e	1006
mbed_official	610:813dcc80987e	1007	/**
mbed_official	610:813dcc80987e	1008	* @brief Enable the TIM peripheral.
mbed_official	610:813dcc80987e	1009	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1010	* @retval None
mbed_official	610:813dcc80987e	1011	*/
mbed_official	610:813dcc80987e	1012	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
mbed_official	610:813dcc80987e	1013
mbed_official	610:813dcc80987e	1014	/**
mbed_official	610:813dcc80987e	1015	* @brief Enable the TIM main Output.
mbed_official	610:813dcc80987e	1016	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1017	* @retval None
mbed_official	610:813dcc80987e	1018	*/
mbed_official	610:813dcc80987e	1019	#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR\|=(TIM_BDTR_MOE))
mbed_official	610:813dcc80987e	1020
mbed_official	610:813dcc80987e	1021	/**
mbed_official	610:813dcc80987e	1022	* @brief Disable the TIM peripheral.
mbed_official	610:813dcc80987e	1023	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1024	* @retval None
mbed_official	610:813dcc80987e	1025	*/
mbed_official	610:813dcc80987e	1026	#define __HAL_TIM_DISABLE(__HANDLE__) \
mbed_official	610:813dcc80987e	1027	do { \
mbed_official	610:813dcc80987e	1028	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
mbed_official	610:813dcc80987e	1029	{ \
mbed_official	610:813dcc80987e	1030	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
mbed_official	610:813dcc80987e	1031	{ \
mbed_official	610:813dcc80987e	1032	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
mbed_official	610:813dcc80987e	1033	} \
mbed_official	610:813dcc80987e	1034	} \
mbed_official	610:813dcc80987e	1035	} while(0)
mbed_official	610:813dcc80987e	1036
mbed_official	610:813dcc80987e	1037	/**
mbed_official	610:813dcc80987e	1038	* @brief Disable the TIM main Output.
mbed_official	610:813dcc80987e	1039	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1040	* @retval None
mbed_official	610:813dcc80987e	1041	* @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled
mbed_official	610:813dcc80987e	1042	*/
mbed_official	610:813dcc80987e	1043	#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
mbed_official	610:813dcc80987e	1044	do { \
mbed_official	610:813dcc80987e	1045	if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
mbed_official	610:813dcc80987e	1046	{ \
mbed_official	610:813dcc80987e	1047	if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
mbed_official	610:813dcc80987e	1048	{ \
mbed_official	610:813dcc80987e	1049	(__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
mbed_official	610:813dcc80987e	1050	} \
mbed_official	610:813dcc80987e	1051	} \
mbed_official	610:813dcc80987e	1052	} while(0)
mbed_official	610:813dcc80987e	1053
mbed_official	610:813dcc80987e	1054	/** @brief Enable the specified TIM interrupt.
mbed_official	610:813dcc80987e	1055	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1056	* @param __INTERRUPT__: specifies the TIM interrupt source to enable.
mbed_official	610:813dcc80987e	1057	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1058	* @arg TIM_IT_UPDATE: Update interrupt
mbed_official	610:813dcc80987e	1059	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
mbed_official	610:813dcc80987e	1060	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
mbed_official	610:813dcc80987e	1061	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
mbed_official	610:813dcc80987e	1062	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
mbed_official	610:813dcc80987e	1063	* @arg TIM_IT_COM: Commutation interrupt
mbed_official	610:813dcc80987e	1064	* @arg TIM_IT_TRIGGER: Trigger interrupt
mbed_official	610:813dcc80987e	1065	* @arg TIM_IT_BREAK: Break interrupt
mbed_official	610:813dcc80987e	1066	* @retval None
mbed_official	610:813dcc80987e	1067	*/
mbed_official	610:813dcc80987e	1068	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
mbed_official	610:813dcc80987e	1069
mbed_official	610:813dcc80987e	1070
mbed_official	610:813dcc80987e	1071	/** @brief Disable the specified TIM interrupt.
mbed_official	610:813dcc80987e	1072	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1073	* @param __INTERRUPT__: specifies the TIM interrupt source to disable.
mbed_official	610:813dcc80987e	1074	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1075	* @arg TIM_IT_UPDATE: Update interrupt
mbed_official	610:813dcc80987e	1076	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
mbed_official	610:813dcc80987e	1077	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
mbed_official	610:813dcc80987e	1078	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
mbed_official	610:813dcc80987e	1079	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
mbed_official	610:813dcc80987e	1080	* @arg TIM_IT_COM: Commutation interrupt
mbed_official	610:813dcc80987e	1081	* @arg TIM_IT_TRIGGER: Trigger interrupt
mbed_official	610:813dcc80987e	1082	* @arg TIM_IT_BREAK: Break interrupt
mbed_official	610:813dcc80987e	1083	* @retval None
mbed_official	610:813dcc80987e	1084	*/
mbed_official	610:813dcc80987e	1085	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
mbed_official	610:813dcc80987e	1086
mbed_official	610:813dcc80987e	1087	/** @brief Enable the specified DMA request.
mbed_official	610:813dcc80987e	1088	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1089	* @param __DMA__: specifies the TIM DMA request to enable.
mbed_official	610:813dcc80987e	1090	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1091	* @arg TIM_DMA_UPDATE: Update DMA request
mbed_official	610:813dcc80987e	1092	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
mbed_official	610:813dcc80987e	1093	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
mbed_official	610:813dcc80987e	1094	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
mbed_official	610:813dcc80987e	1095	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
mbed_official	610:813dcc80987e	1096	* @arg TIM_DMA_COM: Commutation DMA request
mbed_official	610:813dcc80987e	1097	* @arg TIM_DMA_TRIGGER: Trigger DMA request
mbed_official	610:813dcc80987e	1098	* @arg TIM_DMA_BREAK: Break DMA request
mbed_official	610:813dcc80987e	1099	* @retval None
mbed_official	610:813dcc80987e	1100	*/
mbed_official	610:813dcc80987e	1101	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
mbed_official	610:813dcc80987e	1102
mbed_official	610:813dcc80987e	1103	/** @brief Disable the specified DMA request.
mbed_official	610:813dcc80987e	1104	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1105	* @param __DMA__: specifies the TIM DMA request to disable.
mbed_official	610:813dcc80987e	1106	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1107	* @arg TIM_DMA_UPDATE: Update DMA request
mbed_official	610:813dcc80987e	1108	* @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
mbed_official	610:813dcc80987e	1109	* @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
mbed_official	610:813dcc80987e	1110	* @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
mbed_official	610:813dcc80987e	1111	* @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
mbed_official	610:813dcc80987e	1112	* @arg TIM_DMA_COM: Commutation DMA request
mbed_official	610:813dcc80987e	1113	* @arg TIM_DMA_TRIGGER: Trigger DMA request
mbed_official	610:813dcc80987e	1114	* @arg TIM_DMA_BREAK: Break DMA request
mbed_official	610:813dcc80987e	1115	* @retval None
mbed_official	610:813dcc80987e	1116	*/
mbed_official	610:813dcc80987e	1117	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
mbed_official	610:813dcc80987e	1118
mbed_official	610:813dcc80987e	1119	/** @brief Check whether the specified TIM interrupt flag is set or not.
mbed_official	610:813dcc80987e	1120	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1121	* @param __FLAG__: specifies the TIM interrupt flag to check.
mbed_official	610:813dcc80987e	1122	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1123	* @arg TIM_FLAG_UPDATE: Update interrupt flag
mbed_official	610:813dcc80987e	1124	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
mbed_official	610:813dcc80987e	1125	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
mbed_official	610:813dcc80987e	1126	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
mbed_official	610:813dcc80987e	1127	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
mbed_official	610:813dcc80987e	1128	* @arg TIM_FLAG_CC5: Compare 5 interrupt flag
mbed_official	610:813dcc80987e	1129	* @arg TIM_FLAG_CC6: Compare 5 interrupt flag
mbed_official	610:813dcc80987e	1130	* @arg TIM_FLAG_COM: Commutation interrupt flag
mbed_official	610:813dcc80987e	1131	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
mbed_official	610:813dcc80987e	1132	* @arg TIM_FLAG_BREAK: Break interrupt flag
mbed_official	610:813dcc80987e	1133	* @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
mbed_official	610:813dcc80987e	1134	* @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
mbed_official	610:813dcc80987e	1135	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
mbed_official	610:813dcc80987e	1136	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
mbed_official	610:813dcc80987e	1137	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
mbed_official	610:813dcc80987e	1138	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
mbed_official	610:813dcc80987e	1139	* @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official	610:813dcc80987e	1140	*/
mbed_official	610:813dcc80987e	1141	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
mbed_official	610:813dcc80987e	1142
mbed_official	610:813dcc80987e	1143	/** @brief Clear the specified TIM interrupt flag.
mbed_official	610:813dcc80987e	1144	* @param __HANDLE__: specifies the TIM Handle.
mbed_official	610:813dcc80987e	1145	* @param __FLAG__: specifies the TIM interrupt flag to clear.
mbed_official	610:813dcc80987e	1146	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1147	* @arg TIM_FLAG_UPDATE: Update interrupt flag
mbed_official	610:813dcc80987e	1148	* @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
mbed_official	610:813dcc80987e	1149	* @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
mbed_official	610:813dcc80987e	1150	* @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
mbed_official	610:813dcc80987e	1151	* @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
mbed_official	610:813dcc80987e	1152	* @arg TIM_FLAG_CC5: Compare 5 interrupt flag
mbed_official	610:813dcc80987e	1153	* @arg TIM_FLAG_CC6: Compare 5 interrupt flag
mbed_official	610:813dcc80987e	1154	* @arg TIM_FLAG_COM: Commutation interrupt flag
mbed_official	610:813dcc80987e	1155	* @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
mbed_official	610:813dcc80987e	1156	* @arg TIM_FLAG_BREAK: Break interrupt flag
mbed_official	610:813dcc80987e	1157	* @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
mbed_official	610:813dcc80987e	1158	* @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
mbed_official	610:813dcc80987e	1159	* @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
mbed_official	610:813dcc80987e	1160	* @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
mbed_official	610:813dcc80987e	1161	* @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
mbed_official	610:813dcc80987e	1162	* @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
mbed_official	610:813dcc80987e	1163	* @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official	610:813dcc80987e	1164	*/
mbed_official	610:813dcc80987e	1165	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
mbed_official	610:813dcc80987e	1166
mbed_official	610:813dcc80987e	1167	/**
mbed_official	610:813dcc80987e	1168	* @brief Check whether the specified TIM interrupt source is enabled or not.
mbed_official	610:813dcc80987e	1169	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1170	* @param __INTERRUPT__: specifies the TIM interrupt source to check.
mbed_official	610:813dcc80987e	1171	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1172	* @arg TIM_IT_UPDATE: Update interrupt
mbed_official	610:813dcc80987e	1173	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
mbed_official	610:813dcc80987e	1174	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
mbed_official	610:813dcc80987e	1175	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
mbed_official	610:813dcc80987e	1176	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
mbed_official	610:813dcc80987e	1177	* @arg TIM_IT_COM: Commutation interrupt
mbed_official	610:813dcc80987e	1178	* @arg TIM_IT_TRIGGER: Trigger interrupt
mbed_official	610:813dcc80987e	1179	* @arg TIM_IT_BREAK: Break interrupt
mbed_official	610:813dcc80987e	1180	* @retval The state of TIM_IT (SET or RESET).
mbed_official	610:813dcc80987e	1181	*/
mbed_official	610:813dcc80987e	1182	#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	610:813dcc80987e	1183
mbed_official	610:813dcc80987e	1184	/** @brief Clear the TIM interrupt pending bits.
mbed_official	610:813dcc80987e	1185	* @param __HANDLE__: TIM handle
mbed_official	610:813dcc80987e	1186	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
mbed_official	610:813dcc80987e	1187	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1188	* @arg TIM_IT_UPDATE: Update interrupt
mbed_official	610:813dcc80987e	1189	* @arg TIM_IT_CC1: Capture/Compare 1 interrupt
mbed_official	610:813dcc80987e	1190	* @arg TIM_IT_CC2: Capture/Compare 2 interrupt
mbed_official	610:813dcc80987e	1191	* @arg TIM_IT_CC3: Capture/Compare 3 interrupt
mbed_official	610:813dcc80987e	1192	* @arg TIM_IT_CC4: Capture/Compare 4 interrupt
mbed_official	610:813dcc80987e	1193	* @arg TIM_IT_COM: Commutation interrupt
mbed_official	610:813dcc80987e	1194	* @arg TIM_IT_TRIGGER: Trigger interrupt
mbed_official	610:813dcc80987e	1195	* @arg TIM_IT_BREAK: Break interrupt
mbed_official	610:813dcc80987e	1196	* @retval None
mbed_official	610:813dcc80987e	1197	*/
mbed_official	610:813dcc80987e	1198	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
mbed_official	610:813dcc80987e	1199
mbed_official	610:813dcc80987e	1200	/**
mbed_official	610:813dcc80987e	1201	* @brief Indicates whether or not the TIM Counter is used as downcounter.
mbed_official	610:813dcc80987e	1202	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1203	* @retval False (Counter used as upcounter) or True (Counter used as downcounter)
mbed_official	610:813dcc80987e	1204	* @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder
mbed_official	610:813dcc80987e	1205	mode.
mbed_official	610:813dcc80987e	1206	*/
mbed_official	610:813dcc80987e	1207	#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
mbed_official	610:813dcc80987e	1208
mbed_official	610:813dcc80987e	1209
mbed_official	610:813dcc80987e	1210	/**
mbed_official	610:813dcc80987e	1211	* @brief Set the TIM Prescaler on runtime.
mbed_official	610:813dcc80987e	1212	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1213	* @param __PRESC__: specifies the Prescaler new value.
mbed_official	610:813dcc80987e	1214	* @retval None
mbed_official	610:813dcc80987e	1215	*/
mbed_official	610:813dcc80987e	1216	#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
mbed_official	610:813dcc80987e	1217
mbed_official	610:813dcc80987e	1218	/**
mbed_official	610:813dcc80987e	1219	* @brief Set the TIM Counter Register value on runtime.
mbed_official	610:813dcc80987e	1220	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1221	* @param __COUNTER__: specifies the Counter register new value.
mbed_official	610:813dcc80987e	1222	* @retval None
mbed_official	610:813dcc80987e	1223	*/
mbed_official	610:813dcc80987e	1224	#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
mbed_official	610:813dcc80987e	1225
mbed_official	610:813dcc80987e	1226	/**
mbed_official	610:813dcc80987e	1227	* @brief Get the TIM Counter Register value on runtime.
mbed_official	610:813dcc80987e	1228	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1229	* @retval None
mbed_official	610:813dcc80987e	1230	*/
mbed_official	610:813dcc80987e	1231	#define __HAL_TIM_GET_COUNTER(__HANDLE__) \
mbed_official	610:813dcc80987e	1232	((__HANDLE__)->Instance->CNT)
mbed_official	610:813dcc80987e	1233
mbed_official	610:813dcc80987e	1234	/**
mbed_official	610:813dcc80987e	1235	* @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function.
mbed_official	610:813dcc80987e	1236	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1237	* @param __AUTORELOAD__: specifies the Counter register new value.
mbed_official	610:813dcc80987e	1238	* @retval None
mbed_official	610:813dcc80987e	1239	*/
mbed_official	610:813dcc80987e	1240	#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
mbed_official	610:813dcc80987e	1241	do{ \
mbed_official	610:813dcc80987e	1242	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
mbed_official	610:813dcc80987e	1243	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
mbed_official	610:813dcc80987e	1244	} while(0)
mbed_official	610:813dcc80987e	1245
mbed_official	610:813dcc80987e	1246	/**
mbed_official	610:813dcc80987e	1247	* @brief Get the TIM Autoreload Register value on runtime.
mbed_official	610:813dcc80987e	1248	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1249	* @retval None
mbed_official	610:813dcc80987e	1250	*/
mbed_official	610:813dcc80987e	1251	#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \
mbed_official	610:813dcc80987e	1252	((__HANDLE__)->Instance->ARR)
mbed_official	610:813dcc80987e	1253
mbed_official	610:813dcc80987e	1254	/**
mbed_official	610:813dcc80987e	1255	* @brief Set the TIM Clock Division value on runtime without calling another time any Init function.
mbed_official	610:813dcc80987e	1256	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1257	* @param __CKD__: specifies the clock division value.
mbed_official	610:813dcc80987e	1258	* This parameter can be one of the following value:
mbed_official	610:813dcc80987e	1259	* @arg TIM_CLOCKDIVISION_DIV1
mbed_official	610:813dcc80987e	1260	* @arg TIM_CLOCKDIVISION_DIV2
mbed_official	610:813dcc80987e	1261	* @arg TIM_CLOCKDIVISION_DIV4
mbed_official	610:813dcc80987e	1262	* @retval None
mbed_official	610:813dcc80987e	1263	*/
mbed_official	610:813dcc80987e	1264	#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
mbed_official	610:813dcc80987e	1265	do{ \
mbed_official	610:813dcc80987e	1266	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
mbed_official	610:813dcc80987e	1267	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
mbed_official	610:813dcc80987e	1268	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
mbed_official	610:813dcc80987e	1269	} while(0)
mbed_official	610:813dcc80987e	1270
mbed_official	610:813dcc80987e	1271	/**
mbed_official	610:813dcc80987e	1272	* @brief Get the TIM Clock Division value on runtime.
mbed_official	610:813dcc80987e	1273	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1274	* @retval None
mbed_official	610:813dcc80987e	1275	*/
mbed_official	610:813dcc80987e	1276	#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \
mbed_official	610:813dcc80987e	1277	((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
mbed_official	610:813dcc80987e	1278
mbed_official	610:813dcc80987e	1279	/**
mbed_official	610:813dcc80987e	1280	* @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function.
mbed_official	610:813dcc80987e	1281	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1282	* @param __CHANNEL__: TIM Channels to be configured.
mbed_official	610:813dcc80987e	1283	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1284	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	610:813dcc80987e	1285	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	610:813dcc80987e	1286	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	610:813dcc80987e	1287	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	610:813dcc80987e	1288	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
mbed_official	610:813dcc80987e	1289	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1290	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	610:813dcc80987e	1291	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	610:813dcc80987e	1292	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	610:813dcc80987e	1293	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	610:813dcc80987e	1294	* @retval None
mbed_official	610:813dcc80987e	1295	*/
mbed_official	610:813dcc80987e	1296	#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	610:813dcc80987e	1297	do{ \
mbed_official	610:813dcc80987e	1298	TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
mbed_official	610:813dcc80987e	1299	TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
mbed_official	610:813dcc80987e	1300	} while(0)
mbed_official	610:813dcc80987e	1301
mbed_official	610:813dcc80987e	1302	/**
mbed_official	610:813dcc80987e	1303	* @brief Get the TIM Input Capture prescaler on runtime.
mbed_official	610:813dcc80987e	1304	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1305	* @param __CHANNEL__: TIM Channels to be configured.
mbed_official	610:813dcc80987e	1306	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1307	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
mbed_official	610:813dcc80987e	1308	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
mbed_official	610:813dcc80987e	1309	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
mbed_official	610:813dcc80987e	1310	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
mbed_official	610:813dcc80987e	1311	* @retval None
mbed_official	610:813dcc80987e	1312	*/
mbed_official	610:813dcc80987e	1313	#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
mbed_official	610:813dcc80987e	1314	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
mbed_official	610:813dcc80987e	1315	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
mbed_official	610:813dcc80987e	1316	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
mbed_official	610:813dcc80987e	1317	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
mbed_official	610:813dcc80987e	1318
mbed_official	610:813dcc80987e	1319	/**
mbed_official	610:813dcc80987e	1320	* @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.
mbed_official	610:813dcc80987e	1321	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1322	* @param __CHANNEL__: TIM Channels to be configured.
mbed_official	610:813dcc80987e	1323	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1324	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	610:813dcc80987e	1325	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	610:813dcc80987e	1326	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	610:813dcc80987e	1327	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	610:813dcc80987e	1328	* @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official	610:813dcc80987e	1329	* @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official	610:813dcc80987e	1330	* @param __COMPARE__: specifies the Capture Compare register new value.
mbed_official	610:813dcc80987e	1331	* @retval None
mbed_official	610:813dcc80987e	1332	*/
mbed_official	610:813dcc80987e	1333	#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
mbed_official	610:813dcc80987e	1334	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
mbed_official	610:813dcc80987e	1335	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
mbed_official	610:813dcc80987e	1336	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
mbed_official	610:813dcc80987e	1337	((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
mbed_official	610:813dcc80987e	1338	((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
mbed_official	610:813dcc80987e	1339	((__HANDLE__)->Instance->CCR6 \|= (__COMPARE__)))
mbed_official	610:813dcc80987e	1340
mbed_official	610:813dcc80987e	1341	/**
mbed_official	610:813dcc80987e	1342	* @brief Get the TIM Capture Compare Register value on runtime.
mbed_official	610:813dcc80987e	1343	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1344	* @param __CHANNEL__: TIM Channel associated with the capture compare register
mbed_official	610:813dcc80987e	1345	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1346	* @arg TIM_CHANNEL_1: get capture/compare 1 register value
mbed_official	610:813dcc80987e	1347	* @arg TIM_CHANNEL_2: get capture/compare 2 register value
mbed_official	610:813dcc80987e	1348	* @arg TIM_CHANNEL_3: get capture/compare 3 register value
mbed_official	610:813dcc80987e	1349	* @arg TIM_CHANNEL_4: get capture/compare 4 register value
mbed_official	610:813dcc80987e	1350	* @arg TIM_CHANNEL_5: get capture/compare 5 register value
mbed_official	610:813dcc80987e	1351	* @arg TIM_CHANNEL_6: get capture/compare 6 register value
mbed_official	610:813dcc80987e	1352	* @retval None
mbed_official	610:813dcc80987e	1353	*/
mbed_official	610:813dcc80987e	1354	#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
mbed_official	610:813dcc80987e	1355	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
mbed_official	610:813dcc80987e	1356	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
mbed_official	610:813dcc80987e	1357	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
mbed_official	610:813dcc80987e	1358	((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
mbed_official	610:813dcc80987e	1359	((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
mbed_official	610:813dcc80987e	1360	((__HANDLE__)->Instance->CCR6))
mbed_official	610:813dcc80987e	1361
mbed_official	610:813dcc80987e	1362	/**
mbed_official	610:813dcc80987e	1363	* @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register.
mbed_official	610:813dcc80987e	1364	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1365	* @note When the USR bit of the TIMx_CR1 register is set, only counter
mbed_official	610:813dcc80987e	1366	* overflow/underflow generates an update interrupt or DMA request (if
mbed_official	610:813dcc80987e	1367	* enabled)
mbed_official	610:813dcc80987e	1368	* @retval None
mbed_official	610:813dcc80987e	1369	*/
mbed_official	610:813dcc80987e	1370	#define __HAL_TIM_URS_ENABLE(__HANDLE__) \
mbed_official	610:813dcc80987e	1371	((__HANDLE__)->Instance->CR1\|= (TIM_CR1_URS))
mbed_official	610:813dcc80987e	1372
mbed_official	610:813dcc80987e	1373	/**
mbed_official	610:813dcc80987e	1374	* @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register.
mbed_official	610:813dcc80987e	1375	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1376	* @note When the USR bit of the TIMx_CR1 register is reset, any of the
mbed_official	610:813dcc80987e	1377	* following events generate an update interrupt or DMA request (if
mbed_official	610:813dcc80987e	1378	* enabled):
mbed_official	610:813dcc80987e	1379	* _ Counter overflow underflow
mbed_official	610:813dcc80987e	1380	* _ Setting the UG bit
mbed_official	610:813dcc80987e	1381	* _ Update generation through the slave mode controller
mbed_official	610:813dcc80987e	1382	* @retval None
mbed_official	610:813dcc80987e	1383	*/
mbed_official	610:813dcc80987e	1384	#define __HAL_TIM_URS_DISABLE(__HANDLE__) \
mbed_official	610:813dcc80987e	1385	((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
mbed_official	610:813dcc80987e	1386
mbed_official	610:813dcc80987e	1387	/**
mbed_official	610:813dcc80987e	1388	* @brief Set the TIM Capture x input polarity on runtime.
mbed_official	610:813dcc80987e	1389	* @param __HANDLE__: TIM handle.
mbed_official	610:813dcc80987e	1390	* @param __CHANNEL__: TIM Channels to be configured.
mbed_official	610:813dcc80987e	1391	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1392	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	610:813dcc80987e	1393	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	610:813dcc80987e	1394	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	610:813dcc80987e	1395	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	610:813dcc80987e	1396	* @param __POLARITY__: Polarity for TIx source
mbed_official	610:813dcc80987e	1397	* @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
mbed_official	610:813dcc80987e	1398	* @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
mbed_official	610:813dcc80987e	1399	* @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
mbed_official	610:813dcc80987e	1400	* @retval None
mbed_official	610:813dcc80987e	1401	*/
mbed_official	610:813dcc80987e	1402	#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
mbed_official	610:813dcc80987e	1403	do{ \
mbed_official	610:813dcc80987e	1404	TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
mbed_official	610:813dcc80987e	1405	TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
mbed_official	610:813dcc80987e	1406	}while(0)
mbed_official	610:813dcc80987e	1407
mbed_official	610:813dcc80987e	1408	/**
mbed_official	610:813dcc80987e	1409	* @}
mbed_official	610:813dcc80987e	1410	*/
mbed_official	610:813dcc80987e	1411	/* End of exported macros ----------------------------------------------------*/
mbed_official	610:813dcc80987e	1412
mbed_official	610:813dcc80987e	1413	/* Private constants ---------------------------------------------------------*/
mbed_official	610:813dcc80987e	1414	/** @defgroup TIM_Private_Constants TIM Private Constants
mbed_official	610:813dcc80987e	1415	* @{
mbed_official	610:813dcc80987e	1416	*/
mbed_official	610:813dcc80987e	1417	/* The counter of a timer instance is disabled only if all the CCx and CCxN
mbed_official	610:813dcc80987e	1418	channels have been disabled */
mbed_official	610:813dcc80987e	1419	#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
mbed_official	610:813dcc80987e	1420	#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE))
mbed_official	610:813dcc80987e	1421	/**
mbed_official	610:813dcc80987e	1422	* @}
mbed_official	610:813dcc80987e	1423	*/
mbed_official	610:813dcc80987e	1424	/* End of private constants --------------------------------------------------*/
mbed_official	610:813dcc80987e	1425
mbed_official	610:813dcc80987e	1426	/* Private macros ------------------------------------------------------------*/
mbed_official	610:813dcc80987e	1427	/** @defgroup TIM_Private_Macros TIM Private Macros
mbed_official	610:813dcc80987e	1428	* @{
mbed_official	610:813dcc80987e	1429	*/
mbed_official	610:813dcc80987e	1430
mbed_official	610:813dcc80987e	1431	#define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) \|\| \
mbed_official	610:813dcc80987e	1432	((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) \|\| \
mbed_official	610:813dcc80987e	1433	((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
mbed_official	610:813dcc80987e	1434
mbed_official	610:813dcc80987e	1435	#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) \|\| \
mbed_official	610:813dcc80987e	1436	((__BASE__) == TIM_DMABASE_CR2) \|\| \
mbed_official	610:813dcc80987e	1437	((__BASE__) == TIM_DMABASE_SMCR) \|\| \
mbed_official	610:813dcc80987e	1438	((__BASE__) == TIM_DMABASE_DIER) \|\| \
mbed_official	610:813dcc80987e	1439	((__BASE__) == TIM_DMABASE_SR) \|\| \
mbed_official	610:813dcc80987e	1440	((__BASE__) == TIM_DMABASE_EGR) \|\| \
mbed_official	610:813dcc80987e	1441	((__BASE__) == TIM_DMABASE_CCMR1) \|\| \
mbed_official	610:813dcc80987e	1442	((__BASE__) == TIM_DMABASE_CCMR2) \|\| \
mbed_official	610:813dcc80987e	1443	((__BASE__) == TIM_DMABASE_CCER) \|\| \
mbed_official	610:813dcc80987e	1444	((__BASE__) == TIM_DMABASE_CNT) \|\| \
mbed_official	610:813dcc80987e	1445	((__BASE__) == TIM_DMABASE_PSC) \|\| \
mbed_official	610:813dcc80987e	1446	((__BASE__) == TIM_DMABASE_ARR) \|\| \
mbed_official	610:813dcc80987e	1447	((__BASE__) == TIM_DMABASE_RCR) \|\| \
mbed_official	610:813dcc80987e	1448	((__BASE__) == TIM_DMABASE_CCR1) \|\| \
mbed_official	610:813dcc80987e	1449	((__BASE__) == TIM_DMABASE_CCR2) \|\| \
mbed_official	610:813dcc80987e	1450	((__BASE__) == TIM_DMABASE_CCR3) \|\| \
mbed_official	610:813dcc80987e	1451	((__BASE__) == TIM_DMABASE_CCR4) \|\| \
mbed_official	610:813dcc80987e	1452	((__BASE__) == TIM_DMABASE_BDTR) \|\| \
mbed_official	610:813dcc80987e	1453	((__BASE__) == TIM_DMABASE_CCMR3) \|\| \
mbed_official	610:813dcc80987e	1454	((__BASE__) == TIM_DMABASE_CCR5) \|\| \
mbed_official	610:813dcc80987e	1455	((__BASE__) == TIM_DMABASE_CCR6) \|\| \
mbed_official	610:813dcc80987e	1456	((__BASE__) == TIM_DMABASE_OR1) \|\| \
mbed_official	610:813dcc80987e	1457	((__BASE__) == TIM_DMABASE_OR2) \|\| \
mbed_official	610:813dcc80987e	1458	((__BASE__) == TIM_DMABASE_OR3))
mbed_official	610:813dcc80987e	1459
mbed_official	610:813dcc80987e	1460
mbed_official	610:813dcc80987e	1461	#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00) == 0x00000000) && ((__SOURCE__) != 0x00000000))
mbed_official	610:813dcc80987e	1462
mbed_official	610:813dcc80987e	1463
mbed_official	610:813dcc80987e	1464	#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) \|\| \
mbed_official	610:813dcc80987e	1465	((__MODE__) == TIM_COUNTERMODE_DOWN) \|\| \
mbed_official	610:813dcc80987e	1466	((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
mbed_official	610:813dcc80987e	1467	((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
mbed_official	610:813dcc80987e	1468	((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
mbed_official	610:813dcc80987e	1469
mbed_official	610:813dcc80987e	1470	#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) \|\| \
mbed_official	610:813dcc80987e	1471	((__DIV__) == TIM_CLOCKDIVISION_DIV2) \|\| \
mbed_official	610:813dcc80987e	1472	((__DIV__) == TIM_CLOCKDIVISION_DIV4))
mbed_official	610:813dcc80987e	1473
mbed_official	610:813dcc80987e	1474	#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) \|\| \
mbed_official	610:813dcc80987e	1475	((__STATE__) == TIM_OCFAST_ENABLE))
mbed_official	610:813dcc80987e	1476
mbed_official	610:813dcc80987e	1477	#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) \|\| \
mbed_official	610:813dcc80987e	1478	((__POLARITY__) == TIM_OCPOLARITY_LOW))
mbed_official	610:813dcc80987e	1479
mbed_official	610:813dcc80987e	1480	#define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) \|\| \
mbed_official	610:813dcc80987e	1481	((__POLARITY__) == TIM_OCNPOLARITY_LOW))
mbed_official	610:813dcc80987e	1482
mbed_official	610:813dcc80987e	1483	#define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) \|\| \
mbed_official	610:813dcc80987e	1484	((__STATE__) == TIM_OCIDLESTATE_RESET))
mbed_official	610:813dcc80987e	1485
mbed_official	610:813dcc80987e	1486	#define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) \|\| \
mbed_official	610:813dcc80987e	1487	((__STATE__) == TIM_OCNIDLESTATE_RESET))
mbed_official	610:813dcc80987e	1488
mbed_official	610:813dcc80987e	1489	#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) \|\| \
mbed_official	610:813dcc80987e	1490	((__POLARITY__) == TIM_ICPOLARITY_FALLING) \|\| \
mbed_official	610:813dcc80987e	1491	((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
mbed_official	610:813dcc80987e	1492
mbed_official	610:813dcc80987e	1493	#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) \|\| \
mbed_official	610:813dcc80987e	1494	((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) \|\| \
mbed_official	610:813dcc80987e	1495	((__SELECTION__) == TIM_ICSELECTION_TRC))
mbed_official	610:813dcc80987e	1496
mbed_official	610:813dcc80987e	1497	#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) \|\| \
mbed_official	610:813dcc80987e	1498	((__PRESCALER__) == TIM_ICPSC_DIV2) \|\| \
mbed_official	610:813dcc80987e	1499	((__PRESCALER__) == TIM_ICPSC_DIV4) \|\| \
mbed_official	610:813dcc80987e	1500	((__PRESCALER__) == TIM_ICPSC_DIV8))
mbed_official	610:813dcc80987e	1501
mbed_official	610:813dcc80987e	1502	#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) \|\| \
mbed_official	610:813dcc80987e	1503	((__MODE__) == TIM_OPMODE_REPETITIVE))
mbed_official	610:813dcc80987e	1504
mbed_official	610:813dcc80987e	1505	#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) \|\| \
mbed_official	610:813dcc80987e	1506	((__MODE__) == TIM_ENCODERMODE_TI2) \|\| \
mbed_official	610:813dcc80987e	1507	((__MODE__) == TIM_ENCODERMODE_TI12))
mbed_official	610:813dcc80987e	1508
mbed_official	610:813dcc80987e	1509	#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FF) == 0x00000000) && ((__SOURCE__) != 0x00000000))
mbed_official	610:813dcc80987e	1510
mbed_official	610:813dcc80987e	1511	#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) \|\| \
mbed_official	610:813dcc80987e	1512	((__CHANNEL__) == TIM_CHANNEL_2) \|\| \
mbed_official	610:813dcc80987e	1513	((__CHANNEL__) == TIM_CHANNEL_3) \|\| \
mbed_official	610:813dcc80987e	1514	((__CHANNEL__) == TIM_CHANNEL_4) \|\| \
mbed_official	610:813dcc80987e	1515	((__CHANNEL__) == TIM_CHANNEL_5) \|\| \
mbed_official	610:813dcc80987e	1516	((__CHANNEL__) == TIM_CHANNEL_6) \|\| \
mbed_official	610:813dcc80987e	1517	((__CHANNEL__) == TIM_CHANNEL_ALL))
mbed_official	610:813dcc80987e	1518
mbed_official	610:813dcc80987e	1519	#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) \|\| \
mbed_official	610:813dcc80987e	1520	((__CHANNEL__) == TIM_CHANNEL_2))
mbed_official	610:813dcc80987e	1521
mbed_official	610:813dcc80987e	1522	#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) \|\| \
mbed_official	610:813dcc80987e	1523	((__CHANNEL__) == TIM_CHANNEL_2) \|\| \
mbed_official	610:813dcc80987e	1524	((__CHANNEL__) == TIM_CHANNEL_3))
mbed_official	610:813dcc80987e	1525
mbed_official	610:813dcc80987e	1526	#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
mbed_official	610:813dcc80987e	1527	((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
mbed_official	610:813dcc80987e	1528	((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) \|\| \
mbed_official	610:813dcc80987e	1529	((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) \|\| \
mbed_official	610:813dcc80987e	1530	((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) \|\| \
mbed_official	610:813dcc80987e	1531	((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) \|\| \
mbed_official	610:813dcc80987e	1532	((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) \|\| \
mbed_official	610:813dcc80987e	1533	((__CLOCK__) == TIM_CLOCKSOURCE_TI1) \|\| \
mbed_official	610:813dcc80987e	1534	((__CLOCK__) == TIM_CLOCKSOURCE_TI2) \|\| \
mbed_official	610:813dcc80987e	1535	((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
mbed_official	610:813dcc80987e	1536
mbed_official	610:813dcc80987e	1537	#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
mbed_official	610:813dcc80987e	1538	((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
mbed_official	610:813dcc80987e	1539	((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) \|\| \
mbed_official	610:813dcc80987e	1540	((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) \|\| \
mbed_official	610:813dcc80987e	1541	((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
mbed_official	610:813dcc80987e	1542
mbed_official	610:813dcc80987e	1543	#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) \|\| \
mbed_official	610:813dcc80987e	1544	((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) \|\| \
mbed_official	610:813dcc80987e	1545	((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) \|\| \
mbed_official	610:813dcc80987e	1546	((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
mbed_official	610:813dcc80987e	1547
mbed_official	610:813dcc80987e	1548	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	610:813dcc80987e	1549
mbed_official	610:813dcc80987e	1550	#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
mbed_official	610:813dcc80987e	1551	((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
mbed_official	610:813dcc80987e	1552
mbed_official	610:813dcc80987e	1553	#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
mbed_official	610:813dcc80987e	1554	((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
mbed_official	610:813dcc80987e	1555	((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
mbed_official	610:813dcc80987e	1556	((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
mbed_official	610:813dcc80987e	1557
mbed_official	610:813dcc80987e	1558	#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
mbed_official	610:813dcc80987e	1559
mbed_official	610:813dcc80987e	1560
mbed_official	610:813dcc80987e	1561	#define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1562	((__STATE__) == TIM_OSSR_DISABLE))
mbed_official	610:813dcc80987e	1563
mbed_official	610:813dcc80987e	1564	#define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1565	((__STATE__) == TIM_OSSI_DISABLE))
mbed_official	610:813dcc80987e	1566
mbed_official	610:813dcc80987e	1567	#define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) \|\| \
mbed_official	610:813dcc80987e	1568	((__LEVEL__) == TIM_LOCKLEVEL_1) \|\| \
mbed_official	610:813dcc80987e	1569	((__LEVEL__) == TIM_LOCKLEVEL_2) \|\| \
mbed_official	610:813dcc80987e	1570	((__LEVEL__) == TIM_LOCKLEVEL_3))
mbed_official	610:813dcc80987e	1571
mbed_official	610:813dcc80987e	1572	#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF)
mbed_official	610:813dcc80987e	1573
mbed_official	610:813dcc80987e	1574
mbed_official	610:813dcc80987e	1575	#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1576	((__STATE__) == TIM_BREAK_DISABLE))
mbed_official	610:813dcc80987e	1577
mbed_official	610:813dcc80987e	1578	#define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) \|\| \
mbed_official	610:813dcc80987e	1579	((__POLARITY__) == TIM_BREAKPOLARITY_HIGH))
mbed_official	610:813dcc80987e	1580
mbed_official	610:813dcc80987e	1581	#define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1582	((__STATE__) == TIM_BREAK2_DISABLE))
mbed_official	610:813dcc80987e	1583
mbed_official	610:813dcc80987e	1584	#define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) \|\| \
mbed_official	610:813dcc80987e	1585	((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))
mbed_official	610:813dcc80987e	1586
mbed_official	610:813dcc80987e	1587	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1588	((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE))
mbed_official	610:813dcc80987e	1589
mbed_official	610:813dcc80987e	1590	#define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000))
mbed_official	610:813dcc80987e	1591
mbed_official	610:813dcc80987e	1592	#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) \|\| \
mbed_official	610:813dcc80987e	1593	((__SOURCE__) == TIM_TRGO_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1594	((__SOURCE__) == TIM_TRGO_UPDATE) \|\| \
mbed_official	610:813dcc80987e	1595	((__SOURCE__) == TIM_TRGO_OC1) \|\| \
mbed_official	610:813dcc80987e	1596	((__SOURCE__) == TIM_TRGO_OC1REF) \|\| \
mbed_official	610:813dcc80987e	1597	((__SOURCE__) == TIM_TRGO_OC2REF) \|\| \
mbed_official	610:813dcc80987e	1598	((__SOURCE__) == TIM_TRGO_OC3REF) \|\| \
mbed_official	610:813dcc80987e	1599	((__SOURCE__) == TIM_TRGO_OC4REF))
mbed_official	610:813dcc80987e	1600
mbed_official	610:813dcc80987e	1601	#define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) \|\| \
mbed_official	610:813dcc80987e	1602	((__SOURCE__) == TIM_TRGO2_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1603	((__SOURCE__) == TIM_TRGO2_UPDATE) \|\| \
mbed_official	610:813dcc80987e	1604	((__SOURCE__) == TIM_TRGO2_OC1) \|\| \
mbed_official	610:813dcc80987e	1605	((__SOURCE__) == TIM_TRGO2_OC1REF) \|\| \
mbed_official	610:813dcc80987e	1606	((__SOURCE__) == TIM_TRGO2_OC2REF) \|\| \
mbed_official	610:813dcc80987e	1607	((__SOURCE__) == TIM_TRGO2_OC3REF) \|\| \
mbed_official	610:813dcc80987e	1608	((__SOURCE__) == TIM_TRGO2_OC3REF) \|\| \
mbed_official	610:813dcc80987e	1609	((__SOURCE__) == TIM_TRGO2_OC4REF) \|\| \
mbed_official	610:813dcc80987e	1610	((__SOURCE__) == TIM_TRGO2_OC5REF) \|\| \
mbed_official	610:813dcc80987e	1611	((__SOURCE__) == TIM_TRGO2_OC6REF) \|\| \
mbed_official	610:813dcc80987e	1612	((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) \|\| \
mbed_official	610:813dcc80987e	1613	((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) \|\| \
mbed_official	610:813dcc80987e	1614	((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) \|\| \
mbed_official	610:813dcc80987e	1615	((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) \|\| \
mbed_official	610:813dcc80987e	1616	((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) \|\| \
mbed_official	610:813dcc80987e	1617	((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
mbed_official	610:813dcc80987e	1618
mbed_official	610:813dcc80987e	1619	#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
mbed_official	610:813dcc80987e	1620	((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official	610:813dcc80987e	1621
mbed_official	610:813dcc80987e	1622	#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) \|\| \
mbed_official	610:813dcc80987e	1623	((__MODE__) == TIM_SLAVEMODE_RESET) \|\| \
mbed_official	610:813dcc80987e	1624	((__MODE__) == TIM_SLAVEMODE_GATED) \|\| \
mbed_official	610:813dcc80987e	1625	((__MODE__) == TIM_SLAVEMODE_TRIGGER) \|\| \
mbed_official	610:813dcc80987e	1626	((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) \|\| \
mbed_official	610:813dcc80987e	1627	((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
mbed_official	610:813dcc80987e	1628
mbed_official	610:813dcc80987e	1629	#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) \|\| \
mbed_official	610:813dcc80987e	1630	((__MODE__) == TIM_OCMODE_PWM2) \|\| \
mbed_official	610:813dcc80987e	1631	((__MODE__) == TIM_OCMODE_COMBINED_PWM1) \|\| \
mbed_official	610:813dcc80987e	1632	((__MODE__) == TIM_OCMODE_COMBINED_PWM2) \|\| \
mbed_official	610:813dcc80987e	1633	((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) \|\| \
mbed_official	610:813dcc80987e	1634	((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
mbed_official	610:813dcc80987e	1635
mbed_official	610:813dcc80987e	1636	#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) \|\| \
mbed_official	610:813dcc80987e	1637	((__MODE__) == TIM_OCMODE_ACTIVE) \|\| \
mbed_official	610:813dcc80987e	1638	((__MODE__) == TIM_OCMODE_INACTIVE) \|\| \
mbed_official	610:813dcc80987e	1639	((__MODE__) == TIM_OCMODE_TOGGLE) \|\| \
mbed_official	610:813dcc80987e	1640	((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) \|\| \
mbed_official	610:813dcc80987e	1641	((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) \|\| \
mbed_official	610:813dcc80987e	1642	((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) \|\| \
mbed_official	610:813dcc80987e	1643	((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2))
mbed_official	610:813dcc80987e	1644
mbed_official	610:813dcc80987e	1645	#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) \|\| \
mbed_official	610:813dcc80987e	1646	((__SELECTION__) == TIM_TS_ITR1) \|\| \
mbed_official	610:813dcc80987e	1647	((__SELECTION__) == TIM_TS_ITR2) \|\| \
mbed_official	610:813dcc80987e	1648	((__SELECTION__) == TIM_TS_ITR3) \|\| \
mbed_official	610:813dcc80987e	1649	((__SELECTION__) == TIM_TS_TI1F_ED) \|\| \
mbed_official	610:813dcc80987e	1650	((__SELECTION__) == TIM_TS_TI1FP1) \|\| \
mbed_official	610:813dcc80987e	1651	((__SELECTION__) == TIM_TS_TI2FP2) \|\| \
mbed_official	610:813dcc80987e	1652	((__SELECTION__) == TIM_TS_ETRF))
mbed_official	610:813dcc80987e	1653
mbed_official	610:813dcc80987e	1654	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) \|\| \
mbed_official	610:813dcc80987e	1655	((__SELECTION__) == TIM_TS_ITR1) \|\| \
mbed_official	610:813dcc80987e	1656	((__SELECTION__) == TIM_TS_ITR2) \|\| \
mbed_official	610:813dcc80987e	1657	((__SELECTION__) == TIM_TS_ITR3) \|\| \
mbed_official	610:813dcc80987e	1658	((__SELECTION__) == TIM_TS_NONE))
mbed_official	610:813dcc80987e	1659
mbed_official	610:813dcc80987e	1660
mbed_official	610:813dcc80987e	1661	#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
mbed_official	610:813dcc80987e	1662	((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
mbed_official	610:813dcc80987e	1663	((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
mbed_official	610:813dcc80987e	1664	((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
mbed_official	610:813dcc80987e	1665	((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
mbed_official	610:813dcc80987e	1666
mbed_official	610:813dcc80987e	1667	#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
mbed_official	610:813dcc80987e	1668	((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
mbed_official	610:813dcc80987e	1669	((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
mbed_official	610:813dcc80987e	1670	((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
mbed_official	610:813dcc80987e	1671
mbed_official	610:813dcc80987e	1672	#define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
mbed_official	610:813dcc80987e	1673
mbed_official	610:813dcc80987e	1674	#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) \|\| \
mbed_official	610:813dcc80987e	1675	((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
mbed_official	610:813dcc80987e	1676
mbed_official	610:813dcc80987e	1677	#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) \|\| \
mbed_official	610:813dcc80987e	1678	((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1679	((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1680	((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1681	((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1682	((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1683	((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1684	((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1685	((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1686	((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1687	((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1688	((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1689	((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1690	((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1691	((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1692	((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1693	((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) \|\| \
mbed_official	610:813dcc80987e	1694	((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
mbed_official	610:813dcc80987e	1695
mbed_official	610:813dcc80987e	1696	#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
mbed_official	610:813dcc80987e	1697
mbed_official	610:813dcc80987e	1698	#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF)
mbed_official	610:813dcc80987e	1699
mbed_official	610:813dcc80987e	1700	#define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) \|\| \
mbed_official	610:813dcc80987e	1701	((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) \|\| \
mbed_official	610:813dcc80987e	1702	((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) \|\| \
mbed_official	610:813dcc80987e	1703	((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP))
mbed_official	610:813dcc80987e	1704
mbed_official	610:813dcc80987e	1705	#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	610:813dcc80987e	1706	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
mbed_official	610:813dcc80987e	1707	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
mbed_official	610:813dcc80987e	1708	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
mbed_official	610:813dcc80987e	1709	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
mbed_official	610:813dcc80987e	1710
mbed_official	610:813dcc80987e	1711	#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
mbed_official	610:813dcc80987e	1712	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
mbed_official	610:813dcc80987e	1713	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
mbed_official	610:813dcc80987e	1714	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
mbed_official	610:813dcc80987e	1715	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
mbed_official	610:813dcc80987e	1716
mbed_official	610:813dcc80987e	1717	#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
mbed_official	610:813dcc80987e	1718	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER \|= (__POLARITY__)) :\
mbed_official	610:813dcc80987e	1719	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 4)) :\
mbed_official	610:813dcc80987e	1720	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER \|= ((__POLARITY__) << 8)) :\
mbed_official	610:813dcc80987e	1721	((__HANDLE__)->Instance->CCER \|= (((__POLARITY__) << 12))))
mbed_official	610:813dcc80987e	1722
mbed_official	610:813dcc80987e	1723	#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
mbed_official	610:813dcc80987e	1724	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P \| TIM_CCER_CC1NP)) :\
mbed_official	610:813dcc80987e	1725	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P \| TIM_CCER_CC2NP)) :\
mbed_official	610:813dcc80987e	1726	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P \| TIM_CCER_CC3NP)) :\
mbed_official	610:813dcc80987e	1727	((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P \| TIM_CCER_CC4NP)))
mbed_official	610:813dcc80987e	1728
mbed_official	610:813dcc80987e	1729	/**
mbed_official	610:813dcc80987e	1730	* @}
mbed_official	610:813dcc80987e	1731	*/
mbed_official	610:813dcc80987e	1732	/* End of private macros -----------------------------------------------------*/
mbed_official	610:813dcc80987e	1733
mbed_official	610:813dcc80987e	1734	/* Include TIM HAL Extended module */
mbed_official	610:813dcc80987e	1735	#include "stm32l4xx_hal_tim_ex.h"
mbed_official	610:813dcc80987e	1736
mbed_official	610:813dcc80987e	1737	/* Exported functions --------------------------------------------------------*/
mbed_official	610:813dcc80987e	1738	/** @addtogroup TIM_Exported_Functions TIM Exported Functions
mbed_official	610:813dcc80987e	1739	* @{
mbed_official	610:813dcc80987e	1740	*/
mbed_official	610:813dcc80987e	1741
mbed_official	610:813dcc80987e	1742	/** @addtogroup TIM_Exported_Functions_Group1 Time Base functions
mbed_official	610:813dcc80987e	1743	* @brief Time Base functions
mbed_official	610:813dcc80987e	1744	* @{
mbed_official	610:813dcc80987e	1745	*/
mbed_official	610:813dcc80987e	1746	/* Time Base functions ********************************************************/
mbed_official	610:813dcc80987e	1747	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1748	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1749	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1750	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1751	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1752	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1753	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1754	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1755	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1756	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1757	/* Non-Blocking mode: DMA */
mbed_official	610:813dcc80987e	1758	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
mbed_official	610:813dcc80987e	1759	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1760	/**
mbed_official	610:813dcc80987e	1761	* @}
mbed_official	610:813dcc80987e	1762	*/
mbed_official	610:813dcc80987e	1763
mbed_official	610:813dcc80987e	1764	/** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions
mbed_official	610:813dcc80987e	1765	* @brief Time Output Compare functions
mbed_official	610:813dcc80987e	1766	* @{
mbed_official	610:813dcc80987e	1767	*/
mbed_official	610:813dcc80987e	1768	/* Timer Output Compare functions *********************************************/
mbed_official	610:813dcc80987e	1769	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1770	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1771	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1772	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1773	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1774	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1775	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1776	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1777	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1778	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1779	/* Non-Blocking mode: DMA */
mbed_official	610:813dcc80987e	1780	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	610:813dcc80987e	1781	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1782	/**
mbed_official	610:813dcc80987e	1783	* @}
mbed_official	610:813dcc80987e	1784	*/
mbed_official	610:813dcc80987e	1785
mbed_official	610:813dcc80987e	1786	/** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions
mbed_official	610:813dcc80987e	1787	* @brief Time PWM functions
mbed_official	610:813dcc80987e	1788	* @{
mbed_official	610:813dcc80987e	1789	*/
mbed_official	610:813dcc80987e	1790	/* Timer PWM functions ********************************************************/
mbed_official	610:813dcc80987e	1791	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1792	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1793	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1794	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1795	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1796	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1797	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1798	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1799	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1800	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1801	/* Non-Blocking mode: DMA */
mbed_official	610:813dcc80987e	1802	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	610:813dcc80987e	1803	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1804	/**
mbed_official	610:813dcc80987e	1805	* @}
mbed_official	610:813dcc80987e	1806	*/
mbed_official	610:813dcc80987e	1807
mbed_official	610:813dcc80987e	1808	/** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions
mbed_official	610:813dcc80987e	1809	* @brief Time Input Capture functions
mbed_official	610:813dcc80987e	1810	* @{
mbed_official	610:813dcc80987e	1811	*/
mbed_official	610:813dcc80987e	1812	/* Timer Input Capture functions **********************************************/
mbed_official	610:813dcc80987e	1813	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1814	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1815	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1816	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1817	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1818	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1819	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1820	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1821	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1822	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1823	/* Non-Blocking mode: DMA */
mbed_official	610:813dcc80987e	1824	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	610:813dcc80987e	1825	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1826	/**
mbed_official	610:813dcc80987e	1827	* @}
mbed_official	610:813dcc80987e	1828	*/
mbed_official	610:813dcc80987e	1829
mbed_official	610:813dcc80987e	1830	/** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions
mbed_official	610:813dcc80987e	1831	* @brief Time One Pulse functions
mbed_official	610:813dcc80987e	1832	* @{
mbed_official	610:813dcc80987e	1833	*/
mbed_official	610:813dcc80987e	1834	/* Timer One Pulse functions **************************************************/
mbed_official	610:813dcc80987e	1835	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
mbed_official	610:813dcc80987e	1836	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1837	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1838	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1839	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1840	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	610:813dcc80987e	1841	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	610:813dcc80987e	1842	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1843	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	610:813dcc80987e	1844	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	610:813dcc80987e	1845	/**
mbed_official	610:813dcc80987e	1846	* @}
mbed_official	610:813dcc80987e	1847	*/
mbed_official	610:813dcc80987e	1848
mbed_official	610:813dcc80987e	1849	/** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions
mbed_official	610:813dcc80987e	1850	* @brief Time Encoder functions
mbed_official	610:813dcc80987e	1851	* @{
mbed_official	610:813dcc80987e	1852	*/
mbed_official	610:813dcc80987e	1853	/* Timer Encoder functions ****************************************************/
mbed_official	610:813dcc80987e	1854	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
mbed_official	610:813dcc80987e	1855	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1856	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1857	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1858	/* Blocking mode: Polling */
mbed_official	610:813dcc80987e	1859	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1860	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1861	/* Non-Blocking mode: Interrupt */
mbed_official	610:813dcc80987e	1862	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1863	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1864	/* Non-Blocking mode: DMA */
mbed_official	610:813dcc80987e	1865	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
mbed_official	610:813dcc80987e	1866	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1867	/**
mbed_official	610:813dcc80987e	1868	* @}
mbed_official	610:813dcc80987e	1869	*/
mbed_official	610:813dcc80987e	1870
mbed_official	610:813dcc80987e	1871	/** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management
mbed_official	610:813dcc80987e	1872	* @brief IRQ handler management
mbed_official	610:813dcc80987e	1873	* @{
mbed_official	610:813dcc80987e	1874	*/
mbed_official	610:813dcc80987e	1875	/* Interrupt Handler functions ***********************************************/
mbed_official	610:813dcc80987e	1876	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1877	/**
mbed_official	610:813dcc80987e	1878	* @}
mbed_official	610:813dcc80987e	1879	*/
mbed_official	610:813dcc80987e	1880
mbed_official	610:813dcc80987e	1881	/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
mbed_official	610:813dcc80987e	1882	* @brief Peripheral Control functions
mbed_official	610:813dcc80987e	1883	* @{
mbed_official	610:813dcc80987e	1884	*/
mbed_official	610:813dcc80987e	1885	/* Control functions *********************************************************/
mbed_official	610:813dcc80987e	1886	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	610:813dcc80987e	1887	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	610:813dcc80987e	1888	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	610:813dcc80987e	1889	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
mbed_official	610:813dcc80987e	1890	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
mbed_official	610:813dcc80987e	1891	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
mbed_official	610:813dcc80987e	1892	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
mbed_official	610:813dcc80987e	1893	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	610:813dcc80987e	1894	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	610:813dcc80987e	1895	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	610:813dcc80987e	1896	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	610:813dcc80987e	1897	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	610:813dcc80987e	1898	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	610:813dcc80987e	1899	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	610:813dcc80987e	1900	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	610:813dcc80987e	1901	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
mbed_official	610:813dcc80987e	1902	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	610:813dcc80987e	1903	/**
mbed_official	610:813dcc80987e	1904	* @}
mbed_official	610:813dcc80987e	1905	*/
mbed_official	610:813dcc80987e	1906
mbed_official	610:813dcc80987e	1907	/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
mbed_official	610:813dcc80987e	1908	* @brief TIM Callbacks functions
mbed_official	610:813dcc80987e	1909	* @{
mbed_official	610:813dcc80987e	1910	*/
mbed_official	610:813dcc80987e	1911	/* Callback in non blocking modes (Interrupt and DMA) *************************/
mbed_official	610:813dcc80987e	1912	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1913	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1914	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1915	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1916	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1917	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1918	/**
mbed_official	610:813dcc80987e	1919	* @}
mbed_official	610:813dcc80987e	1920	*/
mbed_official	610:813dcc80987e	1921
mbed_official	610:813dcc80987e	1922	/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
mbed_official	610:813dcc80987e	1923	* @brief Peripheral State functions
mbed_official	610:813dcc80987e	1924	* @{
mbed_official	610:813dcc80987e	1925	*/
mbed_official	610:813dcc80987e	1926	/* Peripheral State functions ************************************************/
mbed_official	610:813dcc80987e	1927	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1928	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1929	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1930	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1931	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1932	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
mbed_official	610:813dcc80987e	1933	/**
mbed_official	610:813dcc80987e	1934	* @}
mbed_official	610:813dcc80987e	1935	*/
mbed_official	610:813dcc80987e	1936
mbed_official	610:813dcc80987e	1937	/**
mbed_official	610:813dcc80987e	1938	* @}
mbed_official	610:813dcc80987e	1939	*/
mbed_official	610:813dcc80987e	1940	/* End of exported functions -------------------------------------------------*/
mbed_official	610:813dcc80987e	1941
mbed_official	610:813dcc80987e	1942	/* Private functions----------------------------------------------------------*/
mbed_official	610:813dcc80987e	1943	/** @defgroup TIM_Private_Functions TIM Private Functions
mbed_official	610:813dcc80987e	1944	* @{
mbed_official	610:813dcc80987e	1945	*/
mbed_official	610:813dcc80987e	1946	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
mbed_official	610:813dcc80987e	1947	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	610:813dcc80987e	1948	void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	610:813dcc80987e	1949	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	610:813dcc80987e	1950	void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	610:813dcc80987e	1951	void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	610:813dcc80987e	1952	void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official	610:813dcc80987e	1953	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
mbed_official	610:813dcc80987e	1954
mbed_official	610:813dcc80987e	1955	void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
mbed_official	610:813dcc80987e	1956	void TIM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	610:813dcc80987e	1957	void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
mbed_official	610:813dcc80987e	1958	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
mbed_official	610:813dcc80987e	1959	/**
mbed_official	610:813dcc80987e	1960	* @}
mbed_official	610:813dcc80987e	1961	*/
mbed_official	610:813dcc80987e	1962	/* End of private functions --------------------------------------------------*/
mbed_official	610:813dcc80987e	1963
mbed_official	610:813dcc80987e	1964	/**
mbed_official	610:813dcc80987e	1965	* @}
mbed_official	610:813dcc80987e	1966	*/
mbed_official	610:813dcc80987e	1967
mbed_official	610:813dcc80987e	1968	/**
mbed_official	610:813dcc80987e	1969	* @}
mbed_official	610:813dcc80987e	1970	*/
mbed_official	610:813dcc80987e	1971
mbed_official	610:813dcc80987e	1972	#ifdef __cplusplus
mbed_official	610:813dcc80987e	1973	}
mbed_official	610:813dcc80987e	1974	#endif
mbed_official	610:813dcc80987e	1975
mbed_official	610:813dcc80987e	1976	#endif /* __STM32L4xx_HAL_TIM_H */
mbed_official	610:813dcc80987e	1977
mbed_official	610:813dcc80987e	1978	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/