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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_tim.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_tim.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief TIM HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities of the Timer (TIM) peripheral:
mbed_official 610:813dcc80987e 10 * + Time Base Initialization
mbed_official 610:813dcc80987e 11 * + Time Base Start
mbed_official 610:813dcc80987e 12 * + Time Base Start Interruption
mbed_official 610:813dcc80987e 13 * + Time Base Start DMA
mbed_official 610:813dcc80987e 14 * + Time Output Compare/PWM Initialization
mbed_official 610:813dcc80987e 15 * + Time Output Compare/PWM Channel Configuration
mbed_official 610:813dcc80987e 16 * + Time Output Compare/PWM Start
mbed_official 610:813dcc80987e 17 * + Time Output Compare/PWM Start Interruption
mbed_official 610:813dcc80987e 18 * + Time Output Compare/PWM Start DMA
mbed_official 610:813dcc80987e 19 * + Time Input Capture Initialization
mbed_official 610:813dcc80987e 20 * + Time Input Capture Channel Configuration
mbed_official 610:813dcc80987e 21 * + Time Input Capture Start
mbed_official 610:813dcc80987e 22 * + Time Input Capture Start Interruption
mbed_official 610:813dcc80987e 23 * + Time Input Capture Start DMA
mbed_official 610:813dcc80987e 24 * + Time One Pulse Initialization
mbed_official 610:813dcc80987e 25 * + Time One Pulse Channel Configuration
mbed_official 610:813dcc80987e 26 * + Time One Pulse Start
mbed_official 610:813dcc80987e 27 * + Time Encoder Interface Initialization
mbed_official 610:813dcc80987e 28 * + Time Encoder Interface Start
mbed_official 610:813dcc80987e 29 * + Time Encoder Interface Start Interruption
mbed_official 610:813dcc80987e 30 * + Time Encoder Interface Start DMA
mbed_official 610:813dcc80987e 31 * + Commutation Event configuration with Interruption and DMA
mbed_official 610:813dcc80987e 32 * + Time OCRef clear configuration
mbed_official 610:813dcc80987e 33 * + Time External Clock configuration
mbed_official 610:813dcc80987e 34 @verbatim
mbed_official 610:813dcc80987e 35 ==============================================================================
mbed_official 610:813dcc80987e 36 ##### TIMER Generic features #####
mbed_official 610:813dcc80987e 37 ==============================================================================
mbed_official 610:813dcc80987e 38 [..] The Timer features include:
mbed_official 610:813dcc80987e 39 (#) 16-bit up, down, up/down auto-reload counter.
mbed_official 610:813dcc80987e 40 (#) 16-bit programmable prescaler allowing dividing (also on the fly) the
mbed_official 610:813dcc80987e 41 counter clock frequency either by any factor between 1 and 65536.
mbed_official 610:813dcc80987e 42 (#) Up to 4 independent channels for:
mbed_official 610:813dcc80987e 43 (++) Input Capture
mbed_official 610:813dcc80987e 44 (++) Output Compare
mbed_official 610:813dcc80987e 45 (++) PWM generation (Edge and Center-aligned Mode)
mbed_official 610:813dcc80987e 46 (++) One-pulse mode output
mbed_official 610:813dcc80987e 47
mbed_official 610:813dcc80987e 48 ##### How to use this driver #####
mbed_official 610:813dcc80987e 49 ==============================================================================
mbed_official 610:813dcc80987e 50 [..]
mbed_official 610:813dcc80987e 51 (#) Initialize the TIM low level resources by implementing the following functions
mbed_official 610:813dcc80987e 52 depending on the selected feature:
mbed_official 610:813dcc80987e 53 (++) Time Base : HAL_TIM_Base_MspInit()
mbed_official 610:813dcc80987e 54 (++) Input Capture : HAL_TIM_IC_MspInit()
mbed_official 610:813dcc80987e 55 (++) Output Compare : HAL_TIM_OC_MspInit()
mbed_official 610:813dcc80987e 56 (++) PWM generation : HAL_TIM_PWM_MspInit()
mbed_official 610:813dcc80987e 57 (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
mbed_official 610:813dcc80987e 58 (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
mbed_official 610:813dcc80987e 59
mbed_official 610:813dcc80987e 60 (#) Initialize the TIM low level resources :
mbed_official 610:813dcc80987e 61 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
mbed_official 610:813dcc80987e 62 (##) TIM pins configuration
mbed_official 610:813dcc80987e 63 (+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official 610:813dcc80987e 64 __HAL_RCC_GPIOx_CLK_ENABLE();
mbed_official 610:813dcc80987e 65 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official 610:813dcc80987e 66
mbed_official 610:813dcc80987e 67 (#) The external Clock can be configured, if needed (the default clock is the
mbed_official 610:813dcc80987e 68 internal clock from the APBx), using the following function:
mbed_official 610:813dcc80987e 69 HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official 610:813dcc80987e 70 any start function.
mbed_official 610:813dcc80987e 71
mbed_official 610:813dcc80987e 72 (#) Configure the TIM in the desired functioning mode using one of the
mbed_official 610:813dcc80987e 73 Initialization function of this driver:
mbed_official 610:813dcc80987e 74 (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
mbed_official 610:813dcc80987e 75 (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
mbed_official 610:813dcc80987e 76 Output Compare signal.
mbed_official 610:813dcc80987e 77 (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
mbed_official 610:813dcc80987e 78 PWM signal.
mbed_official 610:813dcc80987e 79 (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
mbed_official 610:813dcc80987e 80 external signal.
mbed_official 610:813dcc80987e 81 (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
mbed_official 610:813dcc80987e 82 in One Pulse Mode.
mbed_official 610:813dcc80987e 83 (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
mbed_official 610:813dcc80987e 84
mbed_official 610:813dcc80987e 85 (#) Activate the TIM peripheral using one of the start functions depending from the feature used:
mbed_official 610:813dcc80987e 86 (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
mbed_official 610:813dcc80987e 87 (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
mbed_official 610:813dcc80987e 88 (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
mbed_official 610:813dcc80987e 89 (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
mbed_official 610:813dcc80987e 90 (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
mbed_official 610:813dcc80987e 91 (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
mbed_official 610:813dcc80987e 92
mbed_official 610:813dcc80987e 93 (#) The DMA Burst is managed with the two following functions:
mbed_official 610:813dcc80987e 94 HAL_TIM_DMABurst_WriteStart()
mbed_official 610:813dcc80987e 95 HAL_TIM_DMABurst_ReadStart()
mbed_official 610:813dcc80987e 96
mbed_official 610:813dcc80987e 97 @endverbatim
mbed_official 610:813dcc80987e 98 ******************************************************************************
mbed_official 610:813dcc80987e 99 * @attention
mbed_official 610:813dcc80987e 100 *
mbed_official 610:813dcc80987e 101 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 102 *
mbed_official 610:813dcc80987e 103 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 104 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 105 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 106 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 108 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 109 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 111 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 112 * without specific prior written permission.
mbed_official 610:813dcc80987e 113 *
mbed_official 610:813dcc80987e 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 124 *
mbed_official 610:813dcc80987e 125 ******************************************************************************
mbed_official 610:813dcc80987e 126 */
mbed_official 610:813dcc80987e 127
mbed_official 610:813dcc80987e 128 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 129 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 130
mbed_official 610:813dcc80987e 131 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 132 * @{
mbed_official 610:813dcc80987e 133 */
mbed_official 610:813dcc80987e 134
mbed_official 610:813dcc80987e 135 /** @defgroup TIM TIM
mbed_official 610:813dcc80987e 136 * @brief TIM HAL module driver
mbed_official 610:813dcc80987e 137 * @{
mbed_official 610:813dcc80987e 138 */
mbed_official 610:813dcc80987e 139
mbed_official 610:813dcc80987e 140 #ifdef HAL_TIM_MODULE_ENABLED
mbed_official 610:813dcc80987e 141
mbed_official 610:813dcc80987e 142 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 143 /* Private define ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 144 /* Private macro -------------------------------------------------------------*/
mbed_official 610:813dcc80987e 145 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 146 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 147 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 610:813dcc80987e 148 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 149 uint32_t TIM_ICFilter);
mbed_official 610:813dcc80987e 150 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 610:813dcc80987e 151 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 152 uint32_t TIM_ICFilter);
mbed_official 610:813dcc80987e 153 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 154 uint32_t TIM_ICFilter);
mbed_official 610:813dcc80987e 155 static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource);
mbed_official 610:813dcc80987e 156 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 157 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 158 static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 159 TIM_SlaveConfigTypeDef * sSlaveConfig);
mbed_official 610:813dcc80987e 160 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 161
mbed_official 610:813dcc80987e 162 /** @defgroup TIM_Exported_Functions TIM Exported Functions
mbed_official 610:813dcc80987e 163 * @{
mbed_official 610:813dcc80987e 164 */
mbed_official 610:813dcc80987e 165
mbed_official 610:813dcc80987e 166 /** @defgroup TIM_Exported_Functions_Group1 Time Base functions
mbed_official 610:813dcc80987e 167 * @brief Time Base functions
mbed_official 610:813dcc80987e 168 *
mbed_official 610:813dcc80987e 169 @verbatim
mbed_official 610:813dcc80987e 170 ==============================================================================
mbed_official 610:813dcc80987e 171 ##### Time Base functions #####
mbed_official 610:813dcc80987e 172 ==============================================================================
mbed_official 610:813dcc80987e 173 [..]
mbed_official 610:813dcc80987e 174 This section provides functions allowing to:
mbed_official 610:813dcc80987e 175 (+) Initialize and configure the TIM base.
mbed_official 610:813dcc80987e 176 (+) De-initialize the TIM base.
mbed_official 610:813dcc80987e 177 (+) Start the Time Base.
mbed_official 610:813dcc80987e 178 (+) Stop the Time Base.
mbed_official 610:813dcc80987e 179 (+) Start the Time Base and enable interrupt.
mbed_official 610:813dcc80987e 180 (+) Stop the Time Base and disable interrupt.
mbed_official 610:813dcc80987e 181 (+) Start the Time Base and enable DMA transfer.
mbed_official 610:813dcc80987e 182 (+) Stop the Time Base and disable DMA transfer.
mbed_official 610:813dcc80987e 183
mbed_official 610:813dcc80987e 184 @endverbatim
mbed_official 610:813dcc80987e 185 * @{
mbed_official 610:813dcc80987e 186 */
mbed_official 610:813dcc80987e 187 /**
mbed_official 610:813dcc80987e 188 * @brief Initializes the TIM Time base Unit according to the specified
mbed_official 610:813dcc80987e 189 * parameters in the TIM_HandleTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 190 * @param htim: TIM Base handle
mbed_official 610:813dcc80987e 191 * @retval HAL status
mbed_official 610:813dcc80987e 192 */
mbed_official 610:813dcc80987e 193 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 194 {
mbed_official 610:813dcc80987e 195 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 196 if(htim == NULL)
mbed_official 610:813dcc80987e 197 {
mbed_official 610:813dcc80987e 198 return HAL_ERROR;
mbed_official 610:813dcc80987e 199 }
mbed_official 610:813dcc80987e 200
mbed_official 610:813dcc80987e 201 /* Check the parameters */
mbed_official 610:813dcc80987e 202 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 203 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 204 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 205
mbed_official 610:813dcc80987e 206 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 207 {
mbed_official 610:813dcc80987e 208 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 209 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 210
mbed_official 610:813dcc80987e 211 /* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official 610:813dcc80987e 212 HAL_TIM_Base_MspInit(htim);
mbed_official 610:813dcc80987e 213 }
mbed_official 610:813dcc80987e 214
mbed_official 610:813dcc80987e 215 /* Set the TIM state */
mbed_official 610:813dcc80987e 216 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 217
mbed_official 610:813dcc80987e 218 /* Set the Time Base configuration */
mbed_official 610:813dcc80987e 219 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 220
mbed_official 610:813dcc80987e 221 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 222 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 223
mbed_official 610:813dcc80987e 224 return HAL_OK;
mbed_official 610:813dcc80987e 225 }
mbed_official 610:813dcc80987e 226
mbed_official 610:813dcc80987e 227 /**
mbed_official 610:813dcc80987e 228 * @brief DeInitialize the TIM Base peripheral
mbed_official 610:813dcc80987e 229 * @param htim: TIM Base handle
mbed_official 610:813dcc80987e 230 * @retval HAL status
mbed_official 610:813dcc80987e 231 */
mbed_official 610:813dcc80987e 232 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 233 {
mbed_official 610:813dcc80987e 234 /* Check the parameters */
mbed_official 610:813dcc80987e 235 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 236
mbed_official 610:813dcc80987e 237 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 238
mbed_official 610:813dcc80987e 239 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 240 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 241
mbed_official 610:813dcc80987e 242 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 610:813dcc80987e 243 HAL_TIM_Base_MspDeInit(htim);
mbed_official 610:813dcc80987e 244
mbed_official 610:813dcc80987e 245 /* Change TIM state */
mbed_official 610:813dcc80987e 246 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 247
mbed_official 610:813dcc80987e 248 /* Release Lock */
mbed_official 610:813dcc80987e 249 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 250
mbed_official 610:813dcc80987e 251 return HAL_OK;
mbed_official 610:813dcc80987e 252 }
mbed_official 610:813dcc80987e 253
mbed_official 610:813dcc80987e 254 /**
mbed_official 610:813dcc80987e 255 * @brief Initializes the TIM Base MSP.
mbed_official 610:813dcc80987e 256 * @param htim: TIM handle
mbed_official 610:813dcc80987e 257 * @retval None
mbed_official 610:813dcc80987e 258 */
mbed_official 610:813dcc80987e 259 __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 260 {
mbed_official 610:813dcc80987e 261 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 262 the HAL_TIM_Base_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 263 */
mbed_official 610:813dcc80987e 264 }
mbed_official 610:813dcc80987e 265
mbed_official 610:813dcc80987e 266 /**
mbed_official 610:813dcc80987e 267 * @brief DeInitialize TIM Base MSP.
mbed_official 610:813dcc80987e 268 * @param htim: TIM handle
mbed_official 610:813dcc80987e 269 * @retval None
mbed_official 610:813dcc80987e 270 */
mbed_official 610:813dcc80987e 271 __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 272 {
mbed_official 610:813dcc80987e 273 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 274 the HAL_TIM_Base_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 275 */
mbed_official 610:813dcc80987e 276 }
mbed_official 610:813dcc80987e 277
mbed_official 610:813dcc80987e 278
mbed_official 610:813dcc80987e 279 /**
mbed_official 610:813dcc80987e 280 * @brief Starts the TIM Base generation.
mbed_official 610:813dcc80987e 281 * @param htim : TIM handle
mbed_official 610:813dcc80987e 282 * @retval HAL status
mbed_official 610:813dcc80987e 283 */
mbed_official 610:813dcc80987e 284 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 285 {
mbed_official 610:813dcc80987e 286 /* Check the parameters */
mbed_official 610:813dcc80987e 287 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 288
mbed_official 610:813dcc80987e 289 /* Set the TIM state */
mbed_official 610:813dcc80987e 290 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 291
mbed_official 610:813dcc80987e 292 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 293 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 294
mbed_official 610:813dcc80987e 295 /* Change the TIM state*/
mbed_official 610:813dcc80987e 296 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 297
mbed_official 610:813dcc80987e 298 /* Return function status */
mbed_official 610:813dcc80987e 299 return HAL_OK;
mbed_official 610:813dcc80987e 300 }
mbed_official 610:813dcc80987e 301
mbed_official 610:813dcc80987e 302 /**
mbed_official 610:813dcc80987e 303 * @brief Stops the TIM Base generation.
mbed_official 610:813dcc80987e 304 * @param htim : TIM handle
mbed_official 610:813dcc80987e 305 * @retval HAL status
mbed_official 610:813dcc80987e 306 */
mbed_official 610:813dcc80987e 307 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 308 {
mbed_official 610:813dcc80987e 309 /* Check the parameters */
mbed_official 610:813dcc80987e 310 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 311
mbed_official 610:813dcc80987e 312 /* Set the TIM state */
mbed_official 610:813dcc80987e 313 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 314
mbed_official 610:813dcc80987e 315 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 316 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 317
mbed_official 610:813dcc80987e 318 /* Change the TIM state*/
mbed_official 610:813dcc80987e 319 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 320
mbed_official 610:813dcc80987e 321 /* Return function status */
mbed_official 610:813dcc80987e 322 return HAL_OK;
mbed_official 610:813dcc80987e 323 }
mbed_official 610:813dcc80987e 324
mbed_official 610:813dcc80987e 325 /**
mbed_official 610:813dcc80987e 326 * @brief Starts the TIM Base generation in interrupt mode.
mbed_official 610:813dcc80987e 327 * @param htim : TIM handle
mbed_official 610:813dcc80987e 328 * @retval HAL status
mbed_official 610:813dcc80987e 329 */
mbed_official 610:813dcc80987e 330 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 331 {
mbed_official 610:813dcc80987e 332 /* Check the parameters */
mbed_official 610:813dcc80987e 333 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 334
mbed_official 610:813dcc80987e 335 /* Enable the TIM Update interrupt */
mbed_official 610:813dcc80987e 336 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 610:813dcc80987e 337
mbed_official 610:813dcc80987e 338 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 339 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 340
mbed_official 610:813dcc80987e 341 /* Return function status */
mbed_official 610:813dcc80987e 342 return HAL_OK;
mbed_official 610:813dcc80987e 343 }
mbed_official 610:813dcc80987e 344
mbed_official 610:813dcc80987e 345 /**
mbed_official 610:813dcc80987e 346 * @brief Stops the TIM Base generation in interrupt mode.
mbed_official 610:813dcc80987e 347 * @param htim : TIM handle
mbed_official 610:813dcc80987e 348 * @retval HAL status
mbed_official 610:813dcc80987e 349 */
mbed_official 610:813dcc80987e 350 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 351 {
mbed_official 610:813dcc80987e 352 /* Check the parameters */
mbed_official 610:813dcc80987e 353 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 354 /* Disable the TIM Update interrupt */
mbed_official 610:813dcc80987e 355 __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 610:813dcc80987e 356
mbed_official 610:813dcc80987e 357 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 358 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 359
mbed_official 610:813dcc80987e 360 /* Return function status */
mbed_official 610:813dcc80987e 361 return HAL_OK;
mbed_official 610:813dcc80987e 362 }
mbed_official 610:813dcc80987e 363
mbed_official 610:813dcc80987e 364 /**
mbed_official 610:813dcc80987e 365 * @brief Starts the TIM Base generation in DMA mode.
mbed_official 610:813dcc80987e 366 * @param htim : TIM handle
mbed_official 610:813dcc80987e 367 * @param pData: The source Buffer address.
mbed_official 610:813dcc80987e 368 * @param Length: The length of data to be transferred from memory to peripheral.
mbed_official 610:813dcc80987e 369 * @retval HAL status
mbed_official 610:813dcc80987e 370 */
mbed_official 610:813dcc80987e 371 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 372 {
mbed_official 610:813dcc80987e 373 /* Check the parameters */
mbed_official 610:813dcc80987e 374 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 375
mbed_official 610:813dcc80987e 376 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 377 {
mbed_official 610:813dcc80987e 378 return HAL_BUSY;
mbed_official 610:813dcc80987e 379 }
mbed_official 610:813dcc80987e 380 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 381 {
mbed_official 610:813dcc80987e 382 if((pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 383 {
mbed_official 610:813dcc80987e 384 return HAL_ERROR;
mbed_official 610:813dcc80987e 385 }
mbed_official 610:813dcc80987e 386 else
mbed_official 610:813dcc80987e 387 {
mbed_official 610:813dcc80987e 388 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 389 }
mbed_official 610:813dcc80987e 390 }
mbed_official 610:813dcc80987e 391 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 392 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 610:813dcc80987e 393
mbed_official 610:813dcc80987e 394 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 395 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 396
mbed_official 610:813dcc80987e 397 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 398 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
mbed_official 610:813dcc80987e 399
mbed_official 610:813dcc80987e 400 /* Enable the TIM Update DMA request */
mbed_official 610:813dcc80987e 401 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 610:813dcc80987e 402
mbed_official 610:813dcc80987e 403 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 404 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 405
mbed_official 610:813dcc80987e 406 /* Return function status */
mbed_official 610:813dcc80987e 407 return HAL_OK;
mbed_official 610:813dcc80987e 408 }
mbed_official 610:813dcc80987e 409
mbed_official 610:813dcc80987e 410 /**
mbed_official 610:813dcc80987e 411 * @brief Stops the TIM Base generation in DMA mode.
mbed_official 610:813dcc80987e 412 * @param htim : TIM handle
mbed_official 610:813dcc80987e 413 * @retval HAL status
mbed_official 610:813dcc80987e 414 */
mbed_official 610:813dcc80987e 415 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 416 {
mbed_official 610:813dcc80987e 417 /* Check the parameters */
mbed_official 610:813dcc80987e 418 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 419
mbed_official 610:813dcc80987e 420 /* Disable the TIM Update DMA request */
mbed_official 610:813dcc80987e 421 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 610:813dcc80987e 422
mbed_official 610:813dcc80987e 423 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 424 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 425
mbed_official 610:813dcc80987e 426 /* Change the htim state */
mbed_official 610:813dcc80987e 427 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 428
mbed_official 610:813dcc80987e 429 /* Return function status */
mbed_official 610:813dcc80987e 430 return HAL_OK;
mbed_official 610:813dcc80987e 431 }
mbed_official 610:813dcc80987e 432
mbed_official 610:813dcc80987e 433 /**
mbed_official 610:813dcc80987e 434 * @}
mbed_official 610:813dcc80987e 435 */
mbed_official 610:813dcc80987e 436
mbed_official 610:813dcc80987e 437 /** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions
mbed_official 610:813dcc80987e 438 * @brief Time Output Compare functions
mbed_official 610:813dcc80987e 439 *
mbed_official 610:813dcc80987e 440 @verbatim
mbed_official 610:813dcc80987e 441 ==============================================================================
mbed_official 610:813dcc80987e 442 ##### Time Output Compare functions #####
mbed_official 610:813dcc80987e 443 ==============================================================================
mbed_official 610:813dcc80987e 444 [..]
mbed_official 610:813dcc80987e 445 This section provides functions allowing to:
mbed_official 610:813dcc80987e 446 (+) Initialize and configure the TIM Output Compare.
mbed_official 610:813dcc80987e 447 (+) De-initialize the TIM Output Compare.
mbed_official 610:813dcc80987e 448 (+) Start the Time Output Compare.
mbed_official 610:813dcc80987e 449 (+) Stop the Time Output Compare.
mbed_official 610:813dcc80987e 450 (+) Start the Time Output Compare and enable interrupt.
mbed_official 610:813dcc80987e 451 (+) Stop the Time Output Compare and disable interrupt.
mbed_official 610:813dcc80987e 452 (+) Start the Time Output Compare and enable DMA transfer.
mbed_official 610:813dcc80987e 453 (+) Stop the Time Output Compare and disable DMA transfer.
mbed_official 610:813dcc80987e 454
mbed_official 610:813dcc80987e 455 @endverbatim
mbed_official 610:813dcc80987e 456 * @{
mbed_official 610:813dcc80987e 457 */
mbed_official 610:813dcc80987e 458 /**
mbed_official 610:813dcc80987e 459 * @brief Initializes the TIM Output Compare according to the specified
mbed_official 610:813dcc80987e 460 * parameters in the TIM_HandleTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 461 * @param htim: TIM Output Compare handle
mbed_official 610:813dcc80987e 462 * @retval HAL status
mbed_official 610:813dcc80987e 463 */
mbed_official 610:813dcc80987e 464 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
mbed_official 610:813dcc80987e 465 {
mbed_official 610:813dcc80987e 466 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 467 if(htim == NULL)
mbed_official 610:813dcc80987e 468 {
mbed_official 610:813dcc80987e 469 return HAL_ERROR;
mbed_official 610:813dcc80987e 470 }
mbed_official 610:813dcc80987e 471
mbed_official 610:813dcc80987e 472 /* Check the parameters */
mbed_official 610:813dcc80987e 473 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 474 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 475 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 476
mbed_official 610:813dcc80987e 477 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 478 {
mbed_official 610:813dcc80987e 479 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 480 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 481
mbed_official 610:813dcc80987e 482 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 483 HAL_TIM_OC_MspInit(htim);
mbed_official 610:813dcc80987e 484 }
mbed_official 610:813dcc80987e 485
mbed_official 610:813dcc80987e 486 /* Set the TIM state */
mbed_official 610:813dcc80987e 487 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 488
mbed_official 610:813dcc80987e 489 /* Init the base time for the Output Compare */
mbed_official 610:813dcc80987e 490 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 491
mbed_official 610:813dcc80987e 492 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 493 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 494
mbed_official 610:813dcc80987e 495 return HAL_OK;
mbed_official 610:813dcc80987e 496 }
mbed_official 610:813dcc80987e 497
mbed_official 610:813dcc80987e 498 /**
mbed_official 610:813dcc80987e 499 * @brief DeInitialize the TIM peripheral
mbed_official 610:813dcc80987e 500 * @param htim: TIM Output Compare handle
mbed_official 610:813dcc80987e 501 * @retval HAL status
mbed_official 610:813dcc80987e 502 */
mbed_official 610:813dcc80987e 503 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 504 {
mbed_official 610:813dcc80987e 505 /* Check the parameters */
mbed_official 610:813dcc80987e 506 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 507
mbed_official 610:813dcc80987e 508 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 509
mbed_official 610:813dcc80987e 510 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 511 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 512
mbed_official 610:813dcc80987e 513 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 514 HAL_TIM_OC_MspDeInit(htim);
mbed_official 610:813dcc80987e 515
mbed_official 610:813dcc80987e 516 /* Change TIM state */
mbed_official 610:813dcc80987e 517 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 518
mbed_official 610:813dcc80987e 519 /* Release Lock */
mbed_official 610:813dcc80987e 520 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 521
mbed_official 610:813dcc80987e 522 return HAL_OK;
mbed_official 610:813dcc80987e 523 }
mbed_official 610:813dcc80987e 524
mbed_official 610:813dcc80987e 525 /**
mbed_official 610:813dcc80987e 526 * @brief Initializes the TIM Output Compare MSP.
mbed_official 610:813dcc80987e 527 * @param htim: TIM handle
mbed_official 610:813dcc80987e 528 * @retval None
mbed_official 610:813dcc80987e 529 */
mbed_official 610:813dcc80987e 530 __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 531 {
mbed_official 610:813dcc80987e 532 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 533 the HAL_TIM_OC_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 534 */
mbed_official 610:813dcc80987e 535 }
mbed_official 610:813dcc80987e 536
mbed_official 610:813dcc80987e 537 /**
mbed_official 610:813dcc80987e 538 * @brief DeInitialize TIM Output Compare MSP.
mbed_official 610:813dcc80987e 539 * @param htim: TIM handle
mbed_official 610:813dcc80987e 540 * @retval None
mbed_official 610:813dcc80987e 541 */
mbed_official 610:813dcc80987e 542 __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 543 {
mbed_official 610:813dcc80987e 544 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 545 the HAL_TIM_OC_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 546 */
mbed_official 610:813dcc80987e 547 }
mbed_official 610:813dcc80987e 548
mbed_official 610:813dcc80987e 549 /**
mbed_official 610:813dcc80987e 550 * @brief Starts the TIM Output Compare signal generation.
mbed_official 610:813dcc80987e 551 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 552 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 553 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 554 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 555 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 556 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 557 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 558 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 559 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 560 * @retval HAL status
mbed_official 610:813dcc80987e 561 */
mbed_official 610:813dcc80987e 562 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 563 {
mbed_official 610:813dcc80987e 564 /* Check the parameters */
mbed_official 610:813dcc80987e 565 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 566
mbed_official 610:813dcc80987e 567 /* Enable the Output compare channel */
mbed_official 610:813dcc80987e 568 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 569
mbed_official 610:813dcc80987e 570 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 571 {
mbed_official 610:813dcc80987e 572 /* Enable the main output */
mbed_official 610:813dcc80987e 573 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 574 }
mbed_official 610:813dcc80987e 575
mbed_official 610:813dcc80987e 576 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 577 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 578
mbed_official 610:813dcc80987e 579 /* Return function status */
mbed_official 610:813dcc80987e 580 return HAL_OK;
mbed_official 610:813dcc80987e 581 }
mbed_official 610:813dcc80987e 582
mbed_official 610:813dcc80987e 583 /**
mbed_official 610:813dcc80987e 584 * @brief Stops the TIM Output Compare signal generation.
mbed_official 610:813dcc80987e 585 * @param htim : TIM handle
mbed_official 610:813dcc80987e 586 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 587 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 588 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 589 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 590 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 591 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 592 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 593 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 594 * @retval HAL status
mbed_official 610:813dcc80987e 595 */
mbed_official 610:813dcc80987e 596 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 597 {
mbed_official 610:813dcc80987e 598 /* Check the parameters */
mbed_official 610:813dcc80987e 599 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 600
mbed_official 610:813dcc80987e 601 /* Disable the Output compare channel */
mbed_official 610:813dcc80987e 602 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 603
mbed_official 610:813dcc80987e 604 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 605 {
mbed_official 610:813dcc80987e 606 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 607 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 608 }
mbed_official 610:813dcc80987e 609
mbed_official 610:813dcc80987e 610 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 611 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 612
mbed_official 610:813dcc80987e 613 /* Return function status */
mbed_official 610:813dcc80987e 614 return HAL_OK;
mbed_official 610:813dcc80987e 615 }
mbed_official 610:813dcc80987e 616
mbed_official 610:813dcc80987e 617 /**
mbed_official 610:813dcc80987e 618 * @brief Starts the TIM Output Compare signal generation in interrupt mode.
mbed_official 610:813dcc80987e 619 * @param htim : TIM OC handle
mbed_official 610:813dcc80987e 620 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 621 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 622 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 623 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 624 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 625 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 626 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 627 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 628 * @retval HAL status
mbed_official 610:813dcc80987e 629 */
mbed_official 610:813dcc80987e 630 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 631 {
mbed_official 610:813dcc80987e 632 /* Check the parameters */
mbed_official 610:813dcc80987e 633 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 634
mbed_official 610:813dcc80987e 635 switch (Channel)
mbed_official 610:813dcc80987e 636 {
mbed_official 610:813dcc80987e 637 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 638 {
mbed_official 610:813dcc80987e 639 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 640 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 641 }
mbed_official 610:813dcc80987e 642 break;
mbed_official 610:813dcc80987e 643
mbed_official 610:813dcc80987e 644 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 645 {
mbed_official 610:813dcc80987e 646 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 647 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 648 }
mbed_official 610:813dcc80987e 649 break;
mbed_official 610:813dcc80987e 650
mbed_official 610:813dcc80987e 651 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 652 {
mbed_official 610:813dcc80987e 653 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 654 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 655 }
mbed_official 610:813dcc80987e 656 break;
mbed_official 610:813dcc80987e 657
mbed_official 610:813dcc80987e 658 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 659 {
mbed_official 610:813dcc80987e 660 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 661 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 662 }
mbed_official 610:813dcc80987e 663 break;
mbed_official 610:813dcc80987e 664
mbed_official 610:813dcc80987e 665 default:
mbed_official 610:813dcc80987e 666 break;
mbed_official 610:813dcc80987e 667 }
mbed_official 610:813dcc80987e 668
mbed_official 610:813dcc80987e 669 /* Enable the Output compare channel */
mbed_official 610:813dcc80987e 670 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 671
mbed_official 610:813dcc80987e 672 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 673 {
mbed_official 610:813dcc80987e 674 /* Enable the main output */
mbed_official 610:813dcc80987e 675 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 676 }
mbed_official 610:813dcc80987e 677
mbed_official 610:813dcc80987e 678 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 679 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 680
mbed_official 610:813dcc80987e 681 /* Return function status */
mbed_official 610:813dcc80987e 682 return HAL_OK;
mbed_official 610:813dcc80987e 683 }
mbed_official 610:813dcc80987e 684
mbed_official 610:813dcc80987e 685 /**
mbed_official 610:813dcc80987e 686 * @brief Stops the TIM Output Compare signal generation in interrupt mode.
mbed_official 610:813dcc80987e 687 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 688 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 689 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 690 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 691 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 692 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 693 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 694 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 695 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 696 * @retval HAL status
mbed_official 610:813dcc80987e 697 */
mbed_official 610:813dcc80987e 698 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 699 {
mbed_official 610:813dcc80987e 700 /* Check the parameters */
mbed_official 610:813dcc80987e 701 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 702
mbed_official 610:813dcc80987e 703 switch (Channel)
mbed_official 610:813dcc80987e 704 {
mbed_official 610:813dcc80987e 705 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 706 {
mbed_official 610:813dcc80987e 707 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 708 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 709 }
mbed_official 610:813dcc80987e 710 break;
mbed_official 610:813dcc80987e 711
mbed_official 610:813dcc80987e 712 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 713 {
mbed_official 610:813dcc80987e 714 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 715 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 716 }
mbed_official 610:813dcc80987e 717 break;
mbed_official 610:813dcc80987e 718
mbed_official 610:813dcc80987e 719 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 720 {
mbed_official 610:813dcc80987e 721 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 722 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 723 }
mbed_official 610:813dcc80987e 724 break;
mbed_official 610:813dcc80987e 725
mbed_official 610:813dcc80987e 726 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 727 {
mbed_official 610:813dcc80987e 728 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 729 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 730 }
mbed_official 610:813dcc80987e 731 break;
mbed_official 610:813dcc80987e 732
mbed_official 610:813dcc80987e 733 default:
mbed_official 610:813dcc80987e 734 break;
mbed_official 610:813dcc80987e 735 }
mbed_official 610:813dcc80987e 736
mbed_official 610:813dcc80987e 737 /* Disable the Output compare channel */
mbed_official 610:813dcc80987e 738 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 739
mbed_official 610:813dcc80987e 740 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 741 {
mbed_official 610:813dcc80987e 742 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 743 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 744 }
mbed_official 610:813dcc80987e 745
mbed_official 610:813dcc80987e 746 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 747 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 748
mbed_official 610:813dcc80987e 749 /* Return function status */
mbed_official 610:813dcc80987e 750 return HAL_OK;
mbed_official 610:813dcc80987e 751 }
mbed_official 610:813dcc80987e 752
mbed_official 610:813dcc80987e 753 /**
mbed_official 610:813dcc80987e 754 * @brief Starts the TIM Output Compare signal generation in DMA mode.
mbed_official 610:813dcc80987e 755 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 756 * @param Channel : TIM Channel to be enabled
mbed_official 610:813dcc80987e 757 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 758 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 759 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 760 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 761 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 762 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 763 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 764 * @param pData: The source Buffer address.
mbed_official 610:813dcc80987e 765 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 610:813dcc80987e 766 * @retval HAL status
mbed_official 610:813dcc80987e 767 */
mbed_official 610:813dcc80987e 768 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 769 {
mbed_official 610:813dcc80987e 770 /* Check the parameters */
mbed_official 610:813dcc80987e 771 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 772
mbed_official 610:813dcc80987e 773 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 774 {
mbed_official 610:813dcc80987e 775 return HAL_BUSY;
mbed_official 610:813dcc80987e 776 }
mbed_official 610:813dcc80987e 777 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 778 {
mbed_official 610:813dcc80987e 779 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 780 {
mbed_official 610:813dcc80987e 781 return HAL_ERROR;
mbed_official 610:813dcc80987e 782 }
mbed_official 610:813dcc80987e 783 else
mbed_official 610:813dcc80987e 784 {
mbed_official 610:813dcc80987e 785 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 786 }
mbed_official 610:813dcc80987e 787 }
mbed_official 610:813dcc80987e 788 switch (Channel)
mbed_official 610:813dcc80987e 789 {
mbed_official 610:813dcc80987e 790 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 791 {
mbed_official 610:813dcc80987e 792 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 793 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 794
mbed_official 610:813dcc80987e 795 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 796 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 797
mbed_official 610:813dcc80987e 798 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 799 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 610:813dcc80987e 800
mbed_official 610:813dcc80987e 801 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 802 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 803 }
mbed_official 610:813dcc80987e 804 break;
mbed_official 610:813dcc80987e 805
mbed_official 610:813dcc80987e 806 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 807 {
mbed_official 610:813dcc80987e 808 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 809 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 810
mbed_official 610:813dcc80987e 811 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 812 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 813
mbed_official 610:813dcc80987e 814 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 815 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 610:813dcc80987e 816
mbed_official 610:813dcc80987e 817 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 818 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 819 }
mbed_official 610:813dcc80987e 820 break;
mbed_official 610:813dcc80987e 821
mbed_official 610:813dcc80987e 822 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 823 {
mbed_official 610:813dcc80987e 824 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 825 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 826
mbed_official 610:813dcc80987e 827 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 828 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 829
mbed_official 610:813dcc80987e 830 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 831 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 610:813dcc80987e 832
mbed_official 610:813dcc80987e 833 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 834 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 835 }
mbed_official 610:813dcc80987e 836 break;
mbed_official 610:813dcc80987e 837
mbed_official 610:813dcc80987e 838 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 839 {
mbed_official 610:813dcc80987e 840 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 841 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 842
mbed_official 610:813dcc80987e 843 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 844 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 845
mbed_official 610:813dcc80987e 846 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 847 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 610:813dcc80987e 848
mbed_official 610:813dcc80987e 849 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 850 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 851 }
mbed_official 610:813dcc80987e 852 break;
mbed_official 610:813dcc80987e 853
mbed_official 610:813dcc80987e 854 default:
mbed_official 610:813dcc80987e 855 break;
mbed_official 610:813dcc80987e 856 }
mbed_official 610:813dcc80987e 857
mbed_official 610:813dcc80987e 858 /* Enable the Output compare channel */
mbed_official 610:813dcc80987e 859 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 860
mbed_official 610:813dcc80987e 861 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 862 {
mbed_official 610:813dcc80987e 863 /* Enable the main output */
mbed_official 610:813dcc80987e 864 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 865 }
mbed_official 610:813dcc80987e 866
mbed_official 610:813dcc80987e 867 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 868 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 869
mbed_official 610:813dcc80987e 870 /* Return function status */
mbed_official 610:813dcc80987e 871 return HAL_OK;
mbed_official 610:813dcc80987e 872 }
mbed_official 610:813dcc80987e 873
mbed_official 610:813dcc80987e 874 /**
mbed_official 610:813dcc80987e 875 * @brief Stops the TIM Output Compare signal generation in DMA mode.
mbed_official 610:813dcc80987e 876 * @param htim : TIM Output Compare handle
mbed_official 610:813dcc80987e 877 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 878 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 879 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 880 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 881 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 882 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 883 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 884 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 885 * @retval HAL status
mbed_official 610:813dcc80987e 886 */
mbed_official 610:813dcc80987e 887 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 888 {
mbed_official 610:813dcc80987e 889 /* Check the parameters */
mbed_official 610:813dcc80987e 890 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 891
mbed_official 610:813dcc80987e 892 switch (Channel)
mbed_official 610:813dcc80987e 893 {
mbed_official 610:813dcc80987e 894 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 895 {
mbed_official 610:813dcc80987e 896 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 897 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 898 }
mbed_official 610:813dcc80987e 899 break;
mbed_official 610:813dcc80987e 900
mbed_official 610:813dcc80987e 901 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 902 {
mbed_official 610:813dcc80987e 903 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 904 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 905 }
mbed_official 610:813dcc80987e 906 break;
mbed_official 610:813dcc80987e 907
mbed_official 610:813dcc80987e 908 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 909 {
mbed_official 610:813dcc80987e 910 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 911 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 912 }
mbed_official 610:813dcc80987e 913 break;
mbed_official 610:813dcc80987e 914
mbed_official 610:813dcc80987e 915 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 916 {
mbed_official 610:813dcc80987e 917 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 918 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 919 }
mbed_official 610:813dcc80987e 920 break;
mbed_official 610:813dcc80987e 921
mbed_official 610:813dcc80987e 922 default:
mbed_official 610:813dcc80987e 923 break;
mbed_official 610:813dcc80987e 924 }
mbed_official 610:813dcc80987e 925
mbed_official 610:813dcc80987e 926 /* Disable the Output compare channel */
mbed_official 610:813dcc80987e 927 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 928
mbed_official 610:813dcc80987e 929 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 930 {
mbed_official 610:813dcc80987e 931 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 932 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 933 }
mbed_official 610:813dcc80987e 934
mbed_official 610:813dcc80987e 935 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 936 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 937
mbed_official 610:813dcc80987e 938 /* Change the htim state */
mbed_official 610:813dcc80987e 939 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 940
mbed_official 610:813dcc80987e 941 /* Return function status */
mbed_official 610:813dcc80987e 942 return HAL_OK;
mbed_official 610:813dcc80987e 943 }
mbed_official 610:813dcc80987e 944
mbed_official 610:813dcc80987e 945 /**
mbed_official 610:813dcc80987e 946 * @}
mbed_official 610:813dcc80987e 947 */
mbed_official 610:813dcc80987e 948
mbed_official 610:813dcc80987e 949 /** @defgroup TIM_Exported_Functions_Group3 Time PWM functions
mbed_official 610:813dcc80987e 950 * @brief Time PWM functions
mbed_official 610:813dcc80987e 951 *
mbed_official 610:813dcc80987e 952 @verbatim
mbed_official 610:813dcc80987e 953 ==============================================================================
mbed_official 610:813dcc80987e 954 ##### Time PWM functions #####
mbed_official 610:813dcc80987e 955 ==============================================================================
mbed_official 610:813dcc80987e 956 [..]
mbed_official 610:813dcc80987e 957 This section provides functions allowing to:
mbed_official 610:813dcc80987e 958 (+) Initialize and configure the TIM OPWM.
mbed_official 610:813dcc80987e 959 (+) De-initialize the TIM PWM.
mbed_official 610:813dcc80987e 960 (+) Start the Time PWM.
mbed_official 610:813dcc80987e 961 (+) Stop the Time PWM.
mbed_official 610:813dcc80987e 962 (+) Start the Time PWM and enable interrupt.
mbed_official 610:813dcc80987e 963 (+) Stop the Time PWM and disable interrupt.
mbed_official 610:813dcc80987e 964 (+) Start the Time PWM and enable DMA transfer.
mbed_official 610:813dcc80987e 965 (+) Stop the Time PWM and disable DMA transfer.
mbed_official 610:813dcc80987e 966
mbed_official 610:813dcc80987e 967 @endverbatim
mbed_official 610:813dcc80987e 968 * @{
mbed_official 610:813dcc80987e 969 */
mbed_official 610:813dcc80987e 970 /**
mbed_official 610:813dcc80987e 971 * @brief Initializes the TIM PWM Time Base according to the specified
mbed_official 610:813dcc80987e 972 * parameters in the TIM_HandleTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 973 * @param htim: TIM handle
mbed_official 610:813dcc80987e 974 * @retval HAL status
mbed_official 610:813dcc80987e 975 */
mbed_official 610:813dcc80987e 976 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 977 {
mbed_official 610:813dcc80987e 978 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 979 if(htim == NULL)
mbed_official 610:813dcc80987e 980 {
mbed_official 610:813dcc80987e 981 return HAL_ERROR;
mbed_official 610:813dcc80987e 982 }
mbed_official 610:813dcc80987e 983
mbed_official 610:813dcc80987e 984 /* Check the parameters */
mbed_official 610:813dcc80987e 985 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 986 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 987 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 988
mbed_official 610:813dcc80987e 989 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 990 {
mbed_official 610:813dcc80987e 991 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 992 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 993
mbed_official 610:813dcc80987e 994 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 995 HAL_TIM_PWM_MspInit(htim);
mbed_official 610:813dcc80987e 996 }
mbed_official 610:813dcc80987e 997
mbed_official 610:813dcc80987e 998 /* Set the TIM state */
mbed_official 610:813dcc80987e 999 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1000
mbed_official 610:813dcc80987e 1001 /* Init the base time for the PWM */
mbed_official 610:813dcc80987e 1002 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 1003
mbed_official 610:813dcc80987e 1004 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 1005 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1006
mbed_official 610:813dcc80987e 1007 return HAL_OK;
mbed_official 610:813dcc80987e 1008 }
mbed_official 610:813dcc80987e 1009
mbed_official 610:813dcc80987e 1010 /**
mbed_official 610:813dcc80987e 1011 * @brief DeInitialize the TIM peripheral
mbed_official 610:813dcc80987e 1012 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1013 * @retval HAL status
mbed_official 610:813dcc80987e 1014 */
mbed_official 610:813dcc80987e 1015 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1016 {
mbed_official 610:813dcc80987e 1017 /* Check the parameters */
mbed_official 610:813dcc80987e 1018 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1019
mbed_official 610:813dcc80987e 1020 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1021
mbed_official 610:813dcc80987e 1022 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 1023 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1024
mbed_official 610:813dcc80987e 1025 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 1026 HAL_TIM_PWM_MspDeInit(htim);
mbed_official 610:813dcc80987e 1027
mbed_official 610:813dcc80987e 1028 /* Change TIM state */
mbed_official 610:813dcc80987e 1029 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 1030
mbed_official 610:813dcc80987e 1031 /* Release Lock */
mbed_official 610:813dcc80987e 1032 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1033
mbed_official 610:813dcc80987e 1034 return HAL_OK;
mbed_official 610:813dcc80987e 1035 }
mbed_official 610:813dcc80987e 1036
mbed_official 610:813dcc80987e 1037 /**
mbed_official 610:813dcc80987e 1038 * @brief Initializes the TIM PWM MSP.
mbed_official 610:813dcc80987e 1039 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1040 * @retval None
mbed_official 610:813dcc80987e 1041 */
mbed_official 610:813dcc80987e 1042 __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1043 {
mbed_official 610:813dcc80987e 1044 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1045 the HAL_TIM_PWM_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 1046 */
mbed_official 610:813dcc80987e 1047 }
mbed_official 610:813dcc80987e 1048
mbed_official 610:813dcc80987e 1049 /**
mbed_official 610:813dcc80987e 1050 * @brief DeInitialize TIM PWM MSP.
mbed_official 610:813dcc80987e 1051 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1052 * @retval None
mbed_official 610:813dcc80987e 1053 */
mbed_official 610:813dcc80987e 1054 __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1055 {
mbed_official 610:813dcc80987e 1056 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1057 the HAL_TIM_PWM_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 1058 */
mbed_official 610:813dcc80987e 1059 }
mbed_official 610:813dcc80987e 1060
mbed_official 610:813dcc80987e 1061 /**
mbed_official 610:813dcc80987e 1062 * @brief Starts the PWM signal generation.
mbed_official 610:813dcc80987e 1063 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1064 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 1065 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1066 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1067 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1068 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1069 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1070 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 1071 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 1072 * @retval HAL status
mbed_official 610:813dcc80987e 1073 */
mbed_official 610:813dcc80987e 1074 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1075 {
mbed_official 610:813dcc80987e 1076 /* Check the parameters */
mbed_official 610:813dcc80987e 1077 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1078
mbed_official 610:813dcc80987e 1079 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 1080 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1081
mbed_official 610:813dcc80987e 1082 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1083 {
mbed_official 610:813dcc80987e 1084 /* Enable the main output */
mbed_official 610:813dcc80987e 1085 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1086 }
mbed_official 610:813dcc80987e 1087
mbed_official 610:813dcc80987e 1088 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1089 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1090
mbed_official 610:813dcc80987e 1091 /* Return function status */
mbed_official 610:813dcc80987e 1092 return HAL_OK;
mbed_official 610:813dcc80987e 1093 }
mbed_official 610:813dcc80987e 1094
mbed_official 610:813dcc80987e 1095 /**
mbed_official 610:813dcc80987e 1096 * @brief Stops the PWM signal generation.
mbed_official 610:813dcc80987e 1097 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1098 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1099 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1100 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1101 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1102 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1103 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1104 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 1105 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 1106 * @retval HAL status
mbed_official 610:813dcc80987e 1107 */
mbed_official 610:813dcc80987e 1108 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1109 {
mbed_official 610:813dcc80987e 1110 /* Check the parameters */
mbed_official 610:813dcc80987e 1111 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1112
mbed_official 610:813dcc80987e 1113 /* Disable the Capture compare channel */
mbed_official 610:813dcc80987e 1114 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1115
mbed_official 610:813dcc80987e 1116 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1117 {
mbed_official 610:813dcc80987e 1118 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1119 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1120 }
mbed_official 610:813dcc80987e 1121
mbed_official 610:813dcc80987e 1122 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1123 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1124
mbed_official 610:813dcc80987e 1125 /* Change the htim state */
mbed_official 610:813dcc80987e 1126 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1127
mbed_official 610:813dcc80987e 1128 /* Return function status */
mbed_official 610:813dcc80987e 1129 return HAL_OK;
mbed_official 610:813dcc80987e 1130 }
mbed_official 610:813dcc80987e 1131
mbed_official 610:813dcc80987e 1132 /**
mbed_official 610:813dcc80987e 1133 * @brief Starts the PWM signal generation in interrupt mode.
mbed_official 610:813dcc80987e 1134 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1135 * @param Channel : TIM Channel to be disabled
mbed_official 610:813dcc80987e 1136 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1137 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1138 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1139 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1140 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1141 * @retval HAL status
mbed_official 610:813dcc80987e 1142 */
mbed_official 610:813dcc80987e 1143 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1144 {
mbed_official 610:813dcc80987e 1145 /* Check the parameters */
mbed_official 610:813dcc80987e 1146 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1147
mbed_official 610:813dcc80987e 1148 switch (Channel)
mbed_official 610:813dcc80987e 1149 {
mbed_official 610:813dcc80987e 1150 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1151 {
mbed_official 610:813dcc80987e 1152 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1153 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1154 }
mbed_official 610:813dcc80987e 1155 break;
mbed_official 610:813dcc80987e 1156
mbed_official 610:813dcc80987e 1157 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1158 {
mbed_official 610:813dcc80987e 1159 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1160 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1161 }
mbed_official 610:813dcc80987e 1162 break;
mbed_official 610:813dcc80987e 1163
mbed_official 610:813dcc80987e 1164 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1165 {
mbed_official 610:813dcc80987e 1166 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1167 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1168 }
mbed_official 610:813dcc80987e 1169 break;
mbed_official 610:813dcc80987e 1170
mbed_official 610:813dcc80987e 1171 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1172 {
mbed_official 610:813dcc80987e 1173 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1174 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1175 }
mbed_official 610:813dcc80987e 1176 break;
mbed_official 610:813dcc80987e 1177
mbed_official 610:813dcc80987e 1178 default:
mbed_official 610:813dcc80987e 1179 break;
mbed_official 610:813dcc80987e 1180 }
mbed_official 610:813dcc80987e 1181
mbed_official 610:813dcc80987e 1182 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 1183 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1184
mbed_official 610:813dcc80987e 1185 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1186 {
mbed_official 610:813dcc80987e 1187 /* Enable the main output */
mbed_official 610:813dcc80987e 1188 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1189 }
mbed_official 610:813dcc80987e 1190
mbed_official 610:813dcc80987e 1191 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1192 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1193
mbed_official 610:813dcc80987e 1194 /* Return function status */
mbed_official 610:813dcc80987e 1195 return HAL_OK;
mbed_official 610:813dcc80987e 1196 }
mbed_official 610:813dcc80987e 1197
mbed_official 610:813dcc80987e 1198 /**
mbed_official 610:813dcc80987e 1199 * @brief Stops the PWM signal generation in interrupt mode.
mbed_official 610:813dcc80987e 1200 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1201 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1202 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1203 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1204 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1205 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1206 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1207 * @retval HAL status
mbed_official 610:813dcc80987e 1208 */
mbed_official 610:813dcc80987e 1209 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1210 {
mbed_official 610:813dcc80987e 1211 /* Check the parameters */
mbed_official 610:813dcc80987e 1212 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1213
mbed_official 610:813dcc80987e 1214 switch (Channel)
mbed_official 610:813dcc80987e 1215 {
mbed_official 610:813dcc80987e 1216 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1217 {
mbed_official 610:813dcc80987e 1218 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1219 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1220 }
mbed_official 610:813dcc80987e 1221 break;
mbed_official 610:813dcc80987e 1222
mbed_official 610:813dcc80987e 1223 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1224 {
mbed_official 610:813dcc80987e 1225 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1226 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1227 }
mbed_official 610:813dcc80987e 1228 break;
mbed_official 610:813dcc80987e 1229
mbed_official 610:813dcc80987e 1230 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1231 {
mbed_official 610:813dcc80987e 1232 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1233 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1234 }
mbed_official 610:813dcc80987e 1235 break;
mbed_official 610:813dcc80987e 1236
mbed_official 610:813dcc80987e 1237 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1238 {
mbed_official 610:813dcc80987e 1239 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1240 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1241 }
mbed_official 610:813dcc80987e 1242 break;
mbed_official 610:813dcc80987e 1243
mbed_official 610:813dcc80987e 1244 default:
mbed_official 610:813dcc80987e 1245 break;
mbed_official 610:813dcc80987e 1246 }
mbed_official 610:813dcc80987e 1247
mbed_official 610:813dcc80987e 1248 /* Disable the Capture compare channel */
mbed_official 610:813dcc80987e 1249 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1250
mbed_official 610:813dcc80987e 1251 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1252 {
mbed_official 610:813dcc80987e 1253 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1254 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1255 }
mbed_official 610:813dcc80987e 1256
mbed_official 610:813dcc80987e 1257 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1258 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1259
mbed_official 610:813dcc80987e 1260 /* Return function status */
mbed_official 610:813dcc80987e 1261 return HAL_OK;
mbed_official 610:813dcc80987e 1262 }
mbed_official 610:813dcc80987e 1263
mbed_official 610:813dcc80987e 1264 /**
mbed_official 610:813dcc80987e 1265 * @brief Starts the TIM PWM signal generation in DMA mode.
mbed_official 610:813dcc80987e 1266 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1267 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 1268 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1269 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1270 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1271 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1272 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1273 * @param pData: The source Buffer address.
mbed_official 610:813dcc80987e 1274 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 610:813dcc80987e 1275 * @retval HAL status
mbed_official 610:813dcc80987e 1276 */
mbed_official 610:813dcc80987e 1277 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 1278 {
mbed_official 610:813dcc80987e 1279 /* Check the parameters */
mbed_official 610:813dcc80987e 1280 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1281
mbed_official 610:813dcc80987e 1282 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 1283 {
mbed_official 610:813dcc80987e 1284 return HAL_BUSY;
mbed_official 610:813dcc80987e 1285 }
mbed_official 610:813dcc80987e 1286 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 1287 {
mbed_official 610:813dcc80987e 1288 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 1289 {
mbed_official 610:813dcc80987e 1290 return HAL_ERROR;
mbed_official 610:813dcc80987e 1291 }
mbed_official 610:813dcc80987e 1292 else
mbed_official 610:813dcc80987e 1293 {
mbed_official 610:813dcc80987e 1294 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1295 }
mbed_official 610:813dcc80987e 1296 }
mbed_official 610:813dcc80987e 1297 switch (Channel)
mbed_official 610:813dcc80987e 1298 {
mbed_official 610:813dcc80987e 1299 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1300 {
mbed_official 610:813dcc80987e 1301 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1302 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1303
mbed_official 610:813dcc80987e 1304 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1305 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1306
mbed_official 610:813dcc80987e 1307 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1308 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 610:813dcc80987e 1309
mbed_official 610:813dcc80987e 1310 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1311 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1312 }
mbed_official 610:813dcc80987e 1313 break;
mbed_official 610:813dcc80987e 1314
mbed_official 610:813dcc80987e 1315 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1316 {
mbed_official 610:813dcc80987e 1317 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1318 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1319
mbed_official 610:813dcc80987e 1320 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1321 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1322
mbed_official 610:813dcc80987e 1323 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1324 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 610:813dcc80987e 1325
mbed_official 610:813dcc80987e 1326 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1327 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1328 }
mbed_official 610:813dcc80987e 1329 break;
mbed_official 610:813dcc80987e 1330
mbed_official 610:813dcc80987e 1331 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1332 {
mbed_official 610:813dcc80987e 1333 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1334 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1335
mbed_official 610:813dcc80987e 1336 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1337 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1338
mbed_official 610:813dcc80987e 1339 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1340 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 610:813dcc80987e 1341
mbed_official 610:813dcc80987e 1342 /* Enable the TIM Output Capture/Compare 3 request */
mbed_official 610:813dcc80987e 1343 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1344 }
mbed_official 610:813dcc80987e 1345 break;
mbed_official 610:813dcc80987e 1346
mbed_official 610:813dcc80987e 1347 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1348 {
mbed_official 610:813dcc80987e 1349 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1350 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 1351
mbed_official 610:813dcc80987e 1352 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1353 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1354
mbed_official 610:813dcc80987e 1355 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1356 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 610:813dcc80987e 1357
mbed_official 610:813dcc80987e 1358 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 1359 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1360 }
mbed_official 610:813dcc80987e 1361 break;
mbed_official 610:813dcc80987e 1362
mbed_official 610:813dcc80987e 1363 default:
mbed_official 610:813dcc80987e 1364 break;
mbed_official 610:813dcc80987e 1365 }
mbed_official 610:813dcc80987e 1366
mbed_official 610:813dcc80987e 1367 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 1368 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1369
mbed_official 610:813dcc80987e 1370 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1371 {
mbed_official 610:813dcc80987e 1372 /* Enable the main output */
mbed_official 610:813dcc80987e 1373 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 1374 }
mbed_official 610:813dcc80987e 1375
mbed_official 610:813dcc80987e 1376 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1377 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1378
mbed_official 610:813dcc80987e 1379 /* Return function status */
mbed_official 610:813dcc80987e 1380 return HAL_OK;
mbed_official 610:813dcc80987e 1381 }
mbed_official 610:813dcc80987e 1382
mbed_official 610:813dcc80987e 1383 /**
mbed_official 610:813dcc80987e 1384 * @brief Stops the TIM PWM signal generation in DMA mode.
mbed_official 610:813dcc80987e 1385 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1386 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1387 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1388 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1389 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1390 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1391 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1392 * @retval HAL status
mbed_official 610:813dcc80987e 1393 */
mbed_official 610:813dcc80987e 1394 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1395 {
mbed_official 610:813dcc80987e 1396 /* Check the parameters */
mbed_official 610:813dcc80987e 1397 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1398
mbed_official 610:813dcc80987e 1399 switch (Channel)
mbed_official 610:813dcc80987e 1400 {
mbed_official 610:813dcc80987e 1401 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1402 {
mbed_official 610:813dcc80987e 1403 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1404 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1405 }
mbed_official 610:813dcc80987e 1406 break;
mbed_official 610:813dcc80987e 1407
mbed_official 610:813dcc80987e 1408 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1409 {
mbed_official 610:813dcc80987e 1410 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1411 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1412 }
mbed_official 610:813dcc80987e 1413 break;
mbed_official 610:813dcc80987e 1414
mbed_official 610:813dcc80987e 1415 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1416 {
mbed_official 610:813dcc80987e 1417 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 1418 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1419 }
mbed_official 610:813dcc80987e 1420 break;
mbed_official 610:813dcc80987e 1421
mbed_official 610:813dcc80987e 1422 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1423 {
mbed_official 610:813dcc80987e 1424 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1425 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1426 }
mbed_official 610:813dcc80987e 1427 break;
mbed_official 610:813dcc80987e 1428
mbed_official 610:813dcc80987e 1429 default:
mbed_official 610:813dcc80987e 1430 break;
mbed_official 610:813dcc80987e 1431 }
mbed_official 610:813dcc80987e 1432
mbed_official 610:813dcc80987e 1433 /* Disable the Capture compare channel */
mbed_official 610:813dcc80987e 1434 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1435
mbed_official 610:813dcc80987e 1436 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 1437 {
mbed_official 610:813dcc80987e 1438 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 1439 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 1440 }
mbed_official 610:813dcc80987e 1441
mbed_official 610:813dcc80987e 1442 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1443 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1444
mbed_official 610:813dcc80987e 1445 /* Change the htim state */
mbed_official 610:813dcc80987e 1446 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1447
mbed_official 610:813dcc80987e 1448 /* Return function status */
mbed_official 610:813dcc80987e 1449 return HAL_OK;
mbed_official 610:813dcc80987e 1450 }
mbed_official 610:813dcc80987e 1451
mbed_official 610:813dcc80987e 1452 /**
mbed_official 610:813dcc80987e 1453 * @}
mbed_official 610:813dcc80987e 1454 */
mbed_official 610:813dcc80987e 1455
mbed_official 610:813dcc80987e 1456 /** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions
mbed_official 610:813dcc80987e 1457 * @brief Time Input Capture functions
mbed_official 610:813dcc80987e 1458 *
mbed_official 610:813dcc80987e 1459 @verbatim
mbed_official 610:813dcc80987e 1460 ==============================================================================
mbed_official 610:813dcc80987e 1461 ##### Time Input Capture functions #####
mbed_official 610:813dcc80987e 1462 ==============================================================================
mbed_official 610:813dcc80987e 1463 [..]
mbed_official 610:813dcc80987e 1464 This section provides functions allowing to:
mbed_official 610:813dcc80987e 1465 (+) Initialize and configure the TIM Input Capture.
mbed_official 610:813dcc80987e 1466 (+) De-initialize the TIM Input Capture.
mbed_official 610:813dcc80987e 1467 (+) Start the Time Input Capture.
mbed_official 610:813dcc80987e 1468 (+) Stop the Time Input Capture.
mbed_official 610:813dcc80987e 1469 (+) Start the Time Input Capture and enable interrupt.
mbed_official 610:813dcc80987e 1470 (+) Stop the Time Input Capture and disable interrupt.
mbed_official 610:813dcc80987e 1471 (+) Start the Time Input Capture and enable DMA transfer.
mbed_official 610:813dcc80987e 1472 (+) Stop the Time Input Capture and disable DMA transfer.
mbed_official 610:813dcc80987e 1473
mbed_official 610:813dcc80987e 1474 @endverbatim
mbed_official 610:813dcc80987e 1475 * @{
mbed_official 610:813dcc80987e 1476 */
mbed_official 610:813dcc80987e 1477 /**
mbed_official 610:813dcc80987e 1478 * @brief Initializes the TIM Input Capture Time base according to the specified
mbed_official 610:813dcc80987e 1479 * parameters in the TIM_HandleTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 1480 * @param htim: TIM Input Capture handle
mbed_official 610:813dcc80987e 1481 * @retval HAL status
mbed_official 610:813dcc80987e 1482 */
mbed_official 610:813dcc80987e 1483 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1484 {
mbed_official 610:813dcc80987e 1485 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 1486 if(htim == NULL)
mbed_official 610:813dcc80987e 1487 {
mbed_official 610:813dcc80987e 1488 return HAL_ERROR;
mbed_official 610:813dcc80987e 1489 }
mbed_official 610:813dcc80987e 1490
mbed_official 610:813dcc80987e 1491 /* Check the parameters */
mbed_official 610:813dcc80987e 1492 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1493 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 1494 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 1495
mbed_official 610:813dcc80987e 1496 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 1497 {
mbed_official 610:813dcc80987e 1498 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 1499 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 1500
mbed_official 610:813dcc80987e 1501 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 1502 HAL_TIM_IC_MspInit(htim);
mbed_official 610:813dcc80987e 1503 }
mbed_official 610:813dcc80987e 1504
mbed_official 610:813dcc80987e 1505 /* Set the TIM state */
mbed_official 610:813dcc80987e 1506 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1507
mbed_official 610:813dcc80987e 1508 /* Init the base time for the input capture */
mbed_official 610:813dcc80987e 1509 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 1510
mbed_official 610:813dcc80987e 1511 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 1512 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1513
mbed_official 610:813dcc80987e 1514 return HAL_OK;
mbed_official 610:813dcc80987e 1515 }
mbed_official 610:813dcc80987e 1516
mbed_official 610:813dcc80987e 1517 /**
mbed_official 610:813dcc80987e 1518 * @brief DeInitialize the TIM peripheral
mbed_official 610:813dcc80987e 1519 * @param htim: TIM Input Capture handle
mbed_official 610:813dcc80987e 1520 * @retval HAL status
mbed_official 610:813dcc80987e 1521 */
mbed_official 610:813dcc80987e 1522 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1523 {
mbed_official 610:813dcc80987e 1524 /* Check the parameters */
mbed_official 610:813dcc80987e 1525 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1526
mbed_official 610:813dcc80987e 1527 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1528
mbed_official 610:813dcc80987e 1529 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 1530 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1531
mbed_official 610:813dcc80987e 1532 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 1533 HAL_TIM_IC_MspDeInit(htim);
mbed_official 610:813dcc80987e 1534
mbed_official 610:813dcc80987e 1535 /* Change TIM state */
mbed_official 610:813dcc80987e 1536 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 1537
mbed_official 610:813dcc80987e 1538 /* Release Lock */
mbed_official 610:813dcc80987e 1539 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 1540
mbed_official 610:813dcc80987e 1541 return HAL_OK;
mbed_official 610:813dcc80987e 1542 }
mbed_official 610:813dcc80987e 1543
mbed_official 610:813dcc80987e 1544 /**
mbed_official 610:813dcc80987e 1545 * @brief Initializes the TIM INput Capture MSP.
mbed_official 610:813dcc80987e 1546 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1547 * @retval None
mbed_official 610:813dcc80987e 1548 */
mbed_official 610:813dcc80987e 1549 __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1550 {
mbed_official 610:813dcc80987e 1551 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1552 the HAL_TIM_IC_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 1553 */
mbed_official 610:813dcc80987e 1554 }
mbed_official 610:813dcc80987e 1555
mbed_official 610:813dcc80987e 1556 /**
mbed_official 610:813dcc80987e 1557 * @brief DeInitialize TIM Input Capture MSP.
mbed_official 610:813dcc80987e 1558 * @param htim: TIM handle
mbed_official 610:813dcc80987e 1559 * @retval None
mbed_official 610:813dcc80987e 1560 */
mbed_official 610:813dcc80987e 1561 __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1562 {
mbed_official 610:813dcc80987e 1563 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1564 the HAL_TIM_IC_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 1565 */
mbed_official 610:813dcc80987e 1566 }
mbed_official 610:813dcc80987e 1567
mbed_official 610:813dcc80987e 1568 /**
mbed_official 610:813dcc80987e 1569 * @brief Starts the TIM Input Capture measurement.
mbed_official 610:813dcc80987e 1570 * @param htim : TIM Input Capture handle
mbed_official 610:813dcc80987e 1571 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 1572 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1573 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1574 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1575 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1576 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1577 * @retval HAL status
mbed_official 610:813dcc80987e 1578 */
mbed_official 610:813dcc80987e 1579 HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1580 {
mbed_official 610:813dcc80987e 1581 /* Check the parameters */
mbed_official 610:813dcc80987e 1582 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1583
mbed_official 610:813dcc80987e 1584 /* Enable the Input Capture channel */
mbed_official 610:813dcc80987e 1585 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1586
mbed_official 610:813dcc80987e 1587 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1588 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1589
mbed_official 610:813dcc80987e 1590 /* Return function status */
mbed_official 610:813dcc80987e 1591 return HAL_OK;
mbed_official 610:813dcc80987e 1592 }
mbed_official 610:813dcc80987e 1593
mbed_official 610:813dcc80987e 1594 /**
mbed_official 610:813dcc80987e 1595 * @brief Stops the TIM Input Capture measurement.
mbed_official 610:813dcc80987e 1596 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1597 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1598 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1599 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1600 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1601 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1602 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1603 * @retval HAL status
mbed_official 610:813dcc80987e 1604 */
mbed_official 610:813dcc80987e 1605 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1606 {
mbed_official 610:813dcc80987e 1607 /* Check the parameters */
mbed_official 610:813dcc80987e 1608 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1609
mbed_official 610:813dcc80987e 1610 /* Disable the Input Capture channel */
mbed_official 610:813dcc80987e 1611 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1612
mbed_official 610:813dcc80987e 1613 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1614 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1615
mbed_official 610:813dcc80987e 1616 /* Return function status */
mbed_official 610:813dcc80987e 1617 return HAL_OK;
mbed_official 610:813dcc80987e 1618 }
mbed_official 610:813dcc80987e 1619
mbed_official 610:813dcc80987e 1620 /**
mbed_official 610:813dcc80987e 1621 * @brief Starts the TIM Input Capture measurement in interrupt mode.
mbed_official 610:813dcc80987e 1622 * @param htim : TIM Input Capture handle
mbed_official 610:813dcc80987e 1623 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 1624 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1625 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1626 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1627 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1628 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1629 * @retval HAL status
mbed_official 610:813dcc80987e 1630 */
mbed_official 610:813dcc80987e 1631 HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1632 {
mbed_official 610:813dcc80987e 1633 /* Check the parameters */
mbed_official 610:813dcc80987e 1634 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1635
mbed_official 610:813dcc80987e 1636 switch (Channel)
mbed_official 610:813dcc80987e 1637 {
mbed_official 610:813dcc80987e 1638 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1639 {
mbed_official 610:813dcc80987e 1640 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1641 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1642 }
mbed_official 610:813dcc80987e 1643 break;
mbed_official 610:813dcc80987e 1644
mbed_official 610:813dcc80987e 1645 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1646 {
mbed_official 610:813dcc80987e 1647 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1648 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1649 }
mbed_official 610:813dcc80987e 1650 break;
mbed_official 610:813dcc80987e 1651
mbed_official 610:813dcc80987e 1652 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1653 {
mbed_official 610:813dcc80987e 1654 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1655 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1656 }
mbed_official 610:813dcc80987e 1657 break;
mbed_official 610:813dcc80987e 1658
mbed_official 610:813dcc80987e 1659 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1660 {
mbed_official 610:813dcc80987e 1661 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1662 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1663 }
mbed_official 610:813dcc80987e 1664 break;
mbed_official 610:813dcc80987e 1665
mbed_official 610:813dcc80987e 1666 default:
mbed_official 610:813dcc80987e 1667 break;
mbed_official 610:813dcc80987e 1668 }
mbed_official 610:813dcc80987e 1669 /* Enable the Input Capture channel */
mbed_official 610:813dcc80987e 1670 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1671
mbed_official 610:813dcc80987e 1672 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1673 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1674
mbed_official 610:813dcc80987e 1675 /* Return function status */
mbed_official 610:813dcc80987e 1676 return HAL_OK;
mbed_official 610:813dcc80987e 1677 }
mbed_official 610:813dcc80987e 1678
mbed_official 610:813dcc80987e 1679 /**
mbed_official 610:813dcc80987e 1680 * @brief Stops the TIM Input Capture measurement in interrupt mode.
mbed_official 610:813dcc80987e 1681 * @param htim : TIM handle
mbed_official 610:813dcc80987e 1682 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1683 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1684 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1685 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1686 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1687 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1688 * @retval HAL status
mbed_official 610:813dcc80987e 1689 */
mbed_official 610:813dcc80987e 1690 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1691 {
mbed_official 610:813dcc80987e 1692 /* Check the parameters */
mbed_official 610:813dcc80987e 1693 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1694
mbed_official 610:813dcc80987e 1695 switch (Channel)
mbed_official 610:813dcc80987e 1696 {
mbed_official 610:813dcc80987e 1697 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1698 {
mbed_official 610:813dcc80987e 1699 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 1700 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 1701 }
mbed_official 610:813dcc80987e 1702 break;
mbed_official 610:813dcc80987e 1703
mbed_official 610:813dcc80987e 1704 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1705 {
mbed_official 610:813dcc80987e 1706 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 1707 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 1708 }
mbed_official 610:813dcc80987e 1709 break;
mbed_official 610:813dcc80987e 1710
mbed_official 610:813dcc80987e 1711 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1712 {
mbed_official 610:813dcc80987e 1713 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 610:813dcc80987e 1714 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 1715 }
mbed_official 610:813dcc80987e 1716 break;
mbed_official 610:813dcc80987e 1717
mbed_official 610:813dcc80987e 1718 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1719 {
mbed_official 610:813dcc80987e 1720 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 610:813dcc80987e 1721 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 1722 }
mbed_official 610:813dcc80987e 1723 break;
mbed_official 610:813dcc80987e 1724
mbed_official 610:813dcc80987e 1725 default:
mbed_official 610:813dcc80987e 1726 break;
mbed_official 610:813dcc80987e 1727 }
mbed_official 610:813dcc80987e 1728
mbed_official 610:813dcc80987e 1729 /* Disable the Input Capture channel */
mbed_official 610:813dcc80987e 1730 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1731
mbed_official 610:813dcc80987e 1732 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1733 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1734
mbed_official 610:813dcc80987e 1735 /* Return function status */
mbed_official 610:813dcc80987e 1736 return HAL_OK;
mbed_official 610:813dcc80987e 1737 }
mbed_official 610:813dcc80987e 1738
mbed_official 610:813dcc80987e 1739 /**
mbed_official 610:813dcc80987e 1740 * @brief Starts the TIM Input Capture measurement on in DMA mode.
mbed_official 610:813dcc80987e 1741 * @param htim : TIM Input Capture handle
mbed_official 610:813dcc80987e 1742 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 1743 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1744 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1745 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1746 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1747 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1748 * @param pData: The destination Buffer address.
mbed_official 610:813dcc80987e 1749 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 610:813dcc80987e 1750 * @retval HAL status
mbed_official 610:813dcc80987e 1751 */
mbed_official 610:813dcc80987e 1752 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 610:813dcc80987e 1753 {
mbed_official 610:813dcc80987e 1754 /* Check the parameters */
mbed_official 610:813dcc80987e 1755 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1756 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1757
mbed_official 610:813dcc80987e 1758 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 1759 {
mbed_official 610:813dcc80987e 1760 return HAL_BUSY;
mbed_official 610:813dcc80987e 1761 }
mbed_official 610:813dcc80987e 1762 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 1763 {
mbed_official 610:813dcc80987e 1764 if((pData == 0 ) && (Length > 0))
mbed_official 610:813dcc80987e 1765 {
mbed_official 610:813dcc80987e 1766 return HAL_ERROR;
mbed_official 610:813dcc80987e 1767 }
mbed_official 610:813dcc80987e 1768 else
mbed_official 610:813dcc80987e 1769 {
mbed_official 610:813dcc80987e 1770 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1771 }
mbed_official 610:813dcc80987e 1772 }
mbed_official 610:813dcc80987e 1773
mbed_official 610:813dcc80987e 1774 switch (Channel)
mbed_official 610:813dcc80987e 1775 {
mbed_official 610:813dcc80987e 1776 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1777 {
mbed_official 610:813dcc80987e 1778 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1779 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 1780
mbed_official 610:813dcc80987e 1781 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1782 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1783
mbed_official 610:813dcc80987e 1784 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1785 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official 610:813dcc80987e 1786
mbed_official 610:813dcc80987e 1787 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1788 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1789 }
mbed_official 610:813dcc80987e 1790 break;
mbed_official 610:813dcc80987e 1791
mbed_official 610:813dcc80987e 1792 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1793 {
mbed_official 610:813dcc80987e 1794 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1795 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 1796
mbed_official 610:813dcc80987e 1797 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1798 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1799
mbed_official 610:813dcc80987e 1800 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1801 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
mbed_official 610:813dcc80987e 1802
mbed_official 610:813dcc80987e 1803 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1804 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1805 }
mbed_official 610:813dcc80987e 1806 break;
mbed_official 610:813dcc80987e 1807
mbed_official 610:813dcc80987e 1808 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1809 {
mbed_official 610:813dcc80987e 1810 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1811 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 1812
mbed_official 610:813dcc80987e 1813 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1814 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1815
mbed_official 610:813dcc80987e 1816 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1817 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
mbed_official 610:813dcc80987e 1818
mbed_official 610:813dcc80987e 1819 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 1820 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1821 }
mbed_official 610:813dcc80987e 1822 break;
mbed_official 610:813dcc80987e 1823
mbed_official 610:813dcc80987e 1824 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1825 {
mbed_official 610:813dcc80987e 1826 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 1827 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 1828
mbed_official 610:813dcc80987e 1829 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1830 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 1831
mbed_official 610:813dcc80987e 1832 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 1833 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
mbed_official 610:813dcc80987e 1834
mbed_official 610:813dcc80987e 1835 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 1836 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1837 }
mbed_official 610:813dcc80987e 1838 break;
mbed_official 610:813dcc80987e 1839
mbed_official 610:813dcc80987e 1840 default:
mbed_official 610:813dcc80987e 1841 break;
mbed_official 610:813dcc80987e 1842 }
mbed_official 610:813dcc80987e 1843
mbed_official 610:813dcc80987e 1844 /* Enable the Input Capture channel */
mbed_official 610:813dcc80987e 1845 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 1846
mbed_official 610:813dcc80987e 1847 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 1848 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 1849
mbed_official 610:813dcc80987e 1850 /* Return function status */
mbed_official 610:813dcc80987e 1851 return HAL_OK;
mbed_official 610:813dcc80987e 1852 }
mbed_official 610:813dcc80987e 1853
mbed_official 610:813dcc80987e 1854 /**
mbed_official 610:813dcc80987e 1855 * @brief Stops the TIM Input Capture measurement on in DMA mode.
mbed_official 610:813dcc80987e 1856 * @param htim : TIM Input Capture handle
mbed_official 610:813dcc80987e 1857 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 1858 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1859 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 1860 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 1861 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 1862 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 1863 * @retval HAL status
mbed_official 610:813dcc80987e 1864 */
mbed_official 610:813dcc80987e 1865 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 1866 {
mbed_official 610:813dcc80987e 1867 /* Check the parameters */
mbed_official 610:813dcc80987e 1868 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 610:813dcc80987e 1869 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1870
mbed_official 610:813dcc80987e 1871 switch (Channel)
mbed_official 610:813dcc80987e 1872 {
mbed_official 610:813dcc80987e 1873 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 1874 {
mbed_official 610:813dcc80987e 1875 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 610:813dcc80987e 1876 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 1877 }
mbed_official 610:813dcc80987e 1878 break;
mbed_official 610:813dcc80987e 1879
mbed_official 610:813dcc80987e 1880 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 1881 {
mbed_official 610:813dcc80987e 1882 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 610:813dcc80987e 1883 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 1884 }
mbed_official 610:813dcc80987e 1885 break;
mbed_official 610:813dcc80987e 1886
mbed_official 610:813dcc80987e 1887 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 1888 {
mbed_official 610:813dcc80987e 1889 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 610:813dcc80987e 1890 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 610:813dcc80987e 1891 }
mbed_official 610:813dcc80987e 1892 break;
mbed_official 610:813dcc80987e 1893
mbed_official 610:813dcc80987e 1894 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 1895 {
mbed_official 610:813dcc80987e 1896 /* Disable the TIM Capture/Compare 4 DMA request */
mbed_official 610:813dcc80987e 1897 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 610:813dcc80987e 1898 }
mbed_official 610:813dcc80987e 1899 break;
mbed_official 610:813dcc80987e 1900
mbed_official 610:813dcc80987e 1901 default:
mbed_official 610:813dcc80987e 1902 break;
mbed_official 610:813dcc80987e 1903 }
mbed_official 610:813dcc80987e 1904
mbed_official 610:813dcc80987e 1905 /* Disable the Input Capture channel */
mbed_official 610:813dcc80987e 1906 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 1907
mbed_official 610:813dcc80987e 1908 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 1909 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 1910
mbed_official 610:813dcc80987e 1911 /* Change the htim state */
mbed_official 610:813dcc80987e 1912 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1913
mbed_official 610:813dcc80987e 1914 /* Return function status */
mbed_official 610:813dcc80987e 1915 return HAL_OK;
mbed_official 610:813dcc80987e 1916 }
mbed_official 610:813dcc80987e 1917 /**
mbed_official 610:813dcc80987e 1918 * @}
mbed_official 610:813dcc80987e 1919 */
mbed_official 610:813dcc80987e 1920
mbed_official 610:813dcc80987e 1921 /** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions
mbed_official 610:813dcc80987e 1922 * @brief Time One Pulse functions
mbed_official 610:813dcc80987e 1923 *
mbed_official 610:813dcc80987e 1924 @verbatim
mbed_official 610:813dcc80987e 1925 ==============================================================================
mbed_official 610:813dcc80987e 1926 ##### Time One Pulse functions #####
mbed_official 610:813dcc80987e 1927 ==============================================================================
mbed_official 610:813dcc80987e 1928 [..]
mbed_official 610:813dcc80987e 1929 This section provides functions allowing to:
mbed_official 610:813dcc80987e 1930 (+) Initialize and configure the TIM One Pulse.
mbed_official 610:813dcc80987e 1931 (+) De-initialize the TIM One Pulse.
mbed_official 610:813dcc80987e 1932 (+) Start the Time One Pulse.
mbed_official 610:813dcc80987e 1933 (+) Stop the Time One Pulse.
mbed_official 610:813dcc80987e 1934 (+) Start the Time One Pulse and enable interrupt.
mbed_official 610:813dcc80987e 1935 (+) Stop the Time One Pulse and disable interrupt.
mbed_official 610:813dcc80987e 1936 (+) Start the Time One Pulse and enable DMA transfer.
mbed_official 610:813dcc80987e 1937 (+) Stop the Time One Pulse and disable DMA transfer.
mbed_official 610:813dcc80987e 1938
mbed_official 610:813dcc80987e 1939 @endverbatim
mbed_official 610:813dcc80987e 1940 * @{
mbed_official 610:813dcc80987e 1941 */
mbed_official 610:813dcc80987e 1942 /**
mbed_official 610:813dcc80987e 1943 * @brief Initializes the TIM One Pulse Time Base according to the specified
mbed_official 610:813dcc80987e 1944 * parameters in the TIM_HandleTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 1945 * @param htim: TIM OnePulse handle
mbed_official 610:813dcc80987e 1946 * @param OnePulseMode: Select the One pulse mode.
mbed_official 610:813dcc80987e 1947 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1948 * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
mbed_official 610:813dcc80987e 1949 * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
mbed_official 610:813dcc80987e 1950 * @retval HAL status
mbed_official 610:813dcc80987e 1951 */
mbed_official 610:813dcc80987e 1952 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
mbed_official 610:813dcc80987e 1953 {
mbed_official 610:813dcc80987e 1954 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 1955 if(htim == NULL)
mbed_official 610:813dcc80987e 1956 {
mbed_official 610:813dcc80987e 1957 return HAL_ERROR;
mbed_official 610:813dcc80987e 1958 }
mbed_official 610:813dcc80987e 1959
mbed_official 610:813dcc80987e 1960 /* Check the parameters */
mbed_official 610:813dcc80987e 1961 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 1962 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 610:813dcc80987e 1963 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 610:813dcc80987e 1964 assert_param(IS_TIM_OPM_MODE(OnePulseMode));
mbed_official 610:813dcc80987e 1965
mbed_official 610:813dcc80987e 1966 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 1967 {
mbed_official 610:813dcc80987e 1968 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 1969 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 1970
mbed_official 610:813dcc80987e 1971 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 1972 HAL_TIM_OnePulse_MspInit(htim);
mbed_official 610:813dcc80987e 1973 }
mbed_official 610:813dcc80987e 1974
mbed_official 610:813dcc80987e 1975 /* Set the TIM state */
mbed_official 610:813dcc80987e 1976 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 1977
mbed_official 610:813dcc80987e 1978 /* Configure the Time base in the One Pulse Mode */
mbed_official 610:813dcc80987e 1979 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 1980
mbed_official 610:813dcc80987e 1981 /* Reset the OPM Bit */
mbed_official 610:813dcc80987e 1982 htim->Instance->CR1 &= ~TIM_CR1_OPM;
mbed_official 610:813dcc80987e 1983
mbed_official 610:813dcc80987e 1984 /* Configure the OPM Mode */
mbed_official 610:813dcc80987e 1985 htim->Instance->CR1 |= OnePulseMode;
mbed_official 610:813dcc80987e 1986
mbed_official 610:813dcc80987e 1987 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 1988 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 1989
mbed_official 610:813dcc80987e 1990 return HAL_OK;
mbed_official 610:813dcc80987e 1991 }
mbed_official 610:813dcc80987e 1992
mbed_official 610:813dcc80987e 1993 /**
mbed_official 610:813dcc80987e 1994 * @brief DeInitialize the TIM One Pulse
mbed_official 610:813dcc80987e 1995 * @param htim: TIM One Pulse handle
mbed_official 610:813dcc80987e 1996 * @retval HAL status
mbed_official 610:813dcc80987e 1997 */
mbed_official 610:813dcc80987e 1998 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 1999 {
mbed_official 610:813dcc80987e 2000 /* Check the parameters */
mbed_official 610:813dcc80987e 2001 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2002
mbed_official 610:813dcc80987e 2003 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2004
mbed_official 610:813dcc80987e 2005 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 2006 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2007
mbed_official 610:813dcc80987e 2008 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 610:813dcc80987e 2009 HAL_TIM_OnePulse_MspDeInit(htim);
mbed_official 610:813dcc80987e 2010
mbed_official 610:813dcc80987e 2011 /* Change TIM state */
mbed_official 610:813dcc80987e 2012 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 2013
mbed_official 610:813dcc80987e 2014 /* Release Lock */
mbed_official 610:813dcc80987e 2015 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2016
mbed_official 610:813dcc80987e 2017 return HAL_OK;
mbed_official 610:813dcc80987e 2018 }
mbed_official 610:813dcc80987e 2019
mbed_official 610:813dcc80987e 2020 /**
mbed_official 610:813dcc80987e 2021 * @brief Initializes the TIM One Pulse MSP.
mbed_official 610:813dcc80987e 2022 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2023 * @retval None
mbed_official 610:813dcc80987e 2024 */
mbed_official 610:813dcc80987e 2025 __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2026 {
mbed_official 610:813dcc80987e 2027 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2028 the HAL_TIM_OnePulse_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 2029 */
mbed_official 610:813dcc80987e 2030 }
mbed_official 610:813dcc80987e 2031
mbed_official 610:813dcc80987e 2032 /**
mbed_official 610:813dcc80987e 2033 * @brief DeInitialize TIM One Pulse MSP.
mbed_official 610:813dcc80987e 2034 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2035 * @retval None
mbed_official 610:813dcc80987e 2036 */
mbed_official 610:813dcc80987e 2037 __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2038 {
mbed_official 610:813dcc80987e 2039 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2040 the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 2041 */
mbed_official 610:813dcc80987e 2042 }
mbed_official 610:813dcc80987e 2043
mbed_official 610:813dcc80987e 2044 /**
mbed_official 610:813dcc80987e 2045 * @brief Starts the TIM One Pulse signal generation.
mbed_official 610:813dcc80987e 2046 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 2047 * @param OutputChannel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2048 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2049 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2050 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2051 * @retval HAL status
mbed_official 610:813dcc80987e 2052 */
mbed_official 610:813dcc80987e 2053 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 2054 {
mbed_official 610:813dcc80987e 2055 /* Enable the Capture compare and the Input Capture channels
mbed_official 610:813dcc80987e 2056 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2057 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 610:813dcc80987e 2058 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 610:813dcc80987e 2059 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 610:813dcc80987e 2060
mbed_official 610:813dcc80987e 2061 No need to enable the counter, it's enabled automatically by hardware
mbed_official 610:813dcc80987e 2062 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 610:813dcc80987e 2063
mbed_official 610:813dcc80987e 2064 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2065 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2066
mbed_official 610:813dcc80987e 2067 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 2068 {
mbed_official 610:813dcc80987e 2069 /* Enable the main output */
mbed_official 610:813dcc80987e 2070 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 2071 }
mbed_official 610:813dcc80987e 2072
mbed_official 610:813dcc80987e 2073 /* Return function status */
mbed_official 610:813dcc80987e 2074 return HAL_OK;
mbed_official 610:813dcc80987e 2075 }
mbed_official 610:813dcc80987e 2076
mbed_official 610:813dcc80987e 2077 /**
mbed_official 610:813dcc80987e 2078 * @brief Stops the TIM One Pulse signal generation.
mbed_official 610:813dcc80987e 2079 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 2080 * @param OutputChannel : TIM Channels to be disable
mbed_official 610:813dcc80987e 2081 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2082 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2083 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2084 * @retval HAL status
mbed_official 610:813dcc80987e 2085 */
mbed_official 610:813dcc80987e 2086 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 2087 {
mbed_official 610:813dcc80987e 2088 /* Disable the Capture compare and the Input Capture channels
mbed_official 610:813dcc80987e 2089 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2090 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 610:813dcc80987e 2091 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 610:813dcc80987e 2092 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 610:813dcc80987e 2093
mbed_official 610:813dcc80987e 2094 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2095 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2096
mbed_official 610:813dcc80987e 2097 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 2098 {
mbed_official 610:813dcc80987e 2099 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 2100 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 2101 }
mbed_official 610:813dcc80987e 2102
mbed_official 610:813dcc80987e 2103 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 2104 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2105
mbed_official 610:813dcc80987e 2106 /* Return function status */
mbed_official 610:813dcc80987e 2107 return HAL_OK;
mbed_official 610:813dcc80987e 2108 }
mbed_official 610:813dcc80987e 2109
mbed_official 610:813dcc80987e 2110 /**
mbed_official 610:813dcc80987e 2111 * @brief Starts the TIM One Pulse signal generation in interrupt mode.
mbed_official 610:813dcc80987e 2112 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 2113 * @param OutputChannel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2114 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2115 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2116 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2117 * @retval HAL status
mbed_official 610:813dcc80987e 2118 */
mbed_official 610:813dcc80987e 2119 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 2120 {
mbed_official 610:813dcc80987e 2121 /* Enable the Capture compare and the Input Capture channels
mbed_official 610:813dcc80987e 2122 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2123 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 610:813dcc80987e 2124 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 610:813dcc80987e 2125 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 610:813dcc80987e 2126
mbed_official 610:813dcc80987e 2127 No need to enable the counter, it's enabled automatically by hardware
mbed_official 610:813dcc80987e 2128 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 610:813dcc80987e 2129
mbed_official 610:813dcc80987e 2130 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 2131 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2132
mbed_official 610:813dcc80987e 2133 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 2134 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2135
mbed_official 610:813dcc80987e 2136 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2137 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2138
mbed_official 610:813dcc80987e 2139 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 2140 {
mbed_official 610:813dcc80987e 2141 /* Enable the main output */
mbed_official 610:813dcc80987e 2142 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 610:813dcc80987e 2143 }
mbed_official 610:813dcc80987e 2144
mbed_official 610:813dcc80987e 2145 /* Return function status */
mbed_official 610:813dcc80987e 2146 return HAL_OK;
mbed_official 610:813dcc80987e 2147 }
mbed_official 610:813dcc80987e 2148
mbed_official 610:813dcc80987e 2149 /**
mbed_official 610:813dcc80987e 2150 * @brief Stops the TIM One Pulse signal generation in interrupt mode.
mbed_official 610:813dcc80987e 2151 * @param htim : TIM One Pulse handle
mbed_official 610:813dcc80987e 2152 * @param OutputChannel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2153 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2154 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2155 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2156 * @retval HAL status
mbed_official 610:813dcc80987e 2157 */
mbed_official 610:813dcc80987e 2158 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 610:813dcc80987e 2159 {
mbed_official 610:813dcc80987e 2160 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 610:813dcc80987e 2161 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2162
mbed_official 610:813dcc80987e 2163 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 610:813dcc80987e 2164 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2165
mbed_official 610:813dcc80987e 2166 /* Disable the Capture compare and the Input Capture channels
mbed_official 610:813dcc80987e 2167 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2168 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 610:813dcc80987e 2169 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 610:813dcc80987e 2170 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 610:813dcc80987e 2171 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2172 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2173
mbed_official 610:813dcc80987e 2174 if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official 610:813dcc80987e 2175 {
mbed_official 610:813dcc80987e 2176 /* Disable the Main Ouput */
mbed_official 610:813dcc80987e 2177 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 610:813dcc80987e 2178 }
mbed_official 610:813dcc80987e 2179
mbed_official 610:813dcc80987e 2180 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 2181 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2182
mbed_official 610:813dcc80987e 2183 /* Return function status */
mbed_official 610:813dcc80987e 2184 return HAL_OK;
mbed_official 610:813dcc80987e 2185 }
mbed_official 610:813dcc80987e 2186
mbed_official 610:813dcc80987e 2187 /**
mbed_official 610:813dcc80987e 2188 * @}
mbed_official 610:813dcc80987e 2189 */
mbed_official 610:813dcc80987e 2190
mbed_official 610:813dcc80987e 2191 /** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions
mbed_official 610:813dcc80987e 2192 * @brief Time Encoder functions
mbed_official 610:813dcc80987e 2193 *
mbed_official 610:813dcc80987e 2194 @verbatim
mbed_official 610:813dcc80987e 2195 ==============================================================================
mbed_official 610:813dcc80987e 2196 ##### Time Encoder functions #####
mbed_official 610:813dcc80987e 2197 ==============================================================================
mbed_official 610:813dcc80987e 2198 [..]
mbed_official 610:813dcc80987e 2199 This section provides functions allowing to:
mbed_official 610:813dcc80987e 2200 (+) Initialize and configure the TIM Encoder.
mbed_official 610:813dcc80987e 2201 (+) De-initialize the TIM Encoder.
mbed_official 610:813dcc80987e 2202 (+) Start the Time Encoder.
mbed_official 610:813dcc80987e 2203 (+) Stop the Time Encoder.
mbed_official 610:813dcc80987e 2204 (+) Start the Time Encoder and enable interrupt.
mbed_official 610:813dcc80987e 2205 (+) Stop the Time Encoder and disable interrupt.
mbed_official 610:813dcc80987e 2206 (+) Start the Time Encoder and enable DMA transfer.
mbed_official 610:813dcc80987e 2207 (+) Stop the Time Encoder and disable DMA transfer.
mbed_official 610:813dcc80987e 2208
mbed_official 610:813dcc80987e 2209 @endverbatim
mbed_official 610:813dcc80987e 2210 * @{
mbed_official 610:813dcc80987e 2211 */
mbed_official 610:813dcc80987e 2212 /**
mbed_official 610:813dcc80987e 2213 * @brief Initializes the TIM Encoder Interface and initialize the associated handle.
mbed_official 610:813dcc80987e 2214 * @param htim: TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2215 * @param sConfig: TIM Encoder Interface configuration structure
mbed_official 610:813dcc80987e 2216 * @retval HAL status
mbed_official 610:813dcc80987e 2217 */
mbed_official 610:813dcc80987e 2218 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig)
mbed_official 610:813dcc80987e 2219 {
mbed_official 610:813dcc80987e 2220 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 2221 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 2222 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 2223
mbed_official 610:813dcc80987e 2224 /* Check the TIM handle allocation */
mbed_official 610:813dcc80987e 2225 if(htim == NULL)
mbed_official 610:813dcc80987e 2226 {
mbed_official 610:813dcc80987e 2227 return HAL_ERROR;
mbed_official 610:813dcc80987e 2228 }
mbed_official 610:813dcc80987e 2229
mbed_official 610:813dcc80987e 2230 /* Check the parameters */
mbed_official 610:813dcc80987e 2231 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2232 assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
mbed_official 610:813dcc80987e 2233 assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
mbed_official 610:813dcc80987e 2234 assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
mbed_official 610:813dcc80987e 2235 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official 610:813dcc80987e 2236 assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
mbed_official 610:813dcc80987e 2237 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official 610:813dcc80987e 2238 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
mbed_official 610:813dcc80987e 2239 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official 610:813dcc80987e 2240 assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
mbed_official 610:813dcc80987e 2241
mbed_official 610:813dcc80987e 2242 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 610:813dcc80987e 2243 {
mbed_official 610:813dcc80987e 2244 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 2245 htim->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 2246
mbed_official 610:813dcc80987e 2247 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 610:813dcc80987e 2248 HAL_TIM_Encoder_MspInit(htim);
mbed_official 610:813dcc80987e 2249 }
mbed_official 610:813dcc80987e 2250
mbed_official 610:813dcc80987e 2251 /* Set the TIM state */
mbed_official 610:813dcc80987e 2252 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2253
mbed_official 610:813dcc80987e 2254 /* Reset the SMS bits */
mbed_official 610:813dcc80987e 2255 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 2256
mbed_official 610:813dcc80987e 2257 /* Configure the Time base in the Encoder Mode */
mbed_official 610:813dcc80987e 2258 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 610:813dcc80987e 2259
mbed_official 610:813dcc80987e 2260 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 2261 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 2262
mbed_official 610:813dcc80987e 2263 /* Get the TIMx CCMR1 register value */
mbed_official 610:813dcc80987e 2264 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 610:813dcc80987e 2265
mbed_official 610:813dcc80987e 2266 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 2267 tmpccer = htim->Instance->CCER;
mbed_official 610:813dcc80987e 2268
mbed_official 610:813dcc80987e 2269 /* Set the encoder Mode */
mbed_official 610:813dcc80987e 2270 tmpsmcr |= sConfig->EncoderMode;
mbed_official 610:813dcc80987e 2271
mbed_official 610:813dcc80987e 2272 /* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official 610:813dcc80987e 2273 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
mbed_official 610:813dcc80987e 2274 tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8));
mbed_official 610:813dcc80987e 2275
mbed_official 610:813dcc80987e 2276 /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
mbed_official 610:813dcc80987e 2277 tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
mbed_official 610:813dcc80987e 2278 tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
mbed_official 610:813dcc80987e 2279 tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8);
mbed_official 610:813dcc80987e 2280 tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12);
mbed_official 610:813dcc80987e 2281
mbed_official 610:813dcc80987e 2282 /* Set the TI1 and the TI2 Polarities */
mbed_official 610:813dcc80987e 2283 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
mbed_official 610:813dcc80987e 2284 tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
mbed_official 610:813dcc80987e 2285 tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4);
mbed_official 610:813dcc80987e 2286
mbed_official 610:813dcc80987e 2287 /* Write to TIMx SMCR */
mbed_official 610:813dcc80987e 2288 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 2289
mbed_official 610:813dcc80987e 2290 /* Write to TIMx CCMR1 */
mbed_official 610:813dcc80987e 2291 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 610:813dcc80987e 2292
mbed_official 610:813dcc80987e 2293 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 2294 htim->Instance->CCER = tmpccer;
mbed_official 610:813dcc80987e 2295
mbed_official 610:813dcc80987e 2296 /* Initialize the TIM state*/
mbed_official 610:813dcc80987e 2297 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2298
mbed_official 610:813dcc80987e 2299 return HAL_OK;
mbed_official 610:813dcc80987e 2300 }
mbed_official 610:813dcc80987e 2301
mbed_official 610:813dcc80987e 2302
mbed_official 610:813dcc80987e 2303 /**
mbed_official 610:813dcc80987e 2304 * @brief DeInitialize the TIM Encoder interface
mbed_official 610:813dcc80987e 2305 * @param htim: TIM Encoder handle
mbed_official 610:813dcc80987e 2306 * @retval HAL status
mbed_official 610:813dcc80987e 2307 */
mbed_official 610:813dcc80987e 2308 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2309 {
mbed_official 610:813dcc80987e 2310 /* Check the parameters */
mbed_official 610:813dcc80987e 2311 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2312
mbed_official 610:813dcc80987e 2313 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2314
mbed_official 610:813dcc80987e 2315 /* Disable the TIM Peripheral Clock */
mbed_official 610:813dcc80987e 2316 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2317
mbed_official 610:813dcc80987e 2318 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 610:813dcc80987e 2319 HAL_TIM_Encoder_MspDeInit(htim);
mbed_official 610:813dcc80987e 2320
mbed_official 610:813dcc80987e 2321 /* Change TIM state */
mbed_official 610:813dcc80987e 2322 htim->State = HAL_TIM_STATE_RESET;
mbed_official 610:813dcc80987e 2323
mbed_official 610:813dcc80987e 2324 /* Release Lock */
mbed_official 610:813dcc80987e 2325 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2326
mbed_official 610:813dcc80987e 2327 return HAL_OK;
mbed_official 610:813dcc80987e 2328 }
mbed_official 610:813dcc80987e 2329
mbed_official 610:813dcc80987e 2330 /**
mbed_official 610:813dcc80987e 2331 * @brief Initializes the TIM Encoder Interface MSP.
mbed_official 610:813dcc80987e 2332 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2333 * @retval None
mbed_official 610:813dcc80987e 2334 */
mbed_official 610:813dcc80987e 2335 __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2336 {
mbed_official 610:813dcc80987e 2337 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2338 the HAL_TIM_Encoder_MspInit could be implemented in the user file
mbed_official 610:813dcc80987e 2339 */
mbed_official 610:813dcc80987e 2340 }
mbed_official 610:813dcc80987e 2341
mbed_official 610:813dcc80987e 2342 /**
mbed_official 610:813dcc80987e 2343 * @brief DeInitialize TIM Encoder Interface MSP.
mbed_official 610:813dcc80987e 2344 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2345 * @retval None
mbed_official 610:813dcc80987e 2346 */
mbed_official 610:813dcc80987e 2347 __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2348 {
mbed_official 610:813dcc80987e 2349 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 2350 the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
mbed_official 610:813dcc80987e 2351 */
mbed_official 610:813dcc80987e 2352 }
mbed_official 610:813dcc80987e 2353
mbed_official 610:813dcc80987e 2354 /**
mbed_official 610:813dcc80987e 2355 * @brief Starts the TIM Encoder Interface.
mbed_official 610:813dcc80987e 2356 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2357 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2358 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2359 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2360 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2361 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2362 * @retval HAL status
mbed_official 610:813dcc80987e 2363 */
mbed_official 610:813dcc80987e 2364 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 2365 {
mbed_official 610:813dcc80987e 2366 /* Check the parameters */
mbed_official 610:813dcc80987e 2367 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2368
mbed_official 610:813dcc80987e 2369 /* Enable the encoder interface channels */
mbed_official 610:813dcc80987e 2370 switch (Channel)
mbed_official 610:813dcc80987e 2371 {
mbed_official 610:813dcc80987e 2372 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2373 {
mbed_official 610:813dcc80987e 2374 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2375 break;
mbed_official 610:813dcc80987e 2376 }
mbed_official 610:813dcc80987e 2377 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2378 {
mbed_official 610:813dcc80987e 2379 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2380 break;
mbed_official 610:813dcc80987e 2381 }
mbed_official 610:813dcc80987e 2382 default :
mbed_official 610:813dcc80987e 2383 {
mbed_official 610:813dcc80987e 2384 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2385 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2386 break;
mbed_official 610:813dcc80987e 2387 }
mbed_official 610:813dcc80987e 2388 }
mbed_official 610:813dcc80987e 2389 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 2390 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 2391
mbed_official 610:813dcc80987e 2392 /* Return function status */
mbed_official 610:813dcc80987e 2393 return HAL_OK;
mbed_official 610:813dcc80987e 2394 }
mbed_official 610:813dcc80987e 2395
mbed_official 610:813dcc80987e 2396 /**
mbed_official 610:813dcc80987e 2397 * @brief Stops the TIM Encoder Interface.
mbed_official 610:813dcc80987e 2398 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2399 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 2400 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2401 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2402 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2403 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2404 * @retval HAL status
mbed_official 610:813dcc80987e 2405 */
mbed_official 610:813dcc80987e 2406 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 2407 {
mbed_official 610:813dcc80987e 2408 /* Check the parameters */
mbed_official 610:813dcc80987e 2409 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2410
mbed_official 610:813dcc80987e 2411 /* Disable the Input Capture channels 1 and 2
mbed_official 610:813dcc80987e 2412 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 610:813dcc80987e 2413 switch (Channel)
mbed_official 610:813dcc80987e 2414 {
mbed_official 610:813dcc80987e 2415 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2416 {
mbed_official 610:813dcc80987e 2417 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2418 break;
mbed_official 610:813dcc80987e 2419 }
mbed_official 610:813dcc80987e 2420 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2421 {
mbed_official 610:813dcc80987e 2422 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2423 break;
mbed_official 610:813dcc80987e 2424 }
mbed_official 610:813dcc80987e 2425 default :
mbed_official 610:813dcc80987e 2426 {
mbed_official 610:813dcc80987e 2427 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2428 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2429 break;
mbed_official 610:813dcc80987e 2430 }
mbed_official 610:813dcc80987e 2431 }
mbed_official 610:813dcc80987e 2432
mbed_official 610:813dcc80987e 2433 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 2434 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2435
mbed_official 610:813dcc80987e 2436 /* Return function status */
mbed_official 610:813dcc80987e 2437 return HAL_OK;
mbed_official 610:813dcc80987e 2438 }
mbed_official 610:813dcc80987e 2439
mbed_official 610:813dcc80987e 2440 /**
mbed_official 610:813dcc80987e 2441 * @brief Starts the TIM Encoder Interface in interrupt mode.
mbed_official 610:813dcc80987e 2442 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2443 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2444 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2445 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2446 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2447 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2448 * @retval HAL status
mbed_official 610:813dcc80987e 2449 */
mbed_official 610:813dcc80987e 2450 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 2451 {
mbed_official 610:813dcc80987e 2452 /* Check the parameters */
mbed_official 610:813dcc80987e 2453 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2454
mbed_official 610:813dcc80987e 2455 /* Enable the encoder interface channels */
mbed_official 610:813dcc80987e 2456 /* Enable the capture compare Interrupts 1 and/or 2 */
mbed_official 610:813dcc80987e 2457 switch (Channel)
mbed_official 610:813dcc80987e 2458 {
mbed_official 610:813dcc80987e 2459 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2460 {
mbed_official 610:813dcc80987e 2461 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2462 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2463 break;
mbed_official 610:813dcc80987e 2464 }
mbed_official 610:813dcc80987e 2465 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2466 {
mbed_official 610:813dcc80987e 2467 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2468 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2469 break;
mbed_official 610:813dcc80987e 2470 }
mbed_official 610:813dcc80987e 2471 default :
mbed_official 610:813dcc80987e 2472 {
mbed_official 610:813dcc80987e 2473 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2474 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2475 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2476 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2477 break;
mbed_official 610:813dcc80987e 2478 }
mbed_official 610:813dcc80987e 2479 }
mbed_official 610:813dcc80987e 2480
mbed_official 610:813dcc80987e 2481 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 2482 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 2483
mbed_official 610:813dcc80987e 2484 /* Return function status */
mbed_official 610:813dcc80987e 2485 return HAL_OK;
mbed_official 610:813dcc80987e 2486 }
mbed_official 610:813dcc80987e 2487
mbed_official 610:813dcc80987e 2488 /**
mbed_official 610:813dcc80987e 2489 * @brief Stops the TIM Encoder Interface in interrupt mode.
mbed_official 610:813dcc80987e 2490 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2491 * @param Channel : TIM Channels to be disabled
mbed_official 610:813dcc80987e 2492 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2493 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2494 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2495 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2496 * @retval HAL status
mbed_official 610:813dcc80987e 2497 */
mbed_official 610:813dcc80987e 2498 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 2499 {
mbed_official 610:813dcc80987e 2500 /* Check the parameters */
mbed_official 610:813dcc80987e 2501 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2502
mbed_official 610:813dcc80987e 2503 /* Disable the Input Capture channels 1 and 2
mbed_official 610:813dcc80987e 2504 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 610:813dcc80987e 2505 if(Channel == TIM_CHANNEL_1)
mbed_official 610:813dcc80987e 2506 {
mbed_official 610:813dcc80987e 2507 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2508
mbed_official 610:813dcc80987e 2509 /* Disable the capture compare Interrupts 1 */
mbed_official 610:813dcc80987e 2510 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2511 }
mbed_official 610:813dcc80987e 2512 else if(Channel == TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2513 {
mbed_official 610:813dcc80987e 2514 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2515
mbed_official 610:813dcc80987e 2516 /* Disable the capture compare Interrupts 2 */
mbed_official 610:813dcc80987e 2517 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2518 }
mbed_official 610:813dcc80987e 2519 else
mbed_official 610:813dcc80987e 2520 {
mbed_official 610:813dcc80987e 2521 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2522 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2523
mbed_official 610:813dcc80987e 2524 /* Disable the capture compare Interrupts 1 and 2 */
mbed_official 610:813dcc80987e 2525 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2526 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2527 }
mbed_official 610:813dcc80987e 2528
mbed_official 610:813dcc80987e 2529 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 2530 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2531
mbed_official 610:813dcc80987e 2532 /* Change the htim state */
mbed_official 610:813dcc80987e 2533 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2534
mbed_official 610:813dcc80987e 2535 /* Return function status */
mbed_official 610:813dcc80987e 2536 return HAL_OK;
mbed_official 610:813dcc80987e 2537 }
mbed_official 610:813dcc80987e 2538
mbed_official 610:813dcc80987e 2539 /**
mbed_official 610:813dcc80987e 2540 * @brief Starts the TIM Encoder Interface in DMA mode.
mbed_official 610:813dcc80987e 2541 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2542 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2543 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2544 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2545 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2546 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2547 * @param pData1: The destination Buffer address for IC1.
mbed_official 610:813dcc80987e 2548 * @param pData2: The destination Buffer address for IC2.
mbed_official 610:813dcc80987e 2549 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 610:813dcc80987e 2550 * @retval HAL status
mbed_official 610:813dcc80987e 2551 */
mbed_official 610:813dcc80987e 2552 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
mbed_official 610:813dcc80987e 2553 {
mbed_official 610:813dcc80987e 2554 /* Check the parameters */
mbed_official 610:813dcc80987e 2555 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2556
mbed_official 610:813dcc80987e 2557 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 2558 {
mbed_official 610:813dcc80987e 2559 return HAL_BUSY;
mbed_official 610:813dcc80987e 2560 }
mbed_official 610:813dcc80987e 2561 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 2562 {
mbed_official 610:813dcc80987e 2563 if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
mbed_official 610:813dcc80987e 2564 {
mbed_official 610:813dcc80987e 2565 return HAL_ERROR;
mbed_official 610:813dcc80987e 2566 }
mbed_official 610:813dcc80987e 2567 else
mbed_official 610:813dcc80987e 2568 {
mbed_official 610:813dcc80987e 2569 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2570 }
mbed_official 610:813dcc80987e 2571 }
mbed_official 610:813dcc80987e 2572
mbed_official 610:813dcc80987e 2573 switch (Channel)
mbed_official 610:813dcc80987e 2574 {
mbed_official 610:813dcc80987e 2575 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2576 {
mbed_official 610:813dcc80987e 2577 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 2578 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 2579
mbed_official 610:813dcc80987e 2580 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 2581 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 2582
mbed_official 610:813dcc80987e 2583 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 2584 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
mbed_official 610:813dcc80987e 2585
mbed_official 610:813dcc80987e 2586 /* Enable the TIM Input Capture DMA request */
mbed_official 610:813dcc80987e 2587 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 2588
mbed_official 610:813dcc80987e 2589 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 2590 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 2591
mbed_official 610:813dcc80987e 2592 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 2593 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2594 }
mbed_official 610:813dcc80987e 2595 break;
mbed_official 610:813dcc80987e 2596
mbed_official 610:813dcc80987e 2597 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2598 {
mbed_official 610:813dcc80987e 2599 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 2600 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 2601
mbed_official 610:813dcc80987e 2602 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 2603 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError;
mbed_official 610:813dcc80987e 2604 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 2605 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 610:813dcc80987e 2606
mbed_official 610:813dcc80987e 2607 /* Enable the TIM Input Capture DMA request */
mbed_official 610:813dcc80987e 2608 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 2609
mbed_official 610:813dcc80987e 2610 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 2611 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 2612
mbed_official 610:813dcc80987e 2613 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 2614 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2615 }
mbed_official 610:813dcc80987e 2616 break;
mbed_official 610:813dcc80987e 2617
mbed_official 610:813dcc80987e 2618 case TIM_CHANNEL_ALL:
mbed_official 610:813dcc80987e 2619 {
mbed_official 610:813dcc80987e 2620 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 2621 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 2622
mbed_official 610:813dcc80987e 2623 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 2624 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 2625
mbed_official 610:813dcc80987e 2626 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 2627 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
mbed_official 610:813dcc80987e 2628
mbed_official 610:813dcc80987e 2629 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 2630 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 2631
mbed_official 610:813dcc80987e 2632 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 2633 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 2634
mbed_official 610:813dcc80987e 2635 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 2636 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 610:813dcc80987e 2637
mbed_official 610:813dcc80987e 2638 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 2639 __HAL_TIM_ENABLE(htim);
mbed_official 610:813dcc80987e 2640
mbed_official 610:813dcc80987e 2641 /* Enable the Capture compare channel */
mbed_official 610:813dcc80987e 2642 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2643 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 610:813dcc80987e 2644
mbed_official 610:813dcc80987e 2645 /* Enable the TIM Input Capture DMA request */
mbed_official 610:813dcc80987e 2646 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 2647 /* Enable the TIM Input Capture DMA request */
mbed_official 610:813dcc80987e 2648 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 2649 }
mbed_official 610:813dcc80987e 2650 break;
mbed_official 610:813dcc80987e 2651
mbed_official 610:813dcc80987e 2652 default:
mbed_official 610:813dcc80987e 2653 break;
mbed_official 610:813dcc80987e 2654 }
mbed_official 610:813dcc80987e 2655 /* Return function status */
mbed_official 610:813dcc80987e 2656 return HAL_OK;
mbed_official 610:813dcc80987e 2657 }
mbed_official 610:813dcc80987e 2658
mbed_official 610:813dcc80987e 2659 /**
mbed_official 610:813dcc80987e 2660 * @brief Stops the TIM Encoder Interface in DMA mode.
mbed_official 610:813dcc80987e 2661 * @param htim : TIM Encoder Interface handle
mbed_official 610:813dcc80987e 2662 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2663 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2664 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2665 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2666 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 610:813dcc80987e 2667 * @retval HAL status
mbed_official 610:813dcc80987e 2668 */
mbed_official 610:813dcc80987e 2669 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 2670 {
mbed_official 610:813dcc80987e 2671 /* Check the parameters */
mbed_official 610:813dcc80987e 2672 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2673
mbed_official 610:813dcc80987e 2674 /* Disable the Input Capture channels 1 and 2
mbed_official 610:813dcc80987e 2675 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 610:813dcc80987e 2676 if(Channel == TIM_CHANNEL_1)
mbed_official 610:813dcc80987e 2677 {
mbed_official 610:813dcc80987e 2678 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2679
mbed_official 610:813dcc80987e 2680 /* Disable the capture compare DMA Request 1 */
mbed_official 610:813dcc80987e 2681 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 2682 }
mbed_official 610:813dcc80987e 2683 else if(Channel == TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2684 {
mbed_official 610:813dcc80987e 2685 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2686
mbed_official 610:813dcc80987e 2687 /* Disable the capture compare DMA Request 2 */
mbed_official 610:813dcc80987e 2688 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 2689 }
mbed_official 610:813dcc80987e 2690 else
mbed_official 610:813dcc80987e 2691 {
mbed_official 610:813dcc80987e 2692 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2693 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 610:813dcc80987e 2694
mbed_official 610:813dcc80987e 2695 /* Disable the capture compare DMA Request 1 and 2 */
mbed_official 610:813dcc80987e 2696 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 610:813dcc80987e 2697 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 610:813dcc80987e 2698 }
mbed_official 610:813dcc80987e 2699
mbed_official 610:813dcc80987e 2700 /* Disable the Peripheral */
mbed_official 610:813dcc80987e 2701 __HAL_TIM_DISABLE(htim);
mbed_official 610:813dcc80987e 2702
mbed_official 610:813dcc80987e 2703 /* Change the htim state */
mbed_official 610:813dcc80987e 2704 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2705
mbed_official 610:813dcc80987e 2706 /* Return function status */
mbed_official 610:813dcc80987e 2707 return HAL_OK;
mbed_official 610:813dcc80987e 2708 }
mbed_official 610:813dcc80987e 2709
mbed_official 610:813dcc80987e 2710 /**
mbed_official 610:813dcc80987e 2711 * @}
mbed_official 610:813dcc80987e 2712 */
mbed_official 610:813dcc80987e 2713 /** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management
mbed_official 610:813dcc80987e 2714 * @brief IRQ handler management
mbed_official 610:813dcc80987e 2715 *
mbed_official 610:813dcc80987e 2716 @verbatim
mbed_official 610:813dcc80987e 2717 ==============================================================================
mbed_official 610:813dcc80987e 2718 ##### IRQ handler management #####
mbed_official 610:813dcc80987e 2719 ==============================================================================
mbed_official 610:813dcc80987e 2720 [..]
mbed_official 610:813dcc80987e 2721 This section provides Timer IRQ handler function.
mbed_official 610:813dcc80987e 2722
mbed_official 610:813dcc80987e 2723 @endverbatim
mbed_official 610:813dcc80987e 2724 * @{
mbed_official 610:813dcc80987e 2725 */
mbed_official 610:813dcc80987e 2726 /**
mbed_official 610:813dcc80987e 2727 * @brief This function handles TIM interrupts requests.
mbed_official 610:813dcc80987e 2728 * @param htim: TIM handle
mbed_official 610:813dcc80987e 2729 * @retval None
mbed_official 610:813dcc80987e 2730 */
mbed_official 610:813dcc80987e 2731 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 2732 {
mbed_official 610:813dcc80987e 2733 /* Capture compare 1 event */
mbed_official 610:813dcc80987e 2734 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
mbed_official 610:813dcc80987e 2735 {
mbed_official 610:813dcc80987e 2736 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
mbed_official 610:813dcc80987e 2737 {
mbed_official 610:813dcc80987e 2738 {
mbed_official 610:813dcc80987e 2739 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
mbed_official 610:813dcc80987e 2740 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 610:813dcc80987e 2741
mbed_official 610:813dcc80987e 2742 /* Input capture event */
mbed_official 610:813dcc80987e 2743 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
mbed_official 610:813dcc80987e 2744 {
mbed_official 610:813dcc80987e 2745 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 610:813dcc80987e 2746 }
mbed_official 610:813dcc80987e 2747 /* Output compare event */
mbed_official 610:813dcc80987e 2748 else
mbed_official 610:813dcc80987e 2749 {
mbed_official 610:813dcc80987e 2750 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 610:813dcc80987e 2751 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 610:813dcc80987e 2752 }
mbed_official 610:813dcc80987e 2753 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 2754 }
mbed_official 610:813dcc80987e 2755 }
mbed_official 610:813dcc80987e 2756 }
mbed_official 610:813dcc80987e 2757 /* Capture compare 2 event */
mbed_official 610:813dcc80987e 2758 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
mbed_official 610:813dcc80987e 2759 {
mbed_official 610:813dcc80987e 2760 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
mbed_official 610:813dcc80987e 2761 {
mbed_official 610:813dcc80987e 2762 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
mbed_official 610:813dcc80987e 2763 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 610:813dcc80987e 2764 /* Input capture event */
mbed_official 610:813dcc80987e 2765 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
mbed_official 610:813dcc80987e 2766 {
mbed_official 610:813dcc80987e 2767 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 610:813dcc80987e 2768 }
mbed_official 610:813dcc80987e 2769 /* Output compare event */
mbed_official 610:813dcc80987e 2770 else
mbed_official 610:813dcc80987e 2771 {
mbed_official 610:813dcc80987e 2772 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 610:813dcc80987e 2773 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 610:813dcc80987e 2774 }
mbed_official 610:813dcc80987e 2775 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 2776 }
mbed_official 610:813dcc80987e 2777 }
mbed_official 610:813dcc80987e 2778 /* Capture compare 3 event */
mbed_official 610:813dcc80987e 2779 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
mbed_official 610:813dcc80987e 2780 {
mbed_official 610:813dcc80987e 2781 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
mbed_official 610:813dcc80987e 2782 {
mbed_official 610:813dcc80987e 2783 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
mbed_official 610:813dcc80987e 2784 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 610:813dcc80987e 2785 /* Input capture event */
mbed_official 610:813dcc80987e 2786 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
mbed_official 610:813dcc80987e 2787 {
mbed_official 610:813dcc80987e 2788 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 610:813dcc80987e 2789 }
mbed_official 610:813dcc80987e 2790 /* Output compare event */
mbed_official 610:813dcc80987e 2791 else
mbed_official 610:813dcc80987e 2792 {
mbed_official 610:813dcc80987e 2793 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 610:813dcc80987e 2794 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 610:813dcc80987e 2795 }
mbed_official 610:813dcc80987e 2796 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 2797 }
mbed_official 610:813dcc80987e 2798 }
mbed_official 610:813dcc80987e 2799 /* Capture compare 4 event */
mbed_official 610:813dcc80987e 2800 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
mbed_official 610:813dcc80987e 2801 {
mbed_official 610:813dcc80987e 2802 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
mbed_official 610:813dcc80987e 2803 {
mbed_official 610:813dcc80987e 2804 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
mbed_official 610:813dcc80987e 2805 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 610:813dcc80987e 2806 /* Input capture event */
mbed_official 610:813dcc80987e 2807 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
mbed_official 610:813dcc80987e 2808 {
mbed_official 610:813dcc80987e 2809 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 610:813dcc80987e 2810 }
mbed_official 610:813dcc80987e 2811 /* Output compare event */
mbed_official 610:813dcc80987e 2812 else
mbed_official 610:813dcc80987e 2813 {
mbed_official 610:813dcc80987e 2814 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 610:813dcc80987e 2815 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 610:813dcc80987e 2816 }
mbed_official 610:813dcc80987e 2817 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 2818 }
mbed_official 610:813dcc80987e 2819 }
mbed_official 610:813dcc80987e 2820 /* TIM Update event */
mbed_official 610:813dcc80987e 2821 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
mbed_official 610:813dcc80987e 2822 {
mbed_official 610:813dcc80987e 2823 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
mbed_official 610:813dcc80987e 2824 {
mbed_official 610:813dcc80987e 2825 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
mbed_official 610:813dcc80987e 2826 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 610:813dcc80987e 2827 }
mbed_official 610:813dcc80987e 2828 }
mbed_official 610:813dcc80987e 2829 /* TIM Break input event */
mbed_official 610:813dcc80987e 2830 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
mbed_official 610:813dcc80987e 2831 {
mbed_official 610:813dcc80987e 2832 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
mbed_official 610:813dcc80987e 2833 {
mbed_official 610:813dcc80987e 2834 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
mbed_official 610:813dcc80987e 2835 HAL_TIMEx_BreakCallback(htim);
mbed_official 610:813dcc80987e 2836 }
mbed_official 610:813dcc80987e 2837 }
mbed_official 610:813dcc80987e 2838 /* TIM Trigger detection event */
mbed_official 610:813dcc80987e 2839 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
mbed_official 610:813dcc80987e 2840 {
mbed_official 610:813dcc80987e 2841 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
mbed_official 610:813dcc80987e 2842 {
mbed_official 610:813dcc80987e 2843 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
mbed_official 610:813dcc80987e 2844 HAL_TIM_TriggerCallback(htim);
mbed_official 610:813dcc80987e 2845 }
mbed_official 610:813dcc80987e 2846 }
mbed_official 610:813dcc80987e 2847 /* TIM commutation event */
mbed_official 610:813dcc80987e 2848 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
mbed_official 610:813dcc80987e 2849 {
mbed_official 610:813dcc80987e 2850 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
mbed_official 610:813dcc80987e 2851 {
mbed_official 610:813dcc80987e 2852 __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
mbed_official 610:813dcc80987e 2853 HAL_TIMEx_CommutationCallback(htim);
mbed_official 610:813dcc80987e 2854 }
mbed_official 610:813dcc80987e 2855 }
mbed_official 610:813dcc80987e 2856 }
mbed_official 610:813dcc80987e 2857
mbed_official 610:813dcc80987e 2858 /**
mbed_official 610:813dcc80987e 2859 * @}
mbed_official 610:813dcc80987e 2860 */
mbed_official 610:813dcc80987e 2861
mbed_official 610:813dcc80987e 2862 /** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
mbed_official 610:813dcc80987e 2863 * @brief Peripheral Control functions
mbed_official 610:813dcc80987e 2864 *
mbed_official 610:813dcc80987e 2865 @verbatim
mbed_official 610:813dcc80987e 2866 ==============================================================================
mbed_official 610:813dcc80987e 2867 ##### Peripheral Control functions #####
mbed_official 610:813dcc80987e 2868 ==============================================================================
mbed_official 610:813dcc80987e 2869 [..]
mbed_official 610:813dcc80987e 2870 This section provides functions allowing to:
mbed_official 610:813dcc80987e 2871 (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
mbed_official 610:813dcc80987e 2872 (+) Configure External Clock source.
mbed_official 610:813dcc80987e 2873 (+) Configure Complementary channels, break features and dead time.
mbed_official 610:813dcc80987e 2874 (+) Configure Master and the Slave synchronization.
mbed_official 610:813dcc80987e 2875 (+) Configure the DMA Burst Mode.
mbed_official 610:813dcc80987e 2876
mbed_official 610:813dcc80987e 2877 @endverbatim
mbed_official 610:813dcc80987e 2878 * @{
mbed_official 610:813dcc80987e 2879 */
mbed_official 610:813dcc80987e 2880
mbed_official 610:813dcc80987e 2881 /**
mbed_official 610:813dcc80987e 2882 * @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official 610:813dcc80987e 2883 * parameters in the TIM_OC_InitTypeDef.
mbed_official 610:813dcc80987e 2884 * @param htim: TIM Output Compare handle
mbed_official 610:813dcc80987e 2885 * @param sConfig: TIM Output Compare configuration structure
mbed_official 610:813dcc80987e 2886 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2887 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2888 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2889 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2890 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 2891 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 2892 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
mbed_official 610:813dcc80987e 2893 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
mbed_official 610:813dcc80987e 2894 * @retval HAL status
mbed_official 610:813dcc80987e 2895 */
mbed_official 610:813dcc80987e 2896 __weak HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 610:813dcc80987e 2897 {
mbed_official 610:813dcc80987e 2898 /* Check the parameters */
mbed_official 610:813dcc80987e 2899 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 2900 assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official 610:813dcc80987e 2901 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 610:813dcc80987e 2902 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 610:813dcc80987e 2903 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 610:813dcc80987e 2904 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 610:813dcc80987e 2905
mbed_official 610:813dcc80987e 2906 /* Check input state */
mbed_official 610:813dcc80987e 2907 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2908
mbed_official 610:813dcc80987e 2909 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2910
mbed_official 610:813dcc80987e 2911 switch (Channel)
mbed_official 610:813dcc80987e 2912 {
mbed_official 610:813dcc80987e 2913 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 2914 {
mbed_official 610:813dcc80987e 2915 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2916 /* Configure the TIM Channel 1 in Output Compare */
mbed_official 610:813dcc80987e 2917 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 2918 }
mbed_official 610:813dcc80987e 2919 break;
mbed_official 610:813dcc80987e 2920
mbed_official 610:813dcc80987e 2921 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 2922 {
mbed_official 610:813dcc80987e 2923 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2924 /* Configure the TIM Channel 2 in Output Compare */
mbed_official 610:813dcc80987e 2925 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 2926 }
mbed_official 610:813dcc80987e 2927 break;
mbed_official 610:813dcc80987e 2928
mbed_official 610:813dcc80987e 2929 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 2930 {
mbed_official 610:813dcc80987e 2931 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2932 /* Configure the TIM Channel 3 in Output Compare */
mbed_official 610:813dcc80987e 2933 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 2934 }
mbed_official 610:813dcc80987e 2935 break;
mbed_official 610:813dcc80987e 2936
mbed_official 610:813dcc80987e 2937 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 2938 {
mbed_official 610:813dcc80987e 2939 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2940 /* Configure the TIM Channel 4 in Output Compare */
mbed_official 610:813dcc80987e 2941 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 2942 }
mbed_official 610:813dcc80987e 2943 break;
mbed_official 610:813dcc80987e 2944
mbed_official 610:813dcc80987e 2945 default:
mbed_official 610:813dcc80987e 2946 break;
mbed_official 610:813dcc80987e 2947 }
mbed_official 610:813dcc80987e 2948 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 2949
mbed_official 610:813dcc80987e 2950 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 2951
mbed_official 610:813dcc80987e 2952 return HAL_OK;
mbed_official 610:813dcc80987e 2953 }
mbed_official 610:813dcc80987e 2954
mbed_official 610:813dcc80987e 2955 /**
mbed_official 610:813dcc80987e 2956 * @brief Initializes the TIM Input Capture Channels according to the specified
mbed_official 610:813dcc80987e 2957 * parameters in the TIM_IC_InitTypeDef.
mbed_official 610:813dcc80987e 2958 * @param htim: TIM IC handle
mbed_official 610:813dcc80987e 2959 * @param sConfig: TIM Input Capture configuration structure
mbed_official 610:813dcc80987e 2960 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 2961 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 2962 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 2963 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 2964 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 2965 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 2966 * @retval HAL status
mbed_official 610:813dcc80987e 2967 */
mbed_official 610:813dcc80987e 2968 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 610:813dcc80987e 2969 {
mbed_official 610:813dcc80987e 2970 /* Check the parameters */
mbed_official 610:813dcc80987e 2971 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2972 assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
mbed_official 610:813dcc80987e 2973 assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
mbed_official 610:813dcc80987e 2974 assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
mbed_official 610:813dcc80987e 2975 assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
mbed_official 610:813dcc80987e 2976
mbed_official 610:813dcc80987e 2977 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 2978
mbed_official 610:813dcc80987e 2979 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 2980
mbed_official 610:813dcc80987e 2981 if (Channel == TIM_CHANNEL_1)
mbed_official 610:813dcc80987e 2982 {
mbed_official 610:813dcc80987e 2983 /* TI1 Configuration */
mbed_official 610:813dcc80987e 2984 TIM_TI1_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 2985 sConfig->ICPolarity,
mbed_official 610:813dcc80987e 2986 sConfig->ICSelection,
mbed_official 610:813dcc80987e 2987 sConfig->ICFilter);
mbed_official 610:813dcc80987e 2988
mbed_official 610:813dcc80987e 2989 /* Reset the IC1PSC Bits */
mbed_official 610:813dcc80987e 2990 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 610:813dcc80987e 2991
mbed_official 610:813dcc80987e 2992 /* Set the IC1PSC value */
mbed_official 610:813dcc80987e 2993 htim->Instance->CCMR1 |= sConfig->ICPrescaler;
mbed_official 610:813dcc80987e 2994 }
mbed_official 610:813dcc80987e 2995 else if (Channel == TIM_CHANNEL_2)
mbed_official 610:813dcc80987e 2996 {
mbed_official 610:813dcc80987e 2997 /* TI2 Configuration */
mbed_official 610:813dcc80987e 2998 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 2999
mbed_official 610:813dcc80987e 3000 TIM_TI2_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3001 sConfig->ICPolarity,
mbed_official 610:813dcc80987e 3002 sConfig->ICSelection,
mbed_official 610:813dcc80987e 3003 sConfig->ICFilter);
mbed_official 610:813dcc80987e 3004
mbed_official 610:813dcc80987e 3005 /* Reset the IC2PSC Bits */
mbed_official 610:813dcc80987e 3006 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 610:813dcc80987e 3007
mbed_official 610:813dcc80987e 3008 /* Set the IC2PSC value */
mbed_official 610:813dcc80987e 3009 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8);
mbed_official 610:813dcc80987e 3010 }
mbed_official 610:813dcc80987e 3011 else if (Channel == TIM_CHANNEL_3)
mbed_official 610:813dcc80987e 3012 {
mbed_official 610:813dcc80987e 3013 /* TI3 Configuration */
mbed_official 610:813dcc80987e 3014 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3015
mbed_official 610:813dcc80987e 3016 TIM_TI3_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3017 sConfig->ICPolarity,
mbed_official 610:813dcc80987e 3018 sConfig->ICSelection,
mbed_official 610:813dcc80987e 3019 sConfig->ICFilter);
mbed_official 610:813dcc80987e 3020
mbed_official 610:813dcc80987e 3021 /* Reset the IC3PSC Bits */
mbed_official 610:813dcc80987e 3022 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
mbed_official 610:813dcc80987e 3023
mbed_official 610:813dcc80987e 3024 /* Set the IC3PSC value */
mbed_official 610:813dcc80987e 3025 htim->Instance->CCMR2 |= sConfig->ICPrescaler;
mbed_official 610:813dcc80987e 3026 }
mbed_official 610:813dcc80987e 3027 else
mbed_official 610:813dcc80987e 3028 {
mbed_official 610:813dcc80987e 3029 /* TI4 Configuration */
mbed_official 610:813dcc80987e 3030 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3031
mbed_official 610:813dcc80987e 3032 TIM_TI4_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3033 sConfig->ICPolarity,
mbed_official 610:813dcc80987e 3034 sConfig->ICSelection,
mbed_official 610:813dcc80987e 3035 sConfig->ICFilter);
mbed_official 610:813dcc80987e 3036
mbed_official 610:813dcc80987e 3037 /* Reset the IC4PSC Bits */
mbed_official 610:813dcc80987e 3038 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
mbed_official 610:813dcc80987e 3039
mbed_official 610:813dcc80987e 3040 /* Set the IC4PSC value */
mbed_official 610:813dcc80987e 3041 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8);
mbed_official 610:813dcc80987e 3042 }
mbed_official 610:813dcc80987e 3043
mbed_official 610:813dcc80987e 3044 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3045
mbed_official 610:813dcc80987e 3046 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 3047
mbed_official 610:813dcc80987e 3048 return HAL_OK;
mbed_official 610:813dcc80987e 3049 }
mbed_official 610:813dcc80987e 3050
mbed_official 610:813dcc80987e 3051 /**
mbed_official 610:813dcc80987e 3052 * @brief Initializes the TIM PWM channels according to the specified
mbed_official 610:813dcc80987e 3053 * parameters in the TIM_OC_InitTypeDef.
mbed_official 610:813dcc80987e 3054 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3055 * @param sConfig: TIM PWM configuration structure
mbed_official 610:813dcc80987e 3056 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 3057 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 3058 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 3059 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 3060 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 3061 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 3062 * @retval HAL status
mbed_official 610:813dcc80987e 3063 */
mbed_official 610:813dcc80987e 3064 __weak HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 610:813dcc80987e 3065 {
mbed_official 610:813dcc80987e 3066 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 3067
mbed_official 610:813dcc80987e 3068 /* Check the parameters */
mbed_official 610:813dcc80987e 3069 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 3070 assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official 610:813dcc80987e 3071 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 610:813dcc80987e 3072 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 610:813dcc80987e 3073 assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official 610:813dcc80987e 3074 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 610:813dcc80987e 3075 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 610:813dcc80987e 3076
mbed_official 610:813dcc80987e 3077 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3078
mbed_official 610:813dcc80987e 3079 switch (Channel)
mbed_official 610:813dcc80987e 3080 {
mbed_official 610:813dcc80987e 3081 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 3082 {
mbed_official 610:813dcc80987e 3083 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3084 /* Configure the Channel 1 in PWM mode */
mbed_official 610:813dcc80987e 3085 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 3086
mbed_official 610:813dcc80987e 3087 /* Set the Preload enable bit for channel1 */
mbed_official 610:813dcc80987e 3088 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
mbed_official 610:813dcc80987e 3089
mbed_official 610:813dcc80987e 3090 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 3091 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official 610:813dcc80987e 3092 htim->Instance->CCMR1 |= sConfig->OCFastMode;
mbed_official 610:813dcc80987e 3093 }
mbed_official 610:813dcc80987e 3094 break;
mbed_official 610:813dcc80987e 3095
mbed_official 610:813dcc80987e 3096 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 3097 {
mbed_official 610:813dcc80987e 3098 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3099 /* Configure the Channel 2 in PWM mode */
mbed_official 610:813dcc80987e 3100 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 3101
mbed_official 610:813dcc80987e 3102 /* Set the Preload enable bit for channel2 */
mbed_official 610:813dcc80987e 3103 htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
mbed_official 610:813dcc80987e 3104
mbed_official 610:813dcc80987e 3105 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 3106 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official 610:813dcc80987e 3107 htim->Instance->CCMR1 |= sConfig->OCFastMode << 8;
mbed_official 610:813dcc80987e 3108 }
mbed_official 610:813dcc80987e 3109 break;
mbed_official 610:813dcc80987e 3110
mbed_official 610:813dcc80987e 3111 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 3112 {
mbed_official 610:813dcc80987e 3113 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3114 /* Configure the Channel 3 in PWM mode */
mbed_official 610:813dcc80987e 3115 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 3116
mbed_official 610:813dcc80987e 3117 /* Set the Preload enable bit for channel3 */
mbed_official 610:813dcc80987e 3118 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
mbed_official 610:813dcc80987e 3119
mbed_official 610:813dcc80987e 3120 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 3121 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official 610:813dcc80987e 3122 htim->Instance->CCMR2 |= sConfig->OCFastMode;
mbed_official 610:813dcc80987e 3123 }
mbed_official 610:813dcc80987e 3124 break;
mbed_official 610:813dcc80987e 3125
mbed_official 610:813dcc80987e 3126 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 3127 {
mbed_official 610:813dcc80987e 3128 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3129 /* Configure the Channel 4 in PWM mode */
mbed_official 610:813dcc80987e 3130 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 610:813dcc80987e 3131
mbed_official 610:813dcc80987e 3132 /* Set the Preload enable bit for channel4 */
mbed_official 610:813dcc80987e 3133 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
mbed_official 610:813dcc80987e 3134
mbed_official 610:813dcc80987e 3135 /* Configure the Output Fast mode */
mbed_official 610:813dcc80987e 3136 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official 610:813dcc80987e 3137 htim->Instance->CCMR2 |= sConfig->OCFastMode << 8;
mbed_official 610:813dcc80987e 3138 }
mbed_official 610:813dcc80987e 3139 break;
mbed_official 610:813dcc80987e 3140
mbed_official 610:813dcc80987e 3141 default:
mbed_official 610:813dcc80987e 3142 break;
mbed_official 610:813dcc80987e 3143 }
mbed_official 610:813dcc80987e 3144
mbed_official 610:813dcc80987e 3145 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3146
mbed_official 610:813dcc80987e 3147 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 3148
mbed_official 610:813dcc80987e 3149 return HAL_OK;
mbed_official 610:813dcc80987e 3150 }
mbed_official 610:813dcc80987e 3151
mbed_official 610:813dcc80987e 3152 /**
mbed_official 610:813dcc80987e 3153 * @brief Initializes the TIM One Pulse Channels according to the specified
mbed_official 610:813dcc80987e 3154 * parameters in the TIM_OnePulse_InitTypeDef.
mbed_official 610:813dcc80987e 3155 * @param htim: TIM One Pulse handle
mbed_official 610:813dcc80987e 3156 * @param sConfig: TIM One Pulse configuration structure
mbed_official 610:813dcc80987e 3157 * @param OutputChannel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 3158 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 3159 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 3160 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 3161 * @param InputChannel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 3162 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 3163 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 3164 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 3165 * @retval HAL status
mbed_official 610:813dcc80987e 3166 */
mbed_official 610:813dcc80987e 3167 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel)
mbed_official 610:813dcc80987e 3168 {
mbed_official 610:813dcc80987e 3169 TIM_OC_InitTypeDef temp1;
mbed_official 610:813dcc80987e 3170
mbed_official 610:813dcc80987e 3171 /* Check the parameters */
mbed_official 610:813dcc80987e 3172 assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
mbed_official 610:813dcc80987e 3173 assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
mbed_official 610:813dcc80987e 3174
mbed_official 610:813dcc80987e 3175 if(OutputChannel != InputChannel)
mbed_official 610:813dcc80987e 3176 {
mbed_official 610:813dcc80987e 3177 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 3178
mbed_official 610:813dcc80987e 3179 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3180
mbed_official 610:813dcc80987e 3181 /* Extract the Ouput compare configuration from sConfig structure */
mbed_official 610:813dcc80987e 3182 temp1.OCMode = sConfig->OCMode;
mbed_official 610:813dcc80987e 3183 temp1.Pulse = sConfig->Pulse;
mbed_official 610:813dcc80987e 3184 temp1.OCPolarity = sConfig->OCPolarity;
mbed_official 610:813dcc80987e 3185 temp1.OCNPolarity = sConfig->OCNPolarity;
mbed_official 610:813dcc80987e 3186 temp1.OCIdleState = sConfig->OCIdleState;
mbed_official 610:813dcc80987e 3187 temp1.OCNIdleState = sConfig->OCNIdleState;
mbed_official 610:813dcc80987e 3188
mbed_official 610:813dcc80987e 3189 switch (OutputChannel)
mbed_official 610:813dcc80987e 3190 {
mbed_official 610:813dcc80987e 3191 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 3192 {
mbed_official 610:813dcc80987e 3193 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3194
mbed_official 610:813dcc80987e 3195 TIM_OC1_SetConfig(htim->Instance, &temp1);
mbed_official 610:813dcc80987e 3196 }
mbed_official 610:813dcc80987e 3197 break;
mbed_official 610:813dcc80987e 3198 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 3199 {
mbed_official 610:813dcc80987e 3200 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3201
mbed_official 610:813dcc80987e 3202 TIM_OC2_SetConfig(htim->Instance, &temp1);
mbed_official 610:813dcc80987e 3203 }
mbed_official 610:813dcc80987e 3204 break;
mbed_official 610:813dcc80987e 3205 default:
mbed_official 610:813dcc80987e 3206 break;
mbed_official 610:813dcc80987e 3207 }
mbed_official 610:813dcc80987e 3208 switch (InputChannel)
mbed_official 610:813dcc80987e 3209 {
mbed_official 610:813dcc80987e 3210 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 3211 {
mbed_official 610:813dcc80987e 3212 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3213
mbed_official 610:813dcc80987e 3214 TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 610:813dcc80987e 3215 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 610:813dcc80987e 3216
mbed_official 610:813dcc80987e 3217 /* Reset the IC1PSC Bits */
mbed_official 610:813dcc80987e 3218 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 610:813dcc80987e 3219
mbed_official 610:813dcc80987e 3220 /* Select the Trigger source */
mbed_official 610:813dcc80987e 3221 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 3222 htim->Instance->SMCR |= TIM_TS_TI1FP1;
mbed_official 610:813dcc80987e 3223
mbed_official 610:813dcc80987e 3224 /* Select the Slave Mode */
mbed_official 610:813dcc80987e 3225 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 3226 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 610:813dcc80987e 3227 }
mbed_official 610:813dcc80987e 3228 break;
mbed_official 610:813dcc80987e 3229 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 3230 {
mbed_official 610:813dcc80987e 3231 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3232
mbed_official 610:813dcc80987e 3233 TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 610:813dcc80987e 3234 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 610:813dcc80987e 3235
mbed_official 610:813dcc80987e 3236 /* Reset the IC2PSC Bits */
mbed_official 610:813dcc80987e 3237 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 610:813dcc80987e 3238
mbed_official 610:813dcc80987e 3239 /* Select the Trigger source */
mbed_official 610:813dcc80987e 3240 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 3241 htim->Instance->SMCR |= TIM_TS_TI2FP2;
mbed_official 610:813dcc80987e 3242
mbed_official 610:813dcc80987e 3243 /* Select the Slave Mode */
mbed_official 610:813dcc80987e 3244 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 3245 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 610:813dcc80987e 3246 }
mbed_official 610:813dcc80987e 3247 break;
mbed_official 610:813dcc80987e 3248
mbed_official 610:813dcc80987e 3249 default:
mbed_official 610:813dcc80987e 3250 break;
mbed_official 610:813dcc80987e 3251 }
mbed_official 610:813dcc80987e 3252
mbed_official 610:813dcc80987e 3253 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3254
mbed_official 610:813dcc80987e 3255 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 3256
mbed_official 610:813dcc80987e 3257 return HAL_OK;
mbed_official 610:813dcc80987e 3258 }
mbed_official 610:813dcc80987e 3259 else
mbed_official 610:813dcc80987e 3260 {
mbed_official 610:813dcc80987e 3261 return HAL_ERROR;
mbed_official 610:813dcc80987e 3262 }
mbed_official 610:813dcc80987e 3263 }
mbed_official 610:813dcc80987e 3264
mbed_official 610:813dcc80987e 3265 /**
mbed_official 610:813dcc80987e 3266 * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
mbed_official 610:813dcc80987e 3267 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3268 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write
mbed_official 610:813dcc80987e 3269 * This parameters can be on of the following values:
mbed_official 610:813dcc80987e 3270 * @arg TIM_DMABASE_CR1
mbed_official 610:813dcc80987e 3271 * @arg TIM_DMABASE_CR2
mbed_official 610:813dcc80987e 3272 * @arg TIM_DMABASE_SMCR
mbed_official 610:813dcc80987e 3273 * @arg TIM_DMABASE_DIER
mbed_official 610:813dcc80987e 3274 * @arg TIM_DMABASE_SR
mbed_official 610:813dcc80987e 3275 * @arg TIM_DMABASE_EGR
mbed_official 610:813dcc80987e 3276 * @arg TIM_DMABASE_CCMR1
mbed_official 610:813dcc80987e 3277 * @arg TIM_DMABASE_CCMR2
mbed_official 610:813dcc80987e 3278 * @arg TIM_DMABASE_CCER
mbed_official 610:813dcc80987e 3279 * @arg TIM_DMABASE_CNT
mbed_official 610:813dcc80987e 3280 * @arg TIM_DMABASE_PSC
mbed_official 610:813dcc80987e 3281 * @arg TIM_DMABASE_ARR
mbed_official 610:813dcc80987e 3282 * @arg TIM_DMABASE_RCR
mbed_official 610:813dcc80987e 3283 * @arg TIM_DMABASE_CCR1
mbed_official 610:813dcc80987e 3284 * @arg TIM_DMABASE_CCR2
mbed_official 610:813dcc80987e 3285 * @arg TIM_DMABASE_CCR3
mbed_official 610:813dcc80987e 3286 * @arg TIM_DMABASE_CCR4
mbed_official 610:813dcc80987e 3287 * @arg TIM_DMABASE_BDTR
mbed_official 610:813dcc80987e 3288 * @arg TIM_DMABASE_DCR
mbed_official 610:813dcc80987e 3289 * @param BurstRequestSrc: TIM DMA Request sources
mbed_official 610:813dcc80987e 3290 * This parameters can be on of the following values:
mbed_official 610:813dcc80987e 3291 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 610:813dcc80987e 3292 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 610:813dcc80987e 3293 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 610:813dcc80987e 3294 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 610:813dcc80987e 3295 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 610:813dcc80987e 3296 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 610:813dcc80987e 3297 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 610:813dcc80987e 3298 * @param BurstBuffer: The Buffer address.
mbed_official 610:813dcc80987e 3299 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 610:813dcc80987e 3300 * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official 610:813dcc80987e 3301 * @retval HAL status
mbed_official 610:813dcc80987e 3302 */
mbed_official 610:813dcc80987e 3303 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 610:813dcc80987e 3304 uint32_t* BurstBuffer, uint32_t BurstLength)
mbed_official 610:813dcc80987e 3305 {
mbed_official 610:813dcc80987e 3306 /* Check the parameters */
mbed_official 610:813dcc80987e 3307 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3308 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 610:813dcc80987e 3309 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 610:813dcc80987e 3310 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 610:813dcc80987e 3311
mbed_official 610:813dcc80987e 3312 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 3313 {
mbed_official 610:813dcc80987e 3314 return HAL_BUSY;
mbed_official 610:813dcc80987e 3315 }
mbed_official 610:813dcc80987e 3316 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 3317 {
mbed_official 610:813dcc80987e 3318 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 610:813dcc80987e 3319 {
mbed_official 610:813dcc80987e 3320 return HAL_ERROR;
mbed_official 610:813dcc80987e 3321 }
mbed_official 610:813dcc80987e 3322 else
mbed_official 610:813dcc80987e 3323 {
mbed_official 610:813dcc80987e 3324 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3325 }
mbed_official 610:813dcc80987e 3326 }
mbed_official 610:813dcc80987e 3327 switch(BurstRequestSrc)
mbed_official 610:813dcc80987e 3328 {
mbed_official 610:813dcc80987e 3329 case TIM_DMA_UPDATE:
mbed_official 610:813dcc80987e 3330 {
mbed_official 610:813dcc80987e 3331 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3332 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 610:813dcc80987e 3333
mbed_official 610:813dcc80987e 3334 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3335 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3336
mbed_official 610:813dcc80987e 3337 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3338 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3339 }
mbed_official 610:813dcc80987e 3340 break;
mbed_official 610:813dcc80987e 3341 case TIM_DMA_CC1:
mbed_official 610:813dcc80987e 3342 {
mbed_official 610:813dcc80987e 3343 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3344 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 3345
mbed_official 610:813dcc80987e 3346 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3347 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3348
mbed_official 610:813dcc80987e 3349 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3350 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3351 }
mbed_official 610:813dcc80987e 3352 break;
mbed_official 610:813dcc80987e 3353 case TIM_DMA_CC2:
mbed_official 610:813dcc80987e 3354 {
mbed_official 610:813dcc80987e 3355 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3356 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 3357
mbed_official 610:813dcc80987e 3358 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3359 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3360
mbed_official 610:813dcc80987e 3361 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3362 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3363 }
mbed_official 610:813dcc80987e 3364 break;
mbed_official 610:813dcc80987e 3365 case TIM_DMA_CC3:
mbed_official 610:813dcc80987e 3366 {
mbed_official 610:813dcc80987e 3367 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3368 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 3369
mbed_official 610:813dcc80987e 3370 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3371 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3372
mbed_official 610:813dcc80987e 3373 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3374 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3375 }
mbed_official 610:813dcc80987e 3376 break;
mbed_official 610:813dcc80987e 3377 case TIM_DMA_CC4:
mbed_official 610:813dcc80987e 3378 {
mbed_official 610:813dcc80987e 3379 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3380 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
mbed_official 610:813dcc80987e 3381
mbed_official 610:813dcc80987e 3382 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3383 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3384
mbed_official 610:813dcc80987e 3385 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3386 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3387 }
mbed_official 610:813dcc80987e 3388 break;
mbed_official 610:813dcc80987e 3389 case TIM_DMA_COM:
mbed_official 610:813dcc80987e 3390 {
mbed_official 610:813dcc80987e 3391 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3392 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
mbed_official 610:813dcc80987e 3393
mbed_official 610:813dcc80987e 3394 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3395 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3396
mbed_official 610:813dcc80987e 3397 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3398 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3399 }
mbed_official 610:813dcc80987e 3400 break;
mbed_official 610:813dcc80987e 3401 case TIM_DMA_TRIGGER:
mbed_official 610:813dcc80987e 3402 {
mbed_official 610:813dcc80987e 3403 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3404 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 610:813dcc80987e 3405
mbed_official 610:813dcc80987e 3406 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3407 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3408
mbed_official 610:813dcc80987e 3409 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3410 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3411 }
mbed_official 610:813dcc80987e 3412 break;
mbed_official 610:813dcc80987e 3413 default:
mbed_official 610:813dcc80987e 3414 break;
mbed_official 610:813dcc80987e 3415 }
mbed_official 610:813dcc80987e 3416 /* configure the DMA Burst Mode */
mbed_official 610:813dcc80987e 3417 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 610:813dcc80987e 3418
mbed_official 610:813dcc80987e 3419 /* Enable the TIM DMA Request */
mbed_official 610:813dcc80987e 3420 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 610:813dcc80987e 3421
mbed_official 610:813dcc80987e 3422 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3423
mbed_official 610:813dcc80987e 3424 /* Return function status */
mbed_official 610:813dcc80987e 3425 return HAL_OK;
mbed_official 610:813dcc80987e 3426 }
mbed_official 610:813dcc80987e 3427
mbed_official 610:813dcc80987e 3428 /**
mbed_official 610:813dcc80987e 3429 * @brief Stops the TIM DMA Burst mode
mbed_official 610:813dcc80987e 3430 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3431 * @param BurstRequestSrc: TIM DMA Request sources to disable
mbed_official 610:813dcc80987e 3432 * @retval HAL status
mbed_official 610:813dcc80987e 3433 */
mbed_official 610:813dcc80987e 3434 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 610:813dcc80987e 3435 {
mbed_official 610:813dcc80987e 3436 /* Check the parameters */
mbed_official 610:813dcc80987e 3437 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 610:813dcc80987e 3438
mbed_official 610:813dcc80987e 3439 /* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official 610:813dcc80987e 3440 switch(BurstRequestSrc)
mbed_official 610:813dcc80987e 3441 {
mbed_official 610:813dcc80987e 3442 case TIM_DMA_UPDATE:
mbed_official 610:813dcc80987e 3443 {
mbed_official 610:813dcc80987e 3444 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official 610:813dcc80987e 3445 }
mbed_official 610:813dcc80987e 3446 break;
mbed_official 610:813dcc80987e 3447 case TIM_DMA_CC1:
mbed_official 610:813dcc80987e 3448 {
mbed_official 610:813dcc80987e 3449 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official 610:813dcc80987e 3450 }
mbed_official 610:813dcc80987e 3451 break;
mbed_official 610:813dcc80987e 3452 case TIM_DMA_CC2:
mbed_official 610:813dcc80987e 3453 {
mbed_official 610:813dcc80987e 3454 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official 610:813dcc80987e 3455 }
mbed_official 610:813dcc80987e 3456 break;
mbed_official 610:813dcc80987e 3457 case TIM_DMA_CC3:
mbed_official 610:813dcc80987e 3458 {
mbed_official 610:813dcc80987e 3459 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official 610:813dcc80987e 3460 }
mbed_official 610:813dcc80987e 3461 break;
mbed_official 610:813dcc80987e 3462 case TIM_DMA_CC4:
mbed_official 610:813dcc80987e 3463 {
mbed_official 610:813dcc80987e 3464 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official 610:813dcc80987e 3465 }
mbed_official 610:813dcc80987e 3466 break;
mbed_official 610:813dcc80987e 3467 case TIM_DMA_COM:
mbed_official 610:813dcc80987e 3468 {
mbed_official 610:813dcc80987e 3469 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official 610:813dcc80987e 3470 }
mbed_official 610:813dcc80987e 3471 break;
mbed_official 610:813dcc80987e 3472 case TIM_DMA_TRIGGER:
mbed_official 610:813dcc80987e 3473 {
mbed_official 610:813dcc80987e 3474 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official 610:813dcc80987e 3475 }
mbed_official 610:813dcc80987e 3476 break;
mbed_official 610:813dcc80987e 3477 default:
mbed_official 610:813dcc80987e 3478 break;
mbed_official 610:813dcc80987e 3479 }
mbed_official 610:813dcc80987e 3480
mbed_official 610:813dcc80987e 3481 /* Disable the TIM Update DMA request */
mbed_official 610:813dcc80987e 3482 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 610:813dcc80987e 3483
mbed_official 610:813dcc80987e 3484 /* Return function status */
mbed_official 610:813dcc80987e 3485 return HAL_OK;
mbed_official 610:813dcc80987e 3486 }
mbed_official 610:813dcc80987e 3487
mbed_official 610:813dcc80987e 3488 /**
mbed_official 610:813dcc80987e 3489 * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
mbed_official 610:813dcc80987e 3490 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3491 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read
mbed_official 610:813dcc80987e 3492 * This parameters can be on of the following values:
mbed_official 610:813dcc80987e 3493 * @arg TIM_DMABASE_CR1
mbed_official 610:813dcc80987e 3494 * @arg TIM_DMABASE_CR2
mbed_official 610:813dcc80987e 3495 * @arg TIM_DMABASE_SMCR
mbed_official 610:813dcc80987e 3496 * @arg TIM_DMABASE_DIER
mbed_official 610:813dcc80987e 3497 * @arg TIM_DMABASE_SR
mbed_official 610:813dcc80987e 3498 * @arg TIM_DMABASE_EGR
mbed_official 610:813dcc80987e 3499 * @arg TIM_DMABASE_CCMR1
mbed_official 610:813dcc80987e 3500 * @arg TIM_DMABASE_CCMR2
mbed_official 610:813dcc80987e 3501 * @arg TIM_DMABASE_CCER
mbed_official 610:813dcc80987e 3502 * @arg TIM_DMABASE_CNT
mbed_official 610:813dcc80987e 3503 * @arg TIM_DMABASE_PSC
mbed_official 610:813dcc80987e 3504 * @arg TIM_DMABASE_ARR
mbed_official 610:813dcc80987e 3505 * @arg TIM_DMABASE_RCR
mbed_official 610:813dcc80987e 3506 * @arg TIM_DMABASE_CCR1
mbed_official 610:813dcc80987e 3507 * @arg TIM_DMABASE_CCR2
mbed_official 610:813dcc80987e 3508 * @arg TIM_DMABASE_CCR3
mbed_official 610:813dcc80987e 3509 * @arg TIM_DMABASE_CCR4
mbed_official 610:813dcc80987e 3510 * @arg TIM_DMABASE_BDTR
mbed_official 610:813dcc80987e 3511 * @arg TIM_DMABASE_DCR
mbed_official 610:813dcc80987e 3512 * @param BurstRequestSrc: TIM DMA Request sources
mbed_official 610:813dcc80987e 3513 * This parameters can be on of the following values:
mbed_official 610:813dcc80987e 3514 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 610:813dcc80987e 3515 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 610:813dcc80987e 3516 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 610:813dcc80987e 3517 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 610:813dcc80987e 3518 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 610:813dcc80987e 3519 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 610:813dcc80987e 3520 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 610:813dcc80987e 3521 * @param BurstBuffer: The Buffer address.
mbed_official 610:813dcc80987e 3522 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 610:813dcc80987e 3523 * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official 610:813dcc80987e 3524 * @retval HAL status
mbed_official 610:813dcc80987e 3525 */
mbed_official 610:813dcc80987e 3526 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 610:813dcc80987e 3527 uint32_t *BurstBuffer, uint32_t BurstLength)
mbed_official 610:813dcc80987e 3528 {
mbed_official 610:813dcc80987e 3529 /* Check the parameters */
mbed_official 610:813dcc80987e 3530 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3531 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 610:813dcc80987e 3532 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 610:813dcc80987e 3533 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 610:813dcc80987e 3534
mbed_official 610:813dcc80987e 3535 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 610:813dcc80987e 3536 {
mbed_official 610:813dcc80987e 3537 return HAL_BUSY;
mbed_official 610:813dcc80987e 3538 }
mbed_official 610:813dcc80987e 3539 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 610:813dcc80987e 3540 {
mbed_official 610:813dcc80987e 3541 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 610:813dcc80987e 3542 {
mbed_official 610:813dcc80987e 3543 return HAL_ERROR;
mbed_official 610:813dcc80987e 3544 }
mbed_official 610:813dcc80987e 3545 else
mbed_official 610:813dcc80987e 3546 {
mbed_official 610:813dcc80987e 3547 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3548 }
mbed_official 610:813dcc80987e 3549 }
mbed_official 610:813dcc80987e 3550 switch(BurstRequestSrc)
mbed_official 610:813dcc80987e 3551 {
mbed_official 610:813dcc80987e 3552 case TIM_DMA_UPDATE:
mbed_official 610:813dcc80987e 3553 {
mbed_official 610:813dcc80987e 3554 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3555 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 610:813dcc80987e 3556
mbed_official 610:813dcc80987e 3557 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3558 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3559
mbed_official 610:813dcc80987e 3560 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3561 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3562 }
mbed_official 610:813dcc80987e 3563 break;
mbed_official 610:813dcc80987e 3564 case TIM_DMA_CC1:
mbed_official 610:813dcc80987e 3565 {
mbed_official 610:813dcc80987e 3566 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3567 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 3568
mbed_official 610:813dcc80987e 3569 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3570 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3571
mbed_official 610:813dcc80987e 3572 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3573 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3574 }
mbed_official 610:813dcc80987e 3575 break;
mbed_official 610:813dcc80987e 3576 case TIM_DMA_CC2:
mbed_official 610:813dcc80987e 3577 {
mbed_official 610:813dcc80987e 3578 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3579 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 3580
mbed_official 610:813dcc80987e 3581 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3582 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3583
mbed_official 610:813dcc80987e 3584 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3585 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3586 }
mbed_official 610:813dcc80987e 3587 break;
mbed_official 610:813dcc80987e 3588 case TIM_DMA_CC3:
mbed_official 610:813dcc80987e 3589 {
mbed_official 610:813dcc80987e 3590 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3591 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 3592
mbed_official 610:813dcc80987e 3593 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3594 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3595
mbed_official 610:813dcc80987e 3596 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3597 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3598 }
mbed_official 610:813dcc80987e 3599 break;
mbed_official 610:813dcc80987e 3600 case TIM_DMA_CC4:
mbed_official 610:813dcc80987e 3601 {
mbed_official 610:813dcc80987e 3602 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3603 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
mbed_official 610:813dcc80987e 3604
mbed_official 610:813dcc80987e 3605 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3606 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3607
mbed_official 610:813dcc80987e 3608 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3609 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3610 }
mbed_official 610:813dcc80987e 3611 break;
mbed_official 610:813dcc80987e 3612 case TIM_DMA_COM:
mbed_official 610:813dcc80987e 3613 {
mbed_official 610:813dcc80987e 3614 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3615 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
mbed_official 610:813dcc80987e 3616
mbed_official 610:813dcc80987e 3617 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3618 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3619
mbed_official 610:813dcc80987e 3620 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3621 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3622 }
mbed_official 610:813dcc80987e 3623 break;
mbed_official 610:813dcc80987e 3624 case TIM_DMA_TRIGGER:
mbed_official 610:813dcc80987e 3625 {
mbed_official 610:813dcc80987e 3626 /* Set the DMA Period elapsed callback */
mbed_official 610:813dcc80987e 3627 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 610:813dcc80987e 3628
mbed_official 610:813dcc80987e 3629 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 3630 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
mbed_official 610:813dcc80987e 3631
mbed_official 610:813dcc80987e 3632 /* Enable the DMA channel */
mbed_official 610:813dcc80987e 3633 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 610:813dcc80987e 3634 }
mbed_official 610:813dcc80987e 3635 break;
mbed_official 610:813dcc80987e 3636 default:
mbed_official 610:813dcc80987e 3637 break;
mbed_official 610:813dcc80987e 3638 }
mbed_official 610:813dcc80987e 3639
mbed_official 610:813dcc80987e 3640 /* configure the DMA Burst Mode */
mbed_official 610:813dcc80987e 3641 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 610:813dcc80987e 3642
mbed_official 610:813dcc80987e 3643 /* Enable the TIM DMA Request */
mbed_official 610:813dcc80987e 3644 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 610:813dcc80987e 3645
mbed_official 610:813dcc80987e 3646 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3647
mbed_official 610:813dcc80987e 3648 /* Return function status */
mbed_official 610:813dcc80987e 3649 return HAL_OK;
mbed_official 610:813dcc80987e 3650 }
mbed_official 610:813dcc80987e 3651
mbed_official 610:813dcc80987e 3652 /**
mbed_official 610:813dcc80987e 3653 * @brief Stop the DMA burst reading
mbed_official 610:813dcc80987e 3654 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3655 * @param BurstRequestSrc: TIM DMA Request sources to disable.
mbed_official 610:813dcc80987e 3656 * @retval HAL status
mbed_official 610:813dcc80987e 3657 */
mbed_official 610:813dcc80987e 3658 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 610:813dcc80987e 3659 {
mbed_official 610:813dcc80987e 3660 /* Check the parameters */
mbed_official 610:813dcc80987e 3661 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 610:813dcc80987e 3662
mbed_official 610:813dcc80987e 3663 /* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official 610:813dcc80987e 3664 switch(BurstRequestSrc)
mbed_official 610:813dcc80987e 3665 {
mbed_official 610:813dcc80987e 3666 case TIM_DMA_UPDATE:
mbed_official 610:813dcc80987e 3667 {
mbed_official 610:813dcc80987e 3668 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official 610:813dcc80987e 3669 }
mbed_official 610:813dcc80987e 3670 break;
mbed_official 610:813dcc80987e 3671 case TIM_DMA_CC1:
mbed_official 610:813dcc80987e 3672 {
mbed_official 610:813dcc80987e 3673 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official 610:813dcc80987e 3674 }
mbed_official 610:813dcc80987e 3675 break;
mbed_official 610:813dcc80987e 3676 case TIM_DMA_CC2:
mbed_official 610:813dcc80987e 3677 {
mbed_official 610:813dcc80987e 3678 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official 610:813dcc80987e 3679 }
mbed_official 610:813dcc80987e 3680 break;
mbed_official 610:813dcc80987e 3681 case TIM_DMA_CC3:
mbed_official 610:813dcc80987e 3682 {
mbed_official 610:813dcc80987e 3683 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official 610:813dcc80987e 3684 }
mbed_official 610:813dcc80987e 3685 break;
mbed_official 610:813dcc80987e 3686 case TIM_DMA_CC4:
mbed_official 610:813dcc80987e 3687 {
mbed_official 610:813dcc80987e 3688 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official 610:813dcc80987e 3689 }
mbed_official 610:813dcc80987e 3690 break;
mbed_official 610:813dcc80987e 3691 case TIM_DMA_COM:
mbed_official 610:813dcc80987e 3692 {
mbed_official 610:813dcc80987e 3693 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official 610:813dcc80987e 3694 }
mbed_official 610:813dcc80987e 3695 break;
mbed_official 610:813dcc80987e 3696 case TIM_DMA_TRIGGER:
mbed_official 610:813dcc80987e 3697 {
mbed_official 610:813dcc80987e 3698 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official 610:813dcc80987e 3699 }
mbed_official 610:813dcc80987e 3700 break;
mbed_official 610:813dcc80987e 3701 default:
mbed_official 610:813dcc80987e 3702 break;
mbed_official 610:813dcc80987e 3703 }
mbed_official 610:813dcc80987e 3704
mbed_official 610:813dcc80987e 3705 /* Disable the TIM Update DMA request */
mbed_official 610:813dcc80987e 3706 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 610:813dcc80987e 3707
mbed_official 610:813dcc80987e 3708 /* Return function status */
mbed_official 610:813dcc80987e 3709 return HAL_OK;
mbed_official 610:813dcc80987e 3710 }
mbed_official 610:813dcc80987e 3711
mbed_official 610:813dcc80987e 3712 /**
mbed_official 610:813dcc80987e 3713 * @brief Generate a software event
mbed_official 610:813dcc80987e 3714 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3715 * @param EventSource: specifies the event source.
mbed_official 610:813dcc80987e 3716 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 3717 * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source
mbed_official 610:813dcc80987e 3718 * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
mbed_official 610:813dcc80987e 3719 * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source
mbed_official 610:813dcc80987e 3720 * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source
mbed_official 610:813dcc80987e 3721 * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source
mbed_official 610:813dcc80987e 3722 * @arg TIM_EVENTSOURCE_COM: Timer COM event source
mbed_official 610:813dcc80987e 3723 * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source
mbed_official 610:813dcc80987e 3724 * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source
mbed_official 610:813dcc80987e 3725 * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source
mbed_official 610:813dcc80987e 3726 * @retval None
mbed_official 610:813dcc80987e 3727 */
mbed_official 610:813dcc80987e 3728
mbed_official 610:813dcc80987e 3729 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
mbed_official 610:813dcc80987e 3730 {
mbed_official 610:813dcc80987e 3731 /* Check the parameters */
mbed_official 610:813dcc80987e 3732 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3733 assert_param(IS_TIM_EVENT_SOURCE(EventSource));
mbed_official 610:813dcc80987e 3734
mbed_official 610:813dcc80987e 3735 /* Process Locked */
mbed_official 610:813dcc80987e 3736 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 3737
mbed_official 610:813dcc80987e 3738 /* Change the TIM state */
mbed_official 610:813dcc80987e 3739 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3740
mbed_official 610:813dcc80987e 3741 /* Set the event sources */
mbed_official 610:813dcc80987e 3742 htim->Instance->EGR = EventSource;
mbed_official 610:813dcc80987e 3743
mbed_official 610:813dcc80987e 3744 /* Change the TIM state */
mbed_official 610:813dcc80987e 3745 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3746
mbed_official 610:813dcc80987e 3747 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 3748
mbed_official 610:813dcc80987e 3749 /* Return function status */
mbed_official 610:813dcc80987e 3750 return HAL_OK;
mbed_official 610:813dcc80987e 3751 }
mbed_official 610:813dcc80987e 3752
mbed_official 610:813dcc80987e 3753 /**
mbed_official 610:813dcc80987e 3754 * @brief Configures the OCRef clear feature
mbed_official 610:813dcc80987e 3755 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3756 * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official 610:813dcc80987e 3757 * contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official 610:813dcc80987e 3758 * @param Channel: specifies the TIM Channel
mbed_official 610:813dcc80987e 3759 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 3760 * @arg TIM_CHANNEL_1: TIM Channel 1
mbed_official 610:813dcc80987e 3761 * @arg TIM_CHANNEL_2: TIM Channel 2
mbed_official 610:813dcc80987e 3762 * @arg TIM_CHANNEL_3: TIM Channel 3
mbed_official 610:813dcc80987e 3763 * @arg TIM_CHANNEL_4: TIM Channel 4
mbed_official 610:813dcc80987e 3764 * @retval HAL status
mbed_official 610:813dcc80987e 3765 */
mbed_official 610:813dcc80987e 3766 __weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel)
mbed_official 610:813dcc80987e 3767 {
mbed_official 610:813dcc80987e 3768 /* Check the parameters */
mbed_official 610:813dcc80987e 3769 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3770 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 3771 assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official 610:813dcc80987e 3772
mbed_official 610:813dcc80987e 3773 /* Process Locked */
mbed_official 610:813dcc80987e 3774 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 3775
mbed_official 610:813dcc80987e 3776 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3777
mbed_official 610:813dcc80987e 3778 if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
mbed_official 610:813dcc80987e 3779 {
mbed_official 610:813dcc80987e 3780 /* Check the parameters */
mbed_official 610:813dcc80987e 3781 assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official 610:813dcc80987e 3782 assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official 610:813dcc80987e 3783 assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official 610:813dcc80987e 3784
mbed_official 610:813dcc80987e 3785 TIM_ETR_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3786 sClearInputConfig->ClearInputPrescaler,
mbed_official 610:813dcc80987e 3787 sClearInputConfig->ClearInputPolarity,
mbed_official 610:813dcc80987e 3788 sClearInputConfig->ClearInputFilter);
mbed_official 610:813dcc80987e 3789 }
mbed_official 610:813dcc80987e 3790
mbed_official 610:813dcc80987e 3791 switch (Channel)
mbed_official 610:813dcc80987e 3792 {
mbed_official 610:813dcc80987e 3793 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 3794 {
mbed_official 610:813dcc80987e 3795 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 3796 {
mbed_official 610:813dcc80987e 3797 /* Enable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 3798 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
mbed_official 610:813dcc80987e 3799 }
mbed_official 610:813dcc80987e 3800 else
mbed_official 610:813dcc80987e 3801 {
mbed_official 610:813dcc80987e 3802 /* Disable the OCREF clear feature for Channel 1 */
mbed_official 610:813dcc80987e 3803 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official 610:813dcc80987e 3804 }
mbed_official 610:813dcc80987e 3805 }
mbed_official 610:813dcc80987e 3806 break;
mbed_official 610:813dcc80987e 3807 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 3808 {
mbed_official 610:813dcc80987e 3809 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3810 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 3811 {
mbed_official 610:813dcc80987e 3812 /* Enable the OCREF clear feature for Channel 2 */
mbed_official 610:813dcc80987e 3813 htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
mbed_official 610:813dcc80987e 3814 }
mbed_official 610:813dcc80987e 3815 else
mbed_official 610:813dcc80987e 3816 {
mbed_official 610:813dcc80987e 3817 /* Disable the OCREF clear feature for Channel 2 */
mbed_official 610:813dcc80987e 3818 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official 610:813dcc80987e 3819 }
mbed_official 610:813dcc80987e 3820 }
mbed_official 610:813dcc80987e 3821 break;
mbed_official 610:813dcc80987e 3822 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 3823 {
mbed_official 610:813dcc80987e 3824 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3825 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 3826 {
mbed_official 610:813dcc80987e 3827 /* Enable the OCREF clear feature for Channel 3 */
mbed_official 610:813dcc80987e 3828 htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
mbed_official 610:813dcc80987e 3829 }
mbed_official 610:813dcc80987e 3830 else
mbed_official 610:813dcc80987e 3831 {
mbed_official 610:813dcc80987e 3832 /* Disable the OCREF clear feature for Channel 3 */
mbed_official 610:813dcc80987e 3833 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official 610:813dcc80987e 3834 }
mbed_official 610:813dcc80987e 3835 }
mbed_official 610:813dcc80987e 3836 break;
mbed_official 610:813dcc80987e 3837 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 3838 {
mbed_official 610:813dcc80987e 3839 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3840 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 610:813dcc80987e 3841 {
mbed_official 610:813dcc80987e 3842 /* Enable the OCREF clear feature for Channel 4 */
mbed_official 610:813dcc80987e 3843 htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
mbed_official 610:813dcc80987e 3844 }
mbed_official 610:813dcc80987e 3845 else
mbed_official 610:813dcc80987e 3846 {
mbed_official 610:813dcc80987e 3847 /* Disable the OCREF clear feature for Channel 4 */
mbed_official 610:813dcc80987e 3848 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official 610:813dcc80987e 3849 }
mbed_official 610:813dcc80987e 3850 }
mbed_official 610:813dcc80987e 3851 break;
mbed_official 610:813dcc80987e 3852 default:
mbed_official 610:813dcc80987e 3853 break;
mbed_official 610:813dcc80987e 3854 }
mbed_official 610:813dcc80987e 3855
mbed_official 610:813dcc80987e 3856 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 3857
mbed_official 610:813dcc80987e 3858 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 3859
mbed_official 610:813dcc80987e 3860 return HAL_OK;
mbed_official 610:813dcc80987e 3861 }
mbed_official 610:813dcc80987e 3862
mbed_official 610:813dcc80987e 3863 /**
mbed_official 610:813dcc80987e 3864 * @brief Configures the clock source to be used
mbed_official 610:813dcc80987e 3865 * @param htim: TIM handle
mbed_official 610:813dcc80987e 3866 * @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
mbed_official 610:813dcc80987e 3867 * contains the clock source information for the TIM peripheral.
mbed_official 610:813dcc80987e 3868 * @retval HAL status
mbed_official 610:813dcc80987e 3869 */
mbed_official 610:813dcc80987e 3870 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig)
mbed_official 610:813dcc80987e 3871 {
mbed_official 610:813dcc80987e 3872 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 3873
mbed_official 610:813dcc80987e 3874 /* Process Locked */
mbed_official 610:813dcc80987e 3875 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 3876
mbed_official 610:813dcc80987e 3877 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 3878
mbed_official 610:813dcc80987e 3879 /* Check the parameters */
mbed_official 610:813dcc80987e 3880 assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
mbed_official 610:813dcc80987e 3881 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
mbed_official 610:813dcc80987e 3882 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
mbed_official 610:813dcc80987e 3883 assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
mbed_official 610:813dcc80987e 3884
mbed_official 610:813dcc80987e 3885 /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
mbed_official 610:813dcc80987e 3886 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 3887 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 610:813dcc80987e 3888 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 610:813dcc80987e 3889 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 3890
mbed_official 610:813dcc80987e 3891 switch (sClockSourceConfig->ClockSource)
mbed_official 610:813dcc80987e 3892 {
mbed_official 610:813dcc80987e 3893 case TIM_CLOCKSOURCE_INTERNAL:
mbed_official 610:813dcc80987e 3894 {
mbed_official 610:813dcc80987e 3895 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3896 /* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official 610:813dcc80987e 3897 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 3898 }
mbed_official 610:813dcc80987e 3899 break;
mbed_official 610:813dcc80987e 3900
mbed_official 610:813dcc80987e 3901 case TIM_CLOCKSOURCE_ETRMODE1:
mbed_official 610:813dcc80987e 3902 {
mbed_official 610:813dcc80987e 3903 /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
mbed_official 610:813dcc80987e 3904 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3905
mbed_official 610:813dcc80987e 3906 /* Configure the ETR Clock source */
mbed_official 610:813dcc80987e 3907 TIM_ETR_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3908 sClockSourceConfig->ClockPrescaler,
mbed_official 610:813dcc80987e 3909 sClockSourceConfig->ClockPolarity,
mbed_official 610:813dcc80987e 3910 sClockSourceConfig->ClockFilter);
mbed_official 610:813dcc80987e 3911 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 3912 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 3913 /* Reset the SMS and TS Bits */
mbed_official 610:813dcc80987e 3914 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 610:813dcc80987e 3915 /* Select the External clock mode1 and the ETRF trigger */
mbed_official 610:813dcc80987e 3916 tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
mbed_official 610:813dcc80987e 3917 /* Write to TIMx SMCR */
mbed_official 610:813dcc80987e 3918 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 3919 }
mbed_official 610:813dcc80987e 3920 break;
mbed_official 610:813dcc80987e 3921
mbed_official 610:813dcc80987e 3922 case TIM_CLOCKSOURCE_ETRMODE2:
mbed_official 610:813dcc80987e 3923 {
mbed_official 610:813dcc80987e 3924 /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
mbed_official 610:813dcc80987e 3925 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3926
mbed_official 610:813dcc80987e 3927 /* Configure the ETR Clock source */
mbed_official 610:813dcc80987e 3928 TIM_ETR_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 3929 sClockSourceConfig->ClockPrescaler,
mbed_official 610:813dcc80987e 3930 sClockSourceConfig->ClockPolarity,
mbed_official 610:813dcc80987e 3931 sClockSourceConfig->ClockFilter);
mbed_official 610:813dcc80987e 3932 /* Enable the External clock mode2 */
mbed_official 610:813dcc80987e 3933 htim->Instance->SMCR |= TIM_SMCR_ECE;
mbed_official 610:813dcc80987e 3934 }
mbed_official 610:813dcc80987e 3935 break;
mbed_official 610:813dcc80987e 3936
mbed_official 610:813dcc80987e 3937 case TIM_CLOCKSOURCE_TI1:
mbed_official 610:813dcc80987e 3938 {
mbed_official 610:813dcc80987e 3939 /* Check whether or not the timer instance supports external clock mode 1 */
mbed_official 610:813dcc80987e 3940 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3941
mbed_official 610:813dcc80987e 3942 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 610:813dcc80987e 3943 sClockSourceConfig->ClockPolarity,
mbed_official 610:813dcc80987e 3944 sClockSourceConfig->ClockFilter);
mbed_official 610:813dcc80987e 3945 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
mbed_official 610:813dcc80987e 3946 }
mbed_official 610:813dcc80987e 3947 break;
mbed_official 610:813dcc80987e 3948
mbed_official 610:813dcc80987e 3949 case TIM_CLOCKSOURCE_TI2:
mbed_official 610:813dcc80987e 3950 {
mbed_official 610:813dcc80987e 3951 /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
mbed_official 610:813dcc80987e 3952 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3953
mbed_official 610:813dcc80987e 3954 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 610:813dcc80987e 3955 sClockSourceConfig->ClockPolarity,
mbed_official 610:813dcc80987e 3956 sClockSourceConfig->ClockFilter);
mbed_official 610:813dcc80987e 3957 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
mbed_official 610:813dcc80987e 3958 }
mbed_official 610:813dcc80987e 3959 break;
mbed_official 610:813dcc80987e 3960
mbed_official 610:813dcc80987e 3961 case TIM_CLOCKSOURCE_TI1ED:
mbed_official 610:813dcc80987e 3962 {
mbed_official 610:813dcc80987e 3963 /* Check whether or not the timer instance supports external clock mode 1 */
mbed_official 610:813dcc80987e 3964 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3965
mbed_official 610:813dcc80987e 3966 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 610:813dcc80987e 3967 sClockSourceConfig->ClockPolarity,
mbed_official 610:813dcc80987e 3968 sClockSourceConfig->ClockFilter);
mbed_official 610:813dcc80987e 3969 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
mbed_official 610:813dcc80987e 3970 }
mbed_official 610:813dcc80987e 3971 break;
mbed_official 610:813dcc80987e 3972
mbed_official 610:813dcc80987e 3973 case TIM_CLOCKSOURCE_ITR0:
mbed_official 610:813dcc80987e 3974 {
mbed_official 610:813dcc80987e 3975 /* Check whether or not the timer instance supports internal trigger input */
mbed_official 610:813dcc80987e 3976 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3977
mbed_official 610:813dcc80987e 3978 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
mbed_official 610:813dcc80987e 3979 }
mbed_official 610:813dcc80987e 3980 break;
mbed_official 610:813dcc80987e 3981
mbed_official 610:813dcc80987e 3982 case TIM_CLOCKSOURCE_ITR1:
mbed_official 610:813dcc80987e 3983 {
mbed_official 610:813dcc80987e 3984 /* Check whether or not the timer instance supports internal trigger input */
mbed_official 610:813dcc80987e 3985 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3986
mbed_official 610:813dcc80987e 3987 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
mbed_official 610:813dcc80987e 3988 }
mbed_official 610:813dcc80987e 3989 break;
mbed_official 610:813dcc80987e 3990
mbed_official 610:813dcc80987e 3991 case TIM_CLOCKSOURCE_ITR2:
mbed_official 610:813dcc80987e 3992 {
mbed_official 610:813dcc80987e 3993 /* Check whether or not the timer instance supports internal trigger input */
mbed_official 610:813dcc80987e 3994 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 3995
mbed_official 610:813dcc80987e 3996 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
mbed_official 610:813dcc80987e 3997 }
mbed_official 610:813dcc80987e 3998 break;
mbed_official 610:813dcc80987e 3999
mbed_official 610:813dcc80987e 4000 case TIM_CLOCKSOURCE_ITR3:
mbed_official 610:813dcc80987e 4001 {
mbed_official 610:813dcc80987e 4002 /* Check whether or not the timer instance supports internal trigger input */
mbed_official 610:813dcc80987e 4003 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4004
mbed_official 610:813dcc80987e 4005 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
mbed_official 610:813dcc80987e 4006 }
mbed_official 610:813dcc80987e 4007 break;
mbed_official 610:813dcc80987e 4008
mbed_official 610:813dcc80987e 4009 default:
mbed_official 610:813dcc80987e 4010 break;
mbed_official 610:813dcc80987e 4011 }
mbed_official 610:813dcc80987e 4012 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4013
mbed_official 610:813dcc80987e 4014 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 4015
mbed_official 610:813dcc80987e 4016 return HAL_OK;
mbed_official 610:813dcc80987e 4017 }
mbed_official 610:813dcc80987e 4018
mbed_official 610:813dcc80987e 4019 /**
mbed_official 610:813dcc80987e 4020 * @brief Selects the signal connected to the TI1 input: direct from CH1_input
mbed_official 610:813dcc80987e 4021 * or a XOR combination between CH1_input, CH2_input & CH3_input
mbed_official 610:813dcc80987e 4022 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 4023 * @param TI1_Selection: Indicate whether or not channel 1 is connected to the
mbed_official 610:813dcc80987e 4024 * output of a XOR gate.
mbed_official 610:813dcc80987e 4025 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 4026 * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
mbed_official 610:813dcc80987e 4027 * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
mbed_official 610:813dcc80987e 4028 * pins are connected to the TI1 input (XOR combination)
mbed_official 610:813dcc80987e 4029 * @retval HAL status
mbed_official 610:813dcc80987e 4030 */
mbed_official 610:813dcc80987e 4031 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
mbed_official 610:813dcc80987e 4032 {
mbed_official 610:813dcc80987e 4033 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 4034
mbed_official 610:813dcc80987e 4035 /* Check the parameters */
mbed_official 610:813dcc80987e 4036 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4037 assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
mbed_official 610:813dcc80987e 4038
mbed_official 610:813dcc80987e 4039 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 4040 tmpcr2 = htim->Instance->CR2;
mbed_official 610:813dcc80987e 4041
mbed_official 610:813dcc80987e 4042 /* Reset the TI1 selection */
mbed_official 610:813dcc80987e 4043 tmpcr2 &= ~TIM_CR2_TI1S;
mbed_official 610:813dcc80987e 4044
mbed_official 610:813dcc80987e 4045 /* Set the TI1 selection */
mbed_official 610:813dcc80987e 4046 tmpcr2 |= TI1_Selection;
mbed_official 610:813dcc80987e 4047
mbed_official 610:813dcc80987e 4048 /* Write to TIMxCR2 */
mbed_official 610:813dcc80987e 4049 htim->Instance->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 4050
mbed_official 610:813dcc80987e 4051 return HAL_OK;
mbed_official 610:813dcc80987e 4052 }
mbed_official 610:813dcc80987e 4053
mbed_official 610:813dcc80987e 4054 /**
mbed_official 610:813dcc80987e 4055 * @brief Configures the TIM in Slave mode
mbed_official 610:813dcc80987e 4056 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 4057 * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official 610:813dcc80987e 4058 * contains the selected trigger (internal trigger input, filtered
mbed_official 610:813dcc80987e 4059 * timer input or external trigger input) and the ) and the Slave
mbed_official 610:813dcc80987e 4060 * mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official 610:813dcc80987e 4061 * @retval HAL status
mbed_official 610:813dcc80987e 4062 */
mbed_official 610:813dcc80987e 4063 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 610:813dcc80987e 4064 {
mbed_official 610:813dcc80987e 4065 /* Check the parameters */
mbed_official 610:813dcc80987e 4066 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4067 assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official 610:813dcc80987e 4068 assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official 610:813dcc80987e 4069
mbed_official 610:813dcc80987e 4070 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 4071
mbed_official 610:813dcc80987e 4072 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 4073
mbed_official 610:813dcc80987e 4074 TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
mbed_official 610:813dcc80987e 4075
mbed_official 610:813dcc80987e 4076 /* Disable Trigger Interrupt */
mbed_official 610:813dcc80987e 4077 __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
mbed_official 610:813dcc80987e 4078
mbed_official 610:813dcc80987e 4079 /* Disable Trigger DMA request */
mbed_official 610:813dcc80987e 4080 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
mbed_official 610:813dcc80987e 4081
mbed_official 610:813dcc80987e 4082 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4083
mbed_official 610:813dcc80987e 4084 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 4085
mbed_official 610:813dcc80987e 4086 return HAL_OK;
mbed_official 610:813dcc80987e 4087 }
mbed_official 610:813dcc80987e 4088
mbed_official 610:813dcc80987e 4089 /**
mbed_official 610:813dcc80987e 4090 * @brief Configures the TIM in Slave mode in interrupt mode
mbed_official 610:813dcc80987e 4091 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 4092 * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official 610:813dcc80987e 4093 * contains the selected trigger (internal trigger input, filtered
mbed_official 610:813dcc80987e 4094 * timer input or external trigger input) and the ) and the Slave
mbed_official 610:813dcc80987e 4095 * mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official 610:813dcc80987e 4096 * @retval HAL status
mbed_official 610:813dcc80987e 4097 */
mbed_official 610:813dcc80987e 4098 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 4099 TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 610:813dcc80987e 4100 {
mbed_official 610:813dcc80987e 4101 /* Check the parameters */
mbed_official 610:813dcc80987e 4102 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4103 assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official 610:813dcc80987e 4104 assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official 610:813dcc80987e 4105
mbed_official 610:813dcc80987e 4106 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 4107
mbed_official 610:813dcc80987e 4108 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 610:813dcc80987e 4109
mbed_official 610:813dcc80987e 4110 TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
mbed_official 610:813dcc80987e 4111
mbed_official 610:813dcc80987e 4112 /* Enable Trigger Interrupt */
mbed_official 610:813dcc80987e 4113 __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
mbed_official 610:813dcc80987e 4114
mbed_official 610:813dcc80987e 4115 /* Disable Trigger DMA request */
mbed_official 610:813dcc80987e 4116 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
mbed_official 610:813dcc80987e 4117
mbed_official 610:813dcc80987e 4118 htim->State = HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4119
mbed_official 610:813dcc80987e 4120 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 4121
mbed_official 610:813dcc80987e 4122 return HAL_OK;
mbed_official 610:813dcc80987e 4123 }
mbed_official 610:813dcc80987e 4124
mbed_official 610:813dcc80987e 4125 /**
mbed_official 610:813dcc80987e 4126 * @brief Read the captured value from Capture Compare unit
mbed_official 610:813dcc80987e 4127 * @param htim: TIM handle.
mbed_official 610:813dcc80987e 4128 * @param Channel : TIM Channels to be enabled
mbed_official 610:813dcc80987e 4129 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 4130 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 610:813dcc80987e 4131 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 610:813dcc80987e 4132 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 610:813dcc80987e 4133 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 610:813dcc80987e 4134 * @retval Captured value
mbed_official 610:813dcc80987e 4135 */
mbed_official 610:813dcc80987e 4136 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 610:813dcc80987e 4137 {
mbed_official 610:813dcc80987e 4138 uint32_t tmpreg = 0;
mbed_official 610:813dcc80987e 4139
mbed_official 610:813dcc80987e 4140 __HAL_LOCK(htim);
mbed_official 610:813dcc80987e 4141
mbed_official 610:813dcc80987e 4142 switch (Channel)
mbed_official 610:813dcc80987e 4143 {
mbed_official 610:813dcc80987e 4144 case TIM_CHANNEL_1:
mbed_official 610:813dcc80987e 4145 {
mbed_official 610:813dcc80987e 4146 /* Check the parameters */
mbed_official 610:813dcc80987e 4147 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4148
mbed_official 610:813dcc80987e 4149 /* Return the capture 1 value */
mbed_official 610:813dcc80987e 4150 tmpreg = htim->Instance->CCR1;
mbed_official 610:813dcc80987e 4151
mbed_official 610:813dcc80987e 4152 break;
mbed_official 610:813dcc80987e 4153 }
mbed_official 610:813dcc80987e 4154 case TIM_CHANNEL_2:
mbed_official 610:813dcc80987e 4155 {
mbed_official 610:813dcc80987e 4156 /* Check the parameters */
mbed_official 610:813dcc80987e 4157 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4158
mbed_official 610:813dcc80987e 4159 /* Return the capture 2 value */
mbed_official 610:813dcc80987e 4160 tmpreg = htim->Instance->CCR2;
mbed_official 610:813dcc80987e 4161
mbed_official 610:813dcc80987e 4162 break;
mbed_official 610:813dcc80987e 4163 }
mbed_official 610:813dcc80987e 4164
mbed_official 610:813dcc80987e 4165 case TIM_CHANNEL_3:
mbed_official 610:813dcc80987e 4166 {
mbed_official 610:813dcc80987e 4167 /* Check the parameters */
mbed_official 610:813dcc80987e 4168 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4169
mbed_official 610:813dcc80987e 4170 /* Return the capture 3 value */
mbed_official 610:813dcc80987e 4171 tmpreg = htim->Instance->CCR3;
mbed_official 610:813dcc80987e 4172
mbed_official 610:813dcc80987e 4173 break;
mbed_official 610:813dcc80987e 4174 }
mbed_official 610:813dcc80987e 4175
mbed_official 610:813dcc80987e 4176 case TIM_CHANNEL_4:
mbed_official 610:813dcc80987e 4177 {
mbed_official 610:813dcc80987e 4178 /* Check the parameters */
mbed_official 610:813dcc80987e 4179 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4180
mbed_official 610:813dcc80987e 4181 /* Return the capture 4 value */
mbed_official 610:813dcc80987e 4182 tmpreg = htim->Instance->CCR4;
mbed_official 610:813dcc80987e 4183
mbed_official 610:813dcc80987e 4184 break;
mbed_official 610:813dcc80987e 4185 }
mbed_official 610:813dcc80987e 4186
mbed_official 610:813dcc80987e 4187 default:
mbed_official 610:813dcc80987e 4188 break;
mbed_official 610:813dcc80987e 4189 }
mbed_official 610:813dcc80987e 4190
mbed_official 610:813dcc80987e 4191 __HAL_UNLOCK(htim);
mbed_official 610:813dcc80987e 4192 return tmpreg;
mbed_official 610:813dcc80987e 4193 }
mbed_official 610:813dcc80987e 4194
mbed_official 610:813dcc80987e 4195 /**
mbed_official 610:813dcc80987e 4196 * @}
mbed_official 610:813dcc80987e 4197 */
mbed_official 610:813dcc80987e 4198
mbed_official 610:813dcc80987e 4199 /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
mbed_official 610:813dcc80987e 4200 * @brief TIM Callbacks functions
mbed_official 610:813dcc80987e 4201 *
mbed_official 610:813dcc80987e 4202 @verbatim
mbed_official 610:813dcc80987e 4203 ==============================================================================
mbed_official 610:813dcc80987e 4204 ##### TIM Callbacks functions #####
mbed_official 610:813dcc80987e 4205 ==============================================================================
mbed_official 610:813dcc80987e 4206 [..]
mbed_official 610:813dcc80987e 4207 This section provides TIM callback functions:
mbed_official 610:813dcc80987e 4208 (+) Timer Period elapsed callback
mbed_official 610:813dcc80987e 4209 (+) Timer Output Compare callback
mbed_official 610:813dcc80987e 4210 (+) Timer Input capture callback
mbed_official 610:813dcc80987e 4211 (+) Timer Trigger callback
mbed_official 610:813dcc80987e 4212 (+) Timer Error callback
mbed_official 610:813dcc80987e 4213
mbed_official 610:813dcc80987e 4214 @endverbatim
mbed_official 610:813dcc80987e 4215 * @{
mbed_official 610:813dcc80987e 4216 */
mbed_official 610:813dcc80987e 4217
mbed_official 610:813dcc80987e 4218 /**
mbed_official 610:813dcc80987e 4219 * @brief Period elapsed callback in non-blocking mode
mbed_official 610:813dcc80987e 4220 * @param htim : TIM handle
mbed_official 610:813dcc80987e 4221 * @retval None
mbed_official 610:813dcc80987e 4222 */
mbed_official 610:813dcc80987e 4223 __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4224 {
mbed_official 610:813dcc80987e 4225 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4226 the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4227 */
mbed_official 610:813dcc80987e 4228
mbed_official 610:813dcc80987e 4229 }
mbed_official 610:813dcc80987e 4230 /**
mbed_official 610:813dcc80987e 4231 * @brief Output Compare callback in non-blocking mode
mbed_official 610:813dcc80987e 4232 * @param htim : TIM OC handle
mbed_official 610:813dcc80987e 4233 * @retval None
mbed_official 610:813dcc80987e 4234 */
mbed_official 610:813dcc80987e 4235 __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4236 {
mbed_official 610:813dcc80987e 4237 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4238 the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4239 */
mbed_official 610:813dcc80987e 4240 }
mbed_official 610:813dcc80987e 4241 /**
mbed_official 610:813dcc80987e 4242 * @brief Input Capture callback in non-blocking mode
mbed_official 610:813dcc80987e 4243 * @param htim : TIM IC handle
mbed_official 610:813dcc80987e 4244 * @retval None
mbed_official 610:813dcc80987e 4245 */
mbed_official 610:813dcc80987e 4246 __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4247 {
mbed_official 610:813dcc80987e 4248 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4249 the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4250 */
mbed_official 610:813dcc80987e 4251 }
mbed_official 610:813dcc80987e 4252
mbed_official 610:813dcc80987e 4253 /**
mbed_official 610:813dcc80987e 4254 * @brief PWM Pulse finished callback in non-blocking mode
mbed_official 610:813dcc80987e 4255 * @param htim : TIM handle
mbed_official 610:813dcc80987e 4256 * @retval None
mbed_official 610:813dcc80987e 4257 */
mbed_official 610:813dcc80987e 4258 __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4259 {
mbed_official 610:813dcc80987e 4260 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4261 the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4262 */
mbed_official 610:813dcc80987e 4263 }
mbed_official 610:813dcc80987e 4264
mbed_official 610:813dcc80987e 4265 /**
mbed_official 610:813dcc80987e 4266 * @brief Hall Trigger detection callback in non-blocking mode
mbed_official 610:813dcc80987e 4267 * @param htim : TIM handle
mbed_official 610:813dcc80987e 4268 * @retval None
mbed_official 610:813dcc80987e 4269 */
mbed_official 610:813dcc80987e 4270 __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4271 {
mbed_official 610:813dcc80987e 4272 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4273 the HAL_TIM_TriggerCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4274 */
mbed_official 610:813dcc80987e 4275 }
mbed_official 610:813dcc80987e 4276
mbed_official 610:813dcc80987e 4277 /**
mbed_official 610:813dcc80987e 4278 * @brief Timer error callback in non-blocking mode
mbed_official 610:813dcc80987e 4279 * @param htim : TIM handle
mbed_official 610:813dcc80987e 4280 * @retval None
mbed_official 610:813dcc80987e 4281 */
mbed_official 610:813dcc80987e 4282 __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4283 {
mbed_official 610:813dcc80987e 4284 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 4285 the HAL_TIM_ErrorCallback could be implemented in the user file
mbed_official 610:813dcc80987e 4286 */
mbed_official 610:813dcc80987e 4287 }
mbed_official 610:813dcc80987e 4288
mbed_official 610:813dcc80987e 4289 /**
mbed_official 610:813dcc80987e 4290 * @}
mbed_official 610:813dcc80987e 4291 */
mbed_official 610:813dcc80987e 4292
mbed_official 610:813dcc80987e 4293 /** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
mbed_official 610:813dcc80987e 4294 * @brief Peripheral State functions
mbed_official 610:813dcc80987e 4295 *
mbed_official 610:813dcc80987e 4296 @verbatim
mbed_official 610:813dcc80987e 4297 ==============================================================================
mbed_official 610:813dcc80987e 4298 ##### Peripheral State functions #####
mbed_official 610:813dcc80987e 4299 ==============================================================================
mbed_official 610:813dcc80987e 4300 [..]
mbed_official 610:813dcc80987e 4301 This subsection permits to get in run-time the status of the peripheral
mbed_official 610:813dcc80987e 4302 and the data flow.
mbed_official 610:813dcc80987e 4303
mbed_official 610:813dcc80987e 4304 @endverbatim
mbed_official 610:813dcc80987e 4305 * @{
mbed_official 610:813dcc80987e 4306 */
mbed_official 610:813dcc80987e 4307
mbed_official 610:813dcc80987e 4308 /**
mbed_official 610:813dcc80987e 4309 * @brief Return the TIM Base handle state.
mbed_official 610:813dcc80987e 4310 * @param htim: TIM Base handle
mbed_official 610:813dcc80987e 4311 * @retval HAL state
mbed_official 610:813dcc80987e 4312 */
mbed_official 610:813dcc80987e 4313 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4314 {
mbed_official 610:813dcc80987e 4315 return htim->State;
mbed_official 610:813dcc80987e 4316 }
mbed_official 610:813dcc80987e 4317
mbed_official 610:813dcc80987e 4318 /**
mbed_official 610:813dcc80987e 4319 * @brief Return the TIM OC handle state.
mbed_official 610:813dcc80987e 4320 * @param htim: TIM Ouput Compare handle
mbed_official 610:813dcc80987e 4321 * @retval HAL state
mbed_official 610:813dcc80987e 4322 */
mbed_official 610:813dcc80987e 4323 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4324 {
mbed_official 610:813dcc80987e 4325 return htim->State;
mbed_official 610:813dcc80987e 4326 }
mbed_official 610:813dcc80987e 4327
mbed_official 610:813dcc80987e 4328 /**
mbed_official 610:813dcc80987e 4329 * @brief Return the TIM PWM handle state.
mbed_official 610:813dcc80987e 4330 * @param htim: TIM handle
mbed_official 610:813dcc80987e 4331 * @retval HAL state
mbed_official 610:813dcc80987e 4332 */
mbed_official 610:813dcc80987e 4333 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4334 {
mbed_official 610:813dcc80987e 4335 return htim->State;
mbed_official 610:813dcc80987e 4336 }
mbed_official 610:813dcc80987e 4337
mbed_official 610:813dcc80987e 4338 /**
mbed_official 610:813dcc80987e 4339 * @brief Return the TIM Input Capture handle state.
mbed_official 610:813dcc80987e 4340 * @param htim: TIM IC handle
mbed_official 610:813dcc80987e 4341 * @retval HAL state
mbed_official 610:813dcc80987e 4342 */
mbed_official 610:813dcc80987e 4343 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4344 {
mbed_official 610:813dcc80987e 4345 return htim->State;
mbed_official 610:813dcc80987e 4346 }
mbed_official 610:813dcc80987e 4347
mbed_official 610:813dcc80987e 4348 /**
mbed_official 610:813dcc80987e 4349 * @brief Return the TIM One Pulse Mode handle state.
mbed_official 610:813dcc80987e 4350 * @param htim: TIM OPM handle
mbed_official 610:813dcc80987e 4351 * @retval HAL state
mbed_official 610:813dcc80987e 4352 */
mbed_official 610:813dcc80987e 4353 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4354 {
mbed_official 610:813dcc80987e 4355 return htim->State;
mbed_official 610:813dcc80987e 4356 }
mbed_official 610:813dcc80987e 4357
mbed_official 610:813dcc80987e 4358 /**
mbed_official 610:813dcc80987e 4359 * @brief Return the TIM Encoder Mode handle state.
mbed_official 610:813dcc80987e 4360 * @param htim: TIM Encoder handle
mbed_official 610:813dcc80987e 4361 * @retval HAL state
mbed_official 610:813dcc80987e 4362 */
mbed_official 610:813dcc80987e 4363 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
mbed_official 610:813dcc80987e 4364 {
mbed_official 610:813dcc80987e 4365 return htim->State;
mbed_official 610:813dcc80987e 4366 }
mbed_official 610:813dcc80987e 4367
mbed_official 610:813dcc80987e 4368 /**
mbed_official 610:813dcc80987e 4369 * @}
mbed_official 610:813dcc80987e 4370 */
mbed_official 610:813dcc80987e 4371
mbed_official 610:813dcc80987e 4372 /**
mbed_official 610:813dcc80987e 4373 * @brief TIM DMA error callback
mbed_official 610:813dcc80987e 4374 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 4375 * @retval None
mbed_official 610:813dcc80987e 4376 */
mbed_official 610:813dcc80987e 4377 void TIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 4378 {
mbed_official 610:813dcc80987e 4379 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 4380
mbed_official 610:813dcc80987e 4381 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4382
mbed_official 610:813dcc80987e 4383 HAL_TIM_ErrorCallback(htim);
mbed_official 610:813dcc80987e 4384 }
mbed_official 610:813dcc80987e 4385
mbed_official 610:813dcc80987e 4386 /**
mbed_official 610:813dcc80987e 4387 * @brief TIM DMA Delay Pulse complete callback.
mbed_official 610:813dcc80987e 4388 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 4389 * @retval None
mbed_official 610:813dcc80987e 4390 */
mbed_official 610:813dcc80987e 4391 void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 4392 {
mbed_official 610:813dcc80987e 4393 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 4394
mbed_official 610:813dcc80987e 4395 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4396
mbed_official 610:813dcc80987e 4397 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official 610:813dcc80987e 4398 {
mbed_official 610:813dcc80987e 4399 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 610:813dcc80987e 4400 }
mbed_official 610:813dcc80987e 4401 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official 610:813dcc80987e 4402 {
mbed_official 610:813dcc80987e 4403 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 610:813dcc80987e 4404 }
mbed_official 610:813dcc80987e 4405 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official 610:813dcc80987e 4406 {
mbed_official 610:813dcc80987e 4407 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 610:813dcc80987e 4408 }
mbed_official 610:813dcc80987e 4409 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official 610:813dcc80987e 4410 {
mbed_official 610:813dcc80987e 4411 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 610:813dcc80987e 4412 }
mbed_official 610:813dcc80987e 4413
mbed_official 610:813dcc80987e 4414 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 610:813dcc80987e 4415
mbed_official 610:813dcc80987e 4416 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 4417 }
mbed_official 610:813dcc80987e 4418 /**
mbed_official 610:813dcc80987e 4419 * @brief TIM DMA Capture complete callback.
mbed_official 610:813dcc80987e 4420 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 4421 * @retval None
mbed_official 610:813dcc80987e 4422 */
mbed_official 610:813dcc80987e 4423 void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 4424 {
mbed_official 610:813dcc80987e 4425 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 4426
mbed_official 610:813dcc80987e 4427 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4428
mbed_official 610:813dcc80987e 4429 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official 610:813dcc80987e 4430 {
mbed_official 610:813dcc80987e 4431 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 610:813dcc80987e 4432 }
mbed_official 610:813dcc80987e 4433 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official 610:813dcc80987e 4434 {
mbed_official 610:813dcc80987e 4435 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 610:813dcc80987e 4436 }
mbed_official 610:813dcc80987e 4437 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official 610:813dcc80987e 4438 {
mbed_official 610:813dcc80987e 4439 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 610:813dcc80987e 4440 }
mbed_official 610:813dcc80987e 4441 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official 610:813dcc80987e 4442 {
mbed_official 610:813dcc80987e 4443 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 610:813dcc80987e 4444 }
mbed_official 610:813dcc80987e 4445
mbed_official 610:813dcc80987e 4446 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 610:813dcc80987e 4447
mbed_official 610:813dcc80987e 4448 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 610:813dcc80987e 4449 }
mbed_official 610:813dcc80987e 4450
mbed_official 610:813dcc80987e 4451 /**
mbed_official 610:813dcc80987e 4452 * @brief TIM DMA Period Elapse complete callback.
mbed_official 610:813dcc80987e 4453 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 4454 * @retval None
mbed_official 610:813dcc80987e 4455 */
mbed_official 610:813dcc80987e 4456 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 4457 {
mbed_official 610:813dcc80987e 4458 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 4459
mbed_official 610:813dcc80987e 4460 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4461
mbed_official 610:813dcc80987e 4462 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 610:813dcc80987e 4463 }
mbed_official 610:813dcc80987e 4464
mbed_official 610:813dcc80987e 4465 /**
mbed_official 610:813dcc80987e 4466 * @brief TIM DMA Trigger callback.
mbed_official 610:813dcc80987e 4467 * @param hdma : pointer to DMA handle.
mbed_official 610:813dcc80987e 4468 * @retval None
mbed_official 610:813dcc80987e 4469 */
mbed_official 610:813dcc80987e 4470 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 4471 {
mbed_official 610:813dcc80987e 4472 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 4473
mbed_official 610:813dcc80987e 4474 htim->State= HAL_TIM_STATE_READY;
mbed_official 610:813dcc80987e 4475
mbed_official 610:813dcc80987e 4476 HAL_TIM_TriggerCallback(htim);
mbed_official 610:813dcc80987e 4477 }
mbed_official 610:813dcc80987e 4478
mbed_official 610:813dcc80987e 4479 /**
mbed_official 610:813dcc80987e 4480 * @brief Time Base configuration
mbed_official 610:813dcc80987e 4481 * @param TIMx: TIM peripheral
mbed_official 610:813dcc80987e 4482 * @param Structure: TIM Base configuration structure
mbed_official 610:813dcc80987e 4483 * @retval None
mbed_official 610:813dcc80987e 4484 */
mbed_official 610:813dcc80987e 4485 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
mbed_official 610:813dcc80987e 4486 {
mbed_official 610:813dcc80987e 4487 uint32_t tmpcr1 = 0;
mbed_official 610:813dcc80987e 4488 tmpcr1 = TIMx->CR1;
mbed_official 610:813dcc80987e 4489
mbed_official 610:813dcc80987e 4490 /* Set TIM Time Base Unit parameters ---------------------------------------*/
mbed_official 610:813dcc80987e 4491 if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4492 {
mbed_official 610:813dcc80987e 4493 /* Select the Counter Mode */
mbed_official 610:813dcc80987e 4494 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
mbed_official 610:813dcc80987e 4495 tmpcr1 |= Structure->CounterMode;
mbed_official 610:813dcc80987e 4496 }
mbed_official 610:813dcc80987e 4497
mbed_official 610:813dcc80987e 4498 if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4499 {
mbed_official 610:813dcc80987e 4500 /* Set the clock division */
mbed_official 610:813dcc80987e 4501 tmpcr1 &= ~TIM_CR1_CKD;
mbed_official 610:813dcc80987e 4502 tmpcr1 |= (uint32_t)Structure->ClockDivision;
mbed_official 610:813dcc80987e 4503 }
mbed_official 610:813dcc80987e 4504
mbed_official 610:813dcc80987e 4505 TIMx->CR1 = tmpcr1;
mbed_official 610:813dcc80987e 4506
mbed_official 610:813dcc80987e 4507 /* Set the Autoreload value */
mbed_official 610:813dcc80987e 4508 TIMx->ARR = (uint32_t)Structure->Period ;
mbed_official 610:813dcc80987e 4509
mbed_official 610:813dcc80987e 4510 /* Set the Prescaler value */
mbed_official 610:813dcc80987e 4511 TIMx->PSC = (uint32_t)Structure->Prescaler;
mbed_official 610:813dcc80987e 4512
mbed_official 610:813dcc80987e 4513 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4514 {
mbed_official 610:813dcc80987e 4515 /* Set the Repetition Counter value */
mbed_official 610:813dcc80987e 4516 TIMx->RCR = Structure->RepetitionCounter;
mbed_official 610:813dcc80987e 4517 }
mbed_official 610:813dcc80987e 4518
mbed_official 610:813dcc80987e 4519 /* Generate an update event to reload the Prescaler
mbed_official 610:813dcc80987e 4520 and the repetition counter(only for TIM1 and TIM8) value immediately */
mbed_official 610:813dcc80987e 4521 TIMx->EGR = TIM_EGR_UG;
mbed_official 610:813dcc80987e 4522 }
mbed_official 610:813dcc80987e 4523
mbed_official 610:813dcc80987e 4524 /**
mbed_official 610:813dcc80987e 4525 * @brief Time Ouput Compare 1 configuration
mbed_official 610:813dcc80987e 4526 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 4527 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 4528 * @retval None
mbed_official 610:813dcc80987e 4529 */
mbed_official 610:813dcc80987e 4530 void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 4531 {
mbed_official 610:813dcc80987e 4532 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 4533 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4534 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 4535
mbed_official 610:813dcc80987e 4536 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 610:813dcc80987e 4537 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 610:813dcc80987e 4538
mbed_official 610:813dcc80987e 4539 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 4540 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 4541 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 4542 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 4543
mbed_official 610:813dcc80987e 4544 /* Get the TIMx CCMR1 register value */
mbed_official 610:813dcc80987e 4545 tmpccmrx = TIMx->CCMR1;
mbed_official 610:813dcc80987e 4546
mbed_official 610:813dcc80987e 4547 /* Reset the Output Compare Mode Bits */
mbed_official 610:813dcc80987e 4548 tmpccmrx &= ~TIM_CCMR1_OC1M;
mbed_official 610:813dcc80987e 4549 tmpccmrx &= ~TIM_CCMR1_CC1S;
mbed_official 610:813dcc80987e 4550 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 4551 tmpccmrx |= OC_Config->OCMode;
mbed_official 610:813dcc80987e 4552
mbed_official 610:813dcc80987e 4553 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 4554 tmpccer &= ~TIM_CCER_CC1P;
mbed_official 610:813dcc80987e 4555 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 4556 tmpccer |= OC_Config->OCPolarity;
mbed_official 610:813dcc80987e 4557
mbed_official 610:813dcc80987e 4558 if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
mbed_official 610:813dcc80987e 4559 {
mbed_official 610:813dcc80987e 4560 /* Check parameters */
mbed_official 610:813dcc80987e 4561 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 610:813dcc80987e 4562
mbed_official 610:813dcc80987e 4563 /* Reset the Output N Polarity level */
mbed_official 610:813dcc80987e 4564 tmpccer &= ~TIM_CCER_CC1NP;
mbed_official 610:813dcc80987e 4565 /* Set the Output N Polarity */
mbed_official 610:813dcc80987e 4566 tmpccer |= OC_Config->OCNPolarity;
mbed_official 610:813dcc80987e 4567 /* Reset the Output N State */
mbed_official 610:813dcc80987e 4568 tmpccer &= ~TIM_CCER_CC1NE;
mbed_official 610:813dcc80987e 4569 }
mbed_official 610:813dcc80987e 4570
mbed_official 610:813dcc80987e 4571 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4572 {
mbed_official 610:813dcc80987e 4573 /* Check parameters */
mbed_official 610:813dcc80987e 4574 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 610:813dcc80987e 4575 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4576
mbed_official 610:813dcc80987e 4577 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 610:813dcc80987e 4578 tmpcr2 &= ~TIM_CR2_OIS1;
mbed_official 610:813dcc80987e 4579 tmpcr2 &= ~TIM_CR2_OIS1N;
mbed_official 610:813dcc80987e 4580 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 4581 tmpcr2 |= OC_Config->OCIdleState;
mbed_official 610:813dcc80987e 4582 /* Set the Output N Idle state */
mbed_official 610:813dcc80987e 4583 tmpcr2 |= OC_Config->OCNIdleState;
mbed_official 610:813dcc80987e 4584 }
mbed_official 610:813dcc80987e 4585 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 4586 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 4587
mbed_official 610:813dcc80987e 4588 /* Write to TIMx CCMR1 */
mbed_official 610:813dcc80987e 4589 TIMx->CCMR1 = tmpccmrx;
mbed_official 610:813dcc80987e 4590
mbed_official 610:813dcc80987e 4591 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 4592 TIMx->CCR1 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 4593
mbed_official 610:813dcc80987e 4594 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 4595 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 4596 }
mbed_official 610:813dcc80987e 4597
mbed_official 610:813dcc80987e 4598 /**
mbed_official 610:813dcc80987e 4599 * @brief Time Ouput Compare 2 configuration
mbed_official 610:813dcc80987e 4600 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 4601 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 4602 * @retval None
mbed_official 610:813dcc80987e 4603 */
mbed_official 610:813dcc80987e 4604 void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 4605 {
mbed_official 610:813dcc80987e 4606 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 4607 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4608 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 4609
mbed_official 610:813dcc80987e 4610 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 610:813dcc80987e 4611 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 610:813dcc80987e 4612
mbed_official 610:813dcc80987e 4613 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 4614 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 4615 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 4616 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 4617
mbed_official 610:813dcc80987e 4618 /* Get the TIMx CCMR1 register value */
mbed_official 610:813dcc80987e 4619 tmpccmrx = TIMx->CCMR1;
mbed_official 610:813dcc80987e 4620
mbed_official 610:813dcc80987e 4621 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 610:813dcc80987e 4622 tmpccmrx &= ~TIM_CCMR1_OC2M;
mbed_official 610:813dcc80987e 4623 tmpccmrx &= ~TIM_CCMR1_CC2S;
mbed_official 610:813dcc80987e 4624
mbed_official 610:813dcc80987e 4625 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 4626 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 610:813dcc80987e 4627
mbed_official 610:813dcc80987e 4628 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 4629 tmpccer &= ~TIM_CCER_CC2P;
mbed_official 610:813dcc80987e 4630 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 4631 tmpccer |= (OC_Config->OCPolarity << 4);
mbed_official 610:813dcc80987e 4632
mbed_official 610:813dcc80987e 4633 if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
mbed_official 610:813dcc80987e 4634 {
mbed_official 610:813dcc80987e 4635 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 610:813dcc80987e 4636 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 610:813dcc80987e 4637 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4638
mbed_official 610:813dcc80987e 4639 /* Reset the Output N Polarity level */
mbed_official 610:813dcc80987e 4640 tmpccer &= ~TIM_CCER_CC2NP;
mbed_official 610:813dcc80987e 4641 /* Set the Output N Polarity */
mbed_official 610:813dcc80987e 4642 tmpccer |= (OC_Config->OCNPolarity << 4);
mbed_official 610:813dcc80987e 4643 /* Reset the Output N State */
mbed_official 610:813dcc80987e 4644 tmpccer &= ~TIM_CCER_CC2NE;
mbed_official 610:813dcc80987e 4645
mbed_official 610:813dcc80987e 4646 }
mbed_official 610:813dcc80987e 4647
mbed_official 610:813dcc80987e 4648 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4649 {
mbed_official 610:813dcc80987e 4650 /* Check parameters */
mbed_official 610:813dcc80987e 4651 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 610:813dcc80987e 4652 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4653
mbed_official 610:813dcc80987e 4654 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 610:813dcc80987e 4655 tmpcr2 &= ~TIM_CR2_OIS2;
mbed_official 610:813dcc80987e 4656 tmpcr2 &= ~TIM_CR2_OIS2N;
mbed_official 610:813dcc80987e 4657 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 4658 tmpcr2 |= (OC_Config->OCIdleState << 2);
mbed_official 610:813dcc80987e 4659 /* Set the Output N Idle state */
mbed_official 610:813dcc80987e 4660 tmpcr2 |= (OC_Config->OCNIdleState << 2);
mbed_official 610:813dcc80987e 4661 }
mbed_official 610:813dcc80987e 4662
mbed_official 610:813dcc80987e 4663 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 4664 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 4665
mbed_official 610:813dcc80987e 4666 /* Write to TIMx CCMR1 */
mbed_official 610:813dcc80987e 4667 TIMx->CCMR1 = tmpccmrx;
mbed_official 610:813dcc80987e 4668
mbed_official 610:813dcc80987e 4669 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 4670 TIMx->CCR2 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 4671
mbed_official 610:813dcc80987e 4672 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 4673 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 4674 }
mbed_official 610:813dcc80987e 4675
mbed_official 610:813dcc80987e 4676 /**
mbed_official 610:813dcc80987e 4677 * @brief Time Ouput Compare 3 configuration
mbed_official 610:813dcc80987e 4678 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 4679 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 4680 * @retval None
mbed_official 610:813dcc80987e 4681 */
mbed_official 610:813dcc80987e 4682 void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 4683 {
mbed_official 610:813dcc80987e 4684 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 4685 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4686 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 4687
mbed_official 610:813dcc80987e 4688 /* Disable the Channel 3: Reset the CC2E Bit */
mbed_official 610:813dcc80987e 4689 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 610:813dcc80987e 4690
mbed_official 610:813dcc80987e 4691 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 4692 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 4693 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 4694 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 4695
mbed_official 610:813dcc80987e 4696 /* Get the TIMx CCMR2 register value */
mbed_official 610:813dcc80987e 4697 tmpccmrx = TIMx->CCMR2;
mbed_official 610:813dcc80987e 4698
mbed_official 610:813dcc80987e 4699 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 610:813dcc80987e 4700 tmpccmrx &= ~TIM_CCMR2_OC3M;
mbed_official 610:813dcc80987e 4701 tmpccmrx &= ~TIM_CCMR2_CC3S;
mbed_official 610:813dcc80987e 4702 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 4703 tmpccmrx |= OC_Config->OCMode;
mbed_official 610:813dcc80987e 4704
mbed_official 610:813dcc80987e 4705 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 4706 tmpccer &= ~TIM_CCER_CC3P;
mbed_official 610:813dcc80987e 4707 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 4708 tmpccer |= (OC_Config->OCPolarity << 8);
mbed_official 610:813dcc80987e 4709
mbed_official 610:813dcc80987e 4710 if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
mbed_official 610:813dcc80987e 4711 {
mbed_official 610:813dcc80987e 4712 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 610:813dcc80987e 4713 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 610:813dcc80987e 4714 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4715
mbed_official 610:813dcc80987e 4716 /* Reset the Output N Polarity level */
mbed_official 610:813dcc80987e 4717 tmpccer &= ~TIM_CCER_CC3NP;
mbed_official 610:813dcc80987e 4718 /* Set the Output N Polarity */
mbed_official 610:813dcc80987e 4719 tmpccer |= (OC_Config->OCNPolarity << 8);
mbed_official 610:813dcc80987e 4720 /* Reset the Output N State */
mbed_official 610:813dcc80987e 4721 tmpccer &= ~TIM_CCER_CC3NE;
mbed_official 610:813dcc80987e 4722 }
mbed_official 610:813dcc80987e 4723
mbed_official 610:813dcc80987e 4724 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4725 {
mbed_official 610:813dcc80987e 4726 /* Check parameters */
mbed_official 610:813dcc80987e 4727 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 610:813dcc80987e 4728 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4729
mbed_official 610:813dcc80987e 4730 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 610:813dcc80987e 4731 tmpcr2 &= ~TIM_CR2_OIS3;
mbed_official 610:813dcc80987e 4732 tmpcr2 &= ~TIM_CR2_OIS3N;
mbed_official 610:813dcc80987e 4733 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 4734 tmpcr2 |= (OC_Config->OCIdleState << 4);
mbed_official 610:813dcc80987e 4735 /* Set the Output N Idle state */
mbed_official 610:813dcc80987e 4736 tmpcr2 |= (OC_Config->OCNIdleState << 4);
mbed_official 610:813dcc80987e 4737 }
mbed_official 610:813dcc80987e 4738
mbed_official 610:813dcc80987e 4739 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 4740 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 4741
mbed_official 610:813dcc80987e 4742 /* Write to TIMx CCMR2 */
mbed_official 610:813dcc80987e 4743 TIMx->CCMR2 = tmpccmrx;
mbed_official 610:813dcc80987e 4744
mbed_official 610:813dcc80987e 4745 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 4746 TIMx->CCR3 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 4747
mbed_official 610:813dcc80987e 4748 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 4749 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 4750 }
mbed_official 610:813dcc80987e 4751
mbed_official 610:813dcc80987e 4752 /**
mbed_official 610:813dcc80987e 4753 * @brief Time Ouput Compare 4 configuration
mbed_official 610:813dcc80987e 4754 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 4755 * @param OC_Config: The ouput configuration structure
mbed_official 610:813dcc80987e 4756 * @retval None
mbed_official 610:813dcc80987e 4757 */
mbed_official 610:813dcc80987e 4758 void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 610:813dcc80987e 4759 {
mbed_official 610:813dcc80987e 4760 uint32_t tmpccmrx = 0;
mbed_official 610:813dcc80987e 4761 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4762 uint32_t tmpcr2 = 0;
mbed_official 610:813dcc80987e 4763
mbed_official 610:813dcc80987e 4764 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 610:813dcc80987e 4765 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 610:813dcc80987e 4766
mbed_official 610:813dcc80987e 4767 /* Get the TIMx CCER register value */
mbed_official 610:813dcc80987e 4768 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 4769 /* Get the TIMx CR2 register value */
mbed_official 610:813dcc80987e 4770 tmpcr2 = TIMx->CR2;
mbed_official 610:813dcc80987e 4771
mbed_official 610:813dcc80987e 4772 /* Get the TIMx CCMR2 register value */
mbed_official 610:813dcc80987e 4773 tmpccmrx = TIMx->CCMR2;
mbed_official 610:813dcc80987e 4774
mbed_official 610:813dcc80987e 4775 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 610:813dcc80987e 4776 tmpccmrx &= ~TIM_CCMR2_OC4M;
mbed_official 610:813dcc80987e 4777 tmpccmrx &= ~TIM_CCMR2_CC4S;
mbed_official 610:813dcc80987e 4778
mbed_official 610:813dcc80987e 4779 /* Select the Output Compare Mode */
mbed_official 610:813dcc80987e 4780 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 610:813dcc80987e 4781
mbed_official 610:813dcc80987e 4782 /* Reset the Output Polarity level */
mbed_official 610:813dcc80987e 4783 tmpccer &= ~TIM_CCER_CC4P;
mbed_official 610:813dcc80987e 4784 /* Set the Output Compare Polarity */
mbed_official 610:813dcc80987e 4785 tmpccer |= (OC_Config->OCPolarity << 12);
mbed_official 610:813dcc80987e 4786
mbed_official 610:813dcc80987e 4787 if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official 610:813dcc80987e 4788 {
mbed_official 610:813dcc80987e 4789 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 610:813dcc80987e 4790
mbed_official 610:813dcc80987e 4791 /* Reset the Output Compare IDLE State */
mbed_official 610:813dcc80987e 4792 tmpcr2 &= ~TIM_CR2_OIS4;
mbed_official 610:813dcc80987e 4793 /* Set the Output Idle state */
mbed_official 610:813dcc80987e 4794 tmpcr2 |= (OC_Config->OCIdleState << 6);
mbed_official 610:813dcc80987e 4795 }
mbed_official 610:813dcc80987e 4796
mbed_official 610:813dcc80987e 4797 /* Write to TIMx CR2 */
mbed_official 610:813dcc80987e 4798 TIMx->CR2 = tmpcr2;
mbed_official 610:813dcc80987e 4799
mbed_official 610:813dcc80987e 4800 /* Write to TIMx CCMR2 */
mbed_official 610:813dcc80987e 4801 TIMx->CCMR2 = tmpccmrx;
mbed_official 610:813dcc80987e 4802
mbed_official 610:813dcc80987e 4803 /* Set the Capture Compare Register value */
mbed_official 610:813dcc80987e 4804 TIMx->CCR4 = OC_Config->Pulse;
mbed_official 610:813dcc80987e 4805
mbed_official 610:813dcc80987e 4806 /* Write to TIMx CCER */
mbed_official 610:813dcc80987e 4807 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 4808 }
mbed_official 610:813dcc80987e 4809
mbed_official 610:813dcc80987e 4810 static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
mbed_official 610:813dcc80987e 4811 TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 610:813dcc80987e 4812 {
mbed_official 610:813dcc80987e 4813 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 4814 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 4815 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4816
mbed_official 610:813dcc80987e 4817 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 4818 tmpsmcr = htim->Instance->SMCR;
mbed_official 610:813dcc80987e 4819
mbed_official 610:813dcc80987e 4820 /* Reset the Trigger Selection Bits */
mbed_official 610:813dcc80987e 4821 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 4822 /* Set the Input Trigger source */
mbed_official 610:813dcc80987e 4823 tmpsmcr |= sSlaveConfig->InputTrigger;
mbed_official 610:813dcc80987e 4824
mbed_official 610:813dcc80987e 4825 /* Reset the slave mode Bits */
mbed_official 610:813dcc80987e 4826 tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official 610:813dcc80987e 4827 /* Set the slave mode */
mbed_official 610:813dcc80987e 4828 tmpsmcr |= sSlaveConfig->SlaveMode;
mbed_official 610:813dcc80987e 4829
mbed_official 610:813dcc80987e 4830 /* Write to TIMx SMCR */
mbed_official 610:813dcc80987e 4831 htim->Instance->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 4832
mbed_official 610:813dcc80987e 4833 /* Configure the trigger prescaler, filter, and polarity */
mbed_official 610:813dcc80987e 4834 switch (sSlaveConfig->InputTrigger)
mbed_official 610:813dcc80987e 4835 {
mbed_official 610:813dcc80987e 4836 case TIM_TS_ETRF:
mbed_official 610:813dcc80987e 4837 {
mbed_official 610:813dcc80987e 4838 /* Check the parameters */
mbed_official 610:813dcc80987e 4839 assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4840 assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official 610:813dcc80987e 4841 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 610:813dcc80987e 4842 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 610:813dcc80987e 4843 /* Configure the ETR Trigger source */
mbed_official 610:813dcc80987e 4844 TIM_ETR_SetConfig(htim->Instance,
mbed_official 610:813dcc80987e 4845 sSlaveConfig->TriggerPrescaler,
mbed_official 610:813dcc80987e 4846 sSlaveConfig->TriggerPolarity,
mbed_official 610:813dcc80987e 4847 sSlaveConfig->TriggerFilter);
mbed_official 610:813dcc80987e 4848 }
mbed_official 610:813dcc80987e 4849 break;
mbed_official 610:813dcc80987e 4850
mbed_official 610:813dcc80987e 4851 case TIM_TS_TI1F_ED:
mbed_official 610:813dcc80987e 4852 {
mbed_official 610:813dcc80987e 4853 /* Check the parameters */
mbed_official 610:813dcc80987e 4854 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4855 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 610:813dcc80987e 4856
mbed_official 610:813dcc80987e 4857 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 610:813dcc80987e 4858 tmpccer = htim->Instance->CCER;
mbed_official 610:813dcc80987e 4859 htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official 610:813dcc80987e 4860 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 610:813dcc80987e 4861
mbed_official 610:813dcc80987e 4862 /* Set the filter */
mbed_official 610:813dcc80987e 4863 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 610:813dcc80987e 4864 tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official 610:813dcc80987e 4865
mbed_official 610:813dcc80987e 4866 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 610:813dcc80987e 4867 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 610:813dcc80987e 4868 htim->Instance->CCER = tmpccer;
mbed_official 610:813dcc80987e 4869
mbed_official 610:813dcc80987e 4870 }
mbed_official 610:813dcc80987e 4871 break;
mbed_official 610:813dcc80987e 4872
mbed_official 610:813dcc80987e 4873 case TIM_TS_TI1FP1:
mbed_official 610:813dcc80987e 4874 {
mbed_official 610:813dcc80987e 4875 /* Check the parameters */
mbed_official 610:813dcc80987e 4876 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4877 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 610:813dcc80987e 4878 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 610:813dcc80987e 4879
mbed_official 610:813dcc80987e 4880 /* Configure TI1 Filter and Polarity */
mbed_official 610:813dcc80987e 4881 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 610:813dcc80987e 4882 sSlaveConfig->TriggerPolarity,
mbed_official 610:813dcc80987e 4883 sSlaveConfig->TriggerFilter);
mbed_official 610:813dcc80987e 4884 }
mbed_official 610:813dcc80987e 4885 break;
mbed_official 610:813dcc80987e 4886
mbed_official 610:813dcc80987e 4887 case TIM_TS_TI2FP2:
mbed_official 610:813dcc80987e 4888 {
mbed_official 610:813dcc80987e 4889 /* Check the parameters */
mbed_official 610:813dcc80987e 4890 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4891 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 610:813dcc80987e 4892 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 610:813dcc80987e 4893
mbed_official 610:813dcc80987e 4894 /* Configure TI2 Filter and Polarity */
mbed_official 610:813dcc80987e 4895 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 610:813dcc80987e 4896 sSlaveConfig->TriggerPolarity,
mbed_official 610:813dcc80987e 4897 sSlaveConfig->TriggerFilter);
mbed_official 610:813dcc80987e 4898 }
mbed_official 610:813dcc80987e 4899 break;
mbed_official 610:813dcc80987e 4900
mbed_official 610:813dcc80987e 4901 case TIM_TS_ITR0:
mbed_official 610:813dcc80987e 4902 {
mbed_official 610:813dcc80987e 4903 /* Check the parameter */
mbed_official 610:813dcc80987e 4904 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4905 }
mbed_official 610:813dcc80987e 4906 break;
mbed_official 610:813dcc80987e 4907
mbed_official 610:813dcc80987e 4908 case TIM_TS_ITR1:
mbed_official 610:813dcc80987e 4909 {
mbed_official 610:813dcc80987e 4910 /* Check the parameter */
mbed_official 610:813dcc80987e 4911 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4912 }
mbed_official 610:813dcc80987e 4913 break;
mbed_official 610:813dcc80987e 4914
mbed_official 610:813dcc80987e 4915 case TIM_TS_ITR2:
mbed_official 610:813dcc80987e 4916 {
mbed_official 610:813dcc80987e 4917 /* Check the parameter */
mbed_official 610:813dcc80987e 4918 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4919 }
mbed_official 610:813dcc80987e 4920 break;
mbed_official 610:813dcc80987e 4921
mbed_official 610:813dcc80987e 4922 case TIM_TS_ITR3:
mbed_official 610:813dcc80987e 4923 {
mbed_official 610:813dcc80987e 4924 /* Check the parameter */
mbed_official 610:813dcc80987e 4925 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 610:813dcc80987e 4926 }
mbed_official 610:813dcc80987e 4927 break;
mbed_official 610:813dcc80987e 4928
mbed_official 610:813dcc80987e 4929 default:
mbed_official 610:813dcc80987e 4930 break;
mbed_official 610:813dcc80987e 4931 }
mbed_official 610:813dcc80987e 4932 }
mbed_official 610:813dcc80987e 4933
mbed_official 610:813dcc80987e 4934 /**
mbed_official 610:813dcc80987e 4935 * @brief Configure the TI1 as Input.
mbed_official 610:813dcc80987e 4936 * @param TIMx to select the TIM peripheral.
mbed_official 610:813dcc80987e 4937 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 4938 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 4939 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 4940 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 4941 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 4942 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 610:813dcc80987e 4943 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 4944 * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official 610:813dcc80987e 4945 * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official 610:813dcc80987e 4946 * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official 610:813dcc80987e 4947 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 4948 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 4949 * @retval None
mbed_official 610:813dcc80987e 4950 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1
mbed_official 610:813dcc80987e 4951 * (on channel2 path) is used as the input signal. Therefore CCMR1 must be
mbed_official 610:813dcc80987e 4952 * protected against un-initialized filter and polarity values.
mbed_official 610:813dcc80987e 4953 */
mbed_official 610:813dcc80987e 4954 void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 4955 uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 4956 {
mbed_official 610:813dcc80987e 4957 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 4958 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 4959
mbed_official 610:813dcc80987e 4960 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 610:813dcc80987e 4961 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 610:813dcc80987e 4962 tmpccmr1 = TIMx->CCMR1;
mbed_official 610:813dcc80987e 4963 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 4964
mbed_official 610:813dcc80987e 4965 /* Select the Input */
mbed_official 610:813dcc80987e 4966 if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
mbed_official 610:813dcc80987e 4967 {
mbed_official 610:813dcc80987e 4968 tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official 610:813dcc80987e 4969 tmpccmr1 |= TIM_ICSelection;
mbed_official 610:813dcc80987e 4970 }
mbed_official 610:813dcc80987e 4971 else
mbed_official 610:813dcc80987e 4972 {
mbed_official 610:813dcc80987e 4973 tmpccmr1 |= TIM_CCMR1_CC1S_0;
mbed_official 610:813dcc80987e 4974 }
mbed_official 610:813dcc80987e 4975
mbed_official 610:813dcc80987e 4976 /* Set the filter */
mbed_official 610:813dcc80987e 4977 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 610:813dcc80987e 4978 tmpccmr1 |= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F);
mbed_official 610:813dcc80987e 4979
mbed_official 610:813dcc80987e 4980 /* Select the Polarity and set the CC1E Bit */
mbed_official 610:813dcc80987e 4981 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 610:813dcc80987e 4982 tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
mbed_official 610:813dcc80987e 4983
mbed_official 610:813dcc80987e 4984 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 610:813dcc80987e 4985 TIMx->CCMR1 = tmpccmr1;
mbed_official 610:813dcc80987e 4986 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 4987 }
mbed_official 610:813dcc80987e 4988
mbed_official 610:813dcc80987e 4989 /**
mbed_official 610:813dcc80987e 4990 * @brief Configure the Polarity and Filter for TI1.
mbed_official 610:813dcc80987e 4991 * @param TIMx to select the TIM peripheral.
mbed_official 610:813dcc80987e 4992 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 4993 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 4994 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 4995 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 4996 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 4997 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 4998 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 4999 * @retval None
mbed_official 610:813dcc80987e 5000 */
mbed_official 610:813dcc80987e 5001 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 5002 {
mbed_official 610:813dcc80987e 5003 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 5004 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 5005
mbed_official 610:813dcc80987e 5006 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 610:813dcc80987e 5007 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 5008 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 610:813dcc80987e 5009 tmpccmr1 = TIMx->CCMR1;
mbed_official 610:813dcc80987e 5010
mbed_official 610:813dcc80987e 5011 /* Set the filter */
mbed_official 610:813dcc80987e 5012 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 610:813dcc80987e 5013 tmpccmr1 |= (TIM_ICFilter << 4);
mbed_official 610:813dcc80987e 5014
mbed_official 610:813dcc80987e 5015 /* Select the Polarity and set the CC1E Bit */
mbed_official 610:813dcc80987e 5016 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 610:813dcc80987e 5017 tmpccer |= TIM_ICPolarity;
mbed_official 610:813dcc80987e 5018
mbed_official 610:813dcc80987e 5019 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 610:813dcc80987e 5020 TIMx->CCMR1 = tmpccmr1;
mbed_official 610:813dcc80987e 5021 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 5022 }
mbed_official 610:813dcc80987e 5023
mbed_official 610:813dcc80987e 5024 /**
mbed_official 610:813dcc80987e 5025 * @brief Configure the TI2 as Input.
mbed_official 610:813dcc80987e 5026 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5027 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 5028 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5029 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 5030 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 5031 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 5032 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 610:813dcc80987e 5033 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5034 * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official 610:813dcc80987e 5035 * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official 610:813dcc80987e 5036 * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official 610:813dcc80987e 5037 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 5038 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 5039 * @retval None
mbed_official 610:813dcc80987e 5040 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2
mbed_official 610:813dcc80987e 5041 * (on channel1 path) is used as the input signal. Therefore CCMR1 must be
mbed_official 610:813dcc80987e 5042 * protected against un-initialized filter and polarity values.
mbed_official 610:813dcc80987e 5043 */
mbed_official 610:813dcc80987e 5044 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 5045 uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 5046 {
mbed_official 610:813dcc80987e 5047 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 5048 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 5049
mbed_official 610:813dcc80987e 5050 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 610:813dcc80987e 5051 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 610:813dcc80987e 5052 tmpccmr1 = TIMx->CCMR1;
mbed_official 610:813dcc80987e 5053 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 5054
mbed_official 610:813dcc80987e 5055 /* Select the Input */
mbed_official 610:813dcc80987e 5056 tmpccmr1 &= ~TIM_CCMR1_CC2S;
mbed_official 610:813dcc80987e 5057 tmpccmr1 |= (TIM_ICSelection << 8);
mbed_official 610:813dcc80987e 5058
mbed_official 610:813dcc80987e 5059 /* Set the filter */
mbed_official 610:813dcc80987e 5060 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 610:813dcc80987e 5061 tmpccmr1 |= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F);
mbed_official 610:813dcc80987e 5062
mbed_official 610:813dcc80987e 5063 /* Select the Polarity and set the CC2E Bit */
mbed_official 610:813dcc80987e 5064 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 610:813dcc80987e 5065 tmpccer |= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
mbed_official 610:813dcc80987e 5066
mbed_official 610:813dcc80987e 5067 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 610:813dcc80987e 5068 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 610:813dcc80987e 5069 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 5070 }
mbed_official 610:813dcc80987e 5071
mbed_official 610:813dcc80987e 5072 /**
mbed_official 610:813dcc80987e 5073 * @brief Configure the Polarity and Filter for TI2.
mbed_official 610:813dcc80987e 5074 * @param TIMx to select the TIM peripheral.
mbed_official 610:813dcc80987e 5075 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 5076 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5077 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 5078 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 5079 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 5080 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 5081 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 5082 * @retval None
mbed_official 610:813dcc80987e 5083 */
mbed_official 610:813dcc80987e 5084 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 5085 {
mbed_official 610:813dcc80987e 5086 uint32_t tmpccmr1 = 0;
mbed_official 610:813dcc80987e 5087 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 5088
mbed_official 610:813dcc80987e 5089 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 610:813dcc80987e 5090 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 610:813dcc80987e 5091 tmpccmr1 = TIMx->CCMR1;
mbed_official 610:813dcc80987e 5092 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 5093
mbed_official 610:813dcc80987e 5094 /* Set the filter */
mbed_official 610:813dcc80987e 5095 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 610:813dcc80987e 5096 tmpccmr1 |= (TIM_ICFilter << 12);
mbed_official 610:813dcc80987e 5097
mbed_official 610:813dcc80987e 5098 /* Select the Polarity and set the CC2E Bit */
mbed_official 610:813dcc80987e 5099 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 610:813dcc80987e 5100 tmpccer |= (TIM_ICPolarity << 4);
mbed_official 610:813dcc80987e 5101
mbed_official 610:813dcc80987e 5102 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 610:813dcc80987e 5103 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 610:813dcc80987e 5104 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 5105 }
mbed_official 610:813dcc80987e 5106
mbed_official 610:813dcc80987e 5107 /**
mbed_official 610:813dcc80987e 5108 * @brief Configure the TI3 as Input.
mbed_official 610:813dcc80987e 5109 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5110 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 5111 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5112 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 5113 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 5114 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 5115 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 610:813dcc80987e 5116 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5117 * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official 610:813dcc80987e 5118 * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official 610:813dcc80987e 5119 * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official 610:813dcc80987e 5120 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 5121 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 5122 * @retval None
mbed_official 610:813dcc80987e 5123 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4
mbed_official 610:813dcc80987e 5124 * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official 610:813dcc80987e 5125 * protected against un-initialized filter and polarity values.
mbed_official 610:813dcc80987e 5126 */
mbed_official 610:813dcc80987e 5127 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 5128 uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 5129 {
mbed_official 610:813dcc80987e 5130 uint32_t tmpccmr2 = 0;
mbed_official 610:813dcc80987e 5131 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 5132
mbed_official 610:813dcc80987e 5133 /* Disable the Channel 3: Reset the CC3E Bit */
mbed_official 610:813dcc80987e 5134 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 610:813dcc80987e 5135 tmpccmr2 = TIMx->CCMR2;
mbed_official 610:813dcc80987e 5136 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 5137
mbed_official 610:813dcc80987e 5138 /* Select the Input */
mbed_official 610:813dcc80987e 5139 tmpccmr2 &= ~TIM_CCMR2_CC3S;
mbed_official 610:813dcc80987e 5140 tmpccmr2 |= TIM_ICSelection;
mbed_official 610:813dcc80987e 5141
mbed_official 610:813dcc80987e 5142 /* Set the filter */
mbed_official 610:813dcc80987e 5143 tmpccmr2 &= ~TIM_CCMR2_IC3F;
mbed_official 610:813dcc80987e 5144 tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F);
mbed_official 610:813dcc80987e 5145
mbed_official 610:813dcc80987e 5146 /* Select the Polarity and set the CC3E Bit */
mbed_official 610:813dcc80987e 5147 tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
mbed_official 610:813dcc80987e 5148 tmpccer |= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
mbed_official 610:813dcc80987e 5149
mbed_official 610:813dcc80987e 5150 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 610:813dcc80987e 5151 TIMx->CCMR2 = tmpccmr2;
mbed_official 610:813dcc80987e 5152 TIMx->CCER = tmpccer;
mbed_official 610:813dcc80987e 5153 }
mbed_official 610:813dcc80987e 5154
mbed_official 610:813dcc80987e 5155 /**
mbed_official 610:813dcc80987e 5156 * @brief Configure the TI4 as Input.
mbed_official 610:813dcc80987e 5157 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5158 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 610:813dcc80987e 5159 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5160 * @arg TIM_ICPolarity_Rising
mbed_official 610:813dcc80987e 5161 * @arg TIM_ICPolarity_Falling
mbed_official 610:813dcc80987e 5162 * @arg TIM_ICPolarity_BothEdge
mbed_official 610:813dcc80987e 5163 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 610:813dcc80987e 5164 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5165 * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official 610:813dcc80987e 5166 * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official 610:813dcc80987e 5167 * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official 610:813dcc80987e 5168 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 610:813dcc80987e 5169 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 610:813dcc80987e 5170 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3
mbed_official 610:813dcc80987e 5171 * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official 610:813dcc80987e 5172 * protected against un-initialized filter and polarity values.
mbed_official 610:813dcc80987e 5173 * @retval None
mbed_official 610:813dcc80987e 5174 */
mbed_official 610:813dcc80987e 5175 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 610:813dcc80987e 5176 uint32_t TIM_ICFilter)
mbed_official 610:813dcc80987e 5177 {
mbed_official 610:813dcc80987e 5178 uint32_t tmpccmr2 = 0;
mbed_official 610:813dcc80987e 5179 uint32_t tmpccer = 0;
mbed_official 610:813dcc80987e 5180
mbed_official 610:813dcc80987e 5181 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 610:813dcc80987e 5182 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 610:813dcc80987e 5183 tmpccmr2 = TIMx->CCMR2;
mbed_official 610:813dcc80987e 5184 tmpccer = TIMx->CCER;
mbed_official 610:813dcc80987e 5185
mbed_official 610:813dcc80987e 5186 /* Select the Input */
mbed_official 610:813dcc80987e 5187 tmpccmr2 &= ~TIM_CCMR2_CC4S;
mbed_official 610:813dcc80987e 5188 tmpccmr2 |= (TIM_ICSelection << 8);
mbed_official 610:813dcc80987e 5189
mbed_official 610:813dcc80987e 5190 /* Set the filter */
mbed_official 610:813dcc80987e 5191 tmpccmr2 &= ~TIM_CCMR2_IC4F;
mbed_official 610:813dcc80987e 5192 tmpccmr2 |= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F);
mbed_official 610:813dcc80987e 5193
mbed_official 610:813dcc80987e 5194 /* Select the Polarity and set the CC4E Bit */
mbed_official 610:813dcc80987e 5195 tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
mbed_official 610:813dcc80987e 5196 tmpccer |= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
mbed_official 610:813dcc80987e 5197
mbed_official 610:813dcc80987e 5198 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 610:813dcc80987e 5199 TIMx->CCMR2 = tmpccmr2;
mbed_official 610:813dcc80987e 5200 TIMx->CCER = tmpccer ;
mbed_official 610:813dcc80987e 5201 }
mbed_official 610:813dcc80987e 5202
mbed_official 610:813dcc80987e 5203 /**
mbed_official 610:813dcc80987e 5204 * @brief Selects the Input Trigger source
mbed_official 610:813dcc80987e 5205 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5206 * @param InputTriggerSource: The Input Trigger source.
mbed_official 610:813dcc80987e 5207 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5208 * @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official 610:813dcc80987e 5209 * @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official 610:813dcc80987e 5210 * @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official 610:813dcc80987e 5211 * @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official 610:813dcc80987e 5212 * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official 610:813dcc80987e 5213 * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official 610:813dcc80987e 5214 * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official 610:813dcc80987e 5215 * @arg TIM_TS_ETRF: External Trigger input
mbed_official 610:813dcc80987e 5216 * @retval None
mbed_official 610:813dcc80987e 5217 */
mbed_official 610:813dcc80987e 5218 static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource)
mbed_official 610:813dcc80987e 5219 {
mbed_official 610:813dcc80987e 5220 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 5221
mbed_official 610:813dcc80987e 5222 /* Get the TIMx SMCR register value */
mbed_official 610:813dcc80987e 5223 tmpsmcr = TIMx->SMCR;
mbed_official 610:813dcc80987e 5224 /* Reset the TS Bits */
mbed_official 610:813dcc80987e 5225 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 610:813dcc80987e 5226 /* Set the Input Trigger source and the slave mode*/
mbed_official 610:813dcc80987e 5227 tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1;
mbed_official 610:813dcc80987e 5228 /* Write to TIMx SMCR */
mbed_official 610:813dcc80987e 5229 TIMx->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 5230 }
mbed_official 610:813dcc80987e 5231 /**
mbed_official 610:813dcc80987e 5232 * @brief Configures the TIMx External Trigger (ETR).
mbed_official 610:813dcc80987e 5233 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5234 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 610:813dcc80987e 5235 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5236 * @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
mbed_official 610:813dcc80987e 5237 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 610:813dcc80987e 5238 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 610:813dcc80987e 5239 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 610:813dcc80987e 5240 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 610:813dcc80987e 5241 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5242 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 610:813dcc80987e 5243 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 610:813dcc80987e 5244 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 610:813dcc80987e 5245 * This parameter must be a value between 0x00 and 0x0F
mbed_official 610:813dcc80987e 5246 * @retval None
mbed_official 610:813dcc80987e 5247 */
mbed_official 610:813dcc80987e 5248 void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official 610:813dcc80987e 5249 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
mbed_official 610:813dcc80987e 5250 {
mbed_official 610:813dcc80987e 5251 uint32_t tmpsmcr = 0;
mbed_official 610:813dcc80987e 5252
mbed_official 610:813dcc80987e 5253 tmpsmcr = TIMx->SMCR;
mbed_official 610:813dcc80987e 5254
mbed_official 610:813dcc80987e 5255 /* Reset the ETR Bits */
mbed_official 610:813dcc80987e 5256 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 610:813dcc80987e 5257
mbed_official 610:813dcc80987e 5258 /* Set the Prescaler, the Filter value and the Polarity */
mbed_official 610:813dcc80987e 5259 tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8)));
mbed_official 610:813dcc80987e 5260
mbed_official 610:813dcc80987e 5261 /* Write to TIMx SMCR */
mbed_official 610:813dcc80987e 5262 TIMx->SMCR = tmpsmcr;
mbed_official 610:813dcc80987e 5263 }
mbed_official 610:813dcc80987e 5264
mbed_official 610:813dcc80987e 5265 /**
mbed_official 610:813dcc80987e 5266 * @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official 610:813dcc80987e 5267 * @param TIMx to select the TIM peripheral
mbed_official 610:813dcc80987e 5268 * @param Channel: specifies the TIM Channel
mbed_official 610:813dcc80987e 5269 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 5270 * @arg TIM_CHANNEL_1: TIM Channel 1
mbed_official 610:813dcc80987e 5271 * @arg TIM_CHANNEL_2: TIM Channel 2
mbed_official 610:813dcc80987e 5272 * @arg TIM_CHANNEL_3: TIM Channel 3
mbed_official 610:813dcc80987e 5273 * @arg TIM_CHANNEL_4: TIM Channel 4
mbed_official 610:813dcc80987e 5274 * @param ChannelState: specifies the TIM Channel CCxE bit new state.
mbed_official 610:813dcc80987e 5275 * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
mbed_official 610:813dcc80987e 5276 * @retval None
mbed_official 610:813dcc80987e 5277 */
mbed_official 610:813dcc80987e 5278 void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
mbed_official 610:813dcc80987e 5279 {
mbed_official 610:813dcc80987e 5280 uint32_t tmp = 0;
mbed_official 610:813dcc80987e 5281
mbed_official 610:813dcc80987e 5282 /* Check the parameters */
mbed_official 610:813dcc80987e 5283 assert_param(IS_TIM_CC1_INSTANCE(TIMx));
mbed_official 610:813dcc80987e 5284 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 610:813dcc80987e 5285
mbed_official 610:813dcc80987e 5286 tmp = TIM_CCER_CC1E << Channel;
mbed_official 610:813dcc80987e 5287
mbed_official 610:813dcc80987e 5288 /* Reset the CCxE Bit */
mbed_official 610:813dcc80987e 5289 TIMx->CCER &= ~tmp;
mbed_official 610:813dcc80987e 5290
mbed_official 610:813dcc80987e 5291 /* Set or reset the CCxE Bit */
mbed_official 610:813dcc80987e 5292 TIMx->CCER |= (uint32_t)(ChannelState << Channel);
mbed_official 610:813dcc80987e 5293 }
mbed_official 610:813dcc80987e 5294
mbed_official 610:813dcc80987e 5295
mbed_official 610:813dcc80987e 5296 /**
mbed_official 610:813dcc80987e 5297 * @}
mbed_official 610:813dcc80987e 5298 */
mbed_official 610:813dcc80987e 5299
mbed_official 610:813dcc80987e 5300 #endif /* HAL_TIM_MODULE_ENABLED */
mbed_official 610:813dcc80987e 5301 /**
mbed_official 610:813dcc80987e 5302 * @}
mbed_official 610:813dcc80987e 5303 */
mbed_official 610:813dcc80987e 5304
mbed_official 610:813dcc80987e 5305 /**
mbed_official 610:813dcc80987e 5306 * @}
mbed_official 610:813dcc80987e 5307 */
mbed_official 610:813dcc80987e 5308 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/