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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dma.h@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_dma.h
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief Header file of DMA HAL module.
mbed_official 610:813dcc80987e 8 ******************************************************************************
mbed_official 610:813dcc80987e 9 * @attention
mbed_official 610:813dcc80987e 10 *
mbed_official 610:813dcc80987e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 12 *
mbed_official 610:813dcc80987e 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 14 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 16 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 19 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 21 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 22 * without specific prior written permission.
mbed_official 610:813dcc80987e 23 *
mbed_official 610:813dcc80987e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 34 *
mbed_official 610:813dcc80987e 35 ******************************************************************************
mbed_official 610:813dcc80987e 36 */
mbed_official 610:813dcc80987e 37
mbed_official 610:813dcc80987e 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 610:813dcc80987e 39 #ifndef __STM32L4xx_HAL_DMA_H
mbed_official 610:813dcc80987e 40 #define __STM32L4xx_HAL_DMA_H
mbed_official 610:813dcc80987e 41
mbed_official 610:813dcc80987e 42 #ifdef __cplusplus
mbed_official 610:813dcc80987e 43 extern "C" {
mbed_official 610:813dcc80987e 44 #endif
mbed_official 610:813dcc80987e 45
mbed_official 610:813dcc80987e 46 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 47 #include "stm32l4xx_hal_def.h"
mbed_official 610:813dcc80987e 48
mbed_official 610:813dcc80987e 49 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 50 * @{
mbed_official 610:813dcc80987e 51 */
mbed_official 610:813dcc80987e 52
mbed_official 610:813dcc80987e 53 /** @addtogroup DMA
mbed_official 610:813dcc80987e 54 * @{
mbed_official 610:813dcc80987e 55 */
mbed_official 610:813dcc80987e 56
mbed_official 610:813dcc80987e 57 /* Exported types ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 58 /** @defgroup DMA_Exported_Types DMA Exported Types
mbed_official 610:813dcc80987e 59 * @{
mbed_official 610:813dcc80987e 60 */
mbed_official 610:813dcc80987e 61
mbed_official 610:813dcc80987e 62 /**
mbed_official 610:813dcc80987e 63 * @brief DMA Configuration Structure definition
mbed_official 610:813dcc80987e 64 */
mbed_official 610:813dcc80987e 65 typedef struct
mbed_official 610:813dcc80987e 66 {
mbed_official 610:813dcc80987e 67 uint32_t Request; /*!< Specifies the request selected for the specified channel.
mbed_official 610:813dcc80987e 68 This parameter can be a value of @ref DMA_request */
mbed_official 610:813dcc80987e 69
mbed_official 610:813dcc80987e 70 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
mbed_official 610:813dcc80987e 71 from memory to memory or from peripheral to memory.
mbed_official 610:813dcc80987e 72 This parameter can be a value of @ref DMA_Data_transfer_direction */
mbed_official 610:813dcc80987e 73
mbed_official 610:813dcc80987e 74 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
mbed_official 610:813dcc80987e 75 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
mbed_official 610:813dcc80987e 76
mbed_official 610:813dcc80987e 77 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
mbed_official 610:813dcc80987e 78 This parameter can be a value of @ref DMA_Memory_incremented_mode */
mbed_official 610:813dcc80987e 79
mbed_official 610:813dcc80987e 80 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
mbed_official 610:813dcc80987e 81 This parameter can be a value of @ref DMA_Peripheral_data_size */
mbed_official 610:813dcc80987e 82
mbed_official 610:813dcc80987e 83 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
mbed_official 610:813dcc80987e 84 This parameter can be a value of @ref DMA_Memory_data_size */
mbed_official 610:813dcc80987e 85
mbed_official 610:813dcc80987e 86 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
mbed_official 610:813dcc80987e 87 This parameter can be a value of @ref DMA_mode
mbed_official 610:813dcc80987e 88 @note The circular buffer mode cannot be used if the memory-to-memory
mbed_official 610:813dcc80987e 89 data transfer is configured on the selected Channel */
mbed_official 610:813dcc80987e 90
mbed_official 610:813dcc80987e 91 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
mbed_official 610:813dcc80987e 92 This parameter can be a value of @ref DMA_Priority_level */
mbed_official 610:813dcc80987e 93 } DMA_InitTypeDef;
mbed_official 610:813dcc80987e 94
mbed_official 610:813dcc80987e 95 /**
mbed_official 610:813dcc80987e 96 * @brief DMA Configuration enumeration values definition
mbed_official 610:813dcc80987e 97 */
mbed_official 610:813dcc80987e 98 typedef enum
mbed_official 610:813dcc80987e 99 {
mbed_official 610:813dcc80987e 100 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
mbed_official 610:813dcc80987e 101 DMA_PRIORITY = 1 /*!< Control related priority level Parameter in DMA_InitTypeDef */
mbed_official 610:813dcc80987e 102
mbed_official 610:813dcc80987e 103 } DMA_ControlTypeDef;
mbed_official 610:813dcc80987e 104
mbed_official 610:813dcc80987e 105 /**
mbed_official 610:813dcc80987e 106 * @brief HAL DMA State structures definition
mbed_official 610:813dcc80987e 107 */
mbed_official 610:813dcc80987e 108 typedef enum
mbed_official 610:813dcc80987e 109 {
mbed_official 610:813dcc80987e 110 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
mbed_official 610:813dcc80987e 111 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
mbed_official 610:813dcc80987e 112 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
mbed_official 610:813dcc80987e 113 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
mbed_official 610:813dcc80987e 114 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
mbed_official 610:813dcc80987e 115 HAL_DMA_STATE_ERROR = 0x04 /*!< DMA error state */
mbed_official 610:813dcc80987e 116
mbed_official 610:813dcc80987e 117 }HAL_DMA_StateTypeDef;
mbed_official 610:813dcc80987e 118
mbed_official 610:813dcc80987e 119 /**
mbed_official 610:813dcc80987e 120 * @brief HAL DMA Error Code structure definition
mbed_official 610:813dcc80987e 121 */
mbed_official 610:813dcc80987e 122 typedef enum
mbed_official 610:813dcc80987e 123 {
mbed_official 610:813dcc80987e 124 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
mbed_official 610:813dcc80987e 125 HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */
mbed_official 610:813dcc80987e 126
mbed_official 610:813dcc80987e 127 }HAL_DMA_LevelCompleteTypeDef;
mbed_official 610:813dcc80987e 128
mbed_official 610:813dcc80987e 129
mbed_official 610:813dcc80987e 130 /**
mbed_official 610:813dcc80987e 131 * @brief DMA handle Structure definition
mbed_official 610:813dcc80987e 132 */
mbed_official 610:813dcc80987e 133 typedef struct __DMA_HandleTypeDef
mbed_official 610:813dcc80987e 134 {
mbed_official 610:813dcc80987e 135 DMA_Channel_TypeDef *Instance; /*!< Register base address */
mbed_official 610:813dcc80987e 136
mbed_official 610:813dcc80987e 137 DMA_InitTypeDef Init; /*!< DMA communication parameters */
mbed_official 610:813dcc80987e 138
mbed_official 610:813dcc80987e 139 HAL_LockTypeDef Lock; /*!< DMA locking object */
mbed_official 610:813dcc80987e 140
mbed_official 610:813dcc80987e 141 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
mbed_official 610:813dcc80987e 142
mbed_official 610:813dcc80987e 143 void *Parent; /*!< Parent object state */
mbed_official 610:813dcc80987e 144
mbed_official 610:813dcc80987e 145 void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
mbed_official 610:813dcc80987e 146
mbed_official 610:813dcc80987e 147 void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
mbed_official 610:813dcc80987e 148
mbed_official 610:813dcc80987e 149 void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
mbed_official 610:813dcc80987e 150
mbed_official 610:813dcc80987e 151 __IO uint32_t ErrorCode; /*!< DMA Error code */
mbed_official 610:813dcc80987e 152
mbed_official 610:813dcc80987e 153 }DMA_HandleTypeDef;
mbed_official 610:813dcc80987e 154
mbed_official 610:813dcc80987e 155 /**
mbed_official 610:813dcc80987e 156 * @}
mbed_official 610:813dcc80987e 157 */
mbed_official 610:813dcc80987e 158
mbed_official 610:813dcc80987e 159 /* Exported constants --------------------------------------------------------*/
mbed_official 610:813dcc80987e 160
mbed_official 610:813dcc80987e 161 /** @defgroup DMA_Exported_Constants DMA Exported Constants
mbed_official 610:813dcc80987e 162 * @{
mbed_official 610:813dcc80987e 163 */
mbed_official 610:813dcc80987e 164
mbed_official 610:813dcc80987e 165 /** @defgroup DMA_Error_Code
mbed_official 610:813dcc80987e 166 * @{
mbed_official 610:813dcc80987e 167 */
mbed_official 610:813dcc80987e 168 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 610:813dcc80987e 169 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 610:813dcc80987e 170 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 610:813dcc80987e 171 /**
mbed_official 610:813dcc80987e 172 * @}
mbed_official 610:813dcc80987e 173 */
mbed_official 610:813dcc80987e 174
mbed_official 610:813dcc80987e 175 /** @defgroup DMA_request
mbed_official 610:813dcc80987e 176 * @{
mbed_official 610:813dcc80987e 177 */
mbed_official 610:813dcc80987e 178 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
mbed_official 610:813dcc80987e 179 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
mbed_official 610:813dcc80987e 180 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
mbed_official 610:813dcc80987e 181 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
mbed_official 610:813dcc80987e 182 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
mbed_official 610:813dcc80987e 183 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
mbed_official 610:813dcc80987e 184 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
mbed_official 610:813dcc80987e 185 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
mbed_official 610:813dcc80987e 186
mbed_official 610:813dcc80987e 187 /**
mbed_official 610:813dcc80987e 188 * @}
mbed_official 610:813dcc80987e 189 */
mbed_official 610:813dcc80987e 190
mbed_official 610:813dcc80987e 191 /** @defgroup DMA_Data_transfer_direction
mbed_official 610:813dcc80987e 192 * @{
mbed_official 610:813dcc80987e 193 */
mbed_official 610:813dcc80987e 194 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
mbed_official 610:813dcc80987e 195 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
mbed_official 610:813dcc80987e 196 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
mbed_official 610:813dcc80987e 197
mbed_official 610:813dcc80987e 198 /**
mbed_official 610:813dcc80987e 199 * @}
mbed_official 610:813dcc80987e 200 */
mbed_official 610:813dcc80987e 201
mbed_official 610:813dcc80987e 202 /** @defgroup DMA_Peripheral_incremented_mode
mbed_official 610:813dcc80987e 203 * @{
mbed_official 610:813dcc80987e 204 */
mbed_official 610:813dcc80987e 205 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
mbed_official 610:813dcc80987e 206 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
mbed_official 610:813dcc80987e 207
mbed_official 610:813dcc80987e 208 /**
mbed_official 610:813dcc80987e 209 * @}
mbed_official 610:813dcc80987e 210 */
mbed_official 610:813dcc80987e 211
mbed_official 610:813dcc80987e 212 /** @defgroup DMA_Memory_incremented_mode
mbed_official 610:813dcc80987e 213 * @{
mbed_official 610:813dcc80987e 214 */
mbed_official 610:813dcc80987e 215 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
mbed_official 610:813dcc80987e 216 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
mbed_official 610:813dcc80987e 217
mbed_official 610:813dcc80987e 218 /**
mbed_official 610:813dcc80987e 219 * @}
mbed_official 610:813dcc80987e 220 */
mbed_official 610:813dcc80987e 221
mbed_official 610:813dcc80987e 222 /** @defgroup DMA_Peripheral_data_size
mbed_official 610:813dcc80987e 223 * @{
mbed_official 610:813dcc80987e 224 */
mbed_official 610:813dcc80987e 225 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
mbed_official 610:813dcc80987e 226 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
mbed_official 610:813dcc80987e 227 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
mbed_official 610:813dcc80987e 228
mbed_official 610:813dcc80987e 229 /**
mbed_official 610:813dcc80987e 230 * @}
mbed_official 610:813dcc80987e 231 */
mbed_official 610:813dcc80987e 232
mbed_official 610:813dcc80987e 233 /** @defgroup DMA_Memory_data_size
mbed_official 610:813dcc80987e 234 * @{
mbed_official 610:813dcc80987e 235 */
mbed_official 610:813dcc80987e 236 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
mbed_official 610:813dcc80987e 237 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
mbed_official 610:813dcc80987e 238 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
mbed_official 610:813dcc80987e 239
mbed_official 610:813dcc80987e 240 /**
mbed_official 610:813dcc80987e 241 * @}
mbed_official 610:813dcc80987e 242 */
mbed_official 610:813dcc80987e 243
mbed_official 610:813dcc80987e 244 /** @defgroup DMA_mode
mbed_official 610:813dcc80987e 245 * @{
mbed_official 610:813dcc80987e 246 */
mbed_official 610:813dcc80987e 247 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
mbed_official 610:813dcc80987e 248 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
mbed_official 610:813dcc80987e 249
mbed_official 610:813dcc80987e 250 /**
mbed_official 610:813dcc80987e 251 * @}
mbed_official 610:813dcc80987e 252 */
mbed_official 610:813dcc80987e 253
mbed_official 610:813dcc80987e 254 /** @defgroup DMA_Priority_level
mbed_official 610:813dcc80987e 255 * @{
mbed_official 610:813dcc80987e 256 */
mbed_official 610:813dcc80987e 257 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
mbed_official 610:813dcc80987e 258 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
mbed_official 610:813dcc80987e 259 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
mbed_official 610:813dcc80987e 260 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
mbed_official 610:813dcc80987e 261
mbed_official 610:813dcc80987e 262 /**
mbed_official 610:813dcc80987e 263 * @}
mbed_official 610:813dcc80987e 264 */
mbed_official 610:813dcc80987e 265
mbed_official 610:813dcc80987e 266
mbed_official 610:813dcc80987e 267 /** @defgroup DMA_interrupt_enable_definitions
mbed_official 610:813dcc80987e 268 * @{
mbed_official 610:813dcc80987e 269 */
mbed_official 610:813dcc80987e 270
mbed_official 610:813dcc80987e 271 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
mbed_official 610:813dcc80987e 272 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
mbed_official 610:813dcc80987e 273 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
mbed_official 610:813dcc80987e 274
mbed_official 610:813dcc80987e 275 /**
mbed_official 610:813dcc80987e 276 * @}
mbed_official 610:813dcc80987e 277 */
mbed_official 610:813dcc80987e 278
mbed_official 610:813dcc80987e 279 /** @defgroup DMA_flag_definitions
mbed_official 610:813dcc80987e 280 * @{
mbed_official 610:813dcc80987e 281 */
mbed_official 610:813dcc80987e 282
mbed_official 610:813dcc80987e 283 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
mbed_official 610:813dcc80987e 284 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
mbed_official 610:813dcc80987e 285 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
mbed_official 610:813dcc80987e 286 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
mbed_official 610:813dcc80987e 287 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
mbed_official 610:813dcc80987e 288 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
mbed_official 610:813dcc80987e 289 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
mbed_official 610:813dcc80987e 290 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
mbed_official 610:813dcc80987e 291 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
mbed_official 610:813dcc80987e 292 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
mbed_official 610:813dcc80987e 293 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
mbed_official 610:813dcc80987e 294 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
mbed_official 610:813dcc80987e 295 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
mbed_official 610:813dcc80987e 296 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
mbed_official 610:813dcc80987e 297 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
mbed_official 610:813dcc80987e 298 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
mbed_official 610:813dcc80987e 299 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
mbed_official 610:813dcc80987e 300 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
mbed_official 610:813dcc80987e 301 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
mbed_official 610:813dcc80987e 302 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
mbed_official 610:813dcc80987e 303 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
mbed_official 610:813dcc80987e 304 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
mbed_official 610:813dcc80987e 305 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
mbed_official 610:813dcc80987e 306 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
mbed_official 610:813dcc80987e 307 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
mbed_official 610:813dcc80987e 308 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
mbed_official 610:813dcc80987e 309 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
mbed_official 610:813dcc80987e 310 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
mbed_official 610:813dcc80987e 311
mbed_official 610:813dcc80987e 312
mbed_official 610:813dcc80987e 313 /**
mbed_official 610:813dcc80987e 314 * @}
mbed_official 610:813dcc80987e 315 */
mbed_official 610:813dcc80987e 316
mbed_official 610:813dcc80987e 317 /**
mbed_official 610:813dcc80987e 318 * @}
mbed_official 610:813dcc80987e 319 */
mbed_official 610:813dcc80987e 320
mbed_official 610:813dcc80987e 321 /* Exported macros -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 322 /** @defgroup DMA_Exported_Macros DMA Exported Macros
mbed_official 610:813dcc80987e 323 * @{
mbed_official 610:813dcc80987e 324 */
mbed_official 610:813dcc80987e 325
mbed_official 610:813dcc80987e 326 /** @brief Reset DMA handle state.
mbed_official 610:813dcc80987e 327 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 328 * @retval None
mbed_official 610:813dcc80987e 329 */
mbed_official 610:813dcc80987e 330 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
mbed_official 610:813dcc80987e 331
mbed_official 610:813dcc80987e 332 /**
mbed_official 610:813dcc80987e 333 * @brief Enable the specified DMA Channel.
mbed_official 610:813dcc80987e 334 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 335 * @retval None
mbed_official 610:813dcc80987e 336 */
mbed_official 610:813dcc80987e 337 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
mbed_official 610:813dcc80987e 338
mbed_official 610:813dcc80987e 339 /**
mbed_official 610:813dcc80987e 340 * @brief Disable the specified DMA Channel.
mbed_official 610:813dcc80987e 341 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 342 * @retval None
mbed_official 610:813dcc80987e 343 */
mbed_official 610:813dcc80987e 344 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
mbed_official 610:813dcc80987e 345
mbed_official 610:813dcc80987e 346
mbed_official 610:813dcc80987e 347 /* Interrupt & Flag management */
mbed_official 610:813dcc80987e 348
mbed_official 610:813dcc80987e 349 /**
mbed_official 610:813dcc80987e 350 * @brief Return the current DMA Channel transfer complete flag.
mbed_official 610:813dcc80987e 351 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 352 * @retval The specified transfer complete flag index.
mbed_official 610:813dcc80987e 353 */
mbed_official 610:813dcc80987e 354
mbed_official 610:813dcc80987e 355 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
mbed_official 610:813dcc80987e 356 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
mbed_official 610:813dcc80987e 357 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
mbed_official 610:813dcc80987e 358 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
mbed_official 610:813dcc80987e 359 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
mbed_official 610:813dcc80987e 360 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
mbed_official 610:813dcc80987e 361 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
mbed_official 610:813dcc80987e 362 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
mbed_official 610:813dcc80987e 363 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
mbed_official 610:813dcc80987e 364 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
mbed_official 610:813dcc80987e 365 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\
mbed_official 610:813dcc80987e 366 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
mbed_official 610:813dcc80987e 367 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\
mbed_official 610:813dcc80987e 368 DMA_FLAG_TC7)
mbed_official 610:813dcc80987e 369
mbed_official 610:813dcc80987e 370 /**
mbed_official 610:813dcc80987e 371 * @brief Return the current DMA Channel half transfer complete flag.
mbed_official 610:813dcc80987e 372 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 373 * @retval The specified half transfer complete flag index.
mbed_official 610:813dcc80987e 374 */
mbed_official 610:813dcc80987e 375 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
mbed_official 610:813dcc80987e 376 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
mbed_official 610:813dcc80987e 377 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
mbed_official 610:813dcc80987e 378 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
mbed_official 610:813dcc80987e 379 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
mbed_official 610:813dcc80987e 380 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
mbed_official 610:813dcc80987e 381 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
mbed_official 610:813dcc80987e 382 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
mbed_official 610:813dcc80987e 383 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
mbed_official 610:813dcc80987e 384 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
mbed_official 610:813dcc80987e 385 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\
mbed_official 610:813dcc80987e 386 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
mbed_official 610:813dcc80987e 387 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\
mbed_official 610:813dcc80987e 388 DMA_FLAG_HT7)
mbed_official 610:813dcc80987e 389
mbed_official 610:813dcc80987e 390 /**
mbed_official 610:813dcc80987e 391 * @brief Return the current DMA Channel transfer error flag.
mbed_official 610:813dcc80987e 392 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 393 * @retval The specified transfer error flag index.
mbed_official 610:813dcc80987e 394 */
mbed_official 610:813dcc80987e 395 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
mbed_official 610:813dcc80987e 396 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
mbed_official 610:813dcc80987e 397 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
mbed_official 610:813dcc80987e 398 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
mbed_official 610:813dcc80987e 399 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
mbed_official 610:813dcc80987e 400 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
mbed_official 610:813dcc80987e 401 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
mbed_official 610:813dcc80987e 402 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
mbed_official 610:813dcc80987e 403 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
mbed_official 610:813dcc80987e 404 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
mbed_official 610:813dcc80987e 405 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\
mbed_official 610:813dcc80987e 406 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
mbed_official 610:813dcc80987e 407 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\
mbed_official 610:813dcc80987e 408 DMA_FLAG_TE7)
mbed_official 610:813dcc80987e 409
mbed_official 610:813dcc80987e 410 /**
mbed_official 610:813dcc80987e 411 * @brief Return the current DMA Channel Global interrupt flag.
mbed_official 610:813dcc80987e 412 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 413 * @retval The specified transfer error flag index.
mbed_official 610:813dcc80987e 414 */
mbed_official 610:813dcc80987e 415 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
mbed_official 610:813dcc80987e 416 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
mbed_official 610:813dcc80987e 417 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\
mbed_official 610:813dcc80987e 418 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
mbed_official 610:813dcc80987e 419 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\
mbed_official 610:813dcc80987e 420 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
mbed_official 610:813dcc80987e 421 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\
mbed_official 610:813dcc80987e 422 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
mbed_official 610:813dcc80987e 423 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\
mbed_official 610:813dcc80987e 424 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
mbed_official 610:813dcc80987e 425 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\
mbed_official 610:813dcc80987e 426 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
mbed_official 610:813dcc80987e 427 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\
mbed_official 610:813dcc80987e 428 DMA_ISR_GIF7)
mbed_official 610:813dcc80987e 429
mbed_official 610:813dcc80987e 430 /**
mbed_official 610:813dcc80987e 431 * @brief Get the DMA Channel pending flags.
mbed_official 610:813dcc80987e 432 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 433 * @param __FLAG__: Get the specified flag.
mbed_official 610:813dcc80987e 434 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 435 * @arg DMA_FLAG_TCIFx: Transfer complete flag
mbed_official 610:813dcc80987e 436 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
mbed_official 610:813dcc80987e 437 * @arg DMA_FLAG_TEIFx: Transfer error flag
mbed_official 610:813dcc80987e 438 * @arg DMA_ISR_GIFx: Global interrupt flag
mbed_official 610:813dcc80987e 439 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
mbed_official 610:813dcc80987e 440 * @retval The state of FLAG (SET or RESET).
mbed_official 610:813dcc80987e 441 */
mbed_official 610:813dcc80987e 442 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
mbed_official 610:813dcc80987e 443 (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
mbed_official 610:813dcc80987e 444
mbed_official 610:813dcc80987e 445 /**
mbed_official 610:813dcc80987e 446 * @brief Clear the DMA Channel pending flags.
mbed_official 610:813dcc80987e 447 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 448 * @param __FLAG__: specifies the flag to clear.
mbed_official 610:813dcc80987e 449 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 450 * @arg DMA_FLAG_TCIFx: Transfer complete flag
mbed_official 610:813dcc80987e 451 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
mbed_official 610:813dcc80987e 452 * @arg DMA_FLAG_TEIFx: Transfer error flag
mbed_official 610:813dcc80987e 453 * @arg DMA_ISR_GIFx: Global interrupt flag
mbed_official 610:813dcc80987e 454 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
mbed_official 610:813dcc80987e 455 * @retval None
mbed_official 610:813dcc80987e 456 */
mbed_official 610:813dcc80987e 457 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
mbed_official 610:813dcc80987e 458 (DMA2->IFCR |= (__FLAG__)) : (DMA1->IFCR |= (__FLAG__)))
mbed_official 610:813dcc80987e 459
mbed_official 610:813dcc80987e 460 /**
mbed_official 610:813dcc80987e 461 * @brief Enable the specified DMA Channel interrupts.
mbed_official 610:813dcc80987e 462 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 463 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 610:813dcc80987e 464 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 465 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 610:813dcc80987e 466 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 610:813dcc80987e 467 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 610:813dcc80987e 468 * @retval None
mbed_official 610:813dcc80987e 469 */
mbed_official 610:813dcc80987e 470 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
mbed_official 610:813dcc80987e 471
mbed_official 610:813dcc80987e 472 /**
mbed_official 610:813dcc80987e 473 * @brief Disable the specified DMA Channel interrupts.
mbed_official 610:813dcc80987e 474 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 475 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 610:813dcc80987e 476 * This parameter can be any combination of the following values:
mbed_official 610:813dcc80987e 477 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 610:813dcc80987e 478 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 610:813dcc80987e 479 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 610:813dcc80987e 480 * @retval None
mbed_official 610:813dcc80987e 481 */
mbed_official 610:813dcc80987e 482 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
mbed_official 610:813dcc80987e 483
mbed_official 610:813dcc80987e 484 /**
mbed_official 610:813dcc80987e 485 * @brief Check whether the specified DMA Channel interrupt is enabled or not.
mbed_official 610:813dcc80987e 486 * @param __HANDLE__: DMA handle
mbed_official 610:813dcc80987e 487 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
mbed_official 610:813dcc80987e 488 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 489 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 610:813dcc80987e 490 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 610:813dcc80987e 491 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 610:813dcc80987e 492 * @retval The state of DMA_IT (SET or RESET).
mbed_official 610:813dcc80987e 493 */
mbed_official 610:813dcc80987e 494 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
mbed_official 610:813dcc80987e 495
mbed_official 610:813dcc80987e 496 /**
mbed_official 610:813dcc80987e 497 * @}
mbed_official 610:813dcc80987e 498 */
mbed_official 610:813dcc80987e 499
mbed_official 610:813dcc80987e 500 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 501
mbed_official 610:813dcc80987e 502 /** @addtogroup DMA_Exported_Functions
mbed_official 610:813dcc80987e 503 * @{
mbed_official 610:813dcc80987e 504 */
mbed_official 610:813dcc80987e 505
mbed_official 610:813dcc80987e 506 /** @addtogroup DMA_Exported_Functions_Group1
mbed_official 610:813dcc80987e 507 * @{
mbed_official 610:813dcc80987e 508 */
mbed_official 610:813dcc80987e 509 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 510 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 511
mbed_official 610:813dcc80987e 512 /**
mbed_official 610:813dcc80987e 513 * @}
mbed_official 610:813dcc80987e 514 */
mbed_official 610:813dcc80987e 515
mbed_official 610:813dcc80987e 516 /** @addtogroup DMA_Exported_Functions_Group2
mbed_official 610:813dcc80987e 517 * @{
mbed_official 610:813dcc80987e 518 */
mbed_official 610:813dcc80987e 519 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 610:813dcc80987e 520 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 610:813dcc80987e 521 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 522 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
mbed_official 610:813dcc80987e 523 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 524
mbed_official 610:813dcc80987e 525 /**
mbed_official 610:813dcc80987e 526 * @}
mbed_official 610:813dcc80987e 527 */
mbed_official 610:813dcc80987e 528
mbed_official 610:813dcc80987e 529 /** @addtogroup DMA_Exported_Functions_Group3
mbed_official 610:813dcc80987e 530 * @{
mbed_official 610:813dcc80987e 531 */
mbed_official 610:813dcc80987e 532
mbed_official 610:813dcc80987e 533 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 534 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 535
mbed_official 610:813dcc80987e 536 /**
mbed_official 610:813dcc80987e 537 * @}
mbed_official 610:813dcc80987e 538 */
mbed_official 610:813dcc80987e 539
mbed_official 610:813dcc80987e 540 /**
mbed_official 610:813dcc80987e 541 * @}
mbed_official 610:813dcc80987e 542 */
mbed_official 610:813dcc80987e 543
mbed_official 610:813dcc80987e 544 /* Private macros ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 545 /** @defgroup DMA_Private_Macros DMA Private Macros
mbed_official 610:813dcc80987e 546 * @{
mbed_official 610:813dcc80987e 547 */
mbed_official 610:813dcc80987e 548
mbed_official 610:813dcc80987e 549 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
mbed_official 610:813dcc80987e 550 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
mbed_official 610:813dcc80987e 551 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
mbed_official 610:813dcc80987e 552
mbed_official 610:813dcc80987e 553 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
mbed_official 610:813dcc80987e 554
mbed_official 610:813dcc80987e 555 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
mbed_official 610:813dcc80987e 556 ((STATE) == DMA_PINC_DISABLE))
mbed_official 610:813dcc80987e 557
mbed_official 610:813dcc80987e 558 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
mbed_official 610:813dcc80987e 559 ((STATE) == DMA_MINC_DISABLE))
mbed_official 610:813dcc80987e 560
mbed_official 610:813dcc80987e 561 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
mbed_official 610:813dcc80987e 562 ((REQUEST) == DMA_REQUEST_1) || \
mbed_official 610:813dcc80987e 563 ((REQUEST) == DMA_REQUEST_2) || \
mbed_official 610:813dcc80987e 564 ((REQUEST) == DMA_REQUEST_3) || \
mbed_official 610:813dcc80987e 565 ((REQUEST) == DMA_REQUEST_4) || \
mbed_official 610:813dcc80987e 566 ((REQUEST) == DMA_REQUEST_5) || \
mbed_official 610:813dcc80987e 567 ((REQUEST) == DMA_REQUEST_6) || \
mbed_official 610:813dcc80987e 568 ((REQUEST) == DMA_REQUEST_7))
mbed_official 610:813dcc80987e 569
mbed_official 610:813dcc80987e 570 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
mbed_official 610:813dcc80987e 571 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
mbed_official 610:813dcc80987e 572 ((SIZE) == DMA_PDATAALIGN_WORD))
mbed_official 610:813dcc80987e 573
mbed_official 610:813dcc80987e 574
mbed_official 610:813dcc80987e 575 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
mbed_official 610:813dcc80987e 576 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
mbed_official 610:813dcc80987e 577 ((SIZE) == DMA_MDATAALIGN_WORD ))
mbed_official 610:813dcc80987e 578
mbed_official 610:813dcc80987e 579 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
mbed_official 610:813dcc80987e 580 ((MODE) == DMA_CIRCULAR))
mbed_official 610:813dcc80987e 581
mbed_official 610:813dcc80987e 582 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
mbed_official 610:813dcc80987e 583 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
mbed_official 610:813dcc80987e 584 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
mbed_official 610:813dcc80987e 585 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
mbed_official 610:813dcc80987e 586
mbed_official 610:813dcc80987e 587 /**
mbed_official 610:813dcc80987e 588 * @}
mbed_official 610:813dcc80987e 589 */
mbed_official 610:813dcc80987e 590
mbed_official 610:813dcc80987e 591 /* Private functions ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 592
mbed_official 610:813dcc80987e 593 /**
mbed_official 610:813dcc80987e 594 * @}
mbed_official 610:813dcc80987e 595 */
mbed_official 610:813dcc80987e 596
mbed_official 610:813dcc80987e 597 /**
mbed_official 610:813dcc80987e 598 * @}
mbed_official 610:813dcc80987e 599 */
mbed_official 610:813dcc80987e 600
mbed_official 610:813dcc80987e 601 #ifdef __cplusplus
mbed_official 610:813dcc80987e 602 }
mbed_official 610:813dcc80987e 603 #endif
mbed_official 610:813dcc80987e 604
mbed_official 610:813dcc80987e 605 #endif /* __STM32L4xx_HAL_DMA_H */
mbed_official 610:813dcc80987e 606
mbed_official 610:813dcc80987e 607 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/