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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_tim.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief TIM HAL module driver.
mbed_official 573:ad23fe03a082 8 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 9 * functionalities of the Timer (TIM) peripheral:
mbed_official 573:ad23fe03a082 10 * + Time Base Initialization
mbed_official 573:ad23fe03a082 11 * + Time Base Start
mbed_official 573:ad23fe03a082 12 * + Time Base Start Interruption
mbed_official 573:ad23fe03a082 13 * + Time Base Start DMA
mbed_official 573:ad23fe03a082 14 * + Time Output Compare/PWM Initialization
mbed_official 573:ad23fe03a082 15 * + Time Output Compare/PWM Channel Configuration
mbed_official 573:ad23fe03a082 16 * + Time Output Compare/PWM Start
mbed_official 573:ad23fe03a082 17 * + Time Output Compare/PWM Start Interruption
mbed_official 573:ad23fe03a082 18 * + Time Output Compare/PWM Start DMA
mbed_official 573:ad23fe03a082 19 * + Time Input Capture Initialization
mbed_official 573:ad23fe03a082 20 * + Time Input Capture Channel Configuration
mbed_official 573:ad23fe03a082 21 * + Time Input Capture Start
mbed_official 573:ad23fe03a082 22 * + Time Input Capture Start Interruption
mbed_official 573:ad23fe03a082 23 * + Time Input Capture Start DMA
mbed_official 573:ad23fe03a082 24 * + Time One Pulse Initialization
mbed_official 573:ad23fe03a082 25 * + Time One Pulse Channel Configuration
mbed_official 573:ad23fe03a082 26 * + Time One Pulse Start
mbed_official 573:ad23fe03a082 27 * + Time Encoder Interface Initialization
mbed_official 573:ad23fe03a082 28 * + Time Encoder Interface Start
mbed_official 573:ad23fe03a082 29 * + Time Encoder Interface Start Interruption
mbed_official 573:ad23fe03a082 30 * + Time Encoder Interface Start DMA
mbed_official 573:ad23fe03a082 31 * + Commutation Event configuration with Interruption and DMA
mbed_official 573:ad23fe03a082 32 * + Time OCRef clear configuration
mbed_official 573:ad23fe03a082 33 * + Time External Clock configuration
mbed_official 573:ad23fe03a082 34 @verbatim
mbed_official 573:ad23fe03a082 35 ==============================================================================
mbed_official 573:ad23fe03a082 36 ##### TIMER Generic features #####
mbed_official 573:ad23fe03a082 37 ==============================================================================
mbed_official 573:ad23fe03a082 38 [..] The Timer features include:
mbed_official 573:ad23fe03a082 39 (#) 16-bit up, down, up/down auto-reload counter.
mbed_official 573:ad23fe03a082 40 (#) 16-bit programmable prescaler allowing dividing (also on the fly) the
mbed_official 573:ad23fe03a082 41 counter clock frequency either by any factor between 1 and 65536.
mbed_official 573:ad23fe03a082 42 (#) Up to 4 independent channels for:
mbed_official 573:ad23fe03a082 43 (++) Input Capture
mbed_official 573:ad23fe03a082 44 (++) Output Compare
mbed_official 573:ad23fe03a082 45 (++) PWM generation (Edge and Center-aligned Mode)
mbed_official 573:ad23fe03a082 46 (++) One-pulse mode output
mbed_official 573:ad23fe03a082 47
mbed_official 573:ad23fe03a082 48 ##### How to use this driver #####
mbed_official 573:ad23fe03a082 49 ==============================================================================
mbed_official 573:ad23fe03a082 50 [..]
mbed_official 573:ad23fe03a082 51 (#) Initialize the TIM low level resources by implementing the following functions
mbed_official 573:ad23fe03a082 52 depending from feature used :
mbed_official 573:ad23fe03a082 53 (++) Time Base : HAL_TIM_Base_MspInit()
mbed_official 573:ad23fe03a082 54 (++) Input Capture : HAL_TIM_IC_MspInit()
mbed_official 573:ad23fe03a082 55 (++) Output Compare : HAL_TIM_OC_MspInit()
mbed_official 573:ad23fe03a082 56 (++) PWM generation : HAL_TIM_PWM_MspInit()
mbed_official 573:ad23fe03a082 57 (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
mbed_official 573:ad23fe03a082 58 (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
mbed_official 573:ad23fe03a082 59
mbed_official 573:ad23fe03a082 60 (#) Initialize the TIM low level resources :
mbed_official 573:ad23fe03a082 61 (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
mbed_official 573:ad23fe03a082 62 (##) TIM pins configuration
mbed_official 573:ad23fe03a082 63 (+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official 573:ad23fe03a082 64 __GPIOx_CLK_ENABLE();
mbed_official 573:ad23fe03a082 65 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official 573:ad23fe03a082 66
mbed_official 573:ad23fe03a082 67 (#) The external Clock can be configured, if needed (the default clock is the
mbed_official 573:ad23fe03a082 68 internal clock from the APBx), using the following function:
mbed_official 573:ad23fe03a082 69 HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official 573:ad23fe03a082 70 any start function.
mbed_official 573:ad23fe03a082 71
mbed_official 573:ad23fe03a082 72 (#) Configure the TIM in the desired functioning mode using one of the
mbed_official 573:ad23fe03a082 73 initialization function of this driver:
mbed_official 573:ad23fe03a082 74 (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
mbed_official 573:ad23fe03a082 75 (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
mbed_official 573:ad23fe03a082 76 Output Compare signal.
mbed_official 573:ad23fe03a082 77 (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
mbed_official 573:ad23fe03a082 78 PWM signal.
mbed_official 573:ad23fe03a082 79 (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
mbed_official 573:ad23fe03a082 80 external signal.
mbed_official 573:ad23fe03a082 81 (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
mbed_official 573:ad23fe03a082 82 in One Pulse Mode.
mbed_official 573:ad23fe03a082 83 (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
mbed_official 573:ad23fe03a082 84
mbed_official 573:ad23fe03a082 85 (#) Activate the TIM peripheral using one of the start functions depending from the feature used:
mbed_official 573:ad23fe03a082 86 (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
mbed_official 573:ad23fe03a082 87 (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
mbed_official 573:ad23fe03a082 88 (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
mbed_official 573:ad23fe03a082 89 (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
mbed_official 573:ad23fe03a082 90 (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
mbed_official 573:ad23fe03a082 91 (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
mbed_official 573:ad23fe03a082 92
mbed_official 573:ad23fe03a082 93 (#) The DMA Burst is managed with the two following functions:
mbed_official 573:ad23fe03a082 94 HAL_TIM_DMABurst_WriteStart()
mbed_official 573:ad23fe03a082 95 HAL_TIM_DMABurst_ReadStart()
mbed_official 573:ad23fe03a082 96
mbed_official 573:ad23fe03a082 97 @endverbatim
mbed_official 573:ad23fe03a082 98 ******************************************************************************
mbed_official 573:ad23fe03a082 99 * @attention
mbed_official 573:ad23fe03a082 100 *
mbed_official 573:ad23fe03a082 101 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 102 *
mbed_official 573:ad23fe03a082 103 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 104 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 105 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 106 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 108 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 109 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 111 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 112 * without specific prior written permission.
mbed_official 573:ad23fe03a082 113 *
mbed_official 573:ad23fe03a082 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 124 *
mbed_official 573:ad23fe03a082 125 ******************************************************************************
mbed_official 573:ad23fe03a082 126 */
mbed_official 573:ad23fe03a082 127
mbed_official 573:ad23fe03a082 128 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 129 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 130
mbed_official 573:ad23fe03a082 131 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 132 * @{
mbed_official 573:ad23fe03a082 133 */
mbed_official 573:ad23fe03a082 134
mbed_official 573:ad23fe03a082 135 /** @defgroup TIM TIM
mbed_official 573:ad23fe03a082 136 * @brief TIM HAL module driver
mbed_official 573:ad23fe03a082 137 * @{
mbed_official 573:ad23fe03a082 138 */
mbed_official 573:ad23fe03a082 139
mbed_official 573:ad23fe03a082 140 #ifdef HAL_TIM_MODULE_ENABLED
mbed_official 573:ad23fe03a082 141
mbed_official 573:ad23fe03a082 142 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 143 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 144 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 145 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 146 /** @addtogroup TIM_Private_Functions
mbed_official 573:ad23fe03a082 147 * @{
mbed_official 573:ad23fe03a082 148 */
mbed_official 573:ad23fe03a082 149 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 150 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 573:ad23fe03a082 151 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 152 uint32_t TIM_ICFilter);
mbed_official 573:ad23fe03a082 153 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official 573:ad23fe03a082 154 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 155 uint32_t TIM_ICFilter);
mbed_official 573:ad23fe03a082 156 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 157 uint32_t TIM_ICFilter);
mbed_official 573:ad23fe03a082 158
mbed_official 573:ad23fe03a082 159 static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t TIM_ITRx);
mbed_official 573:ad23fe03a082 160 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 161 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 162 static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
mbed_official 573:ad23fe03a082 163 TIM_SlaveConfigTypeDef * sSlaveConfig);
mbed_official 573:ad23fe03a082 164 /**
mbed_official 573:ad23fe03a082 165 * @}
mbed_official 573:ad23fe03a082 166 */
mbed_official 573:ad23fe03a082 167
mbed_official 573:ad23fe03a082 168 /* Exported functions --------------------------------------------------------*/
mbed_official 573:ad23fe03a082 169 /** @defgroup TIM_Exported_Functions TIM Exported Functions
mbed_official 573:ad23fe03a082 170 * @{
mbed_official 573:ad23fe03a082 171 */
mbed_official 573:ad23fe03a082 172
mbed_official 573:ad23fe03a082 173 /** @defgroup TIM_Exported_Functions_Group1 Time Base functions
mbed_official 573:ad23fe03a082 174 * @brief Time Base functions
mbed_official 573:ad23fe03a082 175 *
mbed_official 573:ad23fe03a082 176 @verbatim
mbed_official 573:ad23fe03a082 177 ==============================================================================
mbed_official 573:ad23fe03a082 178 ##### Time Base functions #####
mbed_official 573:ad23fe03a082 179 ==============================================================================
mbed_official 573:ad23fe03a082 180 [..]
mbed_official 573:ad23fe03a082 181 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 182 (+) Initialize and configure the TIM base.
mbed_official 573:ad23fe03a082 183 (+) De-initialize the TIM base.
mbed_official 573:ad23fe03a082 184 (+) Start the Time Base.
mbed_official 573:ad23fe03a082 185 (+) Stop the Time Base.
mbed_official 573:ad23fe03a082 186 (+) Start the Time Base and enable interrupt.
mbed_official 573:ad23fe03a082 187 (+) Stop the Time Base and disable interrupt.
mbed_official 573:ad23fe03a082 188 (+) Start the Time Base and enable DMA transfer.
mbed_official 573:ad23fe03a082 189 (+) Stop the Time Base and disable DMA transfer.
mbed_official 573:ad23fe03a082 190
mbed_official 573:ad23fe03a082 191 @endverbatim
mbed_official 573:ad23fe03a082 192 * @{
mbed_official 573:ad23fe03a082 193 */
mbed_official 573:ad23fe03a082 194 /**
mbed_official 573:ad23fe03a082 195 * @brief Initializes the TIM Time base Unit according to the specified
mbed_official 573:ad23fe03a082 196 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 197 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 198 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 199 * @retval HAL status
mbed_official 573:ad23fe03a082 200 */
mbed_official 573:ad23fe03a082 201 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 202 {
mbed_official 573:ad23fe03a082 203 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 204 if(htim == NULL)
mbed_official 573:ad23fe03a082 205 {
mbed_official 573:ad23fe03a082 206 return HAL_ERROR;
mbed_official 573:ad23fe03a082 207 }
mbed_official 573:ad23fe03a082 208
mbed_official 573:ad23fe03a082 209 /* Check the parameters */
mbed_official 573:ad23fe03a082 210 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 211 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 573:ad23fe03a082 212 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 573:ad23fe03a082 213
mbed_official 573:ad23fe03a082 214 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 215 {
mbed_official 573:ad23fe03a082 216 /* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official 573:ad23fe03a082 217 HAL_TIM_Base_MspInit(htim);
mbed_official 573:ad23fe03a082 218 }
mbed_official 573:ad23fe03a082 219
mbed_official 573:ad23fe03a082 220 /* Set the TIM state */
mbed_official 573:ad23fe03a082 221 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 222
mbed_official 573:ad23fe03a082 223 /* Set the Time Base configuration */
mbed_official 573:ad23fe03a082 224 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 225
mbed_official 573:ad23fe03a082 226 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 227 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 228
mbed_official 573:ad23fe03a082 229 return HAL_OK;
mbed_official 573:ad23fe03a082 230 }
mbed_official 573:ad23fe03a082 231
mbed_official 573:ad23fe03a082 232 /**
mbed_official 573:ad23fe03a082 233 * @brief DeInitializes the TIM Base peripheral
mbed_official 573:ad23fe03a082 234 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 235 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 236 * @retval HAL status
mbed_official 573:ad23fe03a082 237 */
mbed_official 573:ad23fe03a082 238 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 239 {
mbed_official 573:ad23fe03a082 240 /* Check the parameters */
mbed_official 573:ad23fe03a082 241 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 242
mbed_official 573:ad23fe03a082 243 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 244
mbed_official 573:ad23fe03a082 245 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 246 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 247
mbed_official 573:ad23fe03a082 248 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 573:ad23fe03a082 249 HAL_TIM_Base_MspDeInit(htim);
mbed_official 573:ad23fe03a082 250
mbed_official 573:ad23fe03a082 251 /* Change TIM state */
mbed_official 573:ad23fe03a082 252 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 253
mbed_official 573:ad23fe03a082 254 /* Release Lock */
mbed_official 573:ad23fe03a082 255 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 256
mbed_official 573:ad23fe03a082 257 return HAL_OK;
mbed_official 573:ad23fe03a082 258 }
mbed_official 573:ad23fe03a082 259
mbed_official 573:ad23fe03a082 260 /**
mbed_official 573:ad23fe03a082 261 * @brief Initializes the TIM Base MSP.
mbed_official 573:ad23fe03a082 262 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 263 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 264 * @retval None
mbed_official 573:ad23fe03a082 265 */
mbed_official 573:ad23fe03a082 266 __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 267 {
mbed_official 573:ad23fe03a082 268 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 269 the HAL_TIM_Base_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 270 */
mbed_official 573:ad23fe03a082 271 }
mbed_official 573:ad23fe03a082 272
mbed_official 573:ad23fe03a082 273 /**
mbed_official 573:ad23fe03a082 274 * @brief DeInitializes TIM Base MSP.
mbed_official 573:ad23fe03a082 275 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 276 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 277 * @retval None
mbed_official 573:ad23fe03a082 278 */
mbed_official 573:ad23fe03a082 279 __weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 280 {
mbed_official 573:ad23fe03a082 281 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 282 the HAL_TIM_Base_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 283 */
mbed_official 573:ad23fe03a082 284 }
mbed_official 573:ad23fe03a082 285
mbed_official 573:ad23fe03a082 286 /**
mbed_official 573:ad23fe03a082 287 * @brief Starts the TIM Base generation.
mbed_official 573:ad23fe03a082 288 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 289 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 290 * @retval HAL status
mbed_official 573:ad23fe03a082 291 */
mbed_official 573:ad23fe03a082 292 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 293 {
mbed_official 573:ad23fe03a082 294 /* Check the parameters */
mbed_official 573:ad23fe03a082 295 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 296
mbed_official 573:ad23fe03a082 297 /* Set the TIM state */
mbed_official 573:ad23fe03a082 298 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 299
mbed_official 573:ad23fe03a082 300 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 301 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 302
mbed_official 573:ad23fe03a082 303 /* Change the TIM state*/
mbed_official 573:ad23fe03a082 304 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 305
mbed_official 573:ad23fe03a082 306 /* Return function status */
mbed_official 573:ad23fe03a082 307 return HAL_OK;
mbed_official 573:ad23fe03a082 308 }
mbed_official 573:ad23fe03a082 309
mbed_official 573:ad23fe03a082 310 /**
mbed_official 573:ad23fe03a082 311 * @brief Stops the TIM Base generation.
mbed_official 573:ad23fe03a082 312 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 313 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 314 * @retval HAL status
mbed_official 573:ad23fe03a082 315 */
mbed_official 573:ad23fe03a082 316 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 317 {
mbed_official 573:ad23fe03a082 318 /* Check the parameters */
mbed_official 573:ad23fe03a082 319 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 320
mbed_official 573:ad23fe03a082 321 /* Set the TIM state */
mbed_official 573:ad23fe03a082 322 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 323
mbed_official 573:ad23fe03a082 324 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 325 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 326
mbed_official 573:ad23fe03a082 327 /* Change the TIM state*/
mbed_official 573:ad23fe03a082 328 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 329
mbed_official 573:ad23fe03a082 330 /* Return function status */
mbed_official 573:ad23fe03a082 331 return HAL_OK;
mbed_official 573:ad23fe03a082 332 }
mbed_official 573:ad23fe03a082 333
mbed_official 573:ad23fe03a082 334 /**
mbed_official 573:ad23fe03a082 335 * @brief Starts the TIM Base generation in interrupt mode.
mbed_official 573:ad23fe03a082 336 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 337 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 338 * @retval HAL status
mbed_official 573:ad23fe03a082 339 */
mbed_official 573:ad23fe03a082 340 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 341 {
mbed_official 573:ad23fe03a082 342 /* Check the parameters */
mbed_official 573:ad23fe03a082 343 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 344
mbed_official 573:ad23fe03a082 345 /* Enable the TIM Update interrupt */
mbed_official 573:ad23fe03a082 346 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 573:ad23fe03a082 347
mbed_official 573:ad23fe03a082 348 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 349 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 350
mbed_official 573:ad23fe03a082 351 /* Return function status */
mbed_official 573:ad23fe03a082 352 return HAL_OK;
mbed_official 573:ad23fe03a082 353 }
mbed_official 573:ad23fe03a082 354
mbed_official 573:ad23fe03a082 355 /**
mbed_official 573:ad23fe03a082 356 * @brief Stops the TIM Base generation in interrupt mode.
mbed_official 573:ad23fe03a082 357 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 358 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 359 * @retval HAL status
mbed_official 573:ad23fe03a082 360 */
mbed_official 573:ad23fe03a082 361 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 362 {
mbed_official 573:ad23fe03a082 363 /* Check the parameters */
mbed_official 573:ad23fe03a082 364 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 365 /* Disable the TIM Update interrupt */
mbed_official 573:ad23fe03a082 366 __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
mbed_official 573:ad23fe03a082 367
mbed_official 573:ad23fe03a082 368 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 369 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 370
mbed_official 573:ad23fe03a082 371 /* Return function status */
mbed_official 573:ad23fe03a082 372 return HAL_OK;
mbed_official 573:ad23fe03a082 373 }
mbed_official 573:ad23fe03a082 374
mbed_official 573:ad23fe03a082 375 /**
mbed_official 573:ad23fe03a082 376 * @brief Starts the TIM Base generation in DMA mode.
mbed_official 573:ad23fe03a082 377 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 378 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 379 * @param pData: The source Buffer address.
mbed_official 573:ad23fe03a082 380 * @param Length: The length of data to be transferred from memory to peripheral.
mbed_official 573:ad23fe03a082 381 * @retval HAL status
mbed_official 573:ad23fe03a082 382 */
mbed_official 573:ad23fe03a082 383 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
mbed_official 573:ad23fe03a082 384 {
mbed_official 573:ad23fe03a082 385 /* Check the parameters */
mbed_official 573:ad23fe03a082 386 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 387
mbed_official 573:ad23fe03a082 388 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 389 {
mbed_official 573:ad23fe03a082 390 return HAL_BUSY;
mbed_official 573:ad23fe03a082 391 }
mbed_official 573:ad23fe03a082 392 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 393 {
mbed_official 573:ad23fe03a082 394 if((pData == 0 ) && (Length > 0))
mbed_official 573:ad23fe03a082 395 {
mbed_official 573:ad23fe03a082 396 return HAL_ERROR;
mbed_official 573:ad23fe03a082 397 }
mbed_official 573:ad23fe03a082 398 else
mbed_official 573:ad23fe03a082 399 {
mbed_official 573:ad23fe03a082 400 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 401 }
mbed_official 573:ad23fe03a082 402 }
mbed_official 573:ad23fe03a082 403 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 404 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 573:ad23fe03a082 405
mbed_official 573:ad23fe03a082 406 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 407 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 408
mbed_official 573:ad23fe03a082 409 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 410 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
mbed_official 573:ad23fe03a082 411
mbed_official 573:ad23fe03a082 412 /* Enable the TIM Update DMA request */
mbed_official 573:ad23fe03a082 413 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 573:ad23fe03a082 414
mbed_official 573:ad23fe03a082 415 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 416 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 417
mbed_official 573:ad23fe03a082 418 /* Return function status */
mbed_official 573:ad23fe03a082 419 return HAL_OK;
mbed_official 573:ad23fe03a082 420 }
mbed_official 573:ad23fe03a082 421
mbed_official 573:ad23fe03a082 422 /**
mbed_official 573:ad23fe03a082 423 * @brief Stops the TIM Base generation in DMA mode.
mbed_official 573:ad23fe03a082 424 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 425 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 426 * @retval HAL status
mbed_official 573:ad23fe03a082 427 */
mbed_official 573:ad23fe03a082 428 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 429 {
mbed_official 573:ad23fe03a082 430 /* Check the parameters */
mbed_official 573:ad23fe03a082 431 assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 432
mbed_official 573:ad23fe03a082 433 /* Disable the TIM Update DMA request */
mbed_official 573:ad23fe03a082 434 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official 573:ad23fe03a082 435
mbed_official 573:ad23fe03a082 436 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 437 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 438
mbed_official 573:ad23fe03a082 439 /* Change the htim state */
mbed_official 573:ad23fe03a082 440 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 441
mbed_official 573:ad23fe03a082 442 /* Return function status */
mbed_official 573:ad23fe03a082 443 return HAL_OK;
mbed_official 573:ad23fe03a082 444 }
mbed_official 573:ad23fe03a082 445
mbed_official 573:ad23fe03a082 446 /**
mbed_official 573:ad23fe03a082 447 * @}
mbed_official 573:ad23fe03a082 448 */
mbed_official 573:ad23fe03a082 449
mbed_official 573:ad23fe03a082 450 /** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions
mbed_official 573:ad23fe03a082 451 * @brief Time Output Compare functions
mbed_official 573:ad23fe03a082 452 *
mbed_official 573:ad23fe03a082 453 @verbatim
mbed_official 573:ad23fe03a082 454 ==============================================================================
mbed_official 573:ad23fe03a082 455 ##### Time Output Compare functions #####
mbed_official 573:ad23fe03a082 456 ==============================================================================
mbed_official 573:ad23fe03a082 457 [..]
mbed_official 573:ad23fe03a082 458 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 459 (+) Initialize and configure the TIM Output Compare.
mbed_official 573:ad23fe03a082 460 (+) De-initialize the TIM Output Compare.
mbed_official 573:ad23fe03a082 461 (+) Start the Time Output Compare.
mbed_official 573:ad23fe03a082 462 (+) Stop the Time Output Compare.
mbed_official 573:ad23fe03a082 463 (+) Start the Time Output Compare and enable interrupt.
mbed_official 573:ad23fe03a082 464 (+) Stop the Time Output Compare and disable interrupt.
mbed_official 573:ad23fe03a082 465 (+) Start the Time Output Compare and enable DMA transfer.
mbed_official 573:ad23fe03a082 466 (+) Stop the Time Output Compare and disable DMA transfer.
mbed_official 573:ad23fe03a082 467
mbed_official 573:ad23fe03a082 468 @endverbatim
mbed_official 573:ad23fe03a082 469 * @{
mbed_official 573:ad23fe03a082 470 */
mbed_official 573:ad23fe03a082 471 /**
mbed_official 573:ad23fe03a082 472 * @brief Initializes the TIM Output Compare according to the specified
mbed_official 573:ad23fe03a082 473 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 474 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 475 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 476 * @retval HAL status
mbed_official 573:ad23fe03a082 477 */
mbed_official 573:ad23fe03a082 478 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
mbed_official 573:ad23fe03a082 479 {
mbed_official 573:ad23fe03a082 480 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 481 if(htim == NULL)
mbed_official 573:ad23fe03a082 482 {
mbed_official 573:ad23fe03a082 483 return HAL_ERROR;
mbed_official 573:ad23fe03a082 484 }
mbed_official 573:ad23fe03a082 485
mbed_official 573:ad23fe03a082 486 /* Check the parameters */
mbed_official 573:ad23fe03a082 487 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 488 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 573:ad23fe03a082 489 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 573:ad23fe03a082 490
mbed_official 573:ad23fe03a082 491 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 492 {
mbed_official 573:ad23fe03a082 493 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 494 htim->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 495 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 496 HAL_TIM_OC_MspInit(htim);
mbed_official 573:ad23fe03a082 497 }
mbed_official 573:ad23fe03a082 498
mbed_official 573:ad23fe03a082 499 /* Set the TIM state */
mbed_official 573:ad23fe03a082 500 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 501
mbed_official 573:ad23fe03a082 502 /* Init the base time for the Output Compare */
mbed_official 573:ad23fe03a082 503 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 504
mbed_official 573:ad23fe03a082 505 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 506 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 507
mbed_official 573:ad23fe03a082 508 return HAL_OK;
mbed_official 573:ad23fe03a082 509 }
mbed_official 573:ad23fe03a082 510
mbed_official 573:ad23fe03a082 511 /**
mbed_official 573:ad23fe03a082 512 * @brief DeInitializes the TIM peripheral
mbed_official 573:ad23fe03a082 513 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 514 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 515 * @retval HAL status
mbed_official 573:ad23fe03a082 516 */
mbed_official 573:ad23fe03a082 517 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 518 {
mbed_official 573:ad23fe03a082 519 /* Check the parameters */
mbed_official 573:ad23fe03a082 520 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 521
mbed_official 573:ad23fe03a082 522 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 523
mbed_official 573:ad23fe03a082 524 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 525 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 526
mbed_official 573:ad23fe03a082 527 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 528 HAL_TIM_OC_MspDeInit(htim);
mbed_official 573:ad23fe03a082 529
mbed_official 573:ad23fe03a082 530 /* Change TIM state */
mbed_official 573:ad23fe03a082 531 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 532
mbed_official 573:ad23fe03a082 533 /* Release Lock */
mbed_official 573:ad23fe03a082 534 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 535
mbed_official 573:ad23fe03a082 536 return HAL_OK;
mbed_official 573:ad23fe03a082 537 }
mbed_official 573:ad23fe03a082 538
mbed_official 573:ad23fe03a082 539 /**
mbed_official 573:ad23fe03a082 540 * @brief Initializes the TIM Output Compare MSP.
mbed_official 573:ad23fe03a082 541 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 542 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 543 * @retval None
mbed_official 573:ad23fe03a082 544 */
mbed_official 573:ad23fe03a082 545 __weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 546 {
mbed_official 573:ad23fe03a082 547 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 548 the HAL_TIM_OC_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 549 */
mbed_official 573:ad23fe03a082 550 }
mbed_official 573:ad23fe03a082 551
mbed_official 573:ad23fe03a082 552 /**
mbed_official 573:ad23fe03a082 553 * @brief DeInitializes TIM Output Compare MSP.
mbed_official 573:ad23fe03a082 554 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 555 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 556 * @retval None
mbed_official 573:ad23fe03a082 557 */
mbed_official 573:ad23fe03a082 558 __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 559 {
mbed_official 573:ad23fe03a082 560 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 561 the HAL_TIM_OC_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 562 */
mbed_official 573:ad23fe03a082 563 }
mbed_official 573:ad23fe03a082 564
mbed_official 573:ad23fe03a082 565 /**
mbed_official 573:ad23fe03a082 566 * @brief Starts the TIM Output Compare signal generation.
mbed_official 573:ad23fe03a082 567 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 568 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 569 * @param Channel: TIM Channel to be enabled.
mbed_official 573:ad23fe03a082 570 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 571 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 572 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 573 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 574 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 575 * @retval HAL status
mbed_official 573:ad23fe03a082 576 */
mbed_official 573:ad23fe03a082 577 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 578 {
mbed_official 573:ad23fe03a082 579 /* Check the parameters */
mbed_official 573:ad23fe03a082 580 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 581
mbed_official 573:ad23fe03a082 582 /* Enable the Output compare channel */
mbed_official 573:ad23fe03a082 583 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 584
mbed_official 573:ad23fe03a082 585 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 586 {
mbed_official 573:ad23fe03a082 587 /* Enable the main output */
mbed_official 573:ad23fe03a082 588 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 589 }
mbed_official 573:ad23fe03a082 590
mbed_official 573:ad23fe03a082 591 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 592 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 593
mbed_official 573:ad23fe03a082 594 /* Return function status */
mbed_official 573:ad23fe03a082 595 return HAL_OK;
mbed_official 573:ad23fe03a082 596 }
mbed_official 573:ad23fe03a082 597
mbed_official 573:ad23fe03a082 598 /**
mbed_official 573:ad23fe03a082 599 * @brief Stops the TIM Output Compare signal generation.
mbed_official 573:ad23fe03a082 600 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 601 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 602 * @param Channel: TIM Channel to be disabled.
mbed_official 573:ad23fe03a082 603 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 604 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 605 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 606 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 607 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 608 * @retval HAL status
mbed_official 573:ad23fe03a082 609 */
mbed_official 573:ad23fe03a082 610 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 611 {
mbed_official 573:ad23fe03a082 612 /* Check the parameters */
mbed_official 573:ad23fe03a082 613 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 614
mbed_official 573:ad23fe03a082 615 /* Disable the Output compare channel */
mbed_official 573:ad23fe03a082 616 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 617
mbed_official 573:ad23fe03a082 618 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 619 {
mbed_official 573:ad23fe03a082 620 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 621 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 622 }
mbed_official 573:ad23fe03a082 623
mbed_official 573:ad23fe03a082 624 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 625 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 626
mbed_official 573:ad23fe03a082 627 /* Return function status */
mbed_official 573:ad23fe03a082 628 return HAL_OK;
mbed_official 573:ad23fe03a082 629 }
mbed_official 573:ad23fe03a082 630
mbed_official 573:ad23fe03a082 631 /**
mbed_official 573:ad23fe03a082 632 * @brief Starts the TIM Output Compare signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 633 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 634 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 635 * @param Channel: TIM Channel to be enabled.
mbed_official 573:ad23fe03a082 636 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 637 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 638 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 639 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 640 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 641 * @retval HAL status
mbed_official 573:ad23fe03a082 642 */
mbed_official 573:ad23fe03a082 643 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 644 {
mbed_official 573:ad23fe03a082 645 /* Check the parameters */
mbed_official 573:ad23fe03a082 646 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 647
mbed_official 573:ad23fe03a082 648 switch (Channel)
mbed_official 573:ad23fe03a082 649 {
mbed_official 573:ad23fe03a082 650 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 651 {
mbed_official 573:ad23fe03a082 652 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 653 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 654 }
mbed_official 573:ad23fe03a082 655 break;
mbed_official 573:ad23fe03a082 656
mbed_official 573:ad23fe03a082 657 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 658 {
mbed_official 573:ad23fe03a082 659 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 660 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 661 }
mbed_official 573:ad23fe03a082 662 break;
mbed_official 573:ad23fe03a082 663
mbed_official 573:ad23fe03a082 664 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 665 {
mbed_official 573:ad23fe03a082 666 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 667 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 668 }
mbed_official 573:ad23fe03a082 669 break;
mbed_official 573:ad23fe03a082 670
mbed_official 573:ad23fe03a082 671 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 672 {
mbed_official 573:ad23fe03a082 673 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 674 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 675 }
mbed_official 573:ad23fe03a082 676 break;
mbed_official 573:ad23fe03a082 677
mbed_official 573:ad23fe03a082 678 default:
mbed_official 573:ad23fe03a082 679 break;
mbed_official 573:ad23fe03a082 680 }
mbed_official 573:ad23fe03a082 681
mbed_official 573:ad23fe03a082 682 /* Enable the Output compare channel */
mbed_official 573:ad23fe03a082 683 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 684
mbed_official 573:ad23fe03a082 685 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 686 {
mbed_official 573:ad23fe03a082 687 /* Enable the main output */
mbed_official 573:ad23fe03a082 688 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 689 }
mbed_official 573:ad23fe03a082 690
mbed_official 573:ad23fe03a082 691 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 692 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 693
mbed_official 573:ad23fe03a082 694 /* Return function status */
mbed_official 573:ad23fe03a082 695 return HAL_OK;
mbed_official 573:ad23fe03a082 696 }
mbed_official 573:ad23fe03a082 697
mbed_official 573:ad23fe03a082 698 /**
mbed_official 573:ad23fe03a082 699 * @brief Stops the TIM Output Compare signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 700 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 701 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 702 * @param Channel: TIM Channel to be disabled.
mbed_official 573:ad23fe03a082 703 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 704 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 705 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 706 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 707 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 708 * @retval HAL status
mbed_official 573:ad23fe03a082 709 */
mbed_official 573:ad23fe03a082 710 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 711 {
mbed_official 573:ad23fe03a082 712 /* Check the parameters */
mbed_official 573:ad23fe03a082 713 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 714
mbed_official 573:ad23fe03a082 715 switch (Channel)
mbed_official 573:ad23fe03a082 716 {
mbed_official 573:ad23fe03a082 717 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 718 {
mbed_official 573:ad23fe03a082 719 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 720 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 721 }
mbed_official 573:ad23fe03a082 722 break;
mbed_official 573:ad23fe03a082 723
mbed_official 573:ad23fe03a082 724 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 725 {
mbed_official 573:ad23fe03a082 726 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 727 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 728 }
mbed_official 573:ad23fe03a082 729 break;
mbed_official 573:ad23fe03a082 730
mbed_official 573:ad23fe03a082 731 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 732 {
mbed_official 573:ad23fe03a082 733 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 734 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 735 }
mbed_official 573:ad23fe03a082 736 break;
mbed_official 573:ad23fe03a082 737
mbed_official 573:ad23fe03a082 738 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 739 {
mbed_official 573:ad23fe03a082 740 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 741 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 742 }
mbed_official 573:ad23fe03a082 743 break;
mbed_official 573:ad23fe03a082 744
mbed_official 573:ad23fe03a082 745 default:
mbed_official 573:ad23fe03a082 746 break;
mbed_official 573:ad23fe03a082 747 }
mbed_official 573:ad23fe03a082 748
mbed_official 573:ad23fe03a082 749 /* Disable the Output compare channel */
mbed_official 573:ad23fe03a082 750 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 751
mbed_official 573:ad23fe03a082 752 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 753 {
mbed_official 573:ad23fe03a082 754 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 755 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 756 }
mbed_official 573:ad23fe03a082 757
mbed_official 573:ad23fe03a082 758 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 759 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 760
mbed_official 573:ad23fe03a082 761 /* Return function status */
mbed_official 573:ad23fe03a082 762 return HAL_OK;
mbed_official 573:ad23fe03a082 763 }
mbed_official 573:ad23fe03a082 764
mbed_official 573:ad23fe03a082 765 /**
mbed_official 573:ad23fe03a082 766 * @brief Starts the TIM Output Compare signal generation in DMA mode.
mbed_official 573:ad23fe03a082 767 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 768 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 769 * @param Channel: TIM Channel to be enabled.
mbed_official 573:ad23fe03a082 770 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 771 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 772 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 773 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 774 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 775 * @param pData: The source Buffer address.
mbed_official 573:ad23fe03a082 776 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 573:ad23fe03a082 777 * @retval HAL status
mbed_official 573:ad23fe03a082 778 */
mbed_official 573:ad23fe03a082 779 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 573:ad23fe03a082 780 {
mbed_official 573:ad23fe03a082 781 /* Check the parameters */
mbed_official 573:ad23fe03a082 782 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 783
mbed_official 573:ad23fe03a082 784 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 785 {
mbed_official 573:ad23fe03a082 786 return HAL_BUSY;
mbed_official 573:ad23fe03a082 787 }
mbed_official 573:ad23fe03a082 788 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 789 {
mbed_official 573:ad23fe03a082 790 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 573:ad23fe03a082 791 {
mbed_official 573:ad23fe03a082 792 return HAL_ERROR;
mbed_official 573:ad23fe03a082 793 }
mbed_official 573:ad23fe03a082 794 else
mbed_official 573:ad23fe03a082 795 {
mbed_official 573:ad23fe03a082 796 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 797 }
mbed_official 573:ad23fe03a082 798 }
mbed_official 573:ad23fe03a082 799 switch (Channel)
mbed_official 573:ad23fe03a082 800 {
mbed_official 573:ad23fe03a082 801 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 802 {
mbed_official 573:ad23fe03a082 803 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 804 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 805
mbed_official 573:ad23fe03a082 806 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 807 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 808
mbed_official 573:ad23fe03a082 809 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 810 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 573:ad23fe03a082 811
mbed_official 573:ad23fe03a082 812 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 813 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 814 }
mbed_official 573:ad23fe03a082 815 break;
mbed_official 573:ad23fe03a082 816
mbed_official 573:ad23fe03a082 817 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 818 {
mbed_official 573:ad23fe03a082 819 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 820 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 821
mbed_official 573:ad23fe03a082 822 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 823 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 824
mbed_official 573:ad23fe03a082 825 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 826 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 573:ad23fe03a082 827
mbed_official 573:ad23fe03a082 828 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 829 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 830 }
mbed_official 573:ad23fe03a082 831 break;
mbed_official 573:ad23fe03a082 832
mbed_official 573:ad23fe03a082 833 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 834 {
mbed_official 573:ad23fe03a082 835 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 836 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 837
mbed_official 573:ad23fe03a082 838 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 839 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 840
mbed_official 573:ad23fe03a082 841 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 842 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 573:ad23fe03a082 843
mbed_official 573:ad23fe03a082 844 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 573:ad23fe03a082 845 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 846 }
mbed_official 573:ad23fe03a082 847 break;
mbed_official 573:ad23fe03a082 848
mbed_official 573:ad23fe03a082 849 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 850 {
mbed_official 573:ad23fe03a082 851 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 852 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 853
mbed_official 573:ad23fe03a082 854 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 855 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 856
mbed_official 573:ad23fe03a082 857 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 858 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 573:ad23fe03a082 859
mbed_official 573:ad23fe03a082 860 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 573:ad23fe03a082 861 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 862 }
mbed_official 573:ad23fe03a082 863 break;
mbed_official 573:ad23fe03a082 864
mbed_official 573:ad23fe03a082 865 default:
mbed_official 573:ad23fe03a082 866 break;
mbed_official 573:ad23fe03a082 867 }
mbed_official 573:ad23fe03a082 868
mbed_official 573:ad23fe03a082 869 /* Enable the Output compare channel */
mbed_official 573:ad23fe03a082 870 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 871
mbed_official 573:ad23fe03a082 872 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 873 {
mbed_official 573:ad23fe03a082 874 /* Enable the main output */
mbed_official 573:ad23fe03a082 875 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 876 }
mbed_official 573:ad23fe03a082 877
mbed_official 573:ad23fe03a082 878 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 879 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 880
mbed_official 573:ad23fe03a082 881 /* Return function status */
mbed_official 573:ad23fe03a082 882 return HAL_OK;
mbed_official 573:ad23fe03a082 883 }
mbed_official 573:ad23fe03a082 884
mbed_official 573:ad23fe03a082 885 /**
mbed_official 573:ad23fe03a082 886 * @brief Stops the TIM Output Compare signal generation in DMA mode.
mbed_official 573:ad23fe03a082 887 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 888 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 889 * @param Channel: TIM Channel to be disabled.
mbed_official 573:ad23fe03a082 890 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 891 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 892 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 893 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 894 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 895 * @retval HAL status
mbed_official 573:ad23fe03a082 896 */
mbed_official 573:ad23fe03a082 897 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 898 {
mbed_official 573:ad23fe03a082 899 /* Check the parameters */
mbed_official 573:ad23fe03a082 900 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 901
mbed_official 573:ad23fe03a082 902 switch (Channel)
mbed_official 573:ad23fe03a082 903 {
mbed_official 573:ad23fe03a082 904 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 905 {
mbed_official 573:ad23fe03a082 906 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 907 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 908 }
mbed_official 573:ad23fe03a082 909 break;
mbed_official 573:ad23fe03a082 910
mbed_official 573:ad23fe03a082 911 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 912 {
mbed_official 573:ad23fe03a082 913 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 914 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 915 }
mbed_official 573:ad23fe03a082 916 break;
mbed_official 573:ad23fe03a082 917
mbed_official 573:ad23fe03a082 918 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 919 {
mbed_official 573:ad23fe03a082 920 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 573:ad23fe03a082 921 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 922 }
mbed_official 573:ad23fe03a082 923 break;
mbed_official 573:ad23fe03a082 924
mbed_official 573:ad23fe03a082 925 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 926 {
mbed_official 573:ad23fe03a082 927 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 928 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 929 }
mbed_official 573:ad23fe03a082 930 break;
mbed_official 573:ad23fe03a082 931
mbed_official 573:ad23fe03a082 932 default:
mbed_official 573:ad23fe03a082 933 break;
mbed_official 573:ad23fe03a082 934 }
mbed_official 573:ad23fe03a082 935
mbed_official 573:ad23fe03a082 936 /* Disable the Output compare channel */
mbed_official 573:ad23fe03a082 937 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 938
mbed_official 573:ad23fe03a082 939 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 940 {
mbed_official 573:ad23fe03a082 941 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 942 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 943 }
mbed_official 573:ad23fe03a082 944
mbed_official 573:ad23fe03a082 945 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 946 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 947
mbed_official 573:ad23fe03a082 948 /* Change the htim state */
mbed_official 573:ad23fe03a082 949 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 950
mbed_official 573:ad23fe03a082 951 /* Return function status */
mbed_official 573:ad23fe03a082 952 return HAL_OK;
mbed_official 573:ad23fe03a082 953 }
mbed_official 573:ad23fe03a082 954
mbed_official 573:ad23fe03a082 955 /**
mbed_official 573:ad23fe03a082 956 * @}
mbed_official 573:ad23fe03a082 957 */
mbed_official 573:ad23fe03a082 958
mbed_official 573:ad23fe03a082 959 /** @defgroup TIM_Exported_Functions_Group3 Time PWM functions
mbed_official 573:ad23fe03a082 960 * @brief Time PWM functions
mbed_official 573:ad23fe03a082 961 *
mbed_official 573:ad23fe03a082 962 @verbatim
mbed_official 573:ad23fe03a082 963 ==============================================================================
mbed_official 573:ad23fe03a082 964 ##### Time PWM functions #####
mbed_official 573:ad23fe03a082 965 ==============================================================================
mbed_official 573:ad23fe03a082 966 [..]
mbed_official 573:ad23fe03a082 967 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 968 (+) Initialize and configure the TIM OPWM.
mbed_official 573:ad23fe03a082 969 (+) De-initialize the TIM PWM.
mbed_official 573:ad23fe03a082 970 (+) Start the Time PWM.
mbed_official 573:ad23fe03a082 971 (+) Stop the Time PWM.
mbed_official 573:ad23fe03a082 972 (+) Start the Time PWM and enable interrupt.
mbed_official 573:ad23fe03a082 973 (+) Stop the Time PWM and disable interrupt.
mbed_official 573:ad23fe03a082 974 (+) Start the Time PWM and enable DMA transfer.
mbed_official 573:ad23fe03a082 975 (+) Stop the Time PWM and disable DMA transfer.
mbed_official 573:ad23fe03a082 976
mbed_official 573:ad23fe03a082 977 @endverbatim
mbed_official 573:ad23fe03a082 978 * @{
mbed_official 573:ad23fe03a082 979 */
mbed_official 573:ad23fe03a082 980 /**
mbed_official 573:ad23fe03a082 981 * @brief Initializes the TIM PWM Time Base according to the specified
mbed_official 573:ad23fe03a082 982 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 983 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 984 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 985 * @retval HAL status
mbed_official 573:ad23fe03a082 986 */
mbed_official 573:ad23fe03a082 987 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 988 {
mbed_official 573:ad23fe03a082 989 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 990 if(htim == NULL)
mbed_official 573:ad23fe03a082 991 {
mbed_official 573:ad23fe03a082 992 return HAL_ERROR;
mbed_official 573:ad23fe03a082 993 }
mbed_official 573:ad23fe03a082 994
mbed_official 573:ad23fe03a082 995 /* Check the parameters */
mbed_official 573:ad23fe03a082 996 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 997 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 573:ad23fe03a082 998 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 573:ad23fe03a082 999
mbed_official 573:ad23fe03a082 1000 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 1001 {
mbed_official 573:ad23fe03a082 1002 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 1003 htim->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 1004 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 1005 HAL_TIM_PWM_MspInit(htim);
mbed_official 573:ad23fe03a082 1006 }
mbed_official 573:ad23fe03a082 1007
mbed_official 573:ad23fe03a082 1008 /* Set the TIM state */
mbed_official 573:ad23fe03a082 1009 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1010
mbed_official 573:ad23fe03a082 1011 /* Init the base time for the PWM */
mbed_official 573:ad23fe03a082 1012 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 1013
mbed_official 573:ad23fe03a082 1014 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 1015 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 1016
mbed_official 573:ad23fe03a082 1017 return HAL_OK;
mbed_official 573:ad23fe03a082 1018 }
mbed_official 573:ad23fe03a082 1019
mbed_official 573:ad23fe03a082 1020 /**
mbed_official 573:ad23fe03a082 1021 * @brief DeInitializes the TIM peripheral
mbed_official 573:ad23fe03a082 1022 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1023 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1024 * @retval HAL status
mbed_official 573:ad23fe03a082 1025 */
mbed_official 573:ad23fe03a082 1026 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1027 {
mbed_official 573:ad23fe03a082 1028 /* Check the parameters */
mbed_official 573:ad23fe03a082 1029 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1030
mbed_official 573:ad23fe03a082 1031 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1032
mbed_official 573:ad23fe03a082 1033 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 1034 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1035
mbed_official 573:ad23fe03a082 1036 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 1037 HAL_TIM_PWM_MspDeInit(htim);
mbed_official 573:ad23fe03a082 1038
mbed_official 573:ad23fe03a082 1039 /* Change TIM state */
mbed_official 573:ad23fe03a082 1040 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 1041
mbed_official 573:ad23fe03a082 1042 /* Release Lock */
mbed_official 573:ad23fe03a082 1043 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 1044
mbed_official 573:ad23fe03a082 1045 return HAL_OK;
mbed_official 573:ad23fe03a082 1046 }
mbed_official 573:ad23fe03a082 1047
mbed_official 573:ad23fe03a082 1048 /**
mbed_official 573:ad23fe03a082 1049 * @brief Initializes the TIM PWM MSP.
mbed_official 573:ad23fe03a082 1050 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1051 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1052 * @retval None
mbed_official 573:ad23fe03a082 1053 */
mbed_official 573:ad23fe03a082 1054 __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1055 {
mbed_official 573:ad23fe03a082 1056 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1057 the HAL_TIM_PWM_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 1058 */
mbed_official 573:ad23fe03a082 1059 }
mbed_official 573:ad23fe03a082 1060
mbed_official 573:ad23fe03a082 1061 /**
mbed_official 573:ad23fe03a082 1062 * @brief DeInitializes TIM PWM MSP.
mbed_official 573:ad23fe03a082 1063 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1064 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1065 * @retval None
mbed_official 573:ad23fe03a082 1066 */
mbed_official 573:ad23fe03a082 1067 __weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1068 {
mbed_official 573:ad23fe03a082 1069 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1070 the HAL_TIM_PWM_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 1071 */
mbed_official 573:ad23fe03a082 1072 }
mbed_official 573:ad23fe03a082 1073
mbed_official 573:ad23fe03a082 1074 /**
mbed_official 573:ad23fe03a082 1075 * @brief Starts the PWM signal generation.
mbed_official 573:ad23fe03a082 1076 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1077 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1078 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 1079 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1080 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1081 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1082 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1083 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1084 * @retval HAL status
mbed_official 573:ad23fe03a082 1085 */
mbed_official 573:ad23fe03a082 1086 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1087 {
mbed_official 573:ad23fe03a082 1088 /* Check the parameters */
mbed_official 573:ad23fe03a082 1089 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1090
mbed_official 573:ad23fe03a082 1091 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 1092 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1093
mbed_official 573:ad23fe03a082 1094 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1095 {
mbed_official 573:ad23fe03a082 1096 /* Enable the main output */
mbed_official 573:ad23fe03a082 1097 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 1098 }
mbed_official 573:ad23fe03a082 1099
mbed_official 573:ad23fe03a082 1100 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1101 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1102
mbed_official 573:ad23fe03a082 1103 /* Return function status */
mbed_official 573:ad23fe03a082 1104 return HAL_OK;
mbed_official 573:ad23fe03a082 1105 }
mbed_official 573:ad23fe03a082 1106
mbed_official 573:ad23fe03a082 1107 /**
mbed_official 573:ad23fe03a082 1108 * @brief Stops the PWM signal generation.
mbed_official 573:ad23fe03a082 1109 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1110 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1111 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1112 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1113 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1114 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1115 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1116 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1117 * @retval HAL status
mbed_official 573:ad23fe03a082 1118 */
mbed_official 573:ad23fe03a082 1119 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1120 {
mbed_official 573:ad23fe03a082 1121 /* Check the parameters */
mbed_official 573:ad23fe03a082 1122 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1123
mbed_official 573:ad23fe03a082 1124 /* Disable the Capture compare channel */
mbed_official 573:ad23fe03a082 1125 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1126
mbed_official 573:ad23fe03a082 1127 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1128 {
mbed_official 573:ad23fe03a082 1129 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 1130 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 1131 }
mbed_official 573:ad23fe03a082 1132
mbed_official 573:ad23fe03a082 1133 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1134 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1135
mbed_official 573:ad23fe03a082 1136 /* Change the htim state */
mbed_official 573:ad23fe03a082 1137 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 1138
mbed_official 573:ad23fe03a082 1139 /* Return function status */
mbed_official 573:ad23fe03a082 1140 return HAL_OK;
mbed_official 573:ad23fe03a082 1141 }
mbed_official 573:ad23fe03a082 1142
mbed_official 573:ad23fe03a082 1143 /**
mbed_official 573:ad23fe03a082 1144 * @brief Starts the PWM signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 1145 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1146 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1147 * @param Channel: TIM Channel to be disabled.
mbed_official 573:ad23fe03a082 1148 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1149 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1150 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1151 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1152 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1153 * @retval HAL status
mbed_official 573:ad23fe03a082 1154 */
mbed_official 573:ad23fe03a082 1155 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1156 {
mbed_official 573:ad23fe03a082 1157 /* Check the parameters */
mbed_official 573:ad23fe03a082 1158 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1159
mbed_official 573:ad23fe03a082 1160 switch (Channel)
mbed_official 573:ad23fe03a082 1161 {
mbed_official 573:ad23fe03a082 1162 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1163 {
mbed_official 573:ad23fe03a082 1164 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 1165 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 1166 }
mbed_official 573:ad23fe03a082 1167 break;
mbed_official 573:ad23fe03a082 1168
mbed_official 573:ad23fe03a082 1169 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1170 {
mbed_official 573:ad23fe03a082 1171 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 1172 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 1173 }
mbed_official 573:ad23fe03a082 1174 break;
mbed_official 573:ad23fe03a082 1175
mbed_official 573:ad23fe03a082 1176 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1177 {
mbed_official 573:ad23fe03a082 1178 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 1179 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 1180 }
mbed_official 573:ad23fe03a082 1181 break;
mbed_official 573:ad23fe03a082 1182
mbed_official 573:ad23fe03a082 1183 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1184 {
mbed_official 573:ad23fe03a082 1185 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 1186 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 1187 }
mbed_official 573:ad23fe03a082 1188 break;
mbed_official 573:ad23fe03a082 1189
mbed_official 573:ad23fe03a082 1190 default:
mbed_official 573:ad23fe03a082 1191 break;
mbed_official 573:ad23fe03a082 1192 }
mbed_official 573:ad23fe03a082 1193
mbed_official 573:ad23fe03a082 1194 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 1195 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1196
mbed_official 573:ad23fe03a082 1197 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1198 {
mbed_official 573:ad23fe03a082 1199 /* Enable the main output */
mbed_official 573:ad23fe03a082 1200 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 1201 }
mbed_official 573:ad23fe03a082 1202
mbed_official 573:ad23fe03a082 1203 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1204 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1205
mbed_official 573:ad23fe03a082 1206 /* Return function status */
mbed_official 573:ad23fe03a082 1207 return HAL_OK;
mbed_official 573:ad23fe03a082 1208 }
mbed_official 573:ad23fe03a082 1209
mbed_official 573:ad23fe03a082 1210 /**
mbed_official 573:ad23fe03a082 1211 * @brief Stops the PWM signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 1212 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1213 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1214 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1215 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1216 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1217 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1218 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1219 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1220 * @retval HAL status
mbed_official 573:ad23fe03a082 1221 */
mbed_official 573:ad23fe03a082 1222 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1223 {
mbed_official 573:ad23fe03a082 1224 /* Check the parameters */
mbed_official 573:ad23fe03a082 1225 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1226
mbed_official 573:ad23fe03a082 1227 switch (Channel)
mbed_official 573:ad23fe03a082 1228 {
mbed_official 573:ad23fe03a082 1229 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1230 {
mbed_official 573:ad23fe03a082 1231 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 1232 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 1233 }
mbed_official 573:ad23fe03a082 1234 break;
mbed_official 573:ad23fe03a082 1235
mbed_official 573:ad23fe03a082 1236 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1237 {
mbed_official 573:ad23fe03a082 1238 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 1239 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 1240 }
mbed_official 573:ad23fe03a082 1241 break;
mbed_official 573:ad23fe03a082 1242
mbed_official 573:ad23fe03a082 1243 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1244 {
mbed_official 573:ad23fe03a082 1245 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 1246 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 1247 }
mbed_official 573:ad23fe03a082 1248 break;
mbed_official 573:ad23fe03a082 1249
mbed_official 573:ad23fe03a082 1250 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1251 {
mbed_official 573:ad23fe03a082 1252 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 1253 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 1254 }
mbed_official 573:ad23fe03a082 1255 break;
mbed_official 573:ad23fe03a082 1256
mbed_official 573:ad23fe03a082 1257 default:
mbed_official 573:ad23fe03a082 1258 break;
mbed_official 573:ad23fe03a082 1259 }
mbed_official 573:ad23fe03a082 1260
mbed_official 573:ad23fe03a082 1261 /* Disable the Capture compare channel */
mbed_official 573:ad23fe03a082 1262 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1263
mbed_official 573:ad23fe03a082 1264 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1265 {
mbed_official 573:ad23fe03a082 1266 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 1267 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 1268 }
mbed_official 573:ad23fe03a082 1269
mbed_official 573:ad23fe03a082 1270 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1271 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1272
mbed_official 573:ad23fe03a082 1273 /* Return function status */
mbed_official 573:ad23fe03a082 1274 return HAL_OK;
mbed_official 573:ad23fe03a082 1275 }
mbed_official 573:ad23fe03a082 1276
mbed_official 573:ad23fe03a082 1277 /**
mbed_official 573:ad23fe03a082 1278 * @brief Starts the TIM PWM signal generation in DMA mode.
mbed_official 573:ad23fe03a082 1279 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1280 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1281 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 1282 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1283 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1284 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1285 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1286 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1287 * @param pData: The source Buffer address.
mbed_official 573:ad23fe03a082 1288 * @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official 573:ad23fe03a082 1289 * @retval HAL status
mbed_official 573:ad23fe03a082 1290 */
mbed_official 573:ad23fe03a082 1291 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 573:ad23fe03a082 1292 {
mbed_official 573:ad23fe03a082 1293 /* Check the parameters */
mbed_official 573:ad23fe03a082 1294 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1295
mbed_official 573:ad23fe03a082 1296 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 1297 {
mbed_official 573:ad23fe03a082 1298 return HAL_BUSY;
mbed_official 573:ad23fe03a082 1299 }
mbed_official 573:ad23fe03a082 1300 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 1301 {
mbed_official 573:ad23fe03a082 1302 if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official 573:ad23fe03a082 1303 {
mbed_official 573:ad23fe03a082 1304 return HAL_ERROR;
mbed_official 573:ad23fe03a082 1305 }
mbed_official 573:ad23fe03a082 1306 else
mbed_official 573:ad23fe03a082 1307 {
mbed_official 573:ad23fe03a082 1308 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1309 }
mbed_official 573:ad23fe03a082 1310 }
mbed_official 573:ad23fe03a082 1311 switch (Channel)
mbed_official 573:ad23fe03a082 1312 {
mbed_official 573:ad23fe03a082 1313 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1314 {
mbed_official 573:ad23fe03a082 1315 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1316 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 1317
mbed_official 573:ad23fe03a082 1318 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1319 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1320
mbed_official 573:ad23fe03a082 1321 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1322 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official 573:ad23fe03a082 1323
mbed_official 573:ad23fe03a082 1324 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 1325 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 1326 }
mbed_official 573:ad23fe03a082 1327 break;
mbed_official 573:ad23fe03a082 1328
mbed_official 573:ad23fe03a082 1329 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1330 {
mbed_official 573:ad23fe03a082 1331 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1332 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 1333
mbed_official 573:ad23fe03a082 1334 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1335 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1336
mbed_official 573:ad23fe03a082 1337 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1338 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official 573:ad23fe03a082 1339
mbed_official 573:ad23fe03a082 1340 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 1341 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 1342 }
mbed_official 573:ad23fe03a082 1343 break;
mbed_official 573:ad23fe03a082 1344
mbed_official 573:ad23fe03a082 1345 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1346 {
mbed_official 573:ad23fe03a082 1347 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1348 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 1349
mbed_official 573:ad23fe03a082 1350 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1351 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1352
mbed_official 573:ad23fe03a082 1353 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1354 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official 573:ad23fe03a082 1355
mbed_official 573:ad23fe03a082 1356 /* Enable the TIM Output Capture/Compare 3 request */
mbed_official 573:ad23fe03a082 1357 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 1358 }
mbed_official 573:ad23fe03a082 1359 break;
mbed_official 573:ad23fe03a082 1360
mbed_official 573:ad23fe03a082 1361 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1362 {
mbed_official 573:ad23fe03a082 1363 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1364 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 1365
mbed_official 573:ad23fe03a082 1366 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1367 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1368
mbed_official 573:ad23fe03a082 1369 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1370 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official 573:ad23fe03a082 1371
mbed_official 573:ad23fe03a082 1372 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 573:ad23fe03a082 1373 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 1374 }
mbed_official 573:ad23fe03a082 1375 break;
mbed_official 573:ad23fe03a082 1376
mbed_official 573:ad23fe03a082 1377 default:
mbed_official 573:ad23fe03a082 1378 break;
mbed_official 573:ad23fe03a082 1379 }
mbed_official 573:ad23fe03a082 1380
mbed_official 573:ad23fe03a082 1381 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 1382 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1383
mbed_official 573:ad23fe03a082 1384 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1385 {
mbed_official 573:ad23fe03a082 1386 /* Enable the main output */
mbed_official 573:ad23fe03a082 1387 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 1388 }
mbed_official 573:ad23fe03a082 1389
mbed_official 573:ad23fe03a082 1390 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1391 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1392
mbed_official 573:ad23fe03a082 1393 /* Return function status */
mbed_official 573:ad23fe03a082 1394 return HAL_OK;
mbed_official 573:ad23fe03a082 1395 }
mbed_official 573:ad23fe03a082 1396
mbed_official 573:ad23fe03a082 1397 /**
mbed_official 573:ad23fe03a082 1398 * @brief Stops the TIM PWM signal generation in DMA mode.
mbed_official 573:ad23fe03a082 1399 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1400 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1401 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1402 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1403 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1404 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1405 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1406 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1407 * @retval HAL status
mbed_official 573:ad23fe03a082 1408 */
mbed_official 573:ad23fe03a082 1409 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1410 {
mbed_official 573:ad23fe03a082 1411 /* Check the parameters */
mbed_official 573:ad23fe03a082 1412 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1413
mbed_official 573:ad23fe03a082 1414 switch (Channel)
mbed_official 573:ad23fe03a082 1415 {
mbed_official 573:ad23fe03a082 1416 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1417 {
mbed_official 573:ad23fe03a082 1418 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 1419 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 1420 }
mbed_official 573:ad23fe03a082 1421 break;
mbed_official 573:ad23fe03a082 1422
mbed_official 573:ad23fe03a082 1423 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1424 {
mbed_official 573:ad23fe03a082 1425 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 1426 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 1427 }
mbed_official 573:ad23fe03a082 1428 break;
mbed_official 573:ad23fe03a082 1429
mbed_official 573:ad23fe03a082 1430 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1431 {
mbed_official 573:ad23fe03a082 1432 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 573:ad23fe03a082 1433 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 1434 }
mbed_official 573:ad23fe03a082 1435 break;
mbed_official 573:ad23fe03a082 1436
mbed_official 573:ad23fe03a082 1437 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1438 {
mbed_official 573:ad23fe03a082 1439 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 1440 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 1441 }
mbed_official 573:ad23fe03a082 1442 break;
mbed_official 573:ad23fe03a082 1443
mbed_official 573:ad23fe03a082 1444 default:
mbed_official 573:ad23fe03a082 1445 break;
mbed_official 573:ad23fe03a082 1446 }
mbed_official 573:ad23fe03a082 1447
mbed_official 573:ad23fe03a082 1448 /* Disable the Capture compare channel */
mbed_official 573:ad23fe03a082 1449 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1450
mbed_official 573:ad23fe03a082 1451 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 1452 {
mbed_official 573:ad23fe03a082 1453 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 1454 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 1455 }
mbed_official 573:ad23fe03a082 1456
mbed_official 573:ad23fe03a082 1457 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1458 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1459
mbed_official 573:ad23fe03a082 1460 /* Change the htim state */
mbed_official 573:ad23fe03a082 1461 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 1462
mbed_official 573:ad23fe03a082 1463 /* Return function status */
mbed_official 573:ad23fe03a082 1464 return HAL_OK;
mbed_official 573:ad23fe03a082 1465 }
mbed_official 573:ad23fe03a082 1466
mbed_official 573:ad23fe03a082 1467 /**
mbed_official 573:ad23fe03a082 1468 * @}
mbed_official 573:ad23fe03a082 1469 */
mbed_official 573:ad23fe03a082 1470
mbed_official 573:ad23fe03a082 1471 /** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions
mbed_official 573:ad23fe03a082 1472 * @brief Time Input Capture functions
mbed_official 573:ad23fe03a082 1473 *
mbed_official 573:ad23fe03a082 1474 @verbatim
mbed_official 573:ad23fe03a082 1475 ==============================================================================
mbed_official 573:ad23fe03a082 1476 ##### Time Input Capture functions #####
mbed_official 573:ad23fe03a082 1477 ==============================================================================
mbed_official 573:ad23fe03a082 1478 [..]
mbed_official 573:ad23fe03a082 1479 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 1480 (+) Initialize and configure the TIM Input Capture.
mbed_official 573:ad23fe03a082 1481 (+) De-initialize the TIM Input Capture.
mbed_official 573:ad23fe03a082 1482 (+) Start the Time Input Capture.
mbed_official 573:ad23fe03a082 1483 (+) Stop the Time Input Capture.
mbed_official 573:ad23fe03a082 1484 (+) Start the Time Input Capture and enable interrupt.
mbed_official 573:ad23fe03a082 1485 (+) Stop the Time Input Capture and disable interrupt.
mbed_official 573:ad23fe03a082 1486 (+) Start the Time Input Capture and enable DMA transfer.
mbed_official 573:ad23fe03a082 1487 (+) Stop the Time Input Capture and disable DMA transfer.
mbed_official 573:ad23fe03a082 1488
mbed_official 573:ad23fe03a082 1489 @endverbatim
mbed_official 573:ad23fe03a082 1490 * @{
mbed_official 573:ad23fe03a082 1491 */
mbed_official 573:ad23fe03a082 1492 /**
mbed_official 573:ad23fe03a082 1493 * @brief Initializes the TIM Input Capture Time base according to the specified
mbed_official 573:ad23fe03a082 1494 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 1495 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1496 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1497 * @retval HAL status
mbed_official 573:ad23fe03a082 1498 */
mbed_official 573:ad23fe03a082 1499 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1500 {
mbed_official 573:ad23fe03a082 1501 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 1502 if(htim == NULL)
mbed_official 573:ad23fe03a082 1503 {
mbed_official 573:ad23fe03a082 1504 return HAL_ERROR;
mbed_official 573:ad23fe03a082 1505 }
mbed_official 573:ad23fe03a082 1506
mbed_official 573:ad23fe03a082 1507 /* Check the parameters */
mbed_official 573:ad23fe03a082 1508 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1509 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 573:ad23fe03a082 1510 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 573:ad23fe03a082 1511
mbed_official 573:ad23fe03a082 1512 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 1513 {
mbed_official 573:ad23fe03a082 1514 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 1515 htim->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 1516 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 1517 HAL_TIM_IC_MspInit(htim);
mbed_official 573:ad23fe03a082 1518 }
mbed_official 573:ad23fe03a082 1519
mbed_official 573:ad23fe03a082 1520 /* Set the TIM state */
mbed_official 573:ad23fe03a082 1521 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1522
mbed_official 573:ad23fe03a082 1523 /* Init the base time for the input capture */
mbed_official 573:ad23fe03a082 1524 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 1525
mbed_official 573:ad23fe03a082 1526 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 1527 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 1528
mbed_official 573:ad23fe03a082 1529 return HAL_OK;
mbed_official 573:ad23fe03a082 1530 }
mbed_official 573:ad23fe03a082 1531
mbed_official 573:ad23fe03a082 1532 /**
mbed_official 573:ad23fe03a082 1533 * @brief DeInitializes the TIM peripheral
mbed_official 573:ad23fe03a082 1534 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1535 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1536 * @retval HAL status
mbed_official 573:ad23fe03a082 1537 */
mbed_official 573:ad23fe03a082 1538 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1539 {
mbed_official 573:ad23fe03a082 1540 /* Check the parameters */
mbed_official 573:ad23fe03a082 1541 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1542
mbed_official 573:ad23fe03a082 1543 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1544
mbed_official 573:ad23fe03a082 1545 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 1546 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1547
mbed_official 573:ad23fe03a082 1548 /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 1549 HAL_TIM_IC_MspDeInit(htim);
mbed_official 573:ad23fe03a082 1550
mbed_official 573:ad23fe03a082 1551 /* Change TIM state */
mbed_official 573:ad23fe03a082 1552 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 1553
mbed_official 573:ad23fe03a082 1554 /* Release Lock */
mbed_official 573:ad23fe03a082 1555 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 1556
mbed_official 573:ad23fe03a082 1557 return HAL_OK;
mbed_official 573:ad23fe03a082 1558 }
mbed_official 573:ad23fe03a082 1559
mbed_official 573:ad23fe03a082 1560 /**
mbed_official 573:ad23fe03a082 1561 * @brief Initializes the TIM INput Capture MSP.
mbed_official 573:ad23fe03a082 1562 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1563 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1564 * @retval None
mbed_official 573:ad23fe03a082 1565 */
mbed_official 573:ad23fe03a082 1566 __weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1567 {
mbed_official 573:ad23fe03a082 1568 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1569 the HAL_TIM_IC_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 1570 */
mbed_official 573:ad23fe03a082 1571 }
mbed_official 573:ad23fe03a082 1572
mbed_official 573:ad23fe03a082 1573 /**
mbed_official 573:ad23fe03a082 1574 * @brief DeInitializes TIM Input Capture MSP.
mbed_official 573:ad23fe03a082 1575 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1576 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1577 * @retval None
mbed_official 573:ad23fe03a082 1578 */
mbed_official 573:ad23fe03a082 1579 __weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 1580 {
mbed_official 573:ad23fe03a082 1581 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1582 the HAL_TIM_IC_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 1583 */
mbed_official 573:ad23fe03a082 1584 }
mbed_official 573:ad23fe03a082 1585
mbed_official 573:ad23fe03a082 1586 /**
mbed_official 573:ad23fe03a082 1587 * @brief Starts the TIM Input Capture measurement.
mbed_official 573:ad23fe03a082 1588 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1589 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1590 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 1591 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1592 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1593 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1594 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1595 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1596 * @retval HAL status
mbed_official 573:ad23fe03a082 1597 */
mbed_official 573:ad23fe03a082 1598 HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1599 {
mbed_official 573:ad23fe03a082 1600 /* Check the parameters */
mbed_official 573:ad23fe03a082 1601 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1602
mbed_official 573:ad23fe03a082 1603 /* Enable the Input Capture channel */
mbed_official 573:ad23fe03a082 1604 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1605
mbed_official 573:ad23fe03a082 1606 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1607 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1608
mbed_official 573:ad23fe03a082 1609 /* Return function status */
mbed_official 573:ad23fe03a082 1610 return HAL_OK;
mbed_official 573:ad23fe03a082 1611 }
mbed_official 573:ad23fe03a082 1612
mbed_official 573:ad23fe03a082 1613 /**
mbed_official 573:ad23fe03a082 1614 * @brief Stops the TIM Input Capture measurement.
mbed_official 573:ad23fe03a082 1615 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1616 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1617 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1618 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1619 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1620 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1621 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1622 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1623 * @retval HAL status
mbed_official 573:ad23fe03a082 1624 */
mbed_official 573:ad23fe03a082 1625 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1626 {
mbed_official 573:ad23fe03a082 1627 /* Check the parameters */
mbed_official 573:ad23fe03a082 1628 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1629
mbed_official 573:ad23fe03a082 1630 /* Disable the Input Capture channel */
mbed_official 573:ad23fe03a082 1631 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1632
mbed_official 573:ad23fe03a082 1633 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1634 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1635
mbed_official 573:ad23fe03a082 1636 /* Return function status */
mbed_official 573:ad23fe03a082 1637 return HAL_OK;
mbed_official 573:ad23fe03a082 1638 }
mbed_official 573:ad23fe03a082 1639
mbed_official 573:ad23fe03a082 1640 /**
mbed_official 573:ad23fe03a082 1641 * @brief Starts the TIM Input Capture measurement in interrupt mode.
mbed_official 573:ad23fe03a082 1642 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1643 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1644 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 1645 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1646 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1647 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1648 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1649 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1650 * @retval HAL status
mbed_official 573:ad23fe03a082 1651 */
mbed_official 573:ad23fe03a082 1652 HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1653 {
mbed_official 573:ad23fe03a082 1654 /* Check the parameters */
mbed_official 573:ad23fe03a082 1655 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1656
mbed_official 573:ad23fe03a082 1657 switch (Channel)
mbed_official 573:ad23fe03a082 1658 {
mbed_official 573:ad23fe03a082 1659 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1660 {
mbed_official 573:ad23fe03a082 1661 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 1662 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 1663 }
mbed_official 573:ad23fe03a082 1664 break;
mbed_official 573:ad23fe03a082 1665
mbed_official 573:ad23fe03a082 1666 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1667 {
mbed_official 573:ad23fe03a082 1668 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 1669 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 1670 }
mbed_official 573:ad23fe03a082 1671 break;
mbed_official 573:ad23fe03a082 1672
mbed_official 573:ad23fe03a082 1673 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1674 {
mbed_official 573:ad23fe03a082 1675 /* Enable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 1676 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 1677 }
mbed_official 573:ad23fe03a082 1678 break;
mbed_official 573:ad23fe03a082 1679
mbed_official 573:ad23fe03a082 1680 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1681 {
mbed_official 573:ad23fe03a082 1682 /* Enable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 1683 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 1684 }
mbed_official 573:ad23fe03a082 1685 break;
mbed_official 573:ad23fe03a082 1686
mbed_official 573:ad23fe03a082 1687 default:
mbed_official 573:ad23fe03a082 1688 break;
mbed_official 573:ad23fe03a082 1689 }
mbed_official 573:ad23fe03a082 1690 /* Enable the Input Capture channel */
mbed_official 573:ad23fe03a082 1691 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1692
mbed_official 573:ad23fe03a082 1693 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1694 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1695
mbed_official 573:ad23fe03a082 1696 /* Return function status */
mbed_official 573:ad23fe03a082 1697 return HAL_OK;
mbed_official 573:ad23fe03a082 1698 }
mbed_official 573:ad23fe03a082 1699
mbed_official 573:ad23fe03a082 1700 /**
mbed_official 573:ad23fe03a082 1701 * @brief Stops the TIM Input Capture measurement in interrupt mode.
mbed_official 573:ad23fe03a082 1702 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1703 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1704 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1705 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1706 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1707 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1708 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1709 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1710 * @retval HAL status
mbed_official 573:ad23fe03a082 1711 */
mbed_official 573:ad23fe03a082 1712 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1713 {
mbed_official 573:ad23fe03a082 1714 /* Check the parameters */
mbed_official 573:ad23fe03a082 1715 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1716
mbed_official 573:ad23fe03a082 1717 switch (Channel)
mbed_official 573:ad23fe03a082 1718 {
mbed_official 573:ad23fe03a082 1719 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1720 {
mbed_official 573:ad23fe03a082 1721 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 1722 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 1723 }
mbed_official 573:ad23fe03a082 1724 break;
mbed_official 573:ad23fe03a082 1725
mbed_official 573:ad23fe03a082 1726 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1727 {
mbed_official 573:ad23fe03a082 1728 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 1729 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 1730 }
mbed_official 573:ad23fe03a082 1731 break;
mbed_official 573:ad23fe03a082 1732
mbed_official 573:ad23fe03a082 1733 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1734 {
mbed_official 573:ad23fe03a082 1735 /* Disable the TIM Capture/Compare 3 interrupt */
mbed_official 573:ad23fe03a082 1736 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 1737 }
mbed_official 573:ad23fe03a082 1738 break;
mbed_official 573:ad23fe03a082 1739
mbed_official 573:ad23fe03a082 1740 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1741 {
mbed_official 573:ad23fe03a082 1742 /* Disable the TIM Capture/Compare 4 interrupt */
mbed_official 573:ad23fe03a082 1743 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 1744 }
mbed_official 573:ad23fe03a082 1745 break;
mbed_official 573:ad23fe03a082 1746
mbed_official 573:ad23fe03a082 1747 default:
mbed_official 573:ad23fe03a082 1748 break;
mbed_official 573:ad23fe03a082 1749 }
mbed_official 573:ad23fe03a082 1750
mbed_official 573:ad23fe03a082 1751 /* Disable the Input Capture channel */
mbed_official 573:ad23fe03a082 1752 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1753
mbed_official 573:ad23fe03a082 1754 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1755 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1756
mbed_official 573:ad23fe03a082 1757 /* Return function status */
mbed_official 573:ad23fe03a082 1758 return HAL_OK;
mbed_official 573:ad23fe03a082 1759 }
mbed_official 573:ad23fe03a082 1760
mbed_official 573:ad23fe03a082 1761 /**
mbed_official 573:ad23fe03a082 1762 * @brief Starts the TIM Input Capture measurement on in DMA mode.
mbed_official 573:ad23fe03a082 1763 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1764 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1765 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 1766 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1767 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1768 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1769 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1770 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1771 * @param pData: The destination Buffer address.
mbed_official 573:ad23fe03a082 1772 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 573:ad23fe03a082 1773 * @retval HAL status
mbed_official 573:ad23fe03a082 1774 */
mbed_official 573:ad23fe03a082 1775 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
mbed_official 573:ad23fe03a082 1776 {
mbed_official 573:ad23fe03a082 1777 /* Check the parameters */
mbed_official 573:ad23fe03a082 1778 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1779 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1780
mbed_official 573:ad23fe03a082 1781 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 1782 {
mbed_official 573:ad23fe03a082 1783 return HAL_BUSY;
mbed_official 573:ad23fe03a082 1784 }
mbed_official 573:ad23fe03a082 1785 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 1786 {
mbed_official 573:ad23fe03a082 1787 if((pData == 0 ) && (Length > 0))
mbed_official 573:ad23fe03a082 1788 {
mbed_official 573:ad23fe03a082 1789 return HAL_ERROR;
mbed_official 573:ad23fe03a082 1790 }
mbed_official 573:ad23fe03a082 1791 else
mbed_official 573:ad23fe03a082 1792 {
mbed_official 573:ad23fe03a082 1793 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 1794 }
mbed_official 573:ad23fe03a082 1795 }
mbed_official 573:ad23fe03a082 1796
mbed_official 573:ad23fe03a082 1797 switch (Channel)
mbed_official 573:ad23fe03a082 1798 {
mbed_official 573:ad23fe03a082 1799 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1800 {
mbed_official 573:ad23fe03a082 1801 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1802 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 1803
mbed_official 573:ad23fe03a082 1804 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1805 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1806
mbed_official 573:ad23fe03a082 1807 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1808 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official 573:ad23fe03a082 1809
mbed_official 573:ad23fe03a082 1810 /* Enable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 1811 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 1812 }
mbed_official 573:ad23fe03a082 1813 break;
mbed_official 573:ad23fe03a082 1814
mbed_official 573:ad23fe03a082 1815 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1816 {
mbed_official 573:ad23fe03a082 1817 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1818 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 1819
mbed_official 573:ad23fe03a082 1820 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1821 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1822
mbed_official 573:ad23fe03a082 1823 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1824 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
mbed_official 573:ad23fe03a082 1825
mbed_official 573:ad23fe03a082 1826 /* Enable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 1827 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 1828 }
mbed_official 573:ad23fe03a082 1829 break;
mbed_official 573:ad23fe03a082 1830
mbed_official 573:ad23fe03a082 1831 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1832 {
mbed_official 573:ad23fe03a082 1833 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1834 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 1835
mbed_official 573:ad23fe03a082 1836 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1837 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1838
mbed_official 573:ad23fe03a082 1839 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1840 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
mbed_official 573:ad23fe03a082 1841
mbed_official 573:ad23fe03a082 1842 /* Enable the TIM Capture/Compare 3 DMA request */
mbed_official 573:ad23fe03a082 1843 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 1844 }
mbed_official 573:ad23fe03a082 1845 break;
mbed_official 573:ad23fe03a082 1846
mbed_official 573:ad23fe03a082 1847 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1848 {
mbed_official 573:ad23fe03a082 1849 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 1850 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 1851
mbed_official 573:ad23fe03a082 1852 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1853 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 1854
mbed_official 573:ad23fe03a082 1855 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 1856 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
mbed_official 573:ad23fe03a082 1857
mbed_official 573:ad23fe03a082 1858 /* Enable the TIM Capture/Compare 4 DMA request */
mbed_official 573:ad23fe03a082 1859 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 1860 }
mbed_official 573:ad23fe03a082 1861 break;
mbed_official 573:ad23fe03a082 1862
mbed_official 573:ad23fe03a082 1863 default:
mbed_official 573:ad23fe03a082 1864 break;
mbed_official 573:ad23fe03a082 1865 }
mbed_official 573:ad23fe03a082 1866
mbed_official 573:ad23fe03a082 1867 /* Enable the Input Capture channel */
mbed_official 573:ad23fe03a082 1868 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 1869
mbed_official 573:ad23fe03a082 1870 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 1871 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 1872
mbed_official 573:ad23fe03a082 1873 /* Return function status */
mbed_official 573:ad23fe03a082 1874 return HAL_OK;
mbed_official 573:ad23fe03a082 1875 }
mbed_official 573:ad23fe03a082 1876
mbed_official 573:ad23fe03a082 1877 /**
mbed_official 573:ad23fe03a082 1878 * @brief Stops the TIM Input Capture measurement on in DMA mode.
mbed_official 573:ad23fe03a082 1879 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1880 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1881 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 1882 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1883 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 1884 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 1885 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 1886 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 1887 * @retval HAL status
mbed_official 573:ad23fe03a082 1888 */
mbed_official 573:ad23fe03a082 1889 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 1890 {
mbed_official 573:ad23fe03a082 1891 /* Check the parameters */
mbed_official 573:ad23fe03a082 1892 assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official 573:ad23fe03a082 1893 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1894
mbed_official 573:ad23fe03a082 1895 switch (Channel)
mbed_official 573:ad23fe03a082 1896 {
mbed_official 573:ad23fe03a082 1897 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 1898 {
mbed_official 573:ad23fe03a082 1899 /* Disable the TIM Capture/Compare 1 DMA request */
mbed_official 573:ad23fe03a082 1900 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 1901 }
mbed_official 573:ad23fe03a082 1902 break;
mbed_official 573:ad23fe03a082 1903
mbed_official 573:ad23fe03a082 1904 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 1905 {
mbed_official 573:ad23fe03a082 1906 /* Disable the TIM Capture/Compare 2 DMA request */
mbed_official 573:ad23fe03a082 1907 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 1908 }
mbed_official 573:ad23fe03a082 1909 break;
mbed_official 573:ad23fe03a082 1910
mbed_official 573:ad23fe03a082 1911 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 1912 {
mbed_official 573:ad23fe03a082 1913 /* Disable the TIM Capture/Compare 3 DMA request */
mbed_official 573:ad23fe03a082 1914 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official 573:ad23fe03a082 1915 }
mbed_official 573:ad23fe03a082 1916 break;
mbed_official 573:ad23fe03a082 1917
mbed_official 573:ad23fe03a082 1918 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 1919 {
mbed_official 573:ad23fe03a082 1920 /* Disable the TIM Capture/Compare 4 DMA request */
mbed_official 573:ad23fe03a082 1921 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official 573:ad23fe03a082 1922 }
mbed_official 573:ad23fe03a082 1923 break;
mbed_official 573:ad23fe03a082 1924
mbed_official 573:ad23fe03a082 1925 default:
mbed_official 573:ad23fe03a082 1926 break;
mbed_official 573:ad23fe03a082 1927 }
mbed_official 573:ad23fe03a082 1928
mbed_official 573:ad23fe03a082 1929 /* Disable the Input Capture channel */
mbed_official 573:ad23fe03a082 1930 TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 1931
mbed_official 573:ad23fe03a082 1932 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 1933 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 1934
mbed_official 573:ad23fe03a082 1935 /* Change the htim state */
mbed_official 573:ad23fe03a082 1936 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 1937
mbed_official 573:ad23fe03a082 1938 /* Return function status */
mbed_official 573:ad23fe03a082 1939 return HAL_OK;
mbed_official 573:ad23fe03a082 1940 }
mbed_official 573:ad23fe03a082 1941 /**
mbed_official 573:ad23fe03a082 1942 * @}
mbed_official 573:ad23fe03a082 1943 */
mbed_official 573:ad23fe03a082 1944
mbed_official 573:ad23fe03a082 1945 /** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions
mbed_official 573:ad23fe03a082 1946 * @brief Time One Pulse functions
mbed_official 573:ad23fe03a082 1947 *
mbed_official 573:ad23fe03a082 1948 @verbatim
mbed_official 573:ad23fe03a082 1949 ==============================================================================
mbed_official 573:ad23fe03a082 1950 ##### Time One Pulse functions #####
mbed_official 573:ad23fe03a082 1951 ==============================================================================
mbed_official 573:ad23fe03a082 1952 [..]
mbed_official 573:ad23fe03a082 1953 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 1954 (+) Initialize and configure the TIM One Pulse.
mbed_official 573:ad23fe03a082 1955 (+) De-initialize the TIM One Pulse.
mbed_official 573:ad23fe03a082 1956 (+) Start the Time One Pulse.
mbed_official 573:ad23fe03a082 1957 (+) Stop the Time One Pulse.
mbed_official 573:ad23fe03a082 1958 (+) Start the Time One Pulse and enable interrupt.
mbed_official 573:ad23fe03a082 1959 (+) Stop the Time One Pulse and disable interrupt.
mbed_official 573:ad23fe03a082 1960 (+) Start the Time One Pulse and enable DMA transfer.
mbed_official 573:ad23fe03a082 1961 (+) Stop the Time One Pulse and disable DMA transfer.
mbed_official 573:ad23fe03a082 1962
mbed_official 573:ad23fe03a082 1963 @endverbatim
mbed_official 573:ad23fe03a082 1964 * @{
mbed_official 573:ad23fe03a082 1965 */
mbed_official 573:ad23fe03a082 1966 /**
mbed_official 573:ad23fe03a082 1967 * @brief Initializes the TIM One Pulse Time Base according to the specified
mbed_official 573:ad23fe03a082 1968 * parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 1969 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1970 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 1971 * @param OnePulseMode: Select the One pulse mode.
mbed_official 573:ad23fe03a082 1972 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1973 * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
mbed_official 573:ad23fe03a082 1974 * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
mbed_official 573:ad23fe03a082 1975 * @retval HAL status
mbed_official 573:ad23fe03a082 1976 */
mbed_official 573:ad23fe03a082 1977 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
mbed_official 573:ad23fe03a082 1978 {
mbed_official 573:ad23fe03a082 1979 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 1980 if(htim == NULL)
mbed_official 573:ad23fe03a082 1981 {
mbed_official 573:ad23fe03a082 1982 return HAL_ERROR;
mbed_official 573:ad23fe03a082 1983 }
mbed_official 573:ad23fe03a082 1984
mbed_official 573:ad23fe03a082 1985 /* Check the parameters */
mbed_official 573:ad23fe03a082 1986 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 1987 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official 573:ad23fe03a082 1988 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official 573:ad23fe03a082 1989 assert_param(IS_TIM_OPM_MODE(OnePulseMode));
mbed_official 573:ad23fe03a082 1990
mbed_official 573:ad23fe03a082 1991 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 1992 {
mbed_official 573:ad23fe03a082 1993 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 1994 htim->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 1995 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 1996 HAL_TIM_OnePulse_MspInit(htim);
mbed_official 573:ad23fe03a082 1997 }
mbed_official 573:ad23fe03a082 1998
mbed_official 573:ad23fe03a082 1999 /* Set the TIM state */
mbed_official 573:ad23fe03a082 2000 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2001
mbed_official 573:ad23fe03a082 2002 /* Configure the Time base in the One Pulse Mode */
mbed_official 573:ad23fe03a082 2003 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 2004
mbed_official 573:ad23fe03a082 2005 /* Reset the OPM Bit */
mbed_official 573:ad23fe03a082 2006 htim->Instance->CR1 &= ~TIM_CR1_OPM;
mbed_official 573:ad23fe03a082 2007
mbed_official 573:ad23fe03a082 2008 /* Configure the OPM Mode */
mbed_official 573:ad23fe03a082 2009 htim->Instance->CR1 |= OnePulseMode;
mbed_official 573:ad23fe03a082 2010
mbed_official 573:ad23fe03a082 2011 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 2012 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 2013
mbed_official 573:ad23fe03a082 2014 return HAL_OK;
mbed_official 573:ad23fe03a082 2015 }
mbed_official 573:ad23fe03a082 2016
mbed_official 573:ad23fe03a082 2017 /**
mbed_official 573:ad23fe03a082 2018 * @brief DeInitializes the TIM One Pulse
mbed_official 573:ad23fe03a082 2019 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2020 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2021 * @retval HAL status
mbed_official 573:ad23fe03a082 2022 */
mbed_official 573:ad23fe03a082 2023 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2024 {
mbed_official 573:ad23fe03a082 2025 /* Check the parameters */
mbed_official 573:ad23fe03a082 2026 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2027
mbed_official 573:ad23fe03a082 2028 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2029
mbed_official 573:ad23fe03a082 2030 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 2031 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2032
mbed_official 573:ad23fe03a082 2033 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 573:ad23fe03a082 2034 HAL_TIM_OnePulse_MspDeInit(htim);
mbed_official 573:ad23fe03a082 2035
mbed_official 573:ad23fe03a082 2036 /* Change TIM state */
mbed_official 573:ad23fe03a082 2037 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 2038
mbed_official 573:ad23fe03a082 2039 /* Release Lock */
mbed_official 573:ad23fe03a082 2040 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 2041
mbed_official 573:ad23fe03a082 2042 return HAL_OK;
mbed_official 573:ad23fe03a082 2043 }
mbed_official 573:ad23fe03a082 2044
mbed_official 573:ad23fe03a082 2045 /**
mbed_official 573:ad23fe03a082 2046 * @brief Initializes the TIM One Pulse MSP.
mbed_official 573:ad23fe03a082 2047 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2048 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2049 * @retval None
mbed_official 573:ad23fe03a082 2050 */
mbed_official 573:ad23fe03a082 2051 __weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2052 {
mbed_official 573:ad23fe03a082 2053 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 2054 the HAL_TIM_OnePulse_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 2055 */
mbed_official 573:ad23fe03a082 2056 }
mbed_official 573:ad23fe03a082 2057
mbed_official 573:ad23fe03a082 2058 /**
mbed_official 573:ad23fe03a082 2059 * @brief DeInitializes TIM One Pulse MSP.
mbed_official 573:ad23fe03a082 2060 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2061 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2062 * @retval None
mbed_official 573:ad23fe03a082 2063 */
mbed_official 573:ad23fe03a082 2064 __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2065 {
mbed_official 573:ad23fe03a082 2066 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 2067 the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 2068 */
mbed_official 573:ad23fe03a082 2069 }
mbed_official 573:ad23fe03a082 2070
mbed_official 573:ad23fe03a082 2071 /**
mbed_official 573:ad23fe03a082 2072 * @brief Starts the TIM One Pulse signal generation.
mbed_official 573:ad23fe03a082 2073 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2074 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2075 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2076 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2077 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2078 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2079 * @retval HAL status
mbed_official 573:ad23fe03a082 2080 */
mbed_official 573:ad23fe03a082 2081 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 573:ad23fe03a082 2082 {
mbed_official 573:ad23fe03a082 2083 /* Enable the Capture compare and the Input Capture channels
mbed_official 573:ad23fe03a082 2084 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2085 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 573:ad23fe03a082 2086 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 573:ad23fe03a082 2087 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 573:ad23fe03a082 2088
mbed_official 573:ad23fe03a082 2089 No need to enable the counter, it's enabled automatically by hardware
mbed_official 573:ad23fe03a082 2090 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 573:ad23fe03a082 2091
mbed_official 573:ad23fe03a082 2092 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2093 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2094
mbed_official 573:ad23fe03a082 2095 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 2096 {
mbed_official 573:ad23fe03a082 2097 /* Enable the main output */
mbed_official 573:ad23fe03a082 2098 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 2099 }
mbed_official 573:ad23fe03a082 2100
mbed_official 573:ad23fe03a082 2101 /* Return function status */
mbed_official 573:ad23fe03a082 2102 return HAL_OK;
mbed_official 573:ad23fe03a082 2103 }
mbed_official 573:ad23fe03a082 2104
mbed_official 573:ad23fe03a082 2105 /**
mbed_official 573:ad23fe03a082 2106 * @brief Stops the TIM One Pulse signal generation.
mbed_official 573:ad23fe03a082 2107 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2108 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2109 * @param OutputChannel : TIM Channels to be disable.
mbed_official 573:ad23fe03a082 2110 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2111 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2112 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2113 * @retval HAL status
mbed_official 573:ad23fe03a082 2114 */
mbed_official 573:ad23fe03a082 2115 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 573:ad23fe03a082 2116 {
mbed_official 573:ad23fe03a082 2117 /* Disable the Capture compare and the Input Capture channels
mbed_official 573:ad23fe03a082 2118 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2119 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 573:ad23fe03a082 2120 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 573:ad23fe03a082 2121 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 573:ad23fe03a082 2122
mbed_official 573:ad23fe03a082 2123 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2124 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2125
mbed_official 573:ad23fe03a082 2126 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 2127 {
mbed_official 573:ad23fe03a082 2128 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 2129 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 2130 }
mbed_official 573:ad23fe03a082 2131
mbed_official 573:ad23fe03a082 2132 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 2133 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2134
mbed_official 573:ad23fe03a082 2135 /* Return function status */
mbed_official 573:ad23fe03a082 2136 return HAL_OK;
mbed_official 573:ad23fe03a082 2137 }
mbed_official 573:ad23fe03a082 2138
mbed_official 573:ad23fe03a082 2139 /**
mbed_official 573:ad23fe03a082 2140 * @brief Starts the TIM One Pulse signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 2141 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2142 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2143 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2144 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2145 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2146 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2147 * @retval HAL status
mbed_official 573:ad23fe03a082 2148 */
mbed_official 573:ad23fe03a082 2149 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 573:ad23fe03a082 2150 {
mbed_official 573:ad23fe03a082 2151 /* Enable the Capture compare and the Input Capture channels
mbed_official 573:ad23fe03a082 2152 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2153 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 573:ad23fe03a082 2154 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 573:ad23fe03a082 2155 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official 573:ad23fe03a082 2156
mbed_official 573:ad23fe03a082 2157 No need to enable the counter, it's enabled automatically by hardware
mbed_official 573:ad23fe03a082 2158 (the counter starts in response to a stimulus and generate a pulse */
mbed_official 573:ad23fe03a082 2159
mbed_official 573:ad23fe03a082 2160 /* Enable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 2161 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2162
mbed_official 573:ad23fe03a082 2163 /* Enable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 2164 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2165
mbed_official 573:ad23fe03a082 2166 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2167 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2168
mbed_official 573:ad23fe03a082 2169 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 2170 {
mbed_official 573:ad23fe03a082 2171 /* Enable the main output */
mbed_official 573:ad23fe03a082 2172 __HAL_TIM_MOE_ENABLE(htim);
mbed_official 573:ad23fe03a082 2173 }
mbed_official 573:ad23fe03a082 2174
mbed_official 573:ad23fe03a082 2175 /* Return function status */
mbed_official 573:ad23fe03a082 2176 return HAL_OK;
mbed_official 573:ad23fe03a082 2177 }
mbed_official 573:ad23fe03a082 2178
mbed_official 573:ad23fe03a082 2179 /**
mbed_official 573:ad23fe03a082 2180 * @brief Stops the TIM One Pulse signal generation in interrupt mode.
mbed_official 573:ad23fe03a082 2181 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2182 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2183 * @param OutputChannel : TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2184 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2185 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2186 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2187 * @retval HAL status
mbed_official 573:ad23fe03a082 2188 */
mbed_official 573:ad23fe03a082 2189 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official 573:ad23fe03a082 2190 {
mbed_official 573:ad23fe03a082 2191 /* Disable the TIM Capture/Compare 1 interrupt */
mbed_official 573:ad23fe03a082 2192 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2193
mbed_official 573:ad23fe03a082 2194 /* Disable the TIM Capture/Compare 2 interrupt */
mbed_official 573:ad23fe03a082 2195 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2196
mbed_official 573:ad23fe03a082 2197 /* Disable the Capture compare and the Input Capture channels
mbed_official 573:ad23fe03a082 2198 (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2199 if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official 573:ad23fe03a082 2200 if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official 573:ad23fe03a082 2201 in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official 573:ad23fe03a082 2202 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2203 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2204
mbed_official 573:ad23fe03a082 2205 if(IS_TIM_ADVANCED_INSTANCE(htim->Instance) != RESET)
mbed_official 573:ad23fe03a082 2206 {
mbed_official 573:ad23fe03a082 2207 /* Disable the Main Output */
mbed_official 573:ad23fe03a082 2208 __HAL_TIM_MOE_DISABLE(htim);
mbed_official 573:ad23fe03a082 2209 }
mbed_official 573:ad23fe03a082 2210
mbed_official 573:ad23fe03a082 2211 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 2212 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2213
mbed_official 573:ad23fe03a082 2214 /* Return function status */
mbed_official 573:ad23fe03a082 2215 return HAL_OK;
mbed_official 573:ad23fe03a082 2216 }
mbed_official 573:ad23fe03a082 2217
mbed_official 573:ad23fe03a082 2218 /**
mbed_official 573:ad23fe03a082 2219 * @}
mbed_official 573:ad23fe03a082 2220 */
mbed_official 573:ad23fe03a082 2221
mbed_official 573:ad23fe03a082 2222 /** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions
mbed_official 573:ad23fe03a082 2223 * @brief Time Encoder functions
mbed_official 573:ad23fe03a082 2224 *
mbed_official 573:ad23fe03a082 2225 @verbatim
mbed_official 573:ad23fe03a082 2226 ==============================================================================
mbed_official 573:ad23fe03a082 2227 ##### Time Encoder functions #####
mbed_official 573:ad23fe03a082 2228 ==============================================================================
mbed_official 573:ad23fe03a082 2229 [..]
mbed_official 573:ad23fe03a082 2230 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 2231 (+) Initialize and configure the TIM Encoder.
mbed_official 573:ad23fe03a082 2232 (+) De-initialize the TIM Encoder.
mbed_official 573:ad23fe03a082 2233 (+) Start the Time Encoder.
mbed_official 573:ad23fe03a082 2234 (+) Stop the Time Encoder.
mbed_official 573:ad23fe03a082 2235 (+) Start the Time Encoder and enable interrupt.
mbed_official 573:ad23fe03a082 2236 (+) Stop the Time Encoder and disable interrupt.
mbed_official 573:ad23fe03a082 2237 (+) Start the Time Encoder and enable DMA transfer.
mbed_official 573:ad23fe03a082 2238 (+) Stop the Time Encoder and disable DMA transfer.
mbed_official 573:ad23fe03a082 2239
mbed_official 573:ad23fe03a082 2240 @endverbatim
mbed_official 573:ad23fe03a082 2241 * @{
mbed_official 573:ad23fe03a082 2242 */
mbed_official 573:ad23fe03a082 2243 /**
mbed_official 573:ad23fe03a082 2244 * @brief Initializes the TIM Encoder Interface and create the associated handle.
mbed_official 573:ad23fe03a082 2245 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2246 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2247 * @param sConfig: TIM Encoder Interface configuration structure
mbed_official 573:ad23fe03a082 2248 * @retval HAL status
mbed_official 573:ad23fe03a082 2249 */
mbed_official 573:ad23fe03a082 2250 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig)
mbed_official 573:ad23fe03a082 2251 {
mbed_official 573:ad23fe03a082 2252 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 2253 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 2254 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 2255
mbed_official 573:ad23fe03a082 2256 /* Check the TIM handle allocation */
mbed_official 573:ad23fe03a082 2257 if(htim == NULL)
mbed_official 573:ad23fe03a082 2258 {
mbed_official 573:ad23fe03a082 2259 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2260 }
mbed_official 573:ad23fe03a082 2261
mbed_official 573:ad23fe03a082 2262 /* Check the parameters */
mbed_official 573:ad23fe03a082 2263 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2264 assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
mbed_official 573:ad23fe03a082 2265 assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
mbed_official 573:ad23fe03a082 2266 assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
mbed_official 573:ad23fe03a082 2267 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official 573:ad23fe03a082 2268 assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
mbed_official 573:ad23fe03a082 2269 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official 573:ad23fe03a082 2270 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
mbed_official 573:ad23fe03a082 2271 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official 573:ad23fe03a082 2272 assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
mbed_official 573:ad23fe03a082 2273
mbed_official 573:ad23fe03a082 2274 if(htim->State == HAL_TIM_STATE_RESET)
mbed_official 573:ad23fe03a082 2275 {
mbed_official 573:ad23fe03a082 2276 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 2277 htim->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 2278 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official 573:ad23fe03a082 2279 HAL_TIM_Encoder_MspInit(htim);
mbed_official 573:ad23fe03a082 2280 }
mbed_official 573:ad23fe03a082 2281
mbed_official 573:ad23fe03a082 2282 /* Set the TIM state */
mbed_official 573:ad23fe03a082 2283 htim->State= HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2284
mbed_official 573:ad23fe03a082 2285 /* Reset the SMS bits */
mbed_official 573:ad23fe03a082 2286 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 2287
mbed_official 573:ad23fe03a082 2288 /* Configure the Time base in the Encoder Mode */
mbed_official 573:ad23fe03a082 2289 TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official 573:ad23fe03a082 2290
mbed_official 573:ad23fe03a082 2291 /* Get the TIMx SMCR register value */
mbed_official 573:ad23fe03a082 2292 tmpsmcr = htim->Instance->SMCR;
mbed_official 573:ad23fe03a082 2293
mbed_official 573:ad23fe03a082 2294 /* Get the TIMx CCMR1 register value */
mbed_official 573:ad23fe03a082 2295 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 573:ad23fe03a082 2296
mbed_official 573:ad23fe03a082 2297 /* Get the TIMx CCER register value */
mbed_official 573:ad23fe03a082 2298 tmpccer = htim->Instance->CCER;
mbed_official 573:ad23fe03a082 2299
mbed_official 573:ad23fe03a082 2300 /* Set the encoder Mode */
mbed_official 573:ad23fe03a082 2301 tmpsmcr |= sConfig->EncoderMode;
mbed_official 573:ad23fe03a082 2302
mbed_official 573:ad23fe03a082 2303 /* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official 573:ad23fe03a082 2304 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
mbed_official 573:ad23fe03a082 2305 tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8));
mbed_official 573:ad23fe03a082 2306
mbed_official 573:ad23fe03a082 2307 /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
mbed_official 573:ad23fe03a082 2308 tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
mbed_official 573:ad23fe03a082 2309 tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
mbed_official 573:ad23fe03a082 2310 tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8);
mbed_official 573:ad23fe03a082 2311 tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12);
mbed_official 573:ad23fe03a082 2312
mbed_official 573:ad23fe03a082 2313 /* Set the TI1 and the TI2 Polarities */
mbed_official 573:ad23fe03a082 2314 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
mbed_official 573:ad23fe03a082 2315 tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
mbed_official 573:ad23fe03a082 2316 tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4);
mbed_official 573:ad23fe03a082 2317
mbed_official 573:ad23fe03a082 2318 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 2319 htim->Instance->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 2320
mbed_official 573:ad23fe03a082 2321 /* Write to TIMx CCMR1 */
mbed_official 573:ad23fe03a082 2322 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 573:ad23fe03a082 2323
mbed_official 573:ad23fe03a082 2324 /* Write to TIMx CCER */
mbed_official 573:ad23fe03a082 2325 htim->Instance->CCER = tmpccer;
mbed_official 573:ad23fe03a082 2326
mbed_official 573:ad23fe03a082 2327 /* Initialize the TIM state*/
mbed_official 573:ad23fe03a082 2328 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 2329
mbed_official 573:ad23fe03a082 2330 return HAL_OK;
mbed_official 573:ad23fe03a082 2331 }
mbed_official 573:ad23fe03a082 2332
mbed_official 573:ad23fe03a082 2333 /**
mbed_official 573:ad23fe03a082 2334 * @brief DeInitializes the TIM Encoder interface
mbed_official 573:ad23fe03a082 2335 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2336 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2337 * @retval HAL status
mbed_official 573:ad23fe03a082 2338 */
mbed_official 573:ad23fe03a082 2339 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2340 {
mbed_official 573:ad23fe03a082 2341 /* Check the parameters */
mbed_official 573:ad23fe03a082 2342 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2343
mbed_official 573:ad23fe03a082 2344 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2345
mbed_official 573:ad23fe03a082 2346 /* Disable the TIM Peripheral Clock */
mbed_official 573:ad23fe03a082 2347 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2348
mbed_official 573:ad23fe03a082 2349 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official 573:ad23fe03a082 2350 HAL_TIM_Encoder_MspDeInit(htim);
mbed_official 573:ad23fe03a082 2351
mbed_official 573:ad23fe03a082 2352 /* Change TIM state */
mbed_official 573:ad23fe03a082 2353 htim->State = HAL_TIM_STATE_RESET;
mbed_official 573:ad23fe03a082 2354
mbed_official 573:ad23fe03a082 2355 /* Release Lock */
mbed_official 573:ad23fe03a082 2356 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 2357
mbed_official 573:ad23fe03a082 2358 return HAL_OK;
mbed_official 573:ad23fe03a082 2359 }
mbed_official 573:ad23fe03a082 2360
mbed_official 573:ad23fe03a082 2361 /**
mbed_official 573:ad23fe03a082 2362 * @brief Initializes the TIM Encoder Interface MSP.
mbed_official 573:ad23fe03a082 2363 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2364 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2365 * @retval None
mbed_official 573:ad23fe03a082 2366 */
mbed_official 573:ad23fe03a082 2367 __weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2368 {
mbed_official 573:ad23fe03a082 2369 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 2370 the HAL_TIM_Encoder_MspInit could be implemented in the user file
mbed_official 573:ad23fe03a082 2371 */
mbed_official 573:ad23fe03a082 2372 }
mbed_official 573:ad23fe03a082 2373
mbed_official 573:ad23fe03a082 2374 /**
mbed_official 573:ad23fe03a082 2375 * @brief DeInitializes TIM Encoder Interface MSP.
mbed_official 573:ad23fe03a082 2376 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2377 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2378 * @retval None
mbed_official 573:ad23fe03a082 2379 */
mbed_official 573:ad23fe03a082 2380 __weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2381 {
mbed_official 573:ad23fe03a082 2382 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 2383 the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
mbed_official 573:ad23fe03a082 2384 */
mbed_official 573:ad23fe03a082 2385 }
mbed_official 573:ad23fe03a082 2386
mbed_official 573:ad23fe03a082 2387 /**
mbed_official 573:ad23fe03a082 2388 * @brief Starts the TIM Encoder Interface.
mbed_official 573:ad23fe03a082 2389 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2390 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2391 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2392 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2393 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2394 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2395 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2396 * @retval HAL status
mbed_official 573:ad23fe03a082 2397 */
mbed_official 573:ad23fe03a082 2398 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 2399 {
mbed_official 573:ad23fe03a082 2400 /* Check the parameters */
mbed_official 573:ad23fe03a082 2401 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2402
mbed_official 573:ad23fe03a082 2403 /* Enable the encoder interface channels */
mbed_official 573:ad23fe03a082 2404 switch (Channel)
mbed_official 573:ad23fe03a082 2405 {
mbed_official 573:ad23fe03a082 2406 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 2407 {
mbed_official 573:ad23fe03a082 2408 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2409 break;
mbed_official 573:ad23fe03a082 2410 }
mbed_official 573:ad23fe03a082 2411 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 2412 {
mbed_official 573:ad23fe03a082 2413 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2414 break;
mbed_official 573:ad23fe03a082 2415 }
mbed_official 573:ad23fe03a082 2416 default :
mbed_official 573:ad23fe03a082 2417 {
mbed_official 573:ad23fe03a082 2418 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2419 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2420 break;
mbed_official 573:ad23fe03a082 2421 }
mbed_official 573:ad23fe03a082 2422 }
mbed_official 573:ad23fe03a082 2423 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 2424 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 2425
mbed_official 573:ad23fe03a082 2426 /* Return function status */
mbed_official 573:ad23fe03a082 2427 return HAL_OK;
mbed_official 573:ad23fe03a082 2428 }
mbed_official 573:ad23fe03a082 2429
mbed_official 573:ad23fe03a082 2430 /**
mbed_official 573:ad23fe03a082 2431 * @brief Stops the TIM Encoder Interface.
mbed_official 573:ad23fe03a082 2432 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2433 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2434 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 2435 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2436 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2437 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2438 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2439 * @retval HAL status
mbed_official 573:ad23fe03a082 2440 */
mbed_official 573:ad23fe03a082 2441 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 2442 {
mbed_official 573:ad23fe03a082 2443 /* Check the parameters */
mbed_official 573:ad23fe03a082 2444 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2445
mbed_official 573:ad23fe03a082 2446 /* Disable the Input Capture channels 1 and 2
mbed_official 573:ad23fe03a082 2447 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 573:ad23fe03a082 2448 switch (Channel)
mbed_official 573:ad23fe03a082 2449 {
mbed_official 573:ad23fe03a082 2450 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 2451 {
mbed_official 573:ad23fe03a082 2452 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2453 break;
mbed_official 573:ad23fe03a082 2454 }
mbed_official 573:ad23fe03a082 2455 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 2456 {
mbed_official 573:ad23fe03a082 2457 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2458 break;
mbed_official 573:ad23fe03a082 2459 }
mbed_official 573:ad23fe03a082 2460 default :
mbed_official 573:ad23fe03a082 2461 {
mbed_official 573:ad23fe03a082 2462 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2463 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2464 break;
mbed_official 573:ad23fe03a082 2465 }
mbed_official 573:ad23fe03a082 2466 }
mbed_official 573:ad23fe03a082 2467 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 2468 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2469
mbed_official 573:ad23fe03a082 2470 /* Return function status */
mbed_official 573:ad23fe03a082 2471 return HAL_OK;
mbed_official 573:ad23fe03a082 2472 }
mbed_official 573:ad23fe03a082 2473
mbed_official 573:ad23fe03a082 2474 /**
mbed_official 573:ad23fe03a082 2475 * @brief Starts the TIM Encoder Interface in interrupt mode.
mbed_official 573:ad23fe03a082 2476 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2477 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2478 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2479 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2480 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2481 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2482 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2483 * @retval HAL status
mbed_official 573:ad23fe03a082 2484 */
mbed_official 573:ad23fe03a082 2485 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 2486 {
mbed_official 573:ad23fe03a082 2487 /* Check the parameters */
mbed_official 573:ad23fe03a082 2488 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2489
mbed_official 573:ad23fe03a082 2490 /* Enable the encoder interface channels */
mbed_official 573:ad23fe03a082 2491 /* Enable the capture compare Interrupts 1 and/or 2 */
mbed_official 573:ad23fe03a082 2492 switch (Channel)
mbed_official 573:ad23fe03a082 2493 {
mbed_official 573:ad23fe03a082 2494 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 2495 {
mbed_official 573:ad23fe03a082 2496 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2497 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2498 break;
mbed_official 573:ad23fe03a082 2499 }
mbed_official 573:ad23fe03a082 2500 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 2501 {
mbed_official 573:ad23fe03a082 2502 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2503 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2504 break;
mbed_official 573:ad23fe03a082 2505 }
mbed_official 573:ad23fe03a082 2506 default :
mbed_official 573:ad23fe03a082 2507 {
mbed_official 573:ad23fe03a082 2508 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2509 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2510 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2511 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2512 break;
mbed_official 573:ad23fe03a082 2513 }
mbed_official 573:ad23fe03a082 2514 }
mbed_official 573:ad23fe03a082 2515
mbed_official 573:ad23fe03a082 2516 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 2517 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 2518
mbed_official 573:ad23fe03a082 2519 /* Return function status */
mbed_official 573:ad23fe03a082 2520 return HAL_OK;
mbed_official 573:ad23fe03a082 2521 }
mbed_official 573:ad23fe03a082 2522
mbed_official 573:ad23fe03a082 2523 /**
mbed_official 573:ad23fe03a082 2524 * @brief Stops the TIM Encoder Interface in interrupt mode.
mbed_official 573:ad23fe03a082 2525 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2526 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2527 * @param Channel: TIM Channels to be disabled.
mbed_official 573:ad23fe03a082 2528 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2529 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2530 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2531 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2532 * @retval HAL status
mbed_official 573:ad23fe03a082 2533 */
mbed_official 573:ad23fe03a082 2534 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 2535 {
mbed_official 573:ad23fe03a082 2536 /* Check the parameters */
mbed_official 573:ad23fe03a082 2537 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2538
mbed_official 573:ad23fe03a082 2539 /* Disable the Input Capture channels 1 and 2
mbed_official 573:ad23fe03a082 2540 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 573:ad23fe03a082 2541 if(Channel == TIM_CHANNEL_1)
mbed_official 573:ad23fe03a082 2542 {
mbed_official 573:ad23fe03a082 2543 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2544
mbed_official 573:ad23fe03a082 2545 /* Disable the capture compare Interrupts 1 */
mbed_official 573:ad23fe03a082 2546 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2547 }
mbed_official 573:ad23fe03a082 2548 else if(Channel == TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2549 {
mbed_official 573:ad23fe03a082 2550 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2551
mbed_official 573:ad23fe03a082 2552 /* Disable the capture compare Interrupts 2 */
mbed_official 573:ad23fe03a082 2553 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2554 }
mbed_official 573:ad23fe03a082 2555 else
mbed_official 573:ad23fe03a082 2556 {
mbed_official 573:ad23fe03a082 2557 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2558 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2559
mbed_official 573:ad23fe03a082 2560 /* Disable the capture compare Interrupts 1 and 2 */
mbed_official 573:ad23fe03a082 2561 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2562 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2563 }
mbed_official 573:ad23fe03a082 2564
mbed_official 573:ad23fe03a082 2565 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 2566 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2567
mbed_official 573:ad23fe03a082 2568 /* Change the htim state */
mbed_official 573:ad23fe03a082 2569 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 2570
mbed_official 573:ad23fe03a082 2571 /* Return function status */
mbed_official 573:ad23fe03a082 2572 return HAL_OK;
mbed_official 573:ad23fe03a082 2573 }
mbed_official 573:ad23fe03a082 2574
mbed_official 573:ad23fe03a082 2575 /**
mbed_official 573:ad23fe03a082 2576 * @brief Starts the TIM Encoder Interface in DMA mode.
mbed_official 573:ad23fe03a082 2577 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2578 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2579 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2580 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2581 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2582 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2583 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2584 * @param pData1: The destination Buffer address for IC1.
mbed_official 573:ad23fe03a082 2585 * @param pData2: The destination Buffer address for IC2.
mbed_official 573:ad23fe03a082 2586 * @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official 573:ad23fe03a082 2587 * @retval HAL status
mbed_official 573:ad23fe03a082 2588 */
mbed_official 573:ad23fe03a082 2589 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
mbed_official 573:ad23fe03a082 2590 {
mbed_official 573:ad23fe03a082 2591 /* Check the parameters */
mbed_official 573:ad23fe03a082 2592 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2593
mbed_official 573:ad23fe03a082 2594 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 2595 {
mbed_official 573:ad23fe03a082 2596 return HAL_BUSY;
mbed_official 573:ad23fe03a082 2597 }
mbed_official 573:ad23fe03a082 2598 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 2599 {
mbed_official 573:ad23fe03a082 2600 if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
mbed_official 573:ad23fe03a082 2601 {
mbed_official 573:ad23fe03a082 2602 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2603 }
mbed_official 573:ad23fe03a082 2604 else
mbed_official 573:ad23fe03a082 2605 {
mbed_official 573:ad23fe03a082 2606 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2607 }
mbed_official 573:ad23fe03a082 2608 }
mbed_official 573:ad23fe03a082 2609
mbed_official 573:ad23fe03a082 2610 switch (Channel)
mbed_official 573:ad23fe03a082 2611 {
mbed_official 573:ad23fe03a082 2612 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 2613 {
mbed_official 573:ad23fe03a082 2614 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 2615 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 2616
mbed_official 573:ad23fe03a082 2617 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 2618 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 2619
mbed_official 573:ad23fe03a082 2620 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 2621 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
mbed_official 573:ad23fe03a082 2622
mbed_official 573:ad23fe03a082 2623 /* Enable the TIM Input Capture DMA request */
mbed_official 573:ad23fe03a082 2624 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 2625
mbed_official 573:ad23fe03a082 2626 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 2627 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 2628
mbed_official 573:ad23fe03a082 2629 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 2630 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2631 }
mbed_official 573:ad23fe03a082 2632 break;
mbed_official 573:ad23fe03a082 2633
mbed_official 573:ad23fe03a082 2634 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 2635 {
mbed_official 573:ad23fe03a082 2636 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 2637 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 2638
mbed_official 573:ad23fe03a082 2639 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 2640 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError;
mbed_official 573:ad23fe03a082 2641 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 2642 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 573:ad23fe03a082 2643
mbed_official 573:ad23fe03a082 2644 /* Enable the TIM Input Capture DMA request */
mbed_official 573:ad23fe03a082 2645 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 2646
mbed_official 573:ad23fe03a082 2647 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 2648 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 2649
mbed_official 573:ad23fe03a082 2650 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 2651 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2652 }
mbed_official 573:ad23fe03a082 2653 break;
mbed_official 573:ad23fe03a082 2654
mbed_official 573:ad23fe03a082 2655 case TIM_CHANNEL_ALL:
mbed_official 573:ad23fe03a082 2656 {
mbed_official 573:ad23fe03a082 2657 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 2658 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 2659
mbed_official 573:ad23fe03a082 2660 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 2661 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 2662
mbed_official 573:ad23fe03a082 2663 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 2664 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
mbed_official 573:ad23fe03a082 2665
mbed_official 573:ad23fe03a082 2666 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 2667 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 2668
mbed_official 573:ad23fe03a082 2669 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 2670 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 2671
mbed_official 573:ad23fe03a082 2672 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 2673 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official 573:ad23fe03a082 2674
mbed_official 573:ad23fe03a082 2675 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 2676 __HAL_TIM_ENABLE(htim);
mbed_official 573:ad23fe03a082 2677
mbed_official 573:ad23fe03a082 2678 /* Enable the Capture compare channel */
mbed_official 573:ad23fe03a082 2679 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2680 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official 573:ad23fe03a082 2681
mbed_official 573:ad23fe03a082 2682 /* Enable the TIM Input Capture DMA request */
mbed_official 573:ad23fe03a082 2683 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 2684 /* Enable the TIM Input Capture DMA request */
mbed_official 573:ad23fe03a082 2685 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 2686 }
mbed_official 573:ad23fe03a082 2687 break;
mbed_official 573:ad23fe03a082 2688
mbed_official 573:ad23fe03a082 2689 default:
mbed_official 573:ad23fe03a082 2690 break;
mbed_official 573:ad23fe03a082 2691 }
mbed_official 573:ad23fe03a082 2692 /* Return function status */
mbed_official 573:ad23fe03a082 2693 return HAL_OK;
mbed_official 573:ad23fe03a082 2694 }
mbed_official 573:ad23fe03a082 2695
mbed_official 573:ad23fe03a082 2696 /**
mbed_official 573:ad23fe03a082 2697 * @brief Stops the TIM Encoder Interface in DMA mode.
mbed_official 573:ad23fe03a082 2698 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2699 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2700 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2701 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2702 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2703 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2704 * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
mbed_official 573:ad23fe03a082 2705 * @retval HAL status
mbed_official 573:ad23fe03a082 2706 */
mbed_official 573:ad23fe03a082 2707 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 2708 {
mbed_official 573:ad23fe03a082 2709 /* Check the parameters */
mbed_official 573:ad23fe03a082 2710 assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2711
mbed_official 573:ad23fe03a082 2712 /* Disable the Input Capture channels 1 and 2
mbed_official 573:ad23fe03a082 2713 (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official 573:ad23fe03a082 2714 if(Channel == TIM_CHANNEL_1)
mbed_official 573:ad23fe03a082 2715 {
mbed_official 573:ad23fe03a082 2716 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2717
mbed_official 573:ad23fe03a082 2718 /* Disable the capture compare DMA Request 1 */
mbed_official 573:ad23fe03a082 2719 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 2720 }
mbed_official 573:ad23fe03a082 2721 else if(Channel == TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 2722 {
mbed_official 573:ad23fe03a082 2723 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2724
mbed_official 573:ad23fe03a082 2725 /* Disable the capture compare DMA Request 2 */
mbed_official 573:ad23fe03a082 2726 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 2727 }
mbed_official 573:ad23fe03a082 2728 else
mbed_official 573:ad23fe03a082 2729 {
mbed_official 573:ad23fe03a082 2730 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2731 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official 573:ad23fe03a082 2732
mbed_official 573:ad23fe03a082 2733 /* Disable the capture compare DMA Request 1 and 2 */
mbed_official 573:ad23fe03a082 2734 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official 573:ad23fe03a082 2735 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official 573:ad23fe03a082 2736 }
mbed_official 573:ad23fe03a082 2737
mbed_official 573:ad23fe03a082 2738 /* Disable the Peripheral */
mbed_official 573:ad23fe03a082 2739 __HAL_TIM_DISABLE(htim);
mbed_official 573:ad23fe03a082 2740
mbed_official 573:ad23fe03a082 2741 /* Change the htim state */
mbed_official 573:ad23fe03a082 2742 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 2743
mbed_official 573:ad23fe03a082 2744 /* Return function status */
mbed_official 573:ad23fe03a082 2745 return HAL_OK;
mbed_official 573:ad23fe03a082 2746 }
mbed_official 573:ad23fe03a082 2747
mbed_official 573:ad23fe03a082 2748 /**
mbed_official 573:ad23fe03a082 2749 * @}
mbed_official 573:ad23fe03a082 2750 */
mbed_official 573:ad23fe03a082 2751 /** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management
mbed_official 573:ad23fe03a082 2752 * @brief IRQ handler management
mbed_official 573:ad23fe03a082 2753 *
mbed_official 573:ad23fe03a082 2754 @verbatim
mbed_official 573:ad23fe03a082 2755 ==============================================================================
mbed_official 573:ad23fe03a082 2756 ##### IRQ handler management #####
mbed_official 573:ad23fe03a082 2757 ==============================================================================
mbed_official 573:ad23fe03a082 2758 [..]
mbed_official 573:ad23fe03a082 2759 This section provides Timer IRQ handler function.
mbed_official 573:ad23fe03a082 2760
mbed_official 573:ad23fe03a082 2761 @endverbatim
mbed_official 573:ad23fe03a082 2762 * @{
mbed_official 573:ad23fe03a082 2763 */
mbed_official 573:ad23fe03a082 2764 /**
mbed_official 573:ad23fe03a082 2765 * @brief This function handles TIM interrupts requests.
mbed_official 573:ad23fe03a082 2766 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2767 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2768 * @retval None
mbed_official 573:ad23fe03a082 2769 */
mbed_official 573:ad23fe03a082 2770 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 2771 {
mbed_official 573:ad23fe03a082 2772 /* Capture compare 1 event */
mbed_official 573:ad23fe03a082 2773 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
mbed_official 573:ad23fe03a082 2774 {
mbed_official 573:ad23fe03a082 2775 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
mbed_official 573:ad23fe03a082 2776 {
mbed_official 573:ad23fe03a082 2777 {
mbed_official 573:ad23fe03a082 2778 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
mbed_official 573:ad23fe03a082 2779 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 573:ad23fe03a082 2780
mbed_official 573:ad23fe03a082 2781 /* Input capture event */
mbed_official 573:ad23fe03a082 2782 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
mbed_official 573:ad23fe03a082 2783 {
mbed_official 573:ad23fe03a082 2784 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 573:ad23fe03a082 2785 }
mbed_official 573:ad23fe03a082 2786 /* Output compare event */
mbed_official 573:ad23fe03a082 2787 else
mbed_official 573:ad23fe03a082 2788 {
mbed_official 573:ad23fe03a082 2789 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 573:ad23fe03a082 2790 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 573:ad23fe03a082 2791 }
mbed_official 573:ad23fe03a082 2792 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 2793 }
mbed_official 573:ad23fe03a082 2794 }
mbed_official 573:ad23fe03a082 2795 }
mbed_official 573:ad23fe03a082 2796 /* Capture compare 2 event */
mbed_official 573:ad23fe03a082 2797 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
mbed_official 573:ad23fe03a082 2798 {
mbed_official 573:ad23fe03a082 2799 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
mbed_official 573:ad23fe03a082 2800 {
mbed_official 573:ad23fe03a082 2801 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
mbed_official 573:ad23fe03a082 2802 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 573:ad23fe03a082 2803 /* Input capture event */
mbed_official 573:ad23fe03a082 2804 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
mbed_official 573:ad23fe03a082 2805 {
mbed_official 573:ad23fe03a082 2806 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 573:ad23fe03a082 2807 }
mbed_official 573:ad23fe03a082 2808 /* Output compare event */
mbed_official 573:ad23fe03a082 2809 else
mbed_official 573:ad23fe03a082 2810 {
mbed_official 573:ad23fe03a082 2811 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 573:ad23fe03a082 2812 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 573:ad23fe03a082 2813 }
mbed_official 573:ad23fe03a082 2814 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 2815 }
mbed_official 573:ad23fe03a082 2816 }
mbed_official 573:ad23fe03a082 2817 /* Capture compare 3 event */
mbed_official 573:ad23fe03a082 2818 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
mbed_official 573:ad23fe03a082 2819 {
mbed_official 573:ad23fe03a082 2820 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
mbed_official 573:ad23fe03a082 2821 {
mbed_official 573:ad23fe03a082 2822 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
mbed_official 573:ad23fe03a082 2823 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 573:ad23fe03a082 2824 /* Input capture event */
mbed_official 573:ad23fe03a082 2825 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
mbed_official 573:ad23fe03a082 2826 {
mbed_official 573:ad23fe03a082 2827 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 573:ad23fe03a082 2828 }
mbed_official 573:ad23fe03a082 2829 /* Output compare event */
mbed_official 573:ad23fe03a082 2830 else
mbed_official 573:ad23fe03a082 2831 {
mbed_official 573:ad23fe03a082 2832 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 573:ad23fe03a082 2833 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 573:ad23fe03a082 2834 }
mbed_official 573:ad23fe03a082 2835 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 2836 }
mbed_official 573:ad23fe03a082 2837 }
mbed_official 573:ad23fe03a082 2838 /* Capture compare 4 event */
mbed_official 573:ad23fe03a082 2839 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
mbed_official 573:ad23fe03a082 2840 {
mbed_official 573:ad23fe03a082 2841 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
mbed_official 573:ad23fe03a082 2842 {
mbed_official 573:ad23fe03a082 2843 __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
mbed_official 573:ad23fe03a082 2844 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 573:ad23fe03a082 2845 /* Input capture event */
mbed_official 573:ad23fe03a082 2846 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
mbed_official 573:ad23fe03a082 2847 {
mbed_official 573:ad23fe03a082 2848 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 573:ad23fe03a082 2849 }
mbed_official 573:ad23fe03a082 2850 /* Output compare event */
mbed_official 573:ad23fe03a082 2851 else
mbed_official 573:ad23fe03a082 2852 {
mbed_official 573:ad23fe03a082 2853 HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official 573:ad23fe03a082 2854 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 573:ad23fe03a082 2855 }
mbed_official 573:ad23fe03a082 2856 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 2857 }
mbed_official 573:ad23fe03a082 2858 }
mbed_official 573:ad23fe03a082 2859 /* TIM Update event */
mbed_official 573:ad23fe03a082 2860 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
mbed_official 573:ad23fe03a082 2861 {
mbed_official 573:ad23fe03a082 2862 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
mbed_official 573:ad23fe03a082 2863 {
mbed_official 573:ad23fe03a082 2864 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
mbed_official 573:ad23fe03a082 2865 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 573:ad23fe03a082 2866 }
mbed_official 573:ad23fe03a082 2867 }
mbed_official 573:ad23fe03a082 2868 /* TIM Break input event */
mbed_official 573:ad23fe03a082 2869 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
mbed_official 573:ad23fe03a082 2870 {
mbed_official 573:ad23fe03a082 2871 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
mbed_official 573:ad23fe03a082 2872 {
mbed_official 573:ad23fe03a082 2873 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
mbed_official 573:ad23fe03a082 2874 HAL_TIMEx_BreakCallback(htim);
mbed_official 573:ad23fe03a082 2875 }
mbed_official 573:ad23fe03a082 2876 }
mbed_official 573:ad23fe03a082 2877
mbed_official 573:ad23fe03a082 2878 /* TIM Break input event */
mbed_official 573:ad23fe03a082 2879 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
mbed_official 573:ad23fe03a082 2880 {
mbed_official 573:ad23fe03a082 2881 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
mbed_official 573:ad23fe03a082 2882 {
mbed_official 573:ad23fe03a082 2883 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
mbed_official 573:ad23fe03a082 2884 HAL_TIMEx_BreakCallback(htim);
mbed_official 573:ad23fe03a082 2885 }
mbed_official 573:ad23fe03a082 2886 }
mbed_official 573:ad23fe03a082 2887
mbed_official 573:ad23fe03a082 2888 /* TIM Trigger detection event */
mbed_official 573:ad23fe03a082 2889 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
mbed_official 573:ad23fe03a082 2890 {
mbed_official 573:ad23fe03a082 2891 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
mbed_official 573:ad23fe03a082 2892 {
mbed_official 573:ad23fe03a082 2893 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
mbed_official 573:ad23fe03a082 2894 HAL_TIM_TriggerCallback(htim);
mbed_official 573:ad23fe03a082 2895 }
mbed_official 573:ad23fe03a082 2896 }
mbed_official 573:ad23fe03a082 2897 /* TIM commutation event */
mbed_official 573:ad23fe03a082 2898 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
mbed_official 573:ad23fe03a082 2899 {
mbed_official 573:ad23fe03a082 2900 if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
mbed_official 573:ad23fe03a082 2901 {
mbed_official 573:ad23fe03a082 2902 __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
mbed_official 573:ad23fe03a082 2903 HAL_TIMEx_CommutationCallback(htim);
mbed_official 573:ad23fe03a082 2904 }
mbed_official 573:ad23fe03a082 2905 }
mbed_official 573:ad23fe03a082 2906 }
mbed_official 573:ad23fe03a082 2907
mbed_official 573:ad23fe03a082 2908 /**
mbed_official 573:ad23fe03a082 2909 * @}
mbed_official 573:ad23fe03a082 2910 */
mbed_official 573:ad23fe03a082 2911
mbed_official 573:ad23fe03a082 2912 /** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
mbed_official 573:ad23fe03a082 2913 * @brief Peripheral Control functions
mbed_official 573:ad23fe03a082 2914 *
mbed_official 573:ad23fe03a082 2915 @verbatim
mbed_official 573:ad23fe03a082 2916 ==============================================================================
mbed_official 573:ad23fe03a082 2917 ##### Peripheral Control functions #####
mbed_official 573:ad23fe03a082 2918 ==============================================================================
mbed_official 573:ad23fe03a082 2919 [..]
mbed_official 573:ad23fe03a082 2920 This section provides functions allowing to:
mbed_official 573:ad23fe03a082 2921 (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
mbed_official 573:ad23fe03a082 2922 (+) Configure External Clock source.
mbed_official 573:ad23fe03a082 2923 (+) Configure Complementary channels, break features and dead time.
mbed_official 573:ad23fe03a082 2924 (+) Configure Master and the Slave synchronization.
mbed_official 573:ad23fe03a082 2925 (+) Configure the DMA Burst Mode.
mbed_official 573:ad23fe03a082 2926
mbed_official 573:ad23fe03a082 2927 @endverbatim
mbed_official 573:ad23fe03a082 2928 * @{
mbed_official 573:ad23fe03a082 2929 */
mbed_official 573:ad23fe03a082 2930
mbed_official 573:ad23fe03a082 2931 /**
mbed_official 573:ad23fe03a082 2932 * @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official 573:ad23fe03a082 2933 * parameters in the TIM_OC_InitTypeDef.
mbed_official 573:ad23fe03a082 2934 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2935 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 2936 * @param sConfig: TIM Output Compare configuration structure
mbed_official 573:ad23fe03a082 2937 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 2938 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 2939 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 2940 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 2941 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 2942 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 2943 * @retval HAL status
mbed_official 573:ad23fe03a082 2944 */
mbed_official 573:ad23fe03a082 2945 __weak HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 573:ad23fe03a082 2946 {
mbed_official 573:ad23fe03a082 2947 /* Check the parameters */
mbed_official 573:ad23fe03a082 2948 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 573:ad23fe03a082 2949 assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official 573:ad23fe03a082 2950 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 573:ad23fe03a082 2951 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 573:ad23fe03a082 2952 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 573:ad23fe03a082 2953 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 573:ad23fe03a082 2954
mbed_official 573:ad23fe03a082 2955 /* Check input state */
mbed_official 573:ad23fe03a082 2956 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 2957
mbed_official 573:ad23fe03a082 2958 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 2959
mbed_official 573:ad23fe03a082 2960 switch (Channel)
mbed_official 573:ad23fe03a082 2961 {
mbed_official 573:ad23fe03a082 2962 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 2963 {
mbed_official 573:ad23fe03a082 2964 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2965 /* Configure the TIM Channel 1 in Output Compare */
mbed_official 573:ad23fe03a082 2966 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 2967 }
mbed_official 573:ad23fe03a082 2968 break;
mbed_official 573:ad23fe03a082 2969
mbed_official 573:ad23fe03a082 2970 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 2971 {
mbed_official 573:ad23fe03a082 2972 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2973 /* Configure the TIM Channel 2 in Output Compare */
mbed_official 573:ad23fe03a082 2974 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 2975 }
mbed_official 573:ad23fe03a082 2976 break;
mbed_official 573:ad23fe03a082 2977
mbed_official 573:ad23fe03a082 2978 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 2979 {
mbed_official 573:ad23fe03a082 2980 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2981 /* Configure the TIM Channel 3 in Output Compare */
mbed_official 573:ad23fe03a082 2982 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 2983 }
mbed_official 573:ad23fe03a082 2984 break;
mbed_official 573:ad23fe03a082 2985
mbed_official 573:ad23fe03a082 2986 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 2987 {
mbed_official 573:ad23fe03a082 2988 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 2989 /* Configure the TIM Channel 4 in Output Compare */
mbed_official 573:ad23fe03a082 2990 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 2991 }
mbed_official 573:ad23fe03a082 2992 break;
mbed_official 573:ad23fe03a082 2993
mbed_official 573:ad23fe03a082 2994 default:
mbed_official 573:ad23fe03a082 2995 break;
mbed_official 573:ad23fe03a082 2996 }
mbed_official 573:ad23fe03a082 2997 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 2998
mbed_official 573:ad23fe03a082 2999 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3000
mbed_official 573:ad23fe03a082 3001 return HAL_OK;
mbed_official 573:ad23fe03a082 3002 }
mbed_official 573:ad23fe03a082 3003
mbed_official 573:ad23fe03a082 3004 /**
mbed_official 573:ad23fe03a082 3005 * @brief Initializes the TIM Input Capture Channels according to the specified
mbed_official 573:ad23fe03a082 3006 * parameters in the TIM_IC_InitTypeDef.
mbed_official 573:ad23fe03a082 3007 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3008 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3009 * @param sConfig: TIM Input Capture configuration structure
mbed_official 573:ad23fe03a082 3010 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 3011 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3012 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 3013 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 3014 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 3015 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 3016 * @retval HAL status
mbed_official 573:ad23fe03a082 3017 */
mbed_official 573:ad23fe03a082 3018 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 573:ad23fe03a082 3019 {
mbed_official 573:ad23fe03a082 3020 /* Check the parameters */
mbed_official 573:ad23fe03a082 3021 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3022 assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
mbed_official 573:ad23fe03a082 3023 assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
mbed_official 573:ad23fe03a082 3024 assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
mbed_official 573:ad23fe03a082 3025 assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
mbed_official 573:ad23fe03a082 3026
mbed_official 573:ad23fe03a082 3027 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3028
mbed_official 573:ad23fe03a082 3029 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3030
mbed_official 573:ad23fe03a082 3031 if (Channel == TIM_CHANNEL_1)
mbed_official 573:ad23fe03a082 3032 {
mbed_official 573:ad23fe03a082 3033 /* TI1 Configuration */
mbed_official 573:ad23fe03a082 3034 TIM_TI1_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3035 sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3036 sConfig->ICSelection,
mbed_official 573:ad23fe03a082 3037 sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3038
mbed_official 573:ad23fe03a082 3039 /* Reset the IC1PSC Bits */
mbed_official 573:ad23fe03a082 3040 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 573:ad23fe03a082 3041
mbed_official 573:ad23fe03a082 3042 /* Set the IC1PSC value */
mbed_official 573:ad23fe03a082 3043 htim->Instance->CCMR1 |= sConfig->ICPrescaler;
mbed_official 573:ad23fe03a082 3044 }
mbed_official 573:ad23fe03a082 3045 else if (Channel == TIM_CHANNEL_2)
mbed_official 573:ad23fe03a082 3046 {
mbed_official 573:ad23fe03a082 3047 /* TI2 Configuration */
mbed_official 573:ad23fe03a082 3048 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3049
mbed_official 573:ad23fe03a082 3050 TIM_TI2_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3051 sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3052 sConfig->ICSelection,
mbed_official 573:ad23fe03a082 3053 sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3054
mbed_official 573:ad23fe03a082 3055 /* Reset the IC2PSC Bits */
mbed_official 573:ad23fe03a082 3056 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 573:ad23fe03a082 3057
mbed_official 573:ad23fe03a082 3058 /* Set the IC2PSC value */
mbed_official 573:ad23fe03a082 3059 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8);
mbed_official 573:ad23fe03a082 3060 }
mbed_official 573:ad23fe03a082 3061 else if (Channel == TIM_CHANNEL_3)
mbed_official 573:ad23fe03a082 3062 {
mbed_official 573:ad23fe03a082 3063 /* TI3 Configuration */
mbed_official 573:ad23fe03a082 3064 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3065
mbed_official 573:ad23fe03a082 3066 TIM_TI3_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3067 sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3068 sConfig->ICSelection,
mbed_official 573:ad23fe03a082 3069 sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3070
mbed_official 573:ad23fe03a082 3071 /* Reset the IC3PSC Bits */
mbed_official 573:ad23fe03a082 3072 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
mbed_official 573:ad23fe03a082 3073
mbed_official 573:ad23fe03a082 3074 /* Set the IC3PSC value */
mbed_official 573:ad23fe03a082 3075 htim->Instance->CCMR2 |= sConfig->ICPrescaler;
mbed_official 573:ad23fe03a082 3076 }
mbed_official 573:ad23fe03a082 3077 else
mbed_official 573:ad23fe03a082 3078 {
mbed_official 573:ad23fe03a082 3079 /* TI4 Configuration */
mbed_official 573:ad23fe03a082 3080 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3081
mbed_official 573:ad23fe03a082 3082 TIM_TI4_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3083 sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3084 sConfig->ICSelection,
mbed_official 573:ad23fe03a082 3085 sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3086
mbed_official 573:ad23fe03a082 3087 /* Reset the IC4PSC Bits */
mbed_official 573:ad23fe03a082 3088 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
mbed_official 573:ad23fe03a082 3089
mbed_official 573:ad23fe03a082 3090 /* Set the IC4PSC value */
mbed_official 573:ad23fe03a082 3091 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8);
mbed_official 573:ad23fe03a082 3092 }
mbed_official 573:ad23fe03a082 3093
mbed_official 573:ad23fe03a082 3094 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3095
mbed_official 573:ad23fe03a082 3096 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3097
mbed_official 573:ad23fe03a082 3098 return HAL_OK;
mbed_official 573:ad23fe03a082 3099 }
mbed_official 573:ad23fe03a082 3100
mbed_official 573:ad23fe03a082 3101 /**
mbed_official 573:ad23fe03a082 3102 * @brief Initializes the TIM PWM channels according to the specified
mbed_official 573:ad23fe03a082 3103 * parameters in the TIM_OC_InitTypeDef.
mbed_official 573:ad23fe03a082 3104 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3105 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3106 * @param sConfig: TIM PWM configuration structure
mbed_official 573:ad23fe03a082 3107 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 3108 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3109 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 3110 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 3111 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 3112 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 3113 * @retval HAL status
mbed_official 573:ad23fe03a082 3114 */
mbed_official 573:ad23fe03a082 3115 __weak HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
mbed_official 573:ad23fe03a082 3116 {
mbed_official 573:ad23fe03a082 3117 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3118
mbed_official 573:ad23fe03a082 3119 /* Check the parameters */
mbed_official 573:ad23fe03a082 3120 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 573:ad23fe03a082 3121 assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official 573:ad23fe03a082 3122 assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official 573:ad23fe03a082 3123 assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official 573:ad23fe03a082 3124 assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official 573:ad23fe03a082 3125 assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official 573:ad23fe03a082 3126 assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official 573:ad23fe03a082 3127
mbed_official 573:ad23fe03a082 3128 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3129
mbed_official 573:ad23fe03a082 3130 switch (Channel)
mbed_official 573:ad23fe03a082 3131 {
mbed_official 573:ad23fe03a082 3132 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 3133 {
mbed_official 573:ad23fe03a082 3134 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3135 /* Configure the Channel 1 in PWM mode */
mbed_official 573:ad23fe03a082 3136 TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 3137
mbed_official 573:ad23fe03a082 3138 /* Set the Preload enable bit for channel1 */
mbed_official 573:ad23fe03a082 3139 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
mbed_official 573:ad23fe03a082 3140
mbed_official 573:ad23fe03a082 3141 /* Configure the Output Fast mode */
mbed_official 573:ad23fe03a082 3142 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official 573:ad23fe03a082 3143 htim->Instance->CCMR1 |= sConfig->OCFastMode;
mbed_official 573:ad23fe03a082 3144 }
mbed_official 573:ad23fe03a082 3145 break;
mbed_official 573:ad23fe03a082 3146
mbed_official 573:ad23fe03a082 3147 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 3148 {
mbed_official 573:ad23fe03a082 3149 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3150 /* Configure the Channel 2 in PWM mode */
mbed_official 573:ad23fe03a082 3151 TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 3152
mbed_official 573:ad23fe03a082 3153 /* Set the Preload enable bit for channel2 */
mbed_official 573:ad23fe03a082 3154 htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
mbed_official 573:ad23fe03a082 3155
mbed_official 573:ad23fe03a082 3156 /* Configure the Output Fast mode */
mbed_official 573:ad23fe03a082 3157 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official 573:ad23fe03a082 3158 htim->Instance->CCMR1 |= sConfig->OCFastMode << 8;
mbed_official 573:ad23fe03a082 3159 }
mbed_official 573:ad23fe03a082 3160 break;
mbed_official 573:ad23fe03a082 3161
mbed_official 573:ad23fe03a082 3162 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 3163 {
mbed_official 573:ad23fe03a082 3164 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3165 /* Configure the Channel 3 in PWM mode */
mbed_official 573:ad23fe03a082 3166 TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 3167
mbed_official 573:ad23fe03a082 3168 /* Set the Preload enable bit for channel3 */
mbed_official 573:ad23fe03a082 3169 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
mbed_official 573:ad23fe03a082 3170
mbed_official 573:ad23fe03a082 3171 /* Configure the Output Fast mode */
mbed_official 573:ad23fe03a082 3172 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official 573:ad23fe03a082 3173 htim->Instance->CCMR2 |= sConfig->OCFastMode;
mbed_official 573:ad23fe03a082 3174 }
mbed_official 573:ad23fe03a082 3175 break;
mbed_official 573:ad23fe03a082 3176
mbed_official 573:ad23fe03a082 3177 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 3178 {
mbed_official 573:ad23fe03a082 3179 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3180 /* Configure the Channel 4 in PWM mode */
mbed_official 573:ad23fe03a082 3181 TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official 573:ad23fe03a082 3182
mbed_official 573:ad23fe03a082 3183 /* Set the Preload enable bit for channel4 */
mbed_official 573:ad23fe03a082 3184 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
mbed_official 573:ad23fe03a082 3185
mbed_official 573:ad23fe03a082 3186 /* Configure the Output Fast mode */
mbed_official 573:ad23fe03a082 3187 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official 573:ad23fe03a082 3188 htim->Instance->CCMR2 |= sConfig->OCFastMode << 8;
mbed_official 573:ad23fe03a082 3189 }
mbed_official 573:ad23fe03a082 3190 break;
mbed_official 573:ad23fe03a082 3191
mbed_official 573:ad23fe03a082 3192 default:
mbed_official 573:ad23fe03a082 3193 break;
mbed_official 573:ad23fe03a082 3194 }
mbed_official 573:ad23fe03a082 3195
mbed_official 573:ad23fe03a082 3196 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3197
mbed_official 573:ad23fe03a082 3198 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3199
mbed_official 573:ad23fe03a082 3200 return HAL_OK;
mbed_official 573:ad23fe03a082 3201 }
mbed_official 573:ad23fe03a082 3202
mbed_official 573:ad23fe03a082 3203 /**
mbed_official 573:ad23fe03a082 3204 * @brief Initializes the TIM One Pulse Channels according to the specified
mbed_official 573:ad23fe03a082 3205 * parameters in the TIM_OnePulse_InitTypeDef.
mbed_official 573:ad23fe03a082 3206 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3207 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3208 * @param sConfig: TIM One Pulse configuration structure
mbed_official 573:ad23fe03a082 3209 * @param OutputChannel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 3210 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3211 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 3212 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 3213 * @param InputChannel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 3214 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3215 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 3216 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 3217 * @retval HAL status
mbed_official 573:ad23fe03a082 3218 */
mbed_official 573:ad23fe03a082 3219 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel)
mbed_official 573:ad23fe03a082 3220 {
mbed_official 573:ad23fe03a082 3221 TIM_OC_InitTypeDef temp1;
mbed_official 573:ad23fe03a082 3222
mbed_official 573:ad23fe03a082 3223 /* Check the parameters */
mbed_official 573:ad23fe03a082 3224 assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
mbed_official 573:ad23fe03a082 3225 assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
mbed_official 573:ad23fe03a082 3226
mbed_official 573:ad23fe03a082 3227 if(OutputChannel != InputChannel)
mbed_official 573:ad23fe03a082 3228 {
mbed_official 573:ad23fe03a082 3229 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3230
mbed_official 573:ad23fe03a082 3231 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3232
mbed_official 573:ad23fe03a082 3233 /* Extract the Output compare configuration from sConfig structure */
mbed_official 573:ad23fe03a082 3234 temp1.OCMode = sConfig->OCMode;
mbed_official 573:ad23fe03a082 3235 temp1.Pulse = sConfig->Pulse;
mbed_official 573:ad23fe03a082 3236 temp1.OCPolarity = sConfig->OCPolarity;
mbed_official 573:ad23fe03a082 3237 temp1.OCNPolarity = sConfig->OCNPolarity;
mbed_official 573:ad23fe03a082 3238 temp1.OCIdleState = sConfig->OCIdleState;
mbed_official 573:ad23fe03a082 3239 temp1.OCNIdleState = sConfig->OCNIdleState;
mbed_official 573:ad23fe03a082 3240
mbed_official 573:ad23fe03a082 3241 switch (OutputChannel)
mbed_official 573:ad23fe03a082 3242 {
mbed_official 573:ad23fe03a082 3243 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 3244 {
mbed_official 573:ad23fe03a082 3245 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3246
mbed_official 573:ad23fe03a082 3247 TIM_OC1_SetConfig(htim->Instance, &temp1);
mbed_official 573:ad23fe03a082 3248 }
mbed_official 573:ad23fe03a082 3249 break;
mbed_official 573:ad23fe03a082 3250 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 3251 {
mbed_official 573:ad23fe03a082 3252 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3253
mbed_official 573:ad23fe03a082 3254 TIM_OC2_SetConfig(htim->Instance, &temp1);
mbed_official 573:ad23fe03a082 3255 }
mbed_official 573:ad23fe03a082 3256 break;
mbed_official 573:ad23fe03a082 3257 default:
mbed_official 573:ad23fe03a082 3258 break;
mbed_official 573:ad23fe03a082 3259 }
mbed_official 573:ad23fe03a082 3260 switch (InputChannel)
mbed_official 573:ad23fe03a082 3261 {
mbed_official 573:ad23fe03a082 3262 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 3263 {
mbed_official 573:ad23fe03a082 3264 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3265
mbed_official 573:ad23fe03a082 3266 TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3267 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3268
mbed_official 573:ad23fe03a082 3269 /* Reset the IC1PSC Bits */
mbed_official 573:ad23fe03a082 3270 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official 573:ad23fe03a082 3271
mbed_official 573:ad23fe03a082 3272 /* Select the Trigger source */
mbed_official 573:ad23fe03a082 3273 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 573:ad23fe03a082 3274 htim->Instance->SMCR |= TIM_TS_TI1FP1;
mbed_official 573:ad23fe03a082 3275
mbed_official 573:ad23fe03a082 3276 /* Select the Slave Mode */
mbed_official 573:ad23fe03a082 3277 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 3278 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 573:ad23fe03a082 3279 }
mbed_official 573:ad23fe03a082 3280 break;
mbed_official 573:ad23fe03a082 3281 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 3282 {
mbed_official 573:ad23fe03a082 3283 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3284
mbed_official 573:ad23fe03a082 3285 TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official 573:ad23fe03a082 3286 sConfig->ICSelection, sConfig->ICFilter);
mbed_official 573:ad23fe03a082 3287
mbed_official 573:ad23fe03a082 3288 /* Reset the IC2PSC Bits */
mbed_official 573:ad23fe03a082 3289 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official 573:ad23fe03a082 3290
mbed_official 573:ad23fe03a082 3291 /* Select the Trigger source */
mbed_official 573:ad23fe03a082 3292 htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official 573:ad23fe03a082 3293 htim->Instance->SMCR |= TIM_TS_TI2FP2;
mbed_official 573:ad23fe03a082 3294
mbed_official 573:ad23fe03a082 3295 /* Select the Slave Mode */
mbed_official 573:ad23fe03a082 3296 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 3297 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
mbed_official 573:ad23fe03a082 3298 }
mbed_official 573:ad23fe03a082 3299 break;
mbed_official 573:ad23fe03a082 3300
mbed_official 573:ad23fe03a082 3301 default:
mbed_official 573:ad23fe03a082 3302 break;
mbed_official 573:ad23fe03a082 3303 }
mbed_official 573:ad23fe03a082 3304
mbed_official 573:ad23fe03a082 3305 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3306
mbed_official 573:ad23fe03a082 3307 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3308
mbed_official 573:ad23fe03a082 3309 return HAL_OK;
mbed_official 573:ad23fe03a082 3310 }
mbed_official 573:ad23fe03a082 3311 else
mbed_official 573:ad23fe03a082 3312 {
mbed_official 573:ad23fe03a082 3313 return HAL_ERROR;
mbed_official 573:ad23fe03a082 3314 }
mbed_official 573:ad23fe03a082 3315 }
mbed_official 573:ad23fe03a082 3316
mbed_official 573:ad23fe03a082 3317 /**
mbed_official 573:ad23fe03a082 3318 * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
mbed_official 573:ad23fe03a082 3319 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3320 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3321 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write.
mbed_official 573:ad23fe03a082 3322 * This parameters can be on of the following values:
mbed_official 573:ad23fe03a082 3323 * @arg TIM_DMABASE_CR1
mbed_official 573:ad23fe03a082 3324 * @arg TIM_DMABASE_CR2
mbed_official 573:ad23fe03a082 3325 * @arg TIM_DMABASE_SMCR
mbed_official 573:ad23fe03a082 3326 * @arg TIM_DMABASE_DIER
mbed_official 573:ad23fe03a082 3327 * @arg TIM_DMABASE_SR
mbed_official 573:ad23fe03a082 3328 * @arg TIM_DMABASE_EGR
mbed_official 573:ad23fe03a082 3329 * @arg TIM_DMABASE_CCMR1
mbed_official 573:ad23fe03a082 3330 * @arg TIM_DMABASE_CCMR2
mbed_official 573:ad23fe03a082 3331 * @arg TIM_DMABASE_CCER
mbed_official 573:ad23fe03a082 3332 * @arg TIM_DMABASE_CNT
mbed_official 573:ad23fe03a082 3333 * @arg TIM_DMABASE_PSC
mbed_official 573:ad23fe03a082 3334 * @arg TIM_DMABASE_ARR
mbed_official 573:ad23fe03a082 3335 * @arg TIM_DMABASE_RCR
mbed_official 573:ad23fe03a082 3336 * @arg TIM_DMABASE_CCR1
mbed_official 573:ad23fe03a082 3337 * @arg TIM_DMABASE_CCR2
mbed_official 573:ad23fe03a082 3338 * @arg TIM_DMABASE_CCR3
mbed_official 573:ad23fe03a082 3339 * @arg TIM_DMABASE_CCR4
mbed_official 573:ad23fe03a082 3340 * @arg TIM_DMABASE_BDTR
mbed_official 573:ad23fe03a082 3341 * @arg TIM_DMABASE_DCR
mbed_official 573:ad23fe03a082 3342 * @param BurstRequestSrc: TIM DMA Request sources.
mbed_official 573:ad23fe03a082 3343 * This parameters can be on of the following values:
mbed_official 573:ad23fe03a082 3344 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 573:ad23fe03a082 3345 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 573:ad23fe03a082 3346 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 573:ad23fe03a082 3347 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 573:ad23fe03a082 3348 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 573:ad23fe03a082 3349 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 573:ad23fe03a082 3350 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 573:ad23fe03a082 3351 * @param BurstBuffer: The Buffer address.
mbed_official 573:ad23fe03a082 3352 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 573:ad23fe03a082 3353 * between TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
mbed_official 573:ad23fe03a082 3354 * @retval HAL status
mbed_official 573:ad23fe03a082 3355 */
mbed_official 573:ad23fe03a082 3356 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 573:ad23fe03a082 3357 uint32_t* BurstBuffer, uint32_t BurstLength)
mbed_official 573:ad23fe03a082 3358 {
mbed_official 573:ad23fe03a082 3359 /* Check the parameters */
mbed_official 573:ad23fe03a082 3360 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3361 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 573:ad23fe03a082 3362 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 573:ad23fe03a082 3363 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 573:ad23fe03a082 3364
mbed_official 573:ad23fe03a082 3365 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 3366 {
mbed_official 573:ad23fe03a082 3367 return HAL_BUSY;
mbed_official 573:ad23fe03a082 3368 }
mbed_official 573:ad23fe03a082 3369 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 3370 {
mbed_official 573:ad23fe03a082 3371 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 573:ad23fe03a082 3372 {
mbed_official 573:ad23fe03a082 3373 return HAL_ERROR;
mbed_official 573:ad23fe03a082 3374 }
mbed_official 573:ad23fe03a082 3375 else
mbed_official 573:ad23fe03a082 3376 {
mbed_official 573:ad23fe03a082 3377 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3378 }
mbed_official 573:ad23fe03a082 3379 }
mbed_official 573:ad23fe03a082 3380 switch(BurstRequestSrc)
mbed_official 573:ad23fe03a082 3381 {
mbed_official 573:ad23fe03a082 3382 case TIM_DMA_UPDATE:
mbed_official 573:ad23fe03a082 3383 {
mbed_official 573:ad23fe03a082 3384 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3385 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 573:ad23fe03a082 3386
mbed_official 573:ad23fe03a082 3387 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3388 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3389
mbed_official 573:ad23fe03a082 3390 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3391 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3392 }
mbed_official 573:ad23fe03a082 3393 break;
mbed_official 573:ad23fe03a082 3394 case TIM_DMA_CC1:
mbed_official 573:ad23fe03a082 3395 {
mbed_official 573:ad23fe03a082 3396 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3397 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 3398
mbed_official 573:ad23fe03a082 3399 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3400 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3401
mbed_official 573:ad23fe03a082 3402 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3403 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3404 }
mbed_official 573:ad23fe03a082 3405 break;
mbed_official 573:ad23fe03a082 3406 case TIM_DMA_CC2:
mbed_official 573:ad23fe03a082 3407 {
mbed_official 573:ad23fe03a082 3408 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3409 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 3410
mbed_official 573:ad23fe03a082 3411 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3412 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3413
mbed_official 573:ad23fe03a082 3414 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3415 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3416 }
mbed_official 573:ad23fe03a082 3417 break;
mbed_official 573:ad23fe03a082 3418 case TIM_DMA_CC3:
mbed_official 573:ad23fe03a082 3419 {
mbed_official 573:ad23fe03a082 3420 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3421 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 3422
mbed_official 573:ad23fe03a082 3423 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3424 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3425
mbed_official 573:ad23fe03a082 3426 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3427 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3428 }
mbed_official 573:ad23fe03a082 3429 break;
mbed_official 573:ad23fe03a082 3430 case TIM_DMA_CC4:
mbed_official 573:ad23fe03a082 3431 {
mbed_official 573:ad23fe03a082 3432 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3433 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official 573:ad23fe03a082 3434
mbed_official 573:ad23fe03a082 3435 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3436 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3437
mbed_official 573:ad23fe03a082 3438 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3439 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3440 }
mbed_official 573:ad23fe03a082 3441 break;
mbed_official 573:ad23fe03a082 3442 case TIM_DMA_COM:
mbed_official 573:ad23fe03a082 3443 {
mbed_official 573:ad23fe03a082 3444 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3445 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official 573:ad23fe03a082 3446
mbed_official 573:ad23fe03a082 3447 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3448 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3449
mbed_official 573:ad23fe03a082 3450 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3451 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3452 }
mbed_official 573:ad23fe03a082 3453 break;
mbed_official 573:ad23fe03a082 3454 case TIM_DMA_TRIGGER:
mbed_official 573:ad23fe03a082 3455 {
mbed_official 573:ad23fe03a082 3456 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3457 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 573:ad23fe03a082 3458
mbed_official 573:ad23fe03a082 3459 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3460 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3461
mbed_official 573:ad23fe03a082 3462 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3463 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3464 }
mbed_official 573:ad23fe03a082 3465 break;
mbed_official 573:ad23fe03a082 3466 default:
mbed_official 573:ad23fe03a082 3467 break;
mbed_official 573:ad23fe03a082 3468 }
mbed_official 573:ad23fe03a082 3469 /* configure the DMA Burst Mode */
mbed_official 573:ad23fe03a082 3470 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 573:ad23fe03a082 3471
mbed_official 573:ad23fe03a082 3472 /* Enable the TIM DMA Request */
mbed_official 573:ad23fe03a082 3473 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 573:ad23fe03a082 3474
mbed_official 573:ad23fe03a082 3475 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3476
mbed_official 573:ad23fe03a082 3477 /* Return function status */
mbed_official 573:ad23fe03a082 3478 return HAL_OK;
mbed_official 573:ad23fe03a082 3479 }
mbed_official 573:ad23fe03a082 3480
mbed_official 573:ad23fe03a082 3481 /**
mbed_official 573:ad23fe03a082 3482 * @brief Stops the TIM DMA Burst mode
mbed_official 573:ad23fe03a082 3483 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3484 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3485 * @param BurstRequestSrc: TIM DMA Request sources to disable
mbed_official 573:ad23fe03a082 3486 * @retval HAL status
mbed_official 573:ad23fe03a082 3487 */
mbed_official 573:ad23fe03a082 3488 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 573:ad23fe03a082 3489 {
mbed_official 573:ad23fe03a082 3490 /* Check the parameters */
mbed_official 573:ad23fe03a082 3491 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 573:ad23fe03a082 3492
mbed_official 573:ad23fe03a082 3493 /* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official 573:ad23fe03a082 3494 switch(BurstRequestSrc)
mbed_official 573:ad23fe03a082 3495 {
mbed_official 573:ad23fe03a082 3496 case TIM_DMA_UPDATE:
mbed_official 573:ad23fe03a082 3497 {
mbed_official 573:ad23fe03a082 3498 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official 573:ad23fe03a082 3499 }
mbed_official 573:ad23fe03a082 3500 break;
mbed_official 573:ad23fe03a082 3501 case TIM_DMA_CC1:
mbed_official 573:ad23fe03a082 3502 {
mbed_official 573:ad23fe03a082 3503 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official 573:ad23fe03a082 3504 }
mbed_official 573:ad23fe03a082 3505 break;
mbed_official 573:ad23fe03a082 3506 case TIM_DMA_CC2:
mbed_official 573:ad23fe03a082 3507 {
mbed_official 573:ad23fe03a082 3508 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official 573:ad23fe03a082 3509 }
mbed_official 573:ad23fe03a082 3510 break;
mbed_official 573:ad23fe03a082 3511 case TIM_DMA_CC3:
mbed_official 573:ad23fe03a082 3512 {
mbed_official 573:ad23fe03a082 3513 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official 573:ad23fe03a082 3514 }
mbed_official 573:ad23fe03a082 3515 break;
mbed_official 573:ad23fe03a082 3516 case TIM_DMA_CC4:
mbed_official 573:ad23fe03a082 3517 {
mbed_official 573:ad23fe03a082 3518 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official 573:ad23fe03a082 3519 }
mbed_official 573:ad23fe03a082 3520 break;
mbed_official 573:ad23fe03a082 3521 case TIM_DMA_COM:
mbed_official 573:ad23fe03a082 3522 {
mbed_official 573:ad23fe03a082 3523 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official 573:ad23fe03a082 3524 }
mbed_official 573:ad23fe03a082 3525 break;
mbed_official 573:ad23fe03a082 3526 case TIM_DMA_TRIGGER:
mbed_official 573:ad23fe03a082 3527 {
mbed_official 573:ad23fe03a082 3528 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official 573:ad23fe03a082 3529 }
mbed_official 573:ad23fe03a082 3530 break;
mbed_official 573:ad23fe03a082 3531 default:
mbed_official 573:ad23fe03a082 3532 break;
mbed_official 573:ad23fe03a082 3533 }
mbed_official 573:ad23fe03a082 3534
mbed_official 573:ad23fe03a082 3535 /* Disable the TIM Update DMA request */
mbed_official 573:ad23fe03a082 3536 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 573:ad23fe03a082 3537
mbed_official 573:ad23fe03a082 3538 /* Return function status */
mbed_official 573:ad23fe03a082 3539 return HAL_OK;
mbed_official 573:ad23fe03a082 3540 }
mbed_official 573:ad23fe03a082 3541
mbed_official 573:ad23fe03a082 3542 /**
mbed_official 573:ad23fe03a082 3543 * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
mbed_official 573:ad23fe03a082 3544 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3545 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3546 * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read.
mbed_official 573:ad23fe03a082 3547 * This parameters can be on of the following values:
mbed_official 573:ad23fe03a082 3548 * @arg TIM_DMABASE_CR1
mbed_official 573:ad23fe03a082 3549 * @arg TIM_DMABASE_CR2
mbed_official 573:ad23fe03a082 3550 * @arg TIM_DMABASE_SMCR
mbed_official 573:ad23fe03a082 3551 * @arg TIM_DMABASE_DIER
mbed_official 573:ad23fe03a082 3552 * @arg TIM_DMABASE_SR
mbed_official 573:ad23fe03a082 3553 * @arg TIM_DMABASE_EGR
mbed_official 573:ad23fe03a082 3554 * @arg TIM_DMABASE_CCMR1
mbed_official 573:ad23fe03a082 3555 * @arg TIM_DMABASE_CCMR2
mbed_official 573:ad23fe03a082 3556 * @arg TIM_DMABASE_CCER
mbed_official 573:ad23fe03a082 3557 * @arg TIM_DMABASE_CNT
mbed_official 573:ad23fe03a082 3558 * @arg TIM_DMABASE_PSC
mbed_official 573:ad23fe03a082 3559 * @arg TIM_DMABASE_ARR
mbed_official 573:ad23fe03a082 3560 * @arg TIM_DMABASE_RCR
mbed_official 573:ad23fe03a082 3561 * @arg TIM_DMABASE_CCR1
mbed_official 573:ad23fe03a082 3562 * @arg TIM_DMABASE_CCR2
mbed_official 573:ad23fe03a082 3563 * @arg TIM_DMABASE_CCR3
mbed_official 573:ad23fe03a082 3564 * @arg TIM_DMABASE_CCR4
mbed_official 573:ad23fe03a082 3565 * @arg TIM_DMABASE_BDTR
mbed_official 573:ad23fe03a082 3566 * @arg TIM_DMABASE_DCR
mbed_official 573:ad23fe03a082 3567 * @param BurstRequestSrc: TIM DMA Request sources.
mbed_official 573:ad23fe03a082 3568 * This parameters can be on of the following values:
mbed_official 573:ad23fe03a082 3569 * @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official 573:ad23fe03a082 3570 * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official 573:ad23fe03a082 3571 * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official 573:ad23fe03a082 3572 * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official 573:ad23fe03a082 3573 * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official 573:ad23fe03a082 3574 * @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official 573:ad23fe03a082 3575 * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official 573:ad23fe03a082 3576 * @param BurstBuffer: The Buffer address.
mbed_official 573:ad23fe03a082 3577 * @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official 573:ad23fe03a082 3578 * between TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
mbed_official 573:ad23fe03a082 3579 * @retval HAL status
mbed_official 573:ad23fe03a082 3580 */
mbed_official 573:ad23fe03a082 3581 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official 573:ad23fe03a082 3582 uint32_t *BurstBuffer, uint32_t BurstLength)
mbed_official 573:ad23fe03a082 3583 {
mbed_official 573:ad23fe03a082 3584 /* Check the parameters */
mbed_official 573:ad23fe03a082 3585 assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3586 assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official 573:ad23fe03a082 3587 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 573:ad23fe03a082 3588 assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official 573:ad23fe03a082 3589
mbed_official 573:ad23fe03a082 3590 if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official 573:ad23fe03a082 3591 {
mbed_official 573:ad23fe03a082 3592 return HAL_BUSY;
mbed_official 573:ad23fe03a082 3593 }
mbed_official 573:ad23fe03a082 3594 else if((htim->State == HAL_TIM_STATE_READY))
mbed_official 573:ad23fe03a082 3595 {
mbed_official 573:ad23fe03a082 3596 if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official 573:ad23fe03a082 3597 {
mbed_official 573:ad23fe03a082 3598 return HAL_ERROR;
mbed_official 573:ad23fe03a082 3599 }
mbed_official 573:ad23fe03a082 3600 else
mbed_official 573:ad23fe03a082 3601 {
mbed_official 573:ad23fe03a082 3602 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3603 }
mbed_official 573:ad23fe03a082 3604 }
mbed_official 573:ad23fe03a082 3605 switch(BurstRequestSrc)
mbed_official 573:ad23fe03a082 3606 {
mbed_official 573:ad23fe03a082 3607 case TIM_DMA_UPDATE:
mbed_official 573:ad23fe03a082 3608 {
mbed_official 573:ad23fe03a082 3609 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3610 htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official 573:ad23fe03a082 3611
mbed_official 573:ad23fe03a082 3612 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3613 htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3614
mbed_official 573:ad23fe03a082 3615 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3616 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3617 }
mbed_official 573:ad23fe03a082 3618 break;
mbed_official 573:ad23fe03a082 3619 case TIM_DMA_CC1:
mbed_official 573:ad23fe03a082 3620 {
mbed_official 573:ad23fe03a082 3621 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3622 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 3623
mbed_official 573:ad23fe03a082 3624 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3625 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3626
mbed_official 573:ad23fe03a082 3627 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3628 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3629 }
mbed_official 573:ad23fe03a082 3630 break;
mbed_official 573:ad23fe03a082 3631 case TIM_DMA_CC2:
mbed_official 573:ad23fe03a082 3632 {
mbed_official 573:ad23fe03a082 3633 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3634 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 3635
mbed_official 573:ad23fe03a082 3636 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3637 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3638
mbed_official 573:ad23fe03a082 3639 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3640 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3641 }
mbed_official 573:ad23fe03a082 3642 break;
mbed_official 573:ad23fe03a082 3643 case TIM_DMA_CC3:
mbed_official 573:ad23fe03a082 3644 {
mbed_official 573:ad23fe03a082 3645 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3646 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 3647
mbed_official 573:ad23fe03a082 3648 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3649 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3650
mbed_official 573:ad23fe03a082 3651 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3652 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3653 }
mbed_official 573:ad23fe03a082 3654 break;
mbed_official 573:ad23fe03a082 3655 case TIM_DMA_CC4:
mbed_official 573:ad23fe03a082 3656 {
mbed_official 573:ad23fe03a082 3657 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3658 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official 573:ad23fe03a082 3659
mbed_official 573:ad23fe03a082 3660 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3661 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3662
mbed_official 573:ad23fe03a082 3663 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3664 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3665 }
mbed_official 573:ad23fe03a082 3666 break;
mbed_official 573:ad23fe03a082 3667 case TIM_DMA_COM:
mbed_official 573:ad23fe03a082 3668 {
mbed_official 573:ad23fe03a082 3669 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3670 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official 573:ad23fe03a082 3671
mbed_official 573:ad23fe03a082 3672 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3673 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3674
mbed_official 573:ad23fe03a082 3675 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3676 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3677 }
mbed_official 573:ad23fe03a082 3678 break;
mbed_official 573:ad23fe03a082 3679 case TIM_DMA_TRIGGER:
mbed_official 573:ad23fe03a082 3680 {
mbed_official 573:ad23fe03a082 3681 /* Set the DMA Period elapsed callback */
mbed_official 573:ad23fe03a082 3682 htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official 573:ad23fe03a082 3683
mbed_official 573:ad23fe03a082 3684 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 3685 htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official 573:ad23fe03a082 3686
mbed_official 573:ad23fe03a082 3687 /* Enable the DMA Stream */
mbed_official 573:ad23fe03a082 3688 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official 573:ad23fe03a082 3689 }
mbed_official 573:ad23fe03a082 3690 break;
mbed_official 573:ad23fe03a082 3691 default:
mbed_official 573:ad23fe03a082 3692 break;
mbed_official 573:ad23fe03a082 3693 }
mbed_official 573:ad23fe03a082 3694
mbed_official 573:ad23fe03a082 3695 /* configure the DMA Burst Mode */
mbed_official 573:ad23fe03a082 3696 htim->Instance->DCR = BurstBaseAddress | BurstLength;
mbed_official 573:ad23fe03a082 3697
mbed_official 573:ad23fe03a082 3698 /* Enable the TIM DMA Request */
mbed_official 573:ad23fe03a082 3699 __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official 573:ad23fe03a082 3700
mbed_official 573:ad23fe03a082 3701 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3702
mbed_official 573:ad23fe03a082 3703 /* Return function status */
mbed_official 573:ad23fe03a082 3704 return HAL_OK;
mbed_official 573:ad23fe03a082 3705 }
mbed_official 573:ad23fe03a082 3706
mbed_official 573:ad23fe03a082 3707 /**
mbed_official 573:ad23fe03a082 3708 * @brief Stop the DMA burst reading
mbed_official 573:ad23fe03a082 3709 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3710 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3711 * @param BurstRequestSrc: TIM DMA Request sources to disable.
mbed_official 573:ad23fe03a082 3712 * @retval HAL status
mbed_official 573:ad23fe03a082 3713 */
mbed_official 573:ad23fe03a082 3714 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official 573:ad23fe03a082 3715 {
mbed_official 573:ad23fe03a082 3716 /* Check the parameters */
mbed_official 573:ad23fe03a082 3717 assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official 573:ad23fe03a082 3718
mbed_official 573:ad23fe03a082 3719 /* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official 573:ad23fe03a082 3720 switch(BurstRequestSrc)
mbed_official 573:ad23fe03a082 3721 {
mbed_official 573:ad23fe03a082 3722 case TIM_DMA_UPDATE:
mbed_official 573:ad23fe03a082 3723 {
mbed_official 573:ad23fe03a082 3724 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official 573:ad23fe03a082 3725 }
mbed_official 573:ad23fe03a082 3726 break;
mbed_official 573:ad23fe03a082 3727 case TIM_DMA_CC1:
mbed_official 573:ad23fe03a082 3728 {
mbed_official 573:ad23fe03a082 3729 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official 573:ad23fe03a082 3730 }
mbed_official 573:ad23fe03a082 3731 break;
mbed_official 573:ad23fe03a082 3732 case TIM_DMA_CC2:
mbed_official 573:ad23fe03a082 3733 {
mbed_official 573:ad23fe03a082 3734 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official 573:ad23fe03a082 3735 }
mbed_official 573:ad23fe03a082 3736 break;
mbed_official 573:ad23fe03a082 3737 case TIM_DMA_CC3:
mbed_official 573:ad23fe03a082 3738 {
mbed_official 573:ad23fe03a082 3739 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official 573:ad23fe03a082 3740 }
mbed_official 573:ad23fe03a082 3741 break;
mbed_official 573:ad23fe03a082 3742 case TIM_DMA_CC4:
mbed_official 573:ad23fe03a082 3743 {
mbed_official 573:ad23fe03a082 3744 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official 573:ad23fe03a082 3745 }
mbed_official 573:ad23fe03a082 3746 break;
mbed_official 573:ad23fe03a082 3747 case TIM_DMA_COM:
mbed_official 573:ad23fe03a082 3748 {
mbed_official 573:ad23fe03a082 3749 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official 573:ad23fe03a082 3750 }
mbed_official 573:ad23fe03a082 3751 break;
mbed_official 573:ad23fe03a082 3752 case TIM_DMA_TRIGGER:
mbed_official 573:ad23fe03a082 3753 {
mbed_official 573:ad23fe03a082 3754 HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official 573:ad23fe03a082 3755 }
mbed_official 573:ad23fe03a082 3756 break;
mbed_official 573:ad23fe03a082 3757 default:
mbed_official 573:ad23fe03a082 3758 break;
mbed_official 573:ad23fe03a082 3759 }
mbed_official 573:ad23fe03a082 3760
mbed_official 573:ad23fe03a082 3761 /* Disable the TIM Update DMA request */
mbed_official 573:ad23fe03a082 3762 __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official 573:ad23fe03a082 3763
mbed_official 573:ad23fe03a082 3764 /* Return function status */
mbed_official 573:ad23fe03a082 3765 return HAL_OK;
mbed_official 573:ad23fe03a082 3766 }
mbed_official 573:ad23fe03a082 3767
mbed_official 573:ad23fe03a082 3768 /**
mbed_official 573:ad23fe03a082 3769 * @brief Generate a software event
mbed_official 573:ad23fe03a082 3770 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3771 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3772 * @param EventSource: specifies the event source.
mbed_official 573:ad23fe03a082 3773 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3774 * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source
mbed_official 573:ad23fe03a082 3775 * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
mbed_official 573:ad23fe03a082 3776 * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source
mbed_official 573:ad23fe03a082 3777 * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source
mbed_official 573:ad23fe03a082 3778 * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source
mbed_official 573:ad23fe03a082 3779 * @arg TIM_EVENTSOURCE_COM: Timer COM event source
mbed_official 573:ad23fe03a082 3780 * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source
mbed_official 573:ad23fe03a082 3781 * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source
mbed_official 573:ad23fe03a082 3782 * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source
mbed_official 573:ad23fe03a082 3783 * @note TIM6 and TIM7 can only generate an update event.
mbed_official 573:ad23fe03a082 3784 * @note TIM_EVENTSOURCE_COM, TIM_EVENTSOURCE_BREAK and TIM_EVENTSOURCE_BREAK2 are used only with TIM1 and TIM8.
mbed_official 573:ad23fe03a082 3785 * @retval HAL status
mbed_official 573:ad23fe03a082 3786 */
mbed_official 573:ad23fe03a082 3787
mbed_official 573:ad23fe03a082 3788 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
mbed_official 573:ad23fe03a082 3789 {
mbed_official 573:ad23fe03a082 3790 /* Check the parameters */
mbed_official 573:ad23fe03a082 3791 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3792 assert_param(IS_TIM_EVENT_SOURCE(EventSource));
mbed_official 573:ad23fe03a082 3793
mbed_official 573:ad23fe03a082 3794 /* Process Locked */
mbed_official 573:ad23fe03a082 3795 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3796
mbed_official 573:ad23fe03a082 3797 /* Change the TIM state */
mbed_official 573:ad23fe03a082 3798 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3799
mbed_official 573:ad23fe03a082 3800 /* Set the event sources */
mbed_official 573:ad23fe03a082 3801 htim->Instance->EGR = EventSource;
mbed_official 573:ad23fe03a082 3802
mbed_official 573:ad23fe03a082 3803 /* Change the TIM state */
mbed_official 573:ad23fe03a082 3804 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3805
mbed_official 573:ad23fe03a082 3806 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3807
mbed_official 573:ad23fe03a082 3808 /* Return function status */
mbed_official 573:ad23fe03a082 3809 return HAL_OK;
mbed_official 573:ad23fe03a082 3810 }
mbed_official 573:ad23fe03a082 3811
mbed_official 573:ad23fe03a082 3812 /**
mbed_official 573:ad23fe03a082 3813 * @brief Configures the OCRef clear feature
mbed_official 573:ad23fe03a082 3814 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3815 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3816 * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official 573:ad23fe03a082 3817 * contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official 573:ad23fe03a082 3818 * @param Channel: specifies the TIM Channel.
mbed_official 573:ad23fe03a082 3819 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 3820 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 3821 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 3822 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 3823 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 3824 * @retval HAL status
mbed_official 573:ad23fe03a082 3825 */
mbed_official 573:ad23fe03a082 3826 __weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel)
mbed_official 573:ad23fe03a082 3827 {
mbed_official 573:ad23fe03a082 3828 /* Check the parameters */
mbed_official 573:ad23fe03a082 3829 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3830 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 573:ad23fe03a082 3831 assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official 573:ad23fe03a082 3832
mbed_official 573:ad23fe03a082 3833 /* Process Locked */
mbed_official 573:ad23fe03a082 3834 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3835
mbed_official 573:ad23fe03a082 3836 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3837
mbed_official 573:ad23fe03a082 3838 if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
mbed_official 573:ad23fe03a082 3839 {
mbed_official 573:ad23fe03a082 3840 assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official 573:ad23fe03a082 3841 assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official 573:ad23fe03a082 3842 assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official 573:ad23fe03a082 3843
mbed_official 573:ad23fe03a082 3844 TIM_ETR_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3845 sClearInputConfig->ClearInputPrescaler,
mbed_official 573:ad23fe03a082 3846 sClearInputConfig->ClearInputPolarity,
mbed_official 573:ad23fe03a082 3847 sClearInputConfig->ClearInputFilter);
mbed_official 573:ad23fe03a082 3848 }
mbed_official 573:ad23fe03a082 3849
mbed_official 573:ad23fe03a082 3850 switch (Channel)
mbed_official 573:ad23fe03a082 3851 {
mbed_official 573:ad23fe03a082 3852 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 3853 {
mbed_official 573:ad23fe03a082 3854 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 573:ad23fe03a082 3855 {
mbed_official 573:ad23fe03a082 3856 /* Enable the Ocref clear feature for Channel 1 */
mbed_official 573:ad23fe03a082 3857 htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
mbed_official 573:ad23fe03a082 3858 }
mbed_official 573:ad23fe03a082 3859 else
mbed_official 573:ad23fe03a082 3860 {
mbed_official 573:ad23fe03a082 3861 /* Disable the Ocref clear feature for Channel 1 */
mbed_official 573:ad23fe03a082 3862 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official 573:ad23fe03a082 3863 }
mbed_official 573:ad23fe03a082 3864 }
mbed_official 573:ad23fe03a082 3865 break;
mbed_official 573:ad23fe03a082 3866 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 3867 {
mbed_official 573:ad23fe03a082 3868 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3869 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 573:ad23fe03a082 3870 {
mbed_official 573:ad23fe03a082 3871 /* Enable the Ocref clear feature for Channel 2 */
mbed_official 573:ad23fe03a082 3872 htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
mbed_official 573:ad23fe03a082 3873 }
mbed_official 573:ad23fe03a082 3874 else
mbed_official 573:ad23fe03a082 3875 {
mbed_official 573:ad23fe03a082 3876 /* Disable the Ocref clear feature for Channel 2 */
mbed_official 573:ad23fe03a082 3877 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official 573:ad23fe03a082 3878 }
mbed_official 573:ad23fe03a082 3879 }
mbed_official 573:ad23fe03a082 3880 break;
mbed_official 573:ad23fe03a082 3881 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 3882 {
mbed_official 573:ad23fe03a082 3883 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3884 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 573:ad23fe03a082 3885 {
mbed_official 573:ad23fe03a082 3886 /* Enable the Ocref clear feature for Channel 3 */
mbed_official 573:ad23fe03a082 3887 htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
mbed_official 573:ad23fe03a082 3888 }
mbed_official 573:ad23fe03a082 3889 else
mbed_official 573:ad23fe03a082 3890 {
mbed_official 573:ad23fe03a082 3891 /* Disable the Ocref clear feature for Channel 3 */
mbed_official 573:ad23fe03a082 3892 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official 573:ad23fe03a082 3893 }
mbed_official 573:ad23fe03a082 3894 }
mbed_official 573:ad23fe03a082 3895 break;
mbed_official 573:ad23fe03a082 3896 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 3897 {
mbed_official 573:ad23fe03a082 3898 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3899 if(sClearInputConfig->ClearInputState != RESET)
mbed_official 573:ad23fe03a082 3900 {
mbed_official 573:ad23fe03a082 3901 /* Enable the Ocref clear feature for Channel 4 */
mbed_official 573:ad23fe03a082 3902 htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
mbed_official 573:ad23fe03a082 3903 }
mbed_official 573:ad23fe03a082 3904 else
mbed_official 573:ad23fe03a082 3905 {
mbed_official 573:ad23fe03a082 3906 /* Disable the Ocref clear feature for Channel 4 */
mbed_official 573:ad23fe03a082 3907 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official 573:ad23fe03a082 3908 }
mbed_official 573:ad23fe03a082 3909 }
mbed_official 573:ad23fe03a082 3910 break;
mbed_official 573:ad23fe03a082 3911 default:
mbed_official 573:ad23fe03a082 3912 break;
mbed_official 573:ad23fe03a082 3913 }
mbed_official 573:ad23fe03a082 3914
mbed_official 573:ad23fe03a082 3915 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 3916
mbed_official 573:ad23fe03a082 3917 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 3918
mbed_official 573:ad23fe03a082 3919 return HAL_OK;
mbed_official 573:ad23fe03a082 3920 }
mbed_official 573:ad23fe03a082 3921
mbed_official 573:ad23fe03a082 3922 /**
mbed_official 573:ad23fe03a082 3923 * @brief Configures the clock source to be used
mbed_official 573:ad23fe03a082 3924 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 3925 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 3926 * @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
mbed_official 573:ad23fe03a082 3927 * contains the clock source information for the TIM peripheral.
mbed_official 573:ad23fe03a082 3928 * @retval HAL status
mbed_official 573:ad23fe03a082 3929 */
mbed_official 573:ad23fe03a082 3930 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig)
mbed_official 573:ad23fe03a082 3931 {
mbed_official 573:ad23fe03a082 3932 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 3933
mbed_official 573:ad23fe03a082 3934 /* Process Locked */
mbed_official 573:ad23fe03a082 3935 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 3936
mbed_official 573:ad23fe03a082 3937 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 3938
mbed_official 573:ad23fe03a082 3939 /* Check the parameters */
mbed_official 573:ad23fe03a082 3940 assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
mbed_official 573:ad23fe03a082 3941 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
mbed_official 573:ad23fe03a082 3942 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
mbed_official 573:ad23fe03a082 3943 assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
mbed_official 573:ad23fe03a082 3944
mbed_official 573:ad23fe03a082 3945 /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
mbed_official 573:ad23fe03a082 3946 tmpsmcr = htim->Instance->SMCR;
mbed_official 573:ad23fe03a082 3947 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 573:ad23fe03a082 3948 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 573:ad23fe03a082 3949 htim->Instance->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 3950
mbed_official 573:ad23fe03a082 3951 switch (sClockSourceConfig->ClockSource)
mbed_official 573:ad23fe03a082 3952 {
mbed_official 573:ad23fe03a082 3953 case TIM_CLOCKSOURCE_INTERNAL:
mbed_official 573:ad23fe03a082 3954 {
mbed_official 573:ad23fe03a082 3955 assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3956 /* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official 573:ad23fe03a082 3957 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 3958 }
mbed_official 573:ad23fe03a082 3959 break;
mbed_official 573:ad23fe03a082 3960
mbed_official 573:ad23fe03a082 3961 case TIM_CLOCKSOURCE_ETRMODE1:
mbed_official 573:ad23fe03a082 3962 {
mbed_official 573:ad23fe03a082 3963 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3964 /* Configure the ETR Clock source */
mbed_official 573:ad23fe03a082 3965 TIM_ETR_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3966 sClockSourceConfig->ClockPrescaler,
mbed_official 573:ad23fe03a082 3967 sClockSourceConfig->ClockPolarity,
mbed_official 573:ad23fe03a082 3968 sClockSourceConfig->ClockFilter);
mbed_official 573:ad23fe03a082 3969 /* Get the TIMx SMCR register value */
mbed_official 573:ad23fe03a082 3970 tmpsmcr = htim->Instance->SMCR;
mbed_official 573:ad23fe03a082 3971 /* Reset the SMS and TS Bits */
mbed_official 573:ad23fe03a082 3972 tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
mbed_official 573:ad23fe03a082 3973 /* Select the External clock mode1 and the ETRF trigger */
mbed_official 573:ad23fe03a082 3974 tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
mbed_official 573:ad23fe03a082 3975 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 3976 htim->Instance->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 3977 }
mbed_official 573:ad23fe03a082 3978 break;
mbed_official 573:ad23fe03a082 3979
mbed_official 573:ad23fe03a082 3980 case TIM_CLOCKSOURCE_ETRMODE2:
mbed_official 573:ad23fe03a082 3981 {
mbed_official 573:ad23fe03a082 3982 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3983 /* Configure the ETR Clock source */
mbed_official 573:ad23fe03a082 3984 TIM_ETR_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 3985 sClockSourceConfig->ClockPrescaler,
mbed_official 573:ad23fe03a082 3986 sClockSourceConfig->ClockPolarity,
mbed_official 573:ad23fe03a082 3987 sClockSourceConfig->ClockFilter);
mbed_official 573:ad23fe03a082 3988 /* Enable the External clock mode2 */
mbed_official 573:ad23fe03a082 3989 htim->Instance->SMCR |= TIM_SMCR_ECE;
mbed_official 573:ad23fe03a082 3990 }
mbed_official 573:ad23fe03a082 3991 break;
mbed_official 573:ad23fe03a082 3992
mbed_official 573:ad23fe03a082 3993 case TIM_CLOCKSOURCE_TI1:
mbed_official 573:ad23fe03a082 3994 {
mbed_official 573:ad23fe03a082 3995 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 3996 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 3997 sClockSourceConfig->ClockPolarity,
mbed_official 573:ad23fe03a082 3998 sClockSourceConfig->ClockFilter);
mbed_official 573:ad23fe03a082 3999 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
mbed_official 573:ad23fe03a082 4000 }
mbed_official 573:ad23fe03a082 4001 break;
mbed_official 573:ad23fe03a082 4002 case TIM_CLOCKSOURCE_TI2:
mbed_official 573:ad23fe03a082 4003 {
mbed_official 573:ad23fe03a082 4004 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4005 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 4006 sClockSourceConfig->ClockPolarity,
mbed_official 573:ad23fe03a082 4007 sClockSourceConfig->ClockFilter);
mbed_official 573:ad23fe03a082 4008 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
mbed_official 573:ad23fe03a082 4009 }
mbed_official 573:ad23fe03a082 4010 break;
mbed_official 573:ad23fe03a082 4011 case TIM_CLOCKSOURCE_TI1ED:
mbed_official 573:ad23fe03a082 4012 {
mbed_official 573:ad23fe03a082 4013 assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4014 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 4015 sClockSourceConfig->ClockPolarity,
mbed_official 573:ad23fe03a082 4016 sClockSourceConfig->ClockFilter);
mbed_official 573:ad23fe03a082 4017 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
mbed_official 573:ad23fe03a082 4018 }
mbed_official 573:ad23fe03a082 4019 break;
mbed_official 573:ad23fe03a082 4020 case TIM_CLOCKSOURCE_ITR0:
mbed_official 573:ad23fe03a082 4021 {
mbed_official 573:ad23fe03a082 4022 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4023 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
mbed_official 573:ad23fe03a082 4024 }
mbed_official 573:ad23fe03a082 4025 break;
mbed_official 573:ad23fe03a082 4026 case TIM_CLOCKSOURCE_ITR1:
mbed_official 573:ad23fe03a082 4027 {
mbed_official 573:ad23fe03a082 4028 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4029 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
mbed_official 573:ad23fe03a082 4030 }
mbed_official 573:ad23fe03a082 4031 break;
mbed_official 573:ad23fe03a082 4032 case TIM_CLOCKSOURCE_ITR2:
mbed_official 573:ad23fe03a082 4033 {
mbed_official 573:ad23fe03a082 4034 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4035 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
mbed_official 573:ad23fe03a082 4036 }
mbed_official 573:ad23fe03a082 4037 break;
mbed_official 573:ad23fe03a082 4038 case TIM_CLOCKSOURCE_ITR3:
mbed_official 573:ad23fe03a082 4039 {
mbed_official 573:ad23fe03a082 4040 assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4041 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
mbed_official 573:ad23fe03a082 4042 }
mbed_official 573:ad23fe03a082 4043 break;
mbed_official 573:ad23fe03a082 4044
mbed_official 573:ad23fe03a082 4045 default:
mbed_official 573:ad23fe03a082 4046 break;
mbed_official 573:ad23fe03a082 4047 }
mbed_official 573:ad23fe03a082 4048 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4049
mbed_official 573:ad23fe03a082 4050 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 4051
mbed_official 573:ad23fe03a082 4052 return HAL_OK;
mbed_official 573:ad23fe03a082 4053 }
mbed_official 573:ad23fe03a082 4054
mbed_official 573:ad23fe03a082 4055 /**
mbed_official 573:ad23fe03a082 4056 * @brief Selects the signal connected to the TI1 input: direct from CH1_input
mbed_official 573:ad23fe03a082 4057 * or a XOR combination between CH1_input, CH2_input & CH3_input
mbed_official 573:ad23fe03a082 4058 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4059 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4060 * @param TI1_Selection: Indicate whether or not channel 1 is connected to the
mbed_official 573:ad23fe03a082 4061 * output of a XOR gate.
mbed_official 573:ad23fe03a082 4062 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 4063 * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
mbed_official 573:ad23fe03a082 4064 * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
mbed_official 573:ad23fe03a082 4065 * pins are connected to the TI1 input (XOR combination)
mbed_official 573:ad23fe03a082 4066 * @retval HAL status
mbed_official 573:ad23fe03a082 4067 */
mbed_official 573:ad23fe03a082 4068 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
mbed_official 573:ad23fe03a082 4069 {
mbed_official 573:ad23fe03a082 4070 uint32_t tmpcr2 = 0;
mbed_official 573:ad23fe03a082 4071
mbed_official 573:ad23fe03a082 4072 /* Check the parameters */
mbed_official 573:ad23fe03a082 4073 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4074 assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
mbed_official 573:ad23fe03a082 4075
mbed_official 573:ad23fe03a082 4076 /* Get the TIMx CR2 register value */
mbed_official 573:ad23fe03a082 4077 tmpcr2 = htim->Instance->CR2;
mbed_official 573:ad23fe03a082 4078
mbed_official 573:ad23fe03a082 4079 /* Reset the TI1 selection */
mbed_official 573:ad23fe03a082 4080 tmpcr2 &= ~TIM_CR2_TI1S;
mbed_official 573:ad23fe03a082 4081
mbed_official 573:ad23fe03a082 4082 /* Set the TI1 selection */
mbed_official 573:ad23fe03a082 4083 tmpcr2 |= TI1_Selection;
mbed_official 573:ad23fe03a082 4084
mbed_official 573:ad23fe03a082 4085 /* Write to TIMxCR2 */
mbed_official 573:ad23fe03a082 4086 htim->Instance->CR2 = tmpcr2;
mbed_official 573:ad23fe03a082 4087
mbed_official 573:ad23fe03a082 4088 return HAL_OK;
mbed_official 573:ad23fe03a082 4089 }
mbed_official 573:ad23fe03a082 4090
mbed_official 573:ad23fe03a082 4091 /**
mbed_official 573:ad23fe03a082 4092 * @brief Configures the TIM in Slave mode
mbed_official 573:ad23fe03a082 4093 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4094 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4095 * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official 573:ad23fe03a082 4096 * contains the selected trigger (internal trigger input, filtered
mbed_official 573:ad23fe03a082 4097 * timer input or external trigger input) and the ) and the Slave
mbed_official 573:ad23fe03a082 4098 * mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official 573:ad23fe03a082 4099 * @retval HAL status
mbed_official 573:ad23fe03a082 4100 */
mbed_official 573:ad23fe03a082 4101 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 573:ad23fe03a082 4102 {
mbed_official 573:ad23fe03a082 4103 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 4104 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 4105 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4106
mbed_official 573:ad23fe03a082 4107 /* Check the parameters */
mbed_official 573:ad23fe03a082 4108 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4109 assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official 573:ad23fe03a082 4110 assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official 573:ad23fe03a082 4111
mbed_official 573:ad23fe03a082 4112 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 4113
mbed_official 573:ad23fe03a082 4114 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 4115
mbed_official 573:ad23fe03a082 4116 /* Get the TIMx SMCR register value */
mbed_official 573:ad23fe03a082 4117 tmpsmcr = htim->Instance->SMCR;
mbed_official 573:ad23fe03a082 4118
mbed_official 573:ad23fe03a082 4119 /* Reset the Trigger Selection Bits */
mbed_official 573:ad23fe03a082 4120 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 573:ad23fe03a082 4121 /* Set the Input Trigger source */
mbed_official 573:ad23fe03a082 4122 tmpsmcr |= sSlaveConfig->InputTrigger;
mbed_official 573:ad23fe03a082 4123
mbed_official 573:ad23fe03a082 4124 /* Reset the slave mode Bits */
mbed_official 573:ad23fe03a082 4125 tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 4126 /* Set the slave mode */
mbed_official 573:ad23fe03a082 4127 tmpsmcr |= sSlaveConfig->SlaveMode;
mbed_official 573:ad23fe03a082 4128
mbed_official 573:ad23fe03a082 4129 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 4130 htim->Instance->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 4131
mbed_official 573:ad23fe03a082 4132 /* Configure the trigger prescaler, filter, and polarity */
mbed_official 573:ad23fe03a082 4133 switch (sSlaveConfig->InputTrigger)
mbed_official 573:ad23fe03a082 4134 {
mbed_official 573:ad23fe03a082 4135 case TIM_TS_ETRF:
mbed_official 573:ad23fe03a082 4136 {
mbed_official 573:ad23fe03a082 4137 /* Check the parameters */
mbed_official 573:ad23fe03a082 4138 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4139 assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official 573:ad23fe03a082 4140 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 4141 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 4142 /* Configure the ETR Trigger source */
mbed_official 573:ad23fe03a082 4143 TIM_ETR_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 4144 sSlaveConfig->TriggerPrescaler,
mbed_official 573:ad23fe03a082 4145 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 4146 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 4147 }
mbed_official 573:ad23fe03a082 4148 break;
mbed_official 573:ad23fe03a082 4149
mbed_official 573:ad23fe03a082 4150 case TIM_TS_TI1F_ED:
mbed_official 573:ad23fe03a082 4151 {
mbed_official 573:ad23fe03a082 4152 /* Check the parameters */
mbed_official 573:ad23fe03a082 4153 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4154 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 4155
mbed_official 573:ad23fe03a082 4156 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 573:ad23fe03a082 4157 tmpccer = htim->Instance->CCER;
mbed_official 573:ad23fe03a082 4158 htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official 573:ad23fe03a082 4159 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 573:ad23fe03a082 4160
mbed_official 573:ad23fe03a082 4161 /* Set the filter */
mbed_official 573:ad23fe03a082 4162 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 573:ad23fe03a082 4163 tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official 573:ad23fe03a082 4164
mbed_official 573:ad23fe03a082 4165 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 4166 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 573:ad23fe03a082 4167 htim->Instance->CCER = tmpccer;
mbed_official 573:ad23fe03a082 4168
mbed_official 573:ad23fe03a082 4169 }
mbed_official 573:ad23fe03a082 4170 break;
mbed_official 573:ad23fe03a082 4171
mbed_official 573:ad23fe03a082 4172 case TIM_TS_TI1FP1:
mbed_official 573:ad23fe03a082 4173 {
mbed_official 573:ad23fe03a082 4174 /* Check the parameters */
mbed_official 573:ad23fe03a082 4175 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4176 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 4177 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 4178
mbed_official 573:ad23fe03a082 4179 /* Configure TI1 Filter and Polarity */
mbed_official 573:ad23fe03a082 4180 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 4181 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 4182 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 4183 }
mbed_official 573:ad23fe03a082 4184 break;
mbed_official 573:ad23fe03a082 4185
mbed_official 573:ad23fe03a082 4186 case TIM_TS_TI2FP2:
mbed_official 573:ad23fe03a082 4187 {
mbed_official 573:ad23fe03a082 4188 /* Check the parameters */
mbed_official 573:ad23fe03a082 4189 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4190 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 4191 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 4192
mbed_official 573:ad23fe03a082 4193 /* Configure TI2 Filter and Polarity */
mbed_official 573:ad23fe03a082 4194 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 4195 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 4196 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 4197 }
mbed_official 573:ad23fe03a082 4198 break;
mbed_official 573:ad23fe03a082 4199
mbed_official 573:ad23fe03a082 4200 case TIM_TS_ITR0:
mbed_official 573:ad23fe03a082 4201 {
mbed_official 573:ad23fe03a082 4202 /* Check the parameter */
mbed_official 573:ad23fe03a082 4203 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4204 }
mbed_official 573:ad23fe03a082 4205 break;
mbed_official 573:ad23fe03a082 4206
mbed_official 573:ad23fe03a082 4207 case TIM_TS_ITR1:
mbed_official 573:ad23fe03a082 4208 {
mbed_official 573:ad23fe03a082 4209 /* Check the parameter */
mbed_official 573:ad23fe03a082 4210 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4211 }
mbed_official 573:ad23fe03a082 4212 break;
mbed_official 573:ad23fe03a082 4213
mbed_official 573:ad23fe03a082 4214 case TIM_TS_ITR2:
mbed_official 573:ad23fe03a082 4215 {
mbed_official 573:ad23fe03a082 4216 /* Check the parameter */
mbed_official 573:ad23fe03a082 4217 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4218 }
mbed_official 573:ad23fe03a082 4219 break;
mbed_official 573:ad23fe03a082 4220
mbed_official 573:ad23fe03a082 4221 case TIM_TS_ITR3:
mbed_official 573:ad23fe03a082 4222 {
mbed_official 573:ad23fe03a082 4223 /* Check the parameter */
mbed_official 573:ad23fe03a082 4224 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4225 }
mbed_official 573:ad23fe03a082 4226 break;
mbed_official 573:ad23fe03a082 4227
mbed_official 573:ad23fe03a082 4228 default:
mbed_official 573:ad23fe03a082 4229 break;
mbed_official 573:ad23fe03a082 4230 }
mbed_official 573:ad23fe03a082 4231
mbed_official 573:ad23fe03a082 4232 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4233
mbed_official 573:ad23fe03a082 4234 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 4235
mbed_official 573:ad23fe03a082 4236 return HAL_OK;
mbed_official 573:ad23fe03a082 4237 }
mbed_official 573:ad23fe03a082 4238
mbed_official 573:ad23fe03a082 4239 /**
mbed_official 573:ad23fe03a082 4240 * @brief Configures the TIM in Slave mode in interrupt mode
mbed_official 573:ad23fe03a082 4241 * @param htim: TIM handle.
mbed_official 573:ad23fe03a082 4242 * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official 573:ad23fe03a082 4243 * contains the selected trigger (internal trigger input, filtered
mbed_official 573:ad23fe03a082 4244 * timer input or external trigger input) and the ) and the Slave
mbed_official 573:ad23fe03a082 4245 * mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official 573:ad23fe03a082 4246 * @retval HAL status
mbed_official 573:ad23fe03a082 4247 */
mbed_official 573:ad23fe03a082 4248 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim,
mbed_official 573:ad23fe03a082 4249 TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 573:ad23fe03a082 4250 {
mbed_official 573:ad23fe03a082 4251 /* Check the parameters */
mbed_official 573:ad23fe03a082 4252 assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4253 assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official 573:ad23fe03a082 4254 assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official 573:ad23fe03a082 4255
mbed_official 573:ad23fe03a082 4256 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 4257
mbed_official 573:ad23fe03a082 4258 htim->State = HAL_TIM_STATE_BUSY;
mbed_official 573:ad23fe03a082 4259
mbed_official 573:ad23fe03a082 4260 TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
mbed_official 573:ad23fe03a082 4261
mbed_official 573:ad23fe03a082 4262 /* Enable Trigger Interrupt */
mbed_official 573:ad23fe03a082 4263 __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
mbed_official 573:ad23fe03a082 4264
mbed_official 573:ad23fe03a082 4265 /* Disable Trigger DMA request */
mbed_official 573:ad23fe03a082 4266 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
mbed_official 573:ad23fe03a082 4267
mbed_official 573:ad23fe03a082 4268 htim->State = HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4269
mbed_official 573:ad23fe03a082 4270 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 4271
mbed_official 573:ad23fe03a082 4272 return HAL_OK;
mbed_official 573:ad23fe03a082 4273 }
mbed_official 573:ad23fe03a082 4274
mbed_official 573:ad23fe03a082 4275 /**
mbed_official 573:ad23fe03a082 4276 * @brief Read the captured value from Capture Compare unit
mbed_official 573:ad23fe03a082 4277 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4278 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4279 * @param Channel: TIM Channels to be enabled.
mbed_official 573:ad23fe03a082 4280 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 4281 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official 573:ad23fe03a082 4282 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official 573:ad23fe03a082 4283 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official 573:ad23fe03a082 4284 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official 573:ad23fe03a082 4285 * @retval Captured value
mbed_official 573:ad23fe03a082 4286 */
mbed_official 573:ad23fe03a082 4287 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official 573:ad23fe03a082 4288 {
mbed_official 573:ad23fe03a082 4289 uint32_t tmpreg = 0;
mbed_official 573:ad23fe03a082 4290
mbed_official 573:ad23fe03a082 4291 __HAL_LOCK(htim);
mbed_official 573:ad23fe03a082 4292
mbed_official 573:ad23fe03a082 4293 switch (Channel)
mbed_official 573:ad23fe03a082 4294 {
mbed_official 573:ad23fe03a082 4295 case TIM_CHANNEL_1:
mbed_official 573:ad23fe03a082 4296 {
mbed_official 573:ad23fe03a082 4297 /* Check the parameters */
mbed_official 573:ad23fe03a082 4298 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4299
mbed_official 573:ad23fe03a082 4300 /* Return the capture 1 value */
mbed_official 573:ad23fe03a082 4301 tmpreg = htim->Instance->CCR1;
mbed_official 573:ad23fe03a082 4302
mbed_official 573:ad23fe03a082 4303 break;
mbed_official 573:ad23fe03a082 4304 }
mbed_official 573:ad23fe03a082 4305 case TIM_CHANNEL_2:
mbed_official 573:ad23fe03a082 4306 {
mbed_official 573:ad23fe03a082 4307 /* Check the parameters */
mbed_official 573:ad23fe03a082 4308 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4309
mbed_official 573:ad23fe03a082 4310 /* Return the capture 2 value */
mbed_official 573:ad23fe03a082 4311 tmpreg = htim->Instance->CCR2;
mbed_official 573:ad23fe03a082 4312
mbed_official 573:ad23fe03a082 4313 break;
mbed_official 573:ad23fe03a082 4314 }
mbed_official 573:ad23fe03a082 4315
mbed_official 573:ad23fe03a082 4316 case TIM_CHANNEL_3:
mbed_official 573:ad23fe03a082 4317 {
mbed_official 573:ad23fe03a082 4318 /* Check the parameters */
mbed_official 573:ad23fe03a082 4319 assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4320
mbed_official 573:ad23fe03a082 4321 /* Return the capture 3 value */
mbed_official 573:ad23fe03a082 4322 tmpreg = htim->Instance->CCR3;
mbed_official 573:ad23fe03a082 4323
mbed_official 573:ad23fe03a082 4324 break;
mbed_official 573:ad23fe03a082 4325 }
mbed_official 573:ad23fe03a082 4326
mbed_official 573:ad23fe03a082 4327 case TIM_CHANNEL_4:
mbed_official 573:ad23fe03a082 4328 {
mbed_official 573:ad23fe03a082 4329 /* Check the parameters */
mbed_official 573:ad23fe03a082 4330 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4331
mbed_official 573:ad23fe03a082 4332 /* Return the capture 4 value */
mbed_official 573:ad23fe03a082 4333 tmpreg = htim->Instance->CCR4;
mbed_official 573:ad23fe03a082 4334
mbed_official 573:ad23fe03a082 4335 break;
mbed_official 573:ad23fe03a082 4336 }
mbed_official 573:ad23fe03a082 4337
mbed_official 573:ad23fe03a082 4338 default:
mbed_official 573:ad23fe03a082 4339 break;
mbed_official 573:ad23fe03a082 4340 }
mbed_official 573:ad23fe03a082 4341
mbed_official 573:ad23fe03a082 4342 __HAL_UNLOCK(htim);
mbed_official 573:ad23fe03a082 4343 return tmpreg;
mbed_official 573:ad23fe03a082 4344 }
mbed_official 573:ad23fe03a082 4345
mbed_official 573:ad23fe03a082 4346 /**
mbed_official 573:ad23fe03a082 4347 * @}
mbed_official 573:ad23fe03a082 4348 */
mbed_official 573:ad23fe03a082 4349
mbed_official 573:ad23fe03a082 4350 /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
mbed_official 573:ad23fe03a082 4351 * @brief TIM Callbacks functions
mbed_official 573:ad23fe03a082 4352 *
mbed_official 573:ad23fe03a082 4353 @verbatim
mbed_official 573:ad23fe03a082 4354 ==============================================================================
mbed_official 573:ad23fe03a082 4355 ##### TIM Callbacks functions #####
mbed_official 573:ad23fe03a082 4356 ==============================================================================
mbed_official 573:ad23fe03a082 4357 [..]
mbed_official 573:ad23fe03a082 4358 This section provides TIM callback functions:
mbed_official 573:ad23fe03a082 4359 (+) Timer Period elapsed callback
mbed_official 573:ad23fe03a082 4360 (+) Timer Output Compare callback
mbed_official 573:ad23fe03a082 4361 (+) Timer Input capture callback
mbed_official 573:ad23fe03a082 4362 (+) Timer Trigger callback
mbed_official 573:ad23fe03a082 4363 (+) Timer Error callback
mbed_official 573:ad23fe03a082 4364
mbed_official 573:ad23fe03a082 4365 @endverbatim
mbed_official 573:ad23fe03a082 4366 * @{
mbed_official 573:ad23fe03a082 4367 */
mbed_official 573:ad23fe03a082 4368
mbed_official 573:ad23fe03a082 4369 /**
mbed_official 573:ad23fe03a082 4370 * @brief Period elapsed callback in non blocking mode
mbed_official 573:ad23fe03a082 4371 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4372 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4373 * @retval None
mbed_official 573:ad23fe03a082 4374 */
mbed_official 573:ad23fe03a082 4375 __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4376 {
mbed_official 573:ad23fe03a082 4377 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4378 the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4379 */
mbed_official 573:ad23fe03a082 4380
mbed_official 573:ad23fe03a082 4381 }
mbed_official 573:ad23fe03a082 4382 /**
mbed_official 573:ad23fe03a082 4383 * @brief Output Compare callback in non blocking mode
mbed_official 573:ad23fe03a082 4384 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4385 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4386 * @retval None
mbed_official 573:ad23fe03a082 4387 */
mbed_official 573:ad23fe03a082 4388 __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4389 {
mbed_official 573:ad23fe03a082 4390 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4391 the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4392 */
mbed_official 573:ad23fe03a082 4393 }
mbed_official 573:ad23fe03a082 4394 /**
mbed_official 573:ad23fe03a082 4395 * @brief Input Capture callback in non blocking mode
mbed_official 573:ad23fe03a082 4396 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4397 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4398 * @retval None
mbed_official 573:ad23fe03a082 4399 */
mbed_official 573:ad23fe03a082 4400 __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4401 {
mbed_official 573:ad23fe03a082 4402 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4403 the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4404 */
mbed_official 573:ad23fe03a082 4405 }
mbed_official 573:ad23fe03a082 4406
mbed_official 573:ad23fe03a082 4407 /**
mbed_official 573:ad23fe03a082 4408 * @brief PWM Pulse finished callback in non blocking mode
mbed_official 573:ad23fe03a082 4409 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4410 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4411 * @retval None
mbed_official 573:ad23fe03a082 4412 */
mbed_official 573:ad23fe03a082 4413 __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4414 {
mbed_official 573:ad23fe03a082 4415 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4416 the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4417 */
mbed_official 573:ad23fe03a082 4418 }
mbed_official 573:ad23fe03a082 4419
mbed_official 573:ad23fe03a082 4420 /**
mbed_official 573:ad23fe03a082 4421 * @brief Hall Trigger detection callback in non blocking mode
mbed_official 573:ad23fe03a082 4422 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4423 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4424 * @retval None
mbed_official 573:ad23fe03a082 4425 */
mbed_official 573:ad23fe03a082 4426 __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4427 {
mbed_official 573:ad23fe03a082 4428 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4429 the HAL_TIM_TriggerCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4430 */
mbed_official 573:ad23fe03a082 4431 }
mbed_official 573:ad23fe03a082 4432
mbed_official 573:ad23fe03a082 4433 /**
mbed_official 573:ad23fe03a082 4434 * @brief Timer error callback in non blocking mode
mbed_official 573:ad23fe03a082 4435 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4436 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4437 * @retval None
mbed_official 573:ad23fe03a082 4438 */
mbed_official 573:ad23fe03a082 4439 __weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4440 {
mbed_official 573:ad23fe03a082 4441 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 4442 the HAL_TIM_ErrorCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 4443 */
mbed_official 573:ad23fe03a082 4444 }
mbed_official 573:ad23fe03a082 4445
mbed_official 573:ad23fe03a082 4446 /**
mbed_official 573:ad23fe03a082 4447 * @}
mbed_official 573:ad23fe03a082 4448 */
mbed_official 573:ad23fe03a082 4449
mbed_official 573:ad23fe03a082 4450 /** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
mbed_official 573:ad23fe03a082 4451 * @brief Peripheral State functions
mbed_official 573:ad23fe03a082 4452 *
mbed_official 573:ad23fe03a082 4453 @verbatim
mbed_official 573:ad23fe03a082 4454 ==============================================================================
mbed_official 573:ad23fe03a082 4455 ##### Peripheral State functions #####
mbed_official 573:ad23fe03a082 4456 ==============================================================================
mbed_official 573:ad23fe03a082 4457 [..]
mbed_official 573:ad23fe03a082 4458 This subsection permits to get in run-time the status of the peripheral
mbed_official 573:ad23fe03a082 4459 and the data flow.
mbed_official 573:ad23fe03a082 4460
mbed_official 573:ad23fe03a082 4461 @endverbatim
mbed_official 573:ad23fe03a082 4462 * @{
mbed_official 573:ad23fe03a082 4463 */
mbed_official 573:ad23fe03a082 4464
mbed_official 573:ad23fe03a082 4465 /**
mbed_official 573:ad23fe03a082 4466 * @brief Return the TIM Base state
mbed_official 573:ad23fe03a082 4467 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4468 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4469 * @retval HAL state
mbed_official 573:ad23fe03a082 4470 */
mbed_official 573:ad23fe03a082 4471 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4472 {
mbed_official 573:ad23fe03a082 4473 return htim->State;
mbed_official 573:ad23fe03a082 4474 }
mbed_official 573:ad23fe03a082 4475
mbed_official 573:ad23fe03a082 4476 /**
mbed_official 573:ad23fe03a082 4477 * @brief Return the TIM OC state
mbed_official 573:ad23fe03a082 4478 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4479 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4480 * @retval HAL state
mbed_official 573:ad23fe03a082 4481 */
mbed_official 573:ad23fe03a082 4482 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4483 {
mbed_official 573:ad23fe03a082 4484 return htim->State;
mbed_official 573:ad23fe03a082 4485 }
mbed_official 573:ad23fe03a082 4486
mbed_official 573:ad23fe03a082 4487 /**
mbed_official 573:ad23fe03a082 4488 * @brief Return the TIM PWM state
mbed_official 573:ad23fe03a082 4489 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4490 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4491 * @retval HAL state
mbed_official 573:ad23fe03a082 4492 */
mbed_official 573:ad23fe03a082 4493 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4494 {
mbed_official 573:ad23fe03a082 4495 return htim->State;
mbed_official 573:ad23fe03a082 4496 }
mbed_official 573:ad23fe03a082 4497
mbed_official 573:ad23fe03a082 4498 /**
mbed_official 573:ad23fe03a082 4499 * @brief Return the TIM Input Capture state
mbed_official 573:ad23fe03a082 4500 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4501 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4502 * @retval HAL state
mbed_official 573:ad23fe03a082 4503 */
mbed_official 573:ad23fe03a082 4504 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4505 {
mbed_official 573:ad23fe03a082 4506 return htim->State;
mbed_official 573:ad23fe03a082 4507 }
mbed_official 573:ad23fe03a082 4508
mbed_official 573:ad23fe03a082 4509 /**
mbed_official 573:ad23fe03a082 4510 * @brief Return the TIM One Pulse Mode state
mbed_official 573:ad23fe03a082 4511 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4512 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4513 * @retval HAL state
mbed_official 573:ad23fe03a082 4514 */
mbed_official 573:ad23fe03a082 4515 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4516 {
mbed_official 573:ad23fe03a082 4517 return htim->State;
mbed_official 573:ad23fe03a082 4518 }
mbed_official 573:ad23fe03a082 4519
mbed_official 573:ad23fe03a082 4520 /**
mbed_official 573:ad23fe03a082 4521 * @brief Return the TIM Encoder Mode state
mbed_official 573:ad23fe03a082 4522 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4523 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4524 * @retval HAL state
mbed_official 573:ad23fe03a082 4525 */
mbed_official 573:ad23fe03a082 4526 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
mbed_official 573:ad23fe03a082 4527 {
mbed_official 573:ad23fe03a082 4528 return htim->State;
mbed_official 573:ad23fe03a082 4529 }
mbed_official 573:ad23fe03a082 4530
mbed_official 573:ad23fe03a082 4531 /**
mbed_official 573:ad23fe03a082 4532 * @}
mbed_official 573:ad23fe03a082 4533 */
mbed_official 573:ad23fe03a082 4534
mbed_official 573:ad23fe03a082 4535 /**
mbed_official 573:ad23fe03a082 4536 * @brief TIM DMA error callback
mbed_official 573:ad23fe03a082 4537 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4538 * the configuration information for the specified DMA module.
mbed_official 573:ad23fe03a082 4539 * @retval None
mbed_official 573:ad23fe03a082 4540 */
mbed_official 573:ad23fe03a082 4541 void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 4542 {
mbed_official 573:ad23fe03a082 4543 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 4544
mbed_official 573:ad23fe03a082 4545 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4546
mbed_official 573:ad23fe03a082 4547 HAL_TIM_ErrorCallback(htim);
mbed_official 573:ad23fe03a082 4548 }
mbed_official 573:ad23fe03a082 4549
mbed_official 573:ad23fe03a082 4550 /**
mbed_official 573:ad23fe03a082 4551 * @brief TIM DMA Delay Pulse complete callback.
mbed_official 573:ad23fe03a082 4552 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4553 * the configuration information for the specified DMA module.
mbed_official 573:ad23fe03a082 4554 * @retval None
mbed_official 573:ad23fe03a082 4555 */
mbed_official 573:ad23fe03a082 4556 void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 4557 {
mbed_official 573:ad23fe03a082 4558 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 4559
mbed_official 573:ad23fe03a082 4560 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4561
mbed_official 573:ad23fe03a082 4562 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official 573:ad23fe03a082 4563 {
mbed_official 573:ad23fe03a082 4564 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 573:ad23fe03a082 4565 }
mbed_official 573:ad23fe03a082 4566 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official 573:ad23fe03a082 4567 {
mbed_official 573:ad23fe03a082 4568 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 573:ad23fe03a082 4569 }
mbed_official 573:ad23fe03a082 4570 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official 573:ad23fe03a082 4571 {
mbed_official 573:ad23fe03a082 4572 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 573:ad23fe03a082 4573 }
mbed_official 573:ad23fe03a082 4574 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official 573:ad23fe03a082 4575 {
mbed_official 573:ad23fe03a082 4576 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 573:ad23fe03a082 4577 }
mbed_official 573:ad23fe03a082 4578
mbed_official 573:ad23fe03a082 4579 HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official 573:ad23fe03a082 4580
mbed_official 573:ad23fe03a082 4581 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 4582 }
mbed_official 573:ad23fe03a082 4583 /**
mbed_official 573:ad23fe03a082 4584 * @brief TIM DMA Capture complete callback.
mbed_official 573:ad23fe03a082 4585 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4586 * the configuration information for the specified DMA module.
mbed_official 573:ad23fe03a082 4587 * @retval None
mbed_official 573:ad23fe03a082 4588 */
mbed_official 573:ad23fe03a082 4589 void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 4590 {
mbed_official 573:ad23fe03a082 4591 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 4592
mbed_official 573:ad23fe03a082 4593 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4594
mbed_official 573:ad23fe03a082 4595 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official 573:ad23fe03a082 4596 {
mbed_official 573:ad23fe03a082 4597 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official 573:ad23fe03a082 4598 }
mbed_official 573:ad23fe03a082 4599 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official 573:ad23fe03a082 4600 {
mbed_official 573:ad23fe03a082 4601 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official 573:ad23fe03a082 4602 }
mbed_official 573:ad23fe03a082 4603 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official 573:ad23fe03a082 4604 {
mbed_official 573:ad23fe03a082 4605 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official 573:ad23fe03a082 4606 }
mbed_official 573:ad23fe03a082 4607 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official 573:ad23fe03a082 4608 {
mbed_official 573:ad23fe03a082 4609 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official 573:ad23fe03a082 4610 }
mbed_official 573:ad23fe03a082 4611
mbed_official 573:ad23fe03a082 4612 HAL_TIM_IC_CaptureCallback(htim);
mbed_official 573:ad23fe03a082 4613
mbed_official 573:ad23fe03a082 4614 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official 573:ad23fe03a082 4615
mbed_official 573:ad23fe03a082 4616 }
mbed_official 573:ad23fe03a082 4617
mbed_official 573:ad23fe03a082 4618 /**
mbed_official 573:ad23fe03a082 4619 * @brief TIM DMA Period Elapse complete callback.
mbed_official 573:ad23fe03a082 4620 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4621 * the configuration information for the specified DMA module.
mbed_official 573:ad23fe03a082 4622 * @retval None
mbed_official 573:ad23fe03a082 4623 */
mbed_official 573:ad23fe03a082 4624 static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 4625 {
mbed_official 573:ad23fe03a082 4626 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 4627
mbed_official 573:ad23fe03a082 4628 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4629
mbed_official 573:ad23fe03a082 4630 HAL_TIM_PeriodElapsedCallback(htim);
mbed_official 573:ad23fe03a082 4631 }
mbed_official 573:ad23fe03a082 4632
mbed_official 573:ad23fe03a082 4633 /**
mbed_official 573:ad23fe03a082 4634 * @brief TIM DMA Trigger callback.
mbed_official 573:ad23fe03a082 4635 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4636 * the configuration information for the specified DMA module.
mbed_official 573:ad23fe03a082 4637 * @retval None
mbed_official 573:ad23fe03a082 4638 */
mbed_official 573:ad23fe03a082 4639 static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 4640 {
mbed_official 573:ad23fe03a082 4641 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 4642
mbed_official 573:ad23fe03a082 4643 htim->State= HAL_TIM_STATE_READY;
mbed_official 573:ad23fe03a082 4644
mbed_official 573:ad23fe03a082 4645 HAL_TIM_TriggerCallback(htim);
mbed_official 573:ad23fe03a082 4646 }
mbed_official 573:ad23fe03a082 4647
mbed_official 573:ad23fe03a082 4648 /**
mbed_official 573:ad23fe03a082 4649 * @brief Time Base configuration
mbed_official 573:ad23fe03a082 4650 * @param TIMx: TIM peripheral
mbed_official 573:ad23fe03a082 4651 * @param Structure: pointer on TIM Time Base required parameters
mbed_official 573:ad23fe03a082 4652 * @retval None
mbed_official 573:ad23fe03a082 4653 */
mbed_official 573:ad23fe03a082 4654 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
mbed_official 573:ad23fe03a082 4655 {
mbed_official 573:ad23fe03a082 4656 uint32_t tmpcr1 = 0;
mbed_official 573:ad23fe03a082 4657 tmpcr1 = TIMx->CR1;
mbed_official 573:ad23fe03a082 4658
mbed_official 573:ad23fe03a082 4659 /* Set TIM Time Base Unit parameters ---------------------------------------*/
mbed_official 573:ad23fe03a082 4660 if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4661 {
mbed_official 573:ad23fe03a082 4662 /* Select the Counter Mode */
mbed_official 573:ad23fe03a082 4663 tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
mbed_official 573:ad23fe03a082 4664 tmpcr1 |= Structure->CounterMode;
mbed_official 573:ad23fe03a082 4665 }
mbed_official 573:ad23fe03a082 4666
mbed_official 573:ad23fe03a082 4667 if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4668 {
mbed_official 573:ad23fe03a082 4669 /* Set the clock division */
mbed_official 573:ad23fe03a082 4670 tmpcr1 &= ~TIM_CR1_CKD;
mbed_official 573:ad23fe03a082 4671 tmpcr1 |= (uint32_t)Structure->ClockDivision;
mbed_official 573:ad23fe03a082 4672 }
mbed_official 573:ad23fe03a082 4673
mbed_official 573:ad23fe03a082 4674 TIMx->CR1 = tmpcr1;
mbed_official 573:ad23fe03a082 4675
mbed_official 573:ad23fe03a082 4676 /* Set the Auto-reload value */
mbed_official 573:ad23fe03a082 4677 TIMx->ARR = (uint32_t)Structure->Period ;
mbed_official 573:ad23fe03a082 4678
mbed_official 573:ad23fe03a082 4679 /* Set the Prescaler value */
mbed_official 573:ad23fe03a082 4680 TIMx->PSC = (uint32_t)Structure->Prescaler;
mbed_official 573:ad23fe03a082 4681
mbed_official 573:ad23fe03a082 4682 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4683 {
mbed_official 573:ad23fe03a082 4684 /* Set the Repetition Counter value */
mbed_official 573:ad23fe03a082 4685 TIMx->RCR = Structure->RepetitionCounter;
mbed_official 573:ad23fe03a082 4686 }
mbed_official 573:ad23fe03a082 4687
mbed_official 573:ad23fe03a082 4688 /* Generate an update event to reload the Prescaler
mbed_official 573:ad23fe03a082 4689 and the repetition counter(only for TIM1 and TIM8) value immediately */
mbed_official 573:ad23fe03a082 4690 TIMx->EGR = TIM_EGR_UG;
mbed_official 573:ad23fe03a082 4691 }
mbed_official 573:ad23fe03a082 4692
mbed_official 573:ad23fe03a082 4693 /**
mbed_official 573:ad23fe03a082 4694 * @brief Time Output Compare 1 configuration
mbed_official 573:ad23fe03a082 4695 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 4696 * @param OC_Config: The output configuration structure
mbed_official 573:ad23fe03a082 4697 * @retval None
mbed_official 573:ad23fe03a082 4698 */
mbed_official 573:ad23fe03a082 4699 void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 573:ad23fe03a082 4700 {
mbed_official 573:ad23fe03a082 4701 uint32_t tmpccmrx = 0;
mbed_official 573:ad23fe03a082 4702 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4703 uint32_t tmpcr2 = 0;
mbed_official 573:ad23fe03a082 4704
mbed_official 573:ad23fe03a082 4705 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 573:ad23fe03a082 4706 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 573:ad23fe03a082 4707
mbed_official 573:ad23fe03a082 4708 /* Get the TIMx CCER register value */
mbed_official 573:ad23fe03a082 4709 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 4710 /* Get the TIMx CR2 register value */
mbed_official 573:ad23fe03a082 4711 tmpcr2 = TIMx->CR2;
mbed_official 573:ad23fe03a082 4712
mbed_official 573:ad23fe03a082 4713 /* Get the TIMx CCMR1 register value */
mbed_official 573:ad23fe03a082 4714 tmpccmrx = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 4715
mbed_official 573:ad23fe03a082 4716 /* Reset the Output Compare Mode Bits */
mbed_official 573:ad23fe03a082 4717 tmpccmrx &= ~TIM_CCMR1_OC1M;
mbed_official 573:ad23fe03a082 4718 tmpccmrx &= ~TIM_CCMR1_CC1S;
mbed_official 573:ad23fe03a082 4719 /* Select the Output Compare Mode */
mbed_official 573:ad23fe03a082 4720 tmpccmrx |= OC_Config->OCMode;
mbed_official 573:ad23fe03a082 4721
mbed_official 573:ad23fe03a082 4722 /* Reset the Output Polarity level */
mbed_official 573:ad23fe03a082 4723 tmpccer &= ~TIM_CCER_CC1P;
mbed_official 573:ad23fe03a082 4724 /* Set the Output Compare Polarity */
mbed_official 573:ad23fe03a082 4725 tmpccer |= OC_Config->OCPolarity;
mbed_official 573:ad23fe03a082 4726
mbed_official 573:ad23fe03a082 4727
mbed_official 573:ad23fe03a082 4728 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4729 {
mbed_official 573:ad23fe03a082 4730 /* Reset the Output N Polarity level */
mbed_official 573:ad23fe03a082 4731 tmpccer &= ~TIM_CCER_CC1NP;
mbed_official 573:ad23fe03a082 4732 /* Set the Output N Polarity */
mbed_official 573:ad23fe03a082 4733 tmpccer |= OC_Config->OCNPolarity;
mbed_official 573:ad23fe03a082 4734 /* Reset the Output N State */
mbed_official 573:ad23fe03a082 4735 tmpccer &= ~TIM_CCER_CC1NE;
mbed_official 573:ad23fe03a082 4736
mbed_official 573:ad23fe03a082 4737 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 573:ad23fe03a082 4738 tmpcr2 &= ~TIM_CR2_OIS1;
mbed_official 573:ad23fe03a082 4739 tmpcr2 &= ~TIM_CR2_OIS1N;
mbed_official 573:ad23fe03a082 4740 /* Set the Output Idle state */
mbed_official 573:ad23fe03a082 4741 tmpcr2 |= OC_Config->OCIdleState;
mbed_official 573:ad23fe03a082 4742 /* Set the Output N Idle state */
mbed_official 573:ad23fe03a082 4743 tmpcr2 |= OC_Config->OCNIdleState;
mbed_official 573:ad23fe03a082 4744 }
mbed_official 573:ad23fe03a082 4745 /* Write to TIMx CR2 */
mbed_official 573:ad23fe03a082 4746 TIMx->CR2 = tmpcr2;
mbed_official 573:ad23fe03a082 4747
mbed_official 573:ad23fe03a082 4748 /* Write to TIMx CCMR1 */
mbed_official 573:ad23fe03a082 4749 TIMx->CCMR1 = tmpccmrx;
mbed_official 573:ad23fe03a082 4750
mbed_official 573:ad23fe03a082 4751 /* Set the Capture Compare Register value */
mbed_official 573:ad23fe03a082 4752 TIMx->CCR1 = OC_Config->Pulse;
mbed_official 573:ad23fe03a082 4753
mbed_official 573:ad23fe03a082 4754 /* Write to TIMx CCER */
mbed_official 573:ad23fe03a082 4755 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 4756 }
mbed_official 573:ad23fe03a082 4757
mbed_official 573:ad23fe03a082 4758 /**
mbed_official 573:ad23fe03a082 4759 * @brief Time Output Compare 2 configuration
mbed_official 573:ad23fe03a082 4760 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 4761 * @param OC_Config: The output configuration structure
mbed_official 573:ad23fe03a082 4762 * @retval None
mbed_official 573:ad23fe03a082 4763 */
mbed_official 573:ad23fe03a082 4764 void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 573:ad23fe03a082 4765 {
mbed_official 573:ad23fe03a082 4766 uint32_t tmpccmrx = 0;
mbed_official 573:ad23fe03a082 4767 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4768 uint32_t tmpcr2 = 0;
mbed_official 573:ad23fe03a082 4769
mbed_official 573:ad23fe03a082 4770 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 573:ad23fe03a082 4771 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 573:ad23fe03a082 4772
mbed_official 573:ad23fe03a082 4773 /* Get the TIMx CCER register value */
mbed_official 573:ad23fe03a082 4774 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 4775 /* Get the TIMx CR2 register value */
mbed_official 573:ad23fe03a082 4776 tmpcr2 = TIMx->CR2;
mbed_official 573:ad23fe03a082 4777
mbed_official 573:ad23fe03a082 4778 /* Get the TIMx CCMR1 register value */
mbed_official 573:ad23fe03a082 4779 tmpccmrx = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 4780
mbed_official 573:ad23fe03a082 4781 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 573:ad23fe03a082 4782 tmpccmrx &= ~TIM_CCMR1_OC2M;
mbed_official 573:ad23fe03a082 4783 tmpccmrx &= ~TIM_CCMR1_CC2S;
mbed_official 573:ad23fe03a082 4784
mbed_official 573:ad23fe03a082 4785 /* Select the Output Compare Mode */
mbed_official 573:ad23fe03a082 4786 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 573:ad23fe03a082 4787
mbed_official 573:ad23fe03a082 4788 /* Reset the Output Polarity level */
mbed_official 573:ad23fe03a082 4789 tmpccer &= ~TIM_CCER_CC2P;
mbed_official 573:ad23fe03a082 4790 /* Set the Output Compare Polarity */
mbed_official 573:ad23fe03a082 4791 tmpccer |= (OC_Config->OCPolarity << 4);
mbed_official 573:ad23fe03a082 4792
mbed_official 573:ad23fe03a082 4793 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4794 {
mbed_official 573:ad23fe03a082 4795 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 573:ad23fe03a082 4796 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 573:ad23fe03a082 4797 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 573:ad23fe03a082 4798
mbed_official 573:ad23fe03a082 4799 /* Reset the Output N Polarity level */
mbed_official 573:ad23fe03a082 4800 tmpccer &= ~TIM_CCER_CC2NP;
mbed_official 573:ad23fe03a082 4801 /* Set the Output N Polarity */
mbed_official 573:ad23fe03a082 4802 tmpccer |= (OC_Config->OCNPolarity << 4);
mbed_official 573:ad23fe03a082 4803 /* Reset the Output N State */
mbed_official 573:ad23fe03a082 4804 tmpccer &= ~TIM_CCER_CC2NE;
mbed_official 573:ad23fe03a082 4805
mbed_official 573:ad23fe03a082 4806 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 573:ad23fe03a082 4807 tmpcr2 &= ~TIM_CR2_OIS2;
mbed_official 573:ad23fe03a082 4808 tmpcr2 &= ~TIM_CR2_OIS2N;
mbed_official 573:ad23fe03a082 4809 /* Set the Output Idle state */
mbed_official 573:ad23fe03a082 4810 tmpcr2 |= (OC_Config->OCIdleState << 2);
mbed_official 573:ad23fe03a082 4811 /* Set the Output N Idle state */
mbed_official 573:ad23fe03a082 4812 tmpcr2 |= (OC_Config->OCNIdleState << 2);
mbed_official 573:ad23fe03a082 4813 }
mbed_official 573:ad23fe03a082 4814 /* Write to TIMx CR2 */
mbed_official 573:ad23fe03a082 4815 TIMx->CR2 = tmpcr2;
mbed_official 573:ad23fe03a082 4816
mbed_official 573:ad23fe03a082 4817 /* Write to TIMx CCMR1 */
mbed_official 573:ad23fe03a082 4818 TIMx->CCMR1 = tmpccmrx;
mbed_official 573:ad23fe03a082 4819
mbed_official 573:ad23fe03a082 4820 /* Set the Capture Compare Register value */
mbed_official 573:ad23fe03a082 4821 TIMx->CCR2 = OC_Config->Pulse;
mbed_official 573:ad23fe03a082 4822
mbed_official 573:ad23fe03a082 4823 /* Write to TIMx CCER */
mbed_official 573:ad23fe03a082 4824 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 4825 }
mbed_official 573:ad23fe03a082 4826
mbed_official 573:ad23fe03a082 4827 /**
mbed_official 573:ad23fe03a082 4828 * @brief Time Output Compare 3 configuration
mbed_official 573:ad23fe03a082 4829 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 4830 * @param OC_Config: The output configuration structure
mbed_official 573:ad23fe03a082 4831 * @retval None
mbed_official 573:ad23fe03a082 4832 */
mbed_official 573:ad23fe03a082 4833 void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 573:ad23fe03a082 4834 {
mbed_official 573:ad23fe03a082 4835 uint32_t tmpccmrx = 0;
mbed_official 573:ad23fe03a082 4836 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4837 uint32_t tmpcr2 = 0;
mbed_official 573:ad23fe03a082 4838
mbed_official 573:ad23fe03a082 4839 /* Disable the Channel 3: Reset the CC2E Bit */
mbed_official 573:ad23fe03a082 4840 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 573:ad23fe03a082 4841
mbed_official 573:ad23fe03a082 4842 /* Get the TIMx CCER register value */
mbed_official 573:ad23fe03a082 4843 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 4844 /* Get the TIMx CR2 register value */
mbed_official 573:ad23fe03a082 4845 tmpcr2 = TIMx->CR2;
mbed_official 573:ad23fe03a082 4846
mbed_official 573:ad23fe03a082 4847 /* Get the TIMx CCMR2 register value */
mbed_official 573:ad23fe03a082 4848 tmpccmrx = TIMx->CCMR2;
mbed_official 573:ad23fe03a082 4849
mbed_official 573:ad23fe03a082 4850 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 573:ad23fe03a082 4851 tmpccmrx &= ~TIM_CCMR2_OC3M;
mbed_official 573:ad23fe03a082 4852 tmpccmrx &= ~TIM_CCMR2_CC3S;
mbed_official 573:ad23fe03a082 4853 /* Select the Output Compare Mode */
mbed_official 573:ad23fe03a082 4854 tmpccmrx |= OC_Config->OCMode;
mbed_official 573:ad23fe03a082 4855
mbed_official 573:ad23fe03a082 4856 /* Reset the Output Polarity level */
mbed_official 573:ad23fe03a082 4857 tmpccer &= ~TIM_CCER_CC3P;
mbed_official 573:ad23fe03a082 4858 /* Set the Output Compare Polarity */
mbed_official 573:ad23fe03a082 4859 tmpccer |= (OC_Config->OCPolarity << 8);
mbed_official 573:ad23fe03a082 4860
mbed_official 573:ad23fe03a082 4861 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4862 {
mbed_official 573:ad23fe03a082 4863 assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official 573:ad23fe03a082 4864 assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official 573:ad23fe03a082 4865 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 573:ad23fe03a082 4866
mbed_official 573:ad23fe03a082 4867 /* Reset the Output N Polarity level */
mbed_official 573:ad23fe03a082 4868 tmpccer &= ~TIM_CCER_CC3NP;
mbed_official 573:ad23fe03a082 4869 /* Set the Output N Polarity */
mbed_official 573:ad23fe03a082 4870 tmpccer |= (OC_Config->OCNPolarity << 8);
mbed_official 573:ad23fe03a082 4871 /* Reset the Output N State */
mbed_official 573:ad23fe03a082 4872 tmpccer &= ~TIM_CCER_CC3NE;
mbed_official 573:ad23fe03a082 4873
mbed_official 573:ad23fe03a082 4874 /* Reset the Output Compare and Output Compare N IDLE State */
mbed_official 573:ad23fe03a082 4875 tmpcr2 &= ~TIM_CR2_OIS3;
mbed_official 573:ad23fe03a082 4876 tmpcr2 &= ~TIM_CR2_OIS3N;
mbed_official 573:ad23fe03a082 4877 /* Set the Output Idle state */
mbed_official 573:ad23fe03a082 4878 tmpcr2 |= (OC_Config->OCIdleState << 4);
mbed_official 573:ad23fe03a082 4879 /* Set the Output N Idle state */
mbed_official 573:ad23fe03a082 4880 tmpcr2 |= (OC_Config->OCNIdleState << 4);
mbed_official 573:ad23fe03a082 4881 }
mbed_official 573:ad23fe03a082 4882 /* Write to TIMx CR2 */
mbed_official 573:ad23fe03a082 4883 TIMx->CR2 = tmpcr2;
mbed_official 573:ad23fe03a082 4884
mbed_official 573:ad23fe03a082 4885 /* Write to TIMx CCMR2 */
mbed_official 573:ad23fe03a082 4886 TIMx->CCMR2 = tmpccmrx;
mbed_official 573:ad23fe03a082 4887
mbed_official 573:ad23fe03a082 4888 /* Set the Capture Compare Register value */
mbed_official 573:ad23fe03a082 4889 TIMx->CCR3 = OC_Config->Pulse;
mbed_official 573:ad23fe03a082 4890
mbed_official 573:ad23fe03a082 4891 /* Write to TIMx CCER */
mbed_official 573:ad23fe03a082 4892 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 4893 }
mbed_official 573:ad23fe03a082 4894
mbed_official 573:ad23fe03a082 4895 /**
mbed_official 573:ad23fe03a082 4896 * @brief Time Output Compare 4 configuration
mbed_official 573:ad23fe03a082 4897 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 4898 * @param OC_Config: The output configuration structure
mbed_official 573:ad23fe03a082 4899 * @retval None
mbed_official 573:ad23fe03a082 4900 */
mbed_official 573:ad23fe03a082 4901 void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
mbed_official 573:ad23fe03a082 4902 {
mbed_official 573:ad23fe03a082 4903 uint32_t tmpccmrx = 0;
mbed_official 573:ad23fe03a082 4904 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4905 uint32_t tmpcr2 = 0;
mbed_official 573:ad23fe03a082 4906
mbed_official 573:ad23fe03a082 4907 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 573:ad23fe03a082 4908 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 573:ad23fe03a082 4909
mbed_official 573:ad23fe03a082 4910 /* Get the TIMx CCER register value */
mbed_official 573:ad23fe03a082 4911 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 4912 /* Get the TIMx CR2 register value */
mbed_official 573:ad23fe03a082 4913 tmpcr2 = TIMx->CR2;
mbed_official 573:ad23fe03a082 4914
mbed_official 573:ad23fe03a082 4915 /* Get the TIMx CCMR2 register value */
mbed_official 573:ad23fe03a082 4916 tmpccmrx = TIMx->CCMR2;
mbed_official 573:ad23fe03a082 4917
mbed_official 573:ad23fe03a082 4918 /* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official 573:ad23fe03a082 4919 tmpccmrx &= ~TIM_CCMR2_OC4M;
mbed_official 573:ad23fe03a082 4920 tmpccmrx &= ~TIM_CCMR2_CC4S;
mbed_official 573:ad23fe03a082 4921
mbed_official 573:ad23fe03a082 4922 /* Select the Output Compare Mode */
mbed_official 573:ad23fe03a082 4923 tmpccmrx |= (OC_Config->OCMode << 8);
mbed_official 573:ad23fe03a082 4924
mbed_official 573:ad23fe03a082 4925 /* Reset the Output Polarity level */
mbed_official 573:ad23fe03a082 4926 tmpccer &= ~TIM_CCER_CC4P;
mbed_official 573:ad23fe03a082 4927 /* Set the Output Compare Polarity */
mbed_official 573:ad23fe03a082 4928 tmpccer |= (OC_Config->OCPolarity << 12);
mbed_official 573:ad23fe03a082 4929
mbed_official 573:ad23fe03a082 4930 /*if((TIMx == TIM1) || (TIMx == TIM8))*/
mbed_official 573:ad23fe03a082 4931 if(IS_TIM_ADVANCED_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 4932 {
mbed_official 573:ad23fe03a082 4933 assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official 573:ad23fe03a082 4934 /* Reset the Output Compare IDLE State */
mbed_official 573:ad23fe03a082 4935 tmpcr2 &= ~TIM_CR2_OIS4;
mbed_official 573:ad23fe03a082 4936 /* Set the Output Idle state */
mbed_official 573:ad23fe03a082 4937 tmpcr2 |= (OC_Config->OCIdleState << 6);
mbed_official 573:ad23fe03a082 4938 }
mbed_official 573:ad23fe03a082 4939 /* Write to TIMx CR2 */
mbed_official 573:ad23fe03a082 4940 TIMx->CR2 = tmpcr2;
mbed_official 573:ad23fe03a082 4941
mbed_official 573:ad23fe03a082 4942 /* Write to TIMx CCMR2 */
mbed_official 573:ad23fe03a082 4943 TIMx->CCMR2 = tmpccmrx;
mbed_official 573:ad23fe03a082 4944
mbed_official 573:ad23fe03a082 4945 /* Set the Capture Compare Register value */
mbed_official 573:ad23fe03a082 4946 TIMx->CCR4 = OC_Config->Pulse;
mbed_official 573:ad23fe03a082 4947
mbed_official 573:ad23fe03a082 4948 /* Write to TIMx CCER */
mbed_official 573:ad23fe03a082 4949 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 4950 }
mbed_official 573:ad23fe03a082 4951
mbed_official 573:ad23fe03a082 4952 /**
mbed_official 573:ad23fe03a082 4953 * @brief Time Output Compare 4 configuration
mbed_official 573:ad23fe03a082 4954 * @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 4955 * the configuration information for TIM module.
mbed_official 573:ad23fe03a082 4956 * @param sSlaveConfig: The slave configuration structure
mbed_official 573:ad23fe03a082 4957 * @retval None
mbed_official 573:ad23fe03a082 4958 */
mbed_official 573:ad23fe03a082 4959 static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
mbed_official 573:ad23fe03a082 4960 TIM_SlaveConfigTypeDef * sSlaveConfig)
mbed_official 573:ad23fe03a082 4961 {
mbed_official 573:ad23fe03a082 4962 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 4963 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 4964 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 4965
mbed_official 573:ad23fe03a082 4966 /* Get the TIMx SMCR register value */
mbed_official 573:ad23fe03a082 4967 tmpsmcr = htim->Instance->SMCR;
mbed_official 573:ad23fe03a082 4968
mbed_official 573:ad23fe03a082 4969 /* Reset the Trigger Selection Bits */
mbed_official 573:ad23fe03a082 4970 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 573:ad23fe03a082 4971 /* Set the Input Trigger source */
mbed_official 573:ad23fe03a082 4972 tmpsmcr |= sSlaveConfig->InputTrigger;
mbed_official 573:ad23fe03a082 4973
mbed_official 573:ad23fe03a082 4974 /* Reset the slave mode Bits */
mbed_official 573:ad23fe03a082 4975 tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official 573:ad23fe03a082 4976 /* Set the slave mode */
mbed_official 573:ad23fe03a082 4977 tmpsmcr |= sSlaveConfig->SlaveMode;
mbed_official 573:ad23fe03a082 4978
mbed_official 573:ad23fe03a082 4979 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 4980 htim->Instance->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 4981
mbed_official 573:ad23fe03a082 4982 /* Configure the trigger prescaler, filter, and polarity */
mbed_official 573:ad23fe03a082 4983 switch (sSlaveConfig->InputTrigger)
mbed_official 573:ad23fe03a082 4984 {
mbed_official 573:ad23fe03a082 4985 case TIM_TS_ETRF:
mbed_official 573:ad23fe03a082 4986 {
mbed_official 573:ad23fe03a082 4987 /* Check the parameters */
mbed_official 573:ad23fe03a082 4988 assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 4989 assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official 573:ad23fe03a082 4990 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 4991 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 4992 /* Configure the ETR Trigger source */
mbed_official 573:ad23fe03a082 4993 TIM_ETR_SetConfig(htim->Instance,
mbed_official 573:ad23fe03a082 4994 sSlaveConfig->TriggerPrescaler,
mbed_official 573:ad23fe03a082 4995 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 4996 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 4997 }
mbed_official 573:ad23fe03a082 4998 break;
mbed_official 573:ad23fe03a082 4999
mbed_official 573:ad23fe03a082 5000 case TIM_TS_TI1F_ED:
mbed_official 573:ad23fe03a082 5001 {
mbed_official 573:ad23fe03a082 5002 /* Check the parameters */
mbed_official 573:ad23fe03a082 5003 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5004 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 5005 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 5006
mbed_official 573:ad23fe03a082 5007 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 573:ad23fe03a082 5008 tmpccer = htim->Instance->CCER;
mbed_official 573:ad23fe03a082 5009 htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official 573:ad23fe03a082 5010 tmpccmr1 = htim->Instance->CCMR1;
mbed_official 573:ad23fe03a082 5011
mbed_official 573:ad23fe03a082 5012 /* Set the filter */
mbed_official 573:ad23fe03a082 5013 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 573:ad23fe03a082 5014 tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official 573:ad23fe03a082 5015
mbed_official 573:ad23fe03a082 5016 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 5017 htim->Instance->CCMR1 = tmpccmr1;
mbed_official 573:ad23fe03a082 5018 htim->Instance->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5019
mbed_official 573:ad23fe03a082 5020 }
mbed_official 573:ad23fe03a082 5021 break;
mbed_official 573:ad23fe03a082 5022
mbed_official 573:ad23fe03a082 5023 case TIM_TS_TI1FP1:
mbed_official 573:ad23fe03a082 5024 {
mbed_official 573:ad23fe03a082 5025 /* Check the parameters */
mbed_official 573:ad23fe03a082 5026 assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5027 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 5028 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 5029
mbed_official 573:ad23fe03a082 5030 /* Configure TI1 Filter and Polarity */
mbed_official 573:ad23fe03a082 5031 TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 5032 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 5033 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 5034 }
mbed_official 573:ad23fe03a082 5035 break;
mbed_official 573:ad23fe03a082 5036
mbed_official 573:ad23fe03a082 5037 case TIM_TS_TI2FP2:
mbed_official 573:ad23fe03a082 5038 {
mbed_official 573:ad23fe03a082 5039 /* Check the parameters */
mbed_official 573:ad23fe03a082 5040 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5041 assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official 573:ad23fe03a082 5042 assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official 573:ad23fe03a082 5043
mbed_official 573:ad23fe03a082 5044 /* Configure TI2 Filter and Polarity */
mbed_official 573:ad23fe03a082 5045 TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official 573:ad23fe03a082 5046 sSlaveConfig->TriggerPolarity,
mbed_official 573:ad23fe03a082 5047 sSlaveConfig->TriggerFilter);
mbed_official 573:ad23fe03a082 5048 }
mbed_official 573:ad23fe03a082 5049 break;
mbed_official 573:ad23fe03a082 5050
mbed_official 573:ad23fe03a082 5051 case TIM_TS_ITR0:
mbed_official 573:ad23fe03a082 5052 {
mbed_official 573:ad23fe03a082 5053 /* Check the parameter */
mbed_official 573:ad23fe03a082 5054 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5055 }
mbed_official 573:ad23fe03a082 5056 break;
mbed_official 573:ad23fe03a082 5057
mbed_official 573:ad23fe03a082 5058 case TIM_TS_ITR1:
mbed_official 573:ad23fe03a082 5059 {
mbed_official 573:ad23fe03a082 5060 /* Check the parameter */
mbed_official 573:ad23fe03a082 5061 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5062 }
mbed_official 573:ad23fe03a082 5063 break;
mbed_official 573:ad23fe03a082 5064
mbed_official 573:ad23fe03a082 5065 case TIM_TS_ITR2:
mbed_official 573:ad23fe03a082 5066 {
mbed_official 573:ad23fe03a082 5067 /* Check the parameter */
mbed_official 573:ad23fe03a082 5068 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5069 }
mbed_official 573:ad23fe03a082 5070 break;
mbed_official 573:ad23fe03a082 5071
mbed_official 573:ad23fe03a082 5072 case TIM_TS_ITR3:
mbed_official 573:ad23fe03a082 5073 {
mbed_official 573:ad23fe03a082 5074 /* Check the parameter */
mbed_official 573:ad23fe03a082 5075 assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official 573:ad23fe03a082 5076 }
mbed_official 573:ad23fe03a082 5077 break;
mbed_official 573:ad23fe03a082 5078
mbed_official 573:ad23fe03a082 5079 default:
mbed_official 573:ad23fe03a082 5080 break;
mbed_official 573:ad23fe03a082 5081 }
mbed_official 573:ad23fe03a082 5082 }
mbed_official 573:ad23fe03a082 5083
mbed_official 573:ad23fe03a082 5084 /**
mbed_official 573:ad23fe03a082 5085 * @brief Configure the TI1 as Input.
mbed_official 573:ad23fe03a082 5086 * @param TIMx to select the TIM peripheral.
mbed_official 573:ad23fe03a082 5087 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5088 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5089 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5090 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5091 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5092 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 573:ad23fe03a082 5093 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5094 * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official 573:ad23fe03a082 5095 * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official 573:ad23fe03a082 5096 * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official 573:ad23fe03a082 5097 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5098 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5099 * @retval None
mbed_official 573:ad23fe03a082 5100 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1
mbed_official 573:ad23fe03a082 5101 * (on channel2 path) is used as the input signal. Therefore CCMR1 must be
mbed_official 573:ad23fe03a082 5102 * protected against un-initialized filter and polarity values.
mbed_official 573:ad23fe03a082 5103 */
mbed_official 573:ad23fe03a082 5104 void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 5105 uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5106 {
mbed_official 573:ad23fe03a082 5107 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 5108 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5109
mbed_official 573:ad23fe03a082 5110 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 573:ad23fe03a082 5111 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 573:ad23fe03a082 5112 tmpccmr1 = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 5113 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5114
mbed_official 573:ad23fe03a082 5115 /* Select the Input */
mbed_official 573:ad23fe03a082 5116 if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
mbed_official 573:ad23fe03a082 5117 {
mbed_official 573:ad23fe03a082 5118 tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official 573:ad23fe03a082 5119 tmpccmr1 |= TIM_ICSelection;
mbed_official 573:ad23fe03a082 5120 }
mbed_official 573:ad23fe03a082 5121 else
mbed_official 573:ad23fe03a082 5122 {
mbed_official 573:ad23fe03a082 5123 tmpccmr1 |= TIM_CCMR1_CC1S_0;
mbed_official 573:ad23fe03a082 5124 }
mbed_official 573:ad23fe03a082 5125
mbed_official 573:ad23fe03a082 5126 /* Set the filter */
mbed_official 573:ad23fe03a082 5127 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 573:ad23fe03a082 5128 tmpccmr1 |= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F);
mbed_official 573:ad23fe03a082 5129
mbed_official 573:ad23fe03a082 5130 /* Select the Polarity and set the CC1E Bit */
mbed_official 573:ad23fe03a082 5131 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 573:ad23fe03a082 5132 tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
mbed_official 573:ad23fe03a082 5133
mbed_official 573:ad23fe03a082 5134 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 5135 TIMx->CCMR1 = tmpccmr1;
mbed_official 573:ad23fe03a082 5136 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5137 }
mbed_official 573:ad23fe03a082 5138
mbed_official 573:ad23fe03a082 5139 /**
mbed_official 573:ad23fe03a082 5140 * @brief Configure the Polarity and Filter for TI1.
mbed_official 573:ad23fe03a082 5141 * @param TIMx to select the TIM peripheral.
mbed_official 573:ad23fe03a082 5142 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5143 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5144 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5145 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5146 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5147 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5148 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5149 * @retval None
mbed_official 573:ad23fe03a082 5150 */
mbed_official 573:ad23fe03a082 5151 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5152 {
mbed_official 573:ad23fe03a082 5153 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 5154 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5155
mbed_official 573:ad23fe03a082 5156 /* Disable the Channel 1: Reset the CC1E Bit */
mbed_official 573:ad23fe03a082 5157 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5158 TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official 573:ad23fe03a082 5159 tmpccmr1 = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 5160
mbed_official 573:ad23fe03a082 5161 /* Set the filter */
mbed_official 573:ad23fe03a082 5162 tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official 573:ad23fe03a082 5163 tmpccmr1 |= (TIM_ICFilter << 4);
mbed_official 573:ad23fe03a082 5164
mbed_official 573:ad23fe03a082 5165 /* Select the Polarity and set the CC1E Bit */
mbed_official 573:ad23fe03a082 5166 tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
mbed_official 573:ad23fe03a082 5167 tmpccer |= TIM_ICPolarity;
mbed_official 573:ad23fe03a082 5168
mbed_official 573:ad23fe03a082 5169 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 5170 TIMx->CCMR1 = tmpccmr1;
mbed_official 573:ad23fe03a082 5171 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5172 }
mbed_official 573:ad23fe03a082 5173
mbed_official 573:ad23fe03a082 5174 /**
mbed_official 573:ad23fe03a082 5175 * @brief Configure the TI2 as Input.
mbed_official 573:ad23fe03a082 5176 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5177 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5178 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5179 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5180 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5181 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5182 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 573:ad23fe03a082 5183 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5184 * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official 573:ad23fe03a082 5185 * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official 573:ad23fe03a082 5186 * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official 573:ad23fe03a082 5187 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5188 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5189 * @retval None
mbed_official 573:ad23fe03a082 5190 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2
mbed_official 573:ad23fe03a082 5191 * (on channel1 path) is used as the input signal. Therefore CCMR1 must be
mbed_official 573:ad23fe03a082 5192 * protected against un-initialized filter and polarity values.
mbed_official 573:ad23fe03a082 5193 */
mbed_official 573:ad23fe03a082 5194 static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 5195 uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5196 {
mbed_official 573:ad23fe03a082 5197 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 5198 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5199
mbed_official 573:ad23fe03a082 5200 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 573:ad23fe03a082 5201 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 573:ad23fe03a082 5202 tmpccmr1 = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 5203 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5204
mbed_official 573:ad23fe03a082 5205 /* Select the Input */
mbed_official 573:ad23fe03a082 5206 tmpccmr1 &= ~TIM_CCMR1_CC2S;
mbed_official 573:ad23fe03a082 5207 tmpccmr1 |= (TIM_ICSelection << 8);
mbed_official 573:ad23fe03a082 5208
mbed_official 573:ad23fe03a082 5209 /* Set the filter */
mbed_official 573:ad23fe03a082 5210 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 573:ad23fe03a082 5211 tmpccmr1 |= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F);
mbed_official 573:ad23fe03a082 5212
mbed_official 573:ad23fe03a082 5213 /* Select the Polarity and set the CC2E Bit */
mbed_official 573:ad23fe03a082 5214 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 573:ad23fe03a082 5215 tmpccer |= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
mbed_official 573:ad23fe03a082 5216
mbed_official 573:ad23fe03a082 5217 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 5218 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 573:ad23fe03a082 5219 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5220 }
mbed_official 573:ad23fe03a082 5221
mbed_official 573:ad23fe03a082 5222 /**
mbed_official 573:ad23fe03a082 5223 * @brief Configure the Polarity and Filter for TI2.
mbed_official 573:ad23fe03a082 5224 * @param TIMx to select the TIM peripheral.
mbed_official 573:ad23fe03a082 5225 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5226 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5227 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5228 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5229 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5230 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5231 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5232 * @retval None
mbed_official 573:ad23fe03a082 5233 */
mbed_official 573:ad23fe03a082 5234 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5235 {
mbed_official 573:ad23fe03a082 5236 uint32_t tmpccmr1 = 0;
mbed_official 573:ad23fe03a082 5237 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5238
mbed_official 573:ad23fe03a082 5239 /* Disable the Channel 2: Reset the CC2E Bit */
mbed_official 573:ad23fe03a082 5240 TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official 573:ad23fe03a082 5241 tmpccmr1 = TIMx->CCMR1;
mbed_official 573:ad23fe03a082 5242 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5243
mbed_official 573:ad23fe03a082 5244 /* Set the filter */
mbed_official 573:ad23fe03a082 5245 tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official 573:ad23fe03a082 5246 tmpccmr1 |= (TIM_ICFilter << 12);
mbed_official 573:ad23fe03a082 5247
mbed_official 573:ad23fe03a082 5248 /* Select the Polarity and set the CC2E Bit */
mbed_official 573:ad23fe03a082 5249 tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
mbed_official 573:ad23fe03a082 5250 tmpccer |= (TIM_ICPolarity << 4);
mbed_official 573:ad23fe03a082 5251
mbed_official 573:ad23fe03a082 5252 /* Write to TIMx CCMR1 and CCER registers */
mbed_official 573:ad23fe03a082 5253 TIMx->CCMR1 = tmpccmr1 ;
mbed_official 573:ad23fe03a082 5254 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5255 }
mbed_official 573:ad23fe03a082 5256
mbed_official 573:ad23fe03a082 5257 /**
mbed_official 573:ad23fe03a082 5258 * @brief Configure the TI3 as Input.
mbed_official 573:ad23fe03a082 5259 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5260 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5261 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5262 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5263 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5264 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5265 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 573:ad23fe03a082 5266 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5267 * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official 573:ad23fe03a082 5268 * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official 573:ad23fe03a082 5269 * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official 573:ad23fe03a082 5270 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5271 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5272 * @retval None
mbed_official 573:ad23fe03a082 5273 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4
mbed_official 573:ad23fe03a082 5274 * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official 573:ad23fe03a082 5275 * protected against un-initialized filter and polarity values.
mbed_official 573:ad23fe03a082 5276 */
mbed_official 573:ad23fe03a082 5277 static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 5278 uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5279 {
mbed_official 573:ad23fe03a082 5280 uint32_t tmpccmr2 = 0;
mbed_official 573:ad23fe03a082 5281 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5282
mbed_official 573:ad23fe03a082 5283 /* Disable the Channel 3: Reset the CC3E Bit */
mbed_official 573:ad23fe03a082 5284 TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official 573:ad23fe03a082 5285 tmpccmr2 = TIMx->CCMR2;
mbed_official 573:ad23fe03a082 5286 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5287
mbed_official 573:ad23fe03a082 5288 /* Select the Input */
mbed_official 573:ad23fe03a082 5289 tmpccmr2 &= ~TIM_CCMR2_CC3S;
mbed_official 573:ad23fe03a082 5290 tmpccmr2 |= TIM_ICSelection;
mbed_official 573:ad23fe03a082 5291
mbed_official 573:ad23fe03a082 5292 /* Set the filter */
mbed_official 573:ad23fe03a082 5293 tmpccmr2 &= ~TIM_CCMR2_IC3F;
mbed_official 573:ad23fe03a082 5294 tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F);
mbed_official 573:ad23fe03a082 5295
mbed_official 573:ad23fe03a082 5296 /* Select the Polarity and set the CC3E Bit */
mbed_official 573:ad23fe03a082 5297 tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
mbed_official 573:ad23fe03a082 5298 tmpccer |= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
mbed_official 573:ad23fe03a082 5299
mbed_official 573:ad23fe03a082 5300 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 573:ad23fe03a082 5301 TIMx->CCMR2 = tmpccmr2;
mbed_official 573:ad23fe03a082 5302 TIMx->CCER = tmpccer;
mbed_official 573:ad23fe03a082 5303 }
mbed_official 573:ad23fe03a082 5304
mbed_official 573:ad23fe03a082 5305 /**
mbed_official 573:ad23fe03a082 5306 * @brief Configure the TI4 as Input.
mbed_official 573:ad23fe03a082 5307 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5308 * @param TIM_ICPolarity : The Input Polarity.
mbed_official 573:ad23fe03a082 5309 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5310 * @arg TIM_ICPolarity_Rising
mbed_official 573:ad23fe03a082 5311 * @arg TIM_ICPolarity_Falling
mbed_official 573:ad23fe03a082 5312 * @arg TIM_ICPolarity_BothEdge
mbed_official 573:ad23fe03a082 5313 * @param TIM_ICSelection: specifies the input to be used.
mbed_official 573:ad23fe03a082 5314 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5315 * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official 573:ad23fe03a082 5316 * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official 573:ad23fe03a082 5317 * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official 573:ad23fe03a082 5318 * @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official 573:ad23fe03a082 5319 * This parameter must be a value between 0x00 and 0x0F.
mbed_official 573:ad23fe03a082 5320 * @retval None
mbed_official 573:ad23fe03a082 5321 * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3
mbed_official 573:ad23fe03a082 5322 * (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official 573:ad23fe03a082 5323 * protected against un-initialized filter and polarity values.
mbed_official 573:ad23fe03a082 5324 */
mbed_official 573:ad23fe03a082 5325 static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official 573:ad23fe03a082 5326 uint32_t TIM_ICFilter)
mbed_official 573:ad23fe03a082 5327 {
mbed_official 573:ad23fe03a082 5328 uint32_t tmpccmr2 = 0;
mbed_official 573:ad23fe03a082 5329 uint32_t tmpccer = 0;
mbed_official 573:ad23fe03a082 5330
mbed_official 573:ad23fe03a082 5331 /* Disable the Channel 4: Reset the CC4E Bit */
mbed_official 573:ad23fe03a082 5332 TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official 573:ad23fe03a082 5333 tmpccmr2 = TIMx->CCMR2;
mbed_official 573:ad23fe03a082 5334 tmpccer = TIMx->CCER;
mbed_official 573:ad23fe03a082 5335
mbed_official 573:ad23fe03a082 5336 /* Select the Input */
mbed_official 573:ad23fe03a082 5337 tmpccmr2 &= ~TIM_CCMR2_CC4S;
mbed_official 573:ad23fe03a082 5338 tmpccmr2 |= (TIM_ICSelection << 8);
mbed_official 573:ad23fe03a082 5339
mbed_official 573:ad23fe03a082 5340 /* Set the filter */
mbed_official 573:ad23fe03a082 5341 tmpccmr2 &= ~TIM_CCMR2_IC4F;
mbed_official 573:ad23fe03a082 5342 tmpccmr2 |= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F);
mbed_official 573:ad23fe03a082 5343
mbed_official 573:ad23fe03a082 5344 /* Select the Polarity and set the CC4E Bit */
mbed_official 573:ad23fe03a082 5345 tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
mbed_official 573:ad23fe03a082 5346 tmpccer |= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
mbed_official 573:ad23fe03a082 5347
mbed_official 573:ad23fe03a082 5348 /* Write to TIMx CCMR2 and CCER registers */
mbed_official 573:ad23fe03a082 5349 TIMx->CCMR2 = tmpccmr2;
mbed_official 573:ad23fe03a082 5350 TIMx->CCER = tmpccer ;
mbed_official 573:ad23fe03a082 5351 }
mbed_official 573:ad23fe03a082 5352
mbed_official 573:ad23fe03a082 5353 /**
mbed_official 573:ad23fe03a082 5354 * @brief Selects the Input Trigger source
mbed_official 573:ad23fe03a082 5355 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5356 * @param TIM_ITRx: The Input Trigger source.
mbed_official 573:ad23fe03a082 5357 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5358 * @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official 573:ad23fe03a082 5359 * @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official 573:ad23fe03a082 5360 * @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official 573:ad23fe03a082 5361 * @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official 573:ad23fe03a082 5362 * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official 573:ad23fe03a082 5363 * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official 573:ad23fe03a082 5364 * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official 573:ad23fe03a082 5365 * @arg TIM_TS_ETRF: External Trigger input
mbed_official 573:ad23fe03a082 5366 * @retval None
mbed_official 573:ad23fe03a082 5367 */
mbed_official 573:ad23fe03a082 5368 static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t TIM_ITRx)
mbed_official 573:ad23fe03a082 5369 {
mbed_official 573:ad23fe03a082 5370 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 5371
mbed_official 573:ad23fe03a082 5372 /* Get the TIMx SMCR register value */
mbed_official 573:ad23fe03a082 5373 tmpsmcr = TIMx->SMCR;
mbed_official 573:ad23fe03a082 5374 /* Reset the TS Bits */
mbed_official 573:ad23fe03a082 5375 tmpsmcr &= ~TIM_SMCR_TS;
mbed_official 573:ad23fe03a082 5376 /* Set the Input Trigger source and the slave mode*/
mbed_official 573:ad23fe03a082 5377 tmpsmcr |= TIM_ITRx | TIM_SLAVEMODE_EXTERNAL1;
mbed_official 573:ad23fe03a082 5378 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 5379 TIMx->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 5380 }
mbed_official 573:ad23fe03a082 5381
mbed_official 573:ad23fe03a082 5382 /**
mbed_official 573:ad23fe03a082 5383 * @brief Configures the TIMx External Trigger (ETR).
mbed_official 573:ad23fe03a082 5384 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5385 * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official 573:ad23fe03a082 5386 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5387 * @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
mbed_official 573:ad23fe03a082 5388 * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official 573:ad23fe03a082 5389 * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official 573:ad23fe03a082 5390 * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official 573:ad23fe03a082 5391 * @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official 573:ad23fe03a082 5392 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5393 * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official 573:ad23fe03a082 5394 * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official 573:ad23fe03a082 5395 * @param ExtTRGFilter: External Trigger Filter.
mbed_official 573:ad23fe03a082 5396 * This parameter must be a value between 0x00 and 0x0F
mbed_official 573:ad23fe03a082 5397 * @retval None
mbed_official 573:ad23fe03a082 5398 */
mbed_official 573:ad23fe03a082 5399 void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official 573:ad23fe03a082 5400 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
mbed_official 573:ad23fe03a082 5401 {
mbed_official 573:ad23fe03a082 5402 uint32_t tmpsmcr = 0;
mbed_official 573:ad23fe03a082 5403
mbed_official 573:ad23fe03a082 5404 tmpsmcr = TIMx->SMCR;
mbed_official 573:ad23fe03a082 5405
mbed_official 573:ad23fe03a082 5406 /* Reset the ETR Bits */
mbed_official 573:ad23fe03a082 5407 tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
mbed_official 573:ad23fe03a082 5408
mbed_official 573:ad23fe03a082 5409 /* Set the Prescaler, the Filter value and the Polarity */
mbed_official 573:ad23fe03a082 5410 tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8)));
mbed_official 573:ad23fe03a082 5411
mbed_official 573:ad23fe03a082 5412 /* Write to TIMx SMCR */
mbed_official 573:ad23fe03a082 5413 TIMx->SMCR = tmpsmcr;
mbed_official 573:ad23fe03a082 5414 }
mbed_official 573:ad23fe03a082 5415
mbed_official 573:ad23fe03a082 5416 /**
mbed_official 573:ad23fe03a082 5417 * @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official 573:ad23fe03a082 5418 * @param TIMx to select the TIM peripheral
mbed_official 573:ad23fe03a082 5419 * @param Channel: specifies the TIM Channel
mbed_official 573:ad23fe03a082 5420 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 5421 * @arg TIM_Channel_1: TIM Channel 1
mbed_official 573:ad23fe03a082 5422 * @arg TIM_Channel_2: TIM Channel 2
mbed_official 573:ad23fe03a082 5423 * @arg TIM_Channel_3: TIM Channel 3
mbed_official 573:ad23fe03a082 5424 * @arg TIM_Channel_4: TIM Channel 4
mbed_official 573:ad23fe03a082 5425 * @param ChannelState: specifies the TIM Channel CCxE bit new state.
mbed_official 573:ad23fe03a082 5426 * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
mbed_official 573:ad23fe03a082 5427 * @retval None
mbed_official 573:ad23fe03a082 5428 */
mbed_official 573:ad23fe03a082 5429 void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
mbed_official 573:ad23fe03a082 5430 {
mbed_official 573:ad23fe03a082 5431 uint32_t tmp = 0;
mbed_official 573:ad23fe03a082 5432
mbed_official 573:ad23fe03a082 5433 /* Check the parameters */
mbed_official 573:ad23fe03a082 5434 assert_param(IS_TIM_CC1_INSTANCE(TIMx));
mbed_official 573:ad23fe03a082 5435 assert_param(IS_TIM_CHANNELS(Channel));
mbed_official 573:ad23fe03a082 5436
mbed_official 573:ad23fe03a082 5437 tmp = TIM_CCER_CC1E << Channel;
mbed_official 573:ad23fe03a082 5438
mbed_official 573:ad23fe03a082 5439 /* Reset the CCxE Bit */
mbed_official 573:ad23fe03a082 5440 TIMx->CCER &= ~tmp;
mbed_official 573:ad23fe03a082 5441
mbed_official 573:ad23fe03a082 5442 /* Set or reset the CCxE Bit */
mbed_official 573:ad23fe03a082 5443 TIMx->CCER |= (uint32_t)(ChannelState << Channel);
mbed_official 573:ad23fe03a082 5444 }
mbed_official 573:ad23fe03a082 5445
mbed_official 573:ad23fe03a082 5446
mbed_official 573:ad23fe03a082 5447 /**
mbed_official 573:ad23fe03a082 5448 * @}
mbed_official 573:ad23fe03a082 5449 */
mbed_official 573:ad23fe03a082 5450
mbed_official 573:ad23fe03a082 5451 #endif /* HAL_TIM_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 5452 /**
mbed_official 573:ad23fe03a082 5453 * @}
mbed_official 573:ad23fe03a082 5454 */
mbed_official 573:ad23fe03a082 5455
mbed_official 573:ad23fe03a082 5456 /**
mbed_official 573:ad23fe03a082 5457 * @}
mbed_official 573:ad23fe03a082 5458 */
mbed_official 573:ad23fe03a082 5459 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/