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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_rcc.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_rcc.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief RCC HAL module driver.
mbed_official 573:ad23fe03a082 8 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 573:ad23fe03a082 10 * + Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 11 * + Peripheral Control functions
mbed_official 573:ad23fe03a082 12 *
mbed_official 573:ad23fe03a082 13 @verbatim
mbed_official 573:ad23fe03a082 14 ==============================================================================
mbed_official 573:ad23fe03a082 15 ##### RCC specific features #####
mbed_official 573:ad23fe03a082 16 ==============================================================================
mbed_official 573:ad23fe03a082 17 [..]
mbed_official 573:ad23fe03a082 18 After reset the device is running from Internal High Speed oscillator
mbed_official 573:ad23fe03a082 19 (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
mbed_official 573:ad23fe03a082 20 and I-Cache are disabled, and all peripherals are off except internal
mbed_official 573:ad23fe03a082 21 SRAM, Flash and JTAG.
mbed_official 573:ad23fe03a082 22 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 573:ad23fe03a082 23 all peripherals mapped on these busses are running at HSI speed.
mbed_official 573:ad23fe03a082 24 (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official 573:ad23fe03a082 25 (+) All GPIOs are in input floating state, except the JTAG pins which
mbed_official 573:ad23fe03a082 26 are assigned to be used for debug purpose.
mbed_official 573:ad23fe03a082 27
mbed_official 573:ad23fe03a082 28 [..]
mbed_official 573:ad23fe03a082 29 Once the device started from reset, the user application has to:
mbed_official 573:ad23fe03a082 30 (+) Configure the clock source to be used to drive the System clock
mbed_official 573:ad23fe03a082 31 (if the application needs higher frequency/performance)
mbed_official 573:ad23fe03a082 32 (+) Configure the System clock frequency and Flash settings
mbed_official 573:ad23fe03a082 33 (+) Configure the AHB and APB busses prescalers
mbed_official 573:ad23fe03a082 34 (+) Enable the clock for the peripheral(s) to be used
mbed_official 573:ad23fe03a082 35 (+) Configure the clock source(s) for peripherals which clocks are not
mbed_official 573:ad23fe03a082 36 derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
mbed_official 573:ad23fe03a082 37
mbed_official 573:ad23fe03a082 38 ##### RCC Limitations #####
mbed_official 573:ad23fe03a082 39 ==============================================================================
mbed_official 573:ad23fe03a082 40 [..]
mbed_official 573:ad23fe03a082 41 A delay between an RCC peripheral clock enable and the effective peripheral
mbed_official 573:ad23fe03a082 42 enabling should be taken into account in order to manage the peripheral read/write
mbed_official 573:ad23fe03a082 43 from/to registers.
mbed_official 573:ad23fe03a082 44 (+) This delay depends on the peripheral mapping.
mbed_official 573:ad23fe03a082 45 (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
mbed_official 573:ad23fe03a082 46 after the clock enable bit is set on the hardware register
mbed_official 573:ad23fe03a082 47 (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
mbed_official 573:ad23fe03a082 48 after the clock enable bit is set on the hardware register
mbed_official 573:ad23fe03a082 49
mbed_official 573:ad23fe03a082 50 [..]
mbed_official 610:813dcc80987e 51 Implemented Workaround:
mbed_official 610:813dcc80987e 52 (+) For AHB & APB peripherals, a dummy read to the peripheral register has been
mbed_official 573:ad23fe03a082 53 inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
mbed_official 573:ad23fe03a082 54
mbed_official 573:ad23fe03a082 55 @endverbatim
mbed_official 573:ad23fe03a082 56 ******************************************************************************
mbed_official 573:ad23fe03a082 57 * @attention
mbed_official 573:ad23fe03a082 58 *
mbed_official 573:ad23fe03a082 59 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 60 *
mbed_official 573:ad23fe03a082 61 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 62 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 63 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 64 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 65 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 66 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 67 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 68 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 69 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 70 * without specific prior written permission.
mbed_official 573:ad23fe03a082 71 *
mbed_official 573:ad23fe03a082 72 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 73 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 74 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 75 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 76 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 77 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 78 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 79 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 80 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 81 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 82 *
mbed_official 573:ad23fe03a082 83 ******************************************************************************
mbed_official 573:ad23fe03a082 84 */
mbed_official 573:ad23fe03a082 85
mbed_official 573:ad23fe03a082 86 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 87 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 88
mbed_official 573:ad23fe03a082 89 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 90 * @{
mbed_official 573:ad23fe03a082 91 */
mbed_official 573:ad23fe03a082 92
mbed_official 573:ad23fe03a082 93 /** @defgroup RCC RCC
mbed_official 573:ad23fe03a082 94 * @brief RCC HAL module driver
mbed_official 573:ad23fe03a082 95 * @{
mbed_official 573:ad23fe03a082 96 */
mbed_official 573:ad23fe03a082 97
mbed_official 573:ad23fe03a082 98 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 573:ad23fe03a082 99
mbed_official 573:ad23fe03a082 100 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 101 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 102 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 103 /** @defgroup RCC_Private_Macros RCC Private Macros
mbed_official 573:ad23fe03a082 104 * @{
mbed_official 573:ad23fe03a082 105 */
mbed_official 573:ad23fe03a082 106
mbed_official 573:ad23fe03a082 107 #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official 573:ad23fe03a082 108 #define MCO1_GPIO_PORT GPIOA
mbed_official 573:ad23fe03a082 109 #define MCO1_PIN GPIO_PIN_8
mbed_official 573:ad23fe03a082 110
mbed_official 573:ad23fe03a082 111 #define MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
mbed_official 573:ad23fe03a082 112 #define MCO2_GPIO_PORT GPIOC
mbed_official 573:ad23fe03a082 113 #define MCO2_PIN GPIO_PIN_9
mbed_official 573:ad23fe03a082 114
mbed_official 573:ad23fe03a082 115 /**
mbed_official 573:ad23fe03a082 116 * @}
mbed_official 573:ad23fe03a082 117 */
mbed_official 573:ad23fe03a082 118 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 119 /** @defgroup RCC_Private_Variables RCC Private Variables
mbed_official 573:ad23fe03a082 120 * @{
mbed_official 573:ad23fe03a082 121 */
mbed_official 573:ad23fe03a082 122 const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 573:ad23fe03a082 123
mbed_official 573:ad23fe03a082 124 /**
mbed_official 573:ad23fe03a082 125 * @}
mbed_official 573:ad23fe03a082 126 */
mbed_official 573:ad23fe03a082 127
mbed_official 573:ad23fe03a082 128 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 129 /* Exported functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 130
mbed_official 573:ad23fe03a082 131 /** @defgroup RCC_Exported_Functions RCC Exported Functions
mbed_official 573:ad23fe03a082 132 * @{
mbed_official 573:ad23fe03a082 133 */
mbed_official 573:ad23fe03a082 134
mbed_official 573:ad23fe03a082 135 /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 136 * @brief Initialization and Configuration functions
mbed_official 573:ad23fe03a082 137 *
mbed_official 573:ad23fe03a082 138 @verbatim
mbed_official 573:ad23fe03a082 139 ===============================================================================
mbed_official 573:ad23fe03a082 140 ##### Initialization and de-initialization functions #####
mbed_official 573:ad23fe03a082 141 ===============================================================================
mbed_official 573:ad23fe03a082 142 [..]
mbed_official 573:ad23fe03a082 143 This section provides functions allowing to configure the internal/external oscillators
mbed_official 573:ad23fe03a082 144 (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1
mbed_official 573:ad23fe03a082 145 and APB2).
mbed_official 573:ad23fe03a082 146
mbed_official 573:ad23fe03a082 147 [..] Internal/external clock and PLL configuration
mbed_official 573:ad23fe03a082 148 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
mbed_official 573:ad23fe03a082 149 the PLL as System clock source.
mbed_official 573:ad23fe03a082 150
mbed_official 573:ad23fe03a082 151 (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
mbed_official 573:ad23fe03a082 152 clock source.
mbed_official 573:ad23fe03a082 153
mbed_official 573:ad23fe03a082 154 (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
mbed_official 573:ad23fe03a082 155 through the PLL as System clock source. Can be used also as RTC clock source.
mbed_official 573:ad23fe03a082 156
mbed_official 573:ad23fe03a082 157 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 573:ad23fe03a082 158
mbed_official 573:ad23fe03a082 159 (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
mbed_official 573:ad23fe03a082 160 (++) The first output is used to generate the high speed system clock (up to 216 MHz)
mbed_official 573:ad23fe03a082 161 (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
mbed_official 573:ad23fe03a082 162 the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
mbed_official 573:ad23fe03a082 163
mbed_official 573:ad23fe03a082 164 (#) CSS (Clock security system), once enable using the function HAL_RCC_EnableCSS()
mbed_official 573:ad23fe03a082 165 and if a HSE clock failure occurs(HSE used directly or through PLL as System
mbed_official 573:ad23fe03a082 166 clock source), the System clock is automatically switched to HSI and an interrupt
mbed_official 573:ad23fe03a082 167 is generated if enabled. The interrupt is linked to the Cortex-M7 NMI
mbed_official 573:ad23fe03a082 168 (Non-Maskable Interrupt) exception vector.
mbed_official 573:ad23fe03a082 169
mbed_official 573:ad23fe03a082 170 (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
mbed_official 573:ad23fe03a082 171 clock (through a configurable prescaler) on PA8 pin.
mbed_official 573:ad23fe03a082 172
mbed_official 573:ad23fe03a082 173 (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
mbed_official 573:ad23fe03a082 174 clock (through a configurable prescaler) on PC9 pin.
mbed_official 573:ad23fe03a082 175
mbed_official 573:ad23fe03a082 176 [..] System, AHB and APB busses clocks configuration
mbed_official 573:ad23fe03a082 177 (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
mbed_official 573:ad23fe03a082 178 HSE and PLL.
mbed_official 573:ad23fe03a082 179 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 573:ad23fe03a082 180 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 573:ad23fe03a082 181 on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official 573:ad23fe03a082 182 from AHB clock through configurable prescalers and used to clock
mbed_official 573:ad23fe03a082 183 the peripherals mapped on these busses. You can use
mbed_official 573:ad23fe03a082 184 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 573:ad23fe03a082 185
mbed_official 573:ad23fe03a082 186 -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 573:ad23fe03a082 187 (+@) I2S: the I2S clock can be derived either from a specific PLL (PLLI2S) or
mbed_official 573:ad23fe03a082 188 from an external clock mapped on the I2S_CKIN pin.
mbed_official 573:ad23fe03a082 189 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 573:ad23fe03a082 190 (+@) SAI: the SAI clock can be derived either from a specific PLL (PLLI2S) or (PLLSAI) or
mbed_official 573:ad23fe03a082 191 from an external clock mapped on the I2S_CKIN pin.
mbed_official 573:ad23fe03a082 192 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 573:ad23fe03a082 193 (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official 573:ad23fe03a082 194 divided by 2 to 31. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official 573:ad23fe03a082 195 macros to configure this clock.
mbed_official 573:ad23fe03a082 196 (+@) USB OTG FS, SDIO and RTC: USB OTG FS require a frequency equal to 48 MHz
mbed_official 573:ad23fe03a082 197 to work correctly, while the SDIO require a frequency equal or lower than
mbed_official 573:ad23fe03a082 198 to 48. This clock is derived of the main PLL through PLLQ divider.
mbed_official 573:ad23fe03a082 199 (+@) IWDG clock which is always the LSI clock.
mbed_official 573:ad23fe03a082 200 @endverbatim
mbed_official 573:ad23fe03a082 201 * @{
mbed_official 573:ad23fe03a082 202 */
mbed_official 573:ad23fe03a082 203
mbed_official 573:ad23fe03a082 204 /**
mbed_official 573:ad23fe03a082 205 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 573:ad23fe03a082 206 * @note The default reset state of the clock configuration is given below:
mbed_official 573:ad23fe03a082 207 * - HSI ON and used as system clock source
mbed_official 573:ad23fe03a082 208 * - HSE, PLL and PLLI2S OFF
mbed_official 573:ad23fe03a082 209 * - AHB, APB1 and APB2 prescaler set to 1.
mbed_official 573:ad23fe03a082 210 * - CSS, MCO1 and MCO2 OFF
mbed_official 573:ad23fe03a082 211 * - All interrupts disabled
mbed_official 573:ad23fe03a082 212 * @note This function doesn't modify the configuration of the
mbed_official 573:ad23fe03a082 213 * - Peripheral clocks
mbed_official 573:ad23fe03a082 214 * - LSI, LSE and RTC clocks
mbed_official 573:ad23fe03a082 215 * @retval None
mbed_official 573:ad23fe03a082 216 */
mbed_official 573:ad23fe03a082 217 void HAL_RCC_DeInit(void)
mbed_official 573:ad23fe03a082 218 {
mbed_official 573:ad23fe03a082 219 /* Set HSION bit */
mbed_official 573:ad23fe03a082 220 SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
mbed_official 573:ad23fe03a082 221
mbed_official 573:ad23fe03a082 222 /* Reset CFGR register */
mbed_official 573:ad23fe03a082 223 CLEAR_REG(RCC->CFGR);
mbed_official 573:ad23fe03a082 224
mbed_official 573:ad23fe03a082 225 /* Reset HSEON, CSSON, PLLON, PLLI2S */
mbed_official 573:ad23fe03a082 226 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON| RCC_CR_PLLI2SON);
mbed_official 573:ad23fe03a082 227
mbed_official 573:ad23fe03a082 228 /* Reset PLLCFGR register */
mbed_official 573:ad23fe03a082 229 CLEAR_REG(RCC->PLLCFGR);
mbed_official 573:ad23fe03a082 230 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2);
mbed_official 573:ad23fe03a082 231
mbed_official 573:ad23fe03a082 232 /* Reset PLLI2SCFGR register */
mbed_official 573:ad23fe03a082 233 CLEAR_REG(RCC->PLLI2SCFGR);
mbed_official 573:ad23fe03a082 234 SET_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1);
mbed_official 573:ad23fe03a082 235
mbed_official 573:ad23fe03a082 236 /* Reset HSEBYP bit */
mbed_official 573:ad23fe03a082 237 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official 573:ad23fe03a082 238
mbed_official 573:ad23fe03a082 239 /* Disable all interrupts */
mbed_official 573:ad23fe03a082 240 CLEAR_REG(RCC->CIR);
mbed_official 573:ad23fe03a082 241 }
mbed_official 573:ad23fe03a082 242
mbed_official 573:ad23fe03a082 243 /**
mbed_official 573:ad23fe03a082 244 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 573:ad23fe03a082 245 * RCC_OscInitTypeDef.
mbed_official 573:ad23fe03a082 246 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 573:ad23fe03a082 247 * contains the configuration information for the RCC Oscillators.
mbed_official 573:ad23fe03a082 248 * @note The PLL is not disabled when used as system clock.
mbed_official 573:ad23fe03a082 249 * @retval HAL status
mbed_official 573:ad23fe03a082 250 */
mbed_official 573:ad23fe03a082 251 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 573:ad23fe03a082 252 {
mbed_official 573:ad23fe03a082 253 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 254
mbed_official 573:ad23fe03a082 255 /* Check the parameters */
mbed_official 573:ad23fe03a082 256 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 573:ad23fe03a082 257
mbed_official 573:ad23fe03a082 258 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 573:ad23fe03a082 259 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 573:ad23fe03a082 260 {
mbed_official 573:ad23fe03a082 261 /* Check the parameters */
mbed_official 573:ad23fe03a082 262 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 573:ad23fe03a082 263 /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
mbed_official 573:ad23fe03a082 264 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 573:ad23fe03a082 265 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
mbed_official 573:ad23fe03a082 266 {
mbed_official 573:ad23fe03a082 267 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
mbed_official 573:ad23fe03a082 268 {
mbed_official 573:ad23fe03a082 269 return HAL_ERROR;
mbed_official 573:ad23fe03a082 270 }
mbed_official 573:ad23fe03a082 271 }
mbed_official 573:ad23fe03a082 272 else
mbed_official 573:ad23fe03a082 273 {
mbed_official 573:ad23fe03a082 274 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 573:ad23fe03a082 275 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 573:ad23fe03a082 276
mbed_official 573:ad23fe03a082 277 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 278 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 279
mbed_official 573:ad23fe03a082 280 /* Wait till HSE is disabled */
mbed_official 573:ad23fe03a082 281 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 573:ad23fe03a082 282 {
mbed_official 573:ad23fe03a082 283 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 284 {
mbed_official 573:ad23fe03a082 285 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 286 }
mbed_official 573:ad23fe03a082 287 }
mbed_official 573:ad23fe03a082 288
mbed_official 573:ad23fe03a082 289 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 573:ad23fe03a082 290 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 573:ad23fe03a082 291
mbed_official 573:ad23fe03a082 292 /* Check the HSE State */
mbed_official 573:ad23fe03a082 293 if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
mbed_official 573:ad23fe03a082 294 {
mbed_official 573:ad23fe03a082 295 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 296 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 297
mbed_official 573:ad23fe03a082 298 /* Wait till HSE is ready */
mbed_official 573:ad23fe03a082 299 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 573:ad23fe03a082 300 {
mbed_official 573:ad23fe03a082 301 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 302 {
mbed_official 573:ad23fe03a082 303 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 304 }
mbed_official 573:ad23fe03a082 305 }
mbed_official 573:ad23fe03a082 306 }
mbed_official 573:ad23fe03a082 307 else
mbed_official 573:ad23fe03a082 308 {
mbed_official 573:ad23fe03a082 309 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 310 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 311
mbed_official 573:ad23fe03a082 312 /* Wait till HSE is bypassed or disabled */
mbed_official 573:ad23fe03a082 313 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 573:ad23fe03a082 314 {
mbed_official 573:ad23fe03a082 315 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 316 {
mbed_official 573:ad23fe03a082 317 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 318 }
mbed_official 573:ad23fe03a082 319 }
mbed_official 573:ad23fe03a082 320 }
mbed_official 573:ad23fe03a082 321 }
mbed_official 573:ad23fe03a082 322 }
mbed_official 573:ad23fe03a082 323 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 573:ad23fe03a082 324 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 573:ad23fe03a082 325 {
mbed_official 573:ad23fe03a082 326 /* Check the parameters */
mbed_official 573:ad23fe03a082 327 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 573:ad23fe03a082 328 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 573:ad23fe03a082 329
mbed_official 573:ad23fe03a082 330 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official 573:ad23fe03a082 331 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 573:ad23fe03a082 332 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
mbed_official 573:ad23fe03a082 333 {
mbed_official 573:ad23fe03a082 334 /* When HSI is used as system clock it will not disabled */
mbed_official 573:ad23fe03a082 335 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 573:ad23fe03a082 336 {
mbed_official 573:ad23fe03a082 337 return HAL_ERROR;
mbed_official 573:ad23fe03a082 338 }
mbed_official 573:ad23fe03a082 339 /* Otherwise, just the calibration is allowed */
mbed_official 573:ad23fe03a082 340 else
mbed_official 573:ad23fe03a082 341 {
mbed_official 573:ad23fe03a082 342 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 573:ad23fe03a082 343 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 573:ad23fe03a082 344 }
mbed_official 573:ad23fe03a082 345 }
mbed_official 573:ad23fe03a082 346 else
mbed_official 573:ad23fe03a082 347 {
mbed_official 573:ad23fe03a082 348 /* Check the HSI State */
mbed_official 573:ad23fe03a082 349 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official 573:ad23fe03a082 350 {
mbed_official 573:ad23fe03a082 351 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 573:ad23fe03a082 352 __HAL_RCC_HSI_ENABLE();
mbed_official 573:ad23fe03a082 353
mbed_official 573:ad23fe03a082 354 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 355 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 356
mbed_official 573:ad23fe03a082 357 /* Wait till HSI is ready */
mbed_official 573:ad23fe03a082 358 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 573:ad23fe03a082 359 {
mbed_official 573:ad23fe03a082 360 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 361 {
mbed_official 573:ad23fe03a082 362 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 363 }
mbed_official 573:ad23fe03a082 364 }
mbed_official 573:ad23fe03a082 365
mbed_official 573:ad23fe03a082 366 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 573:ad23fe03a082 367 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 573:ad23fe03a082 368 }
mbed_official 573:ad23fe03a082 369 else
mbed_official 573:ad23fe03a082 370 {
mbed_official 573:ad23fe03a082 371 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 573:ad23fe03a082 372 __HAL_RCC_HSI_DISABLE();
mbed_official 573:ad23fe03a082 373
mbed_official 573:ad23fe03a082 374 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 375 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 376
mbed_official 573:ad23fe03a082 377 /* Wait till HSI is ready */
mbed_official 573:ad23fe03a082 378 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 573:ad23fe03a082 379 {
mbed_official 573:ad23fe03a082 380 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 381 {
mbed_official 573:ad23fe03a082 382 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 383 }
mbed_official 573:ad23fe03a082 384 }
mbed_official 573:ad23fe03a082 385 }
mbed_official 573:ad23fe03a082 386 }
mbed_official 573:ad23fe03a082 387 }
mbed_official 573:ad23fe03a082 388 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 573:ad23fe03a082 389 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 573:ad23fe03a082 390 {
mbed_official 573:ad23fe03a082 391 /* Check the parameters */
mbed_official 573:ad23fe03a082 392 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 573:ad23fe03a082 393
mbed_official 573:ad23fe03a082 394 /* Check the LSI State */
mbed_official 573:ad23fe03a082 395 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official 573:ad23fe03a082 396 {
mbed_official 573:ad23fe03a082 397 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 573:ad23fe03a082 398 __HAL_RCC_LSI_ENABLE();
mbed_official 573:ad23fe03a082 399
mbed_official 573:ad23fe03a082 400 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 401 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 402
mbed_official 573:ad23fe03a082 403 /* Wait till LSI is ready */
mbed_official 573:ad23fe03a082 404 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 573:ad23fe03a082 405 {
mbed_official 573:ad23fe03a082 406 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 407 {
mbed_official 573:ad23fe03a082 408 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 409 }
mbed_official 573:ad23fe03a082 410 }
mbed_official 573:ad23fe03a082 411 }
mbed_official 573:ad23fe03a082 412 else
mbed_official 573:ad23fe03a082 413 {
mbed_official 573:ad23fe03a082 414 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 573:ad23fe03a082 415 __HAL_RCC_LSI_DISABLE();
mbed_official 573:ad23fe03a082 416
mbed_official 573:ad23fe03a082 417 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 418 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 419
mbed_official 573:ad23fe03a082 420 /* Wait till LSI is ready */
mbed_official 573:ad23fe03a082 421 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 573:ad23fe03a082 422 {
mbed_official 573:ad23fe03a082 423 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 424 {
mbed_official 573:ad23fe03a082 425 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 426 }
mbed_official 573:ad23fe03a082 427 }
mbed_official 573:ad23fe03a082 428 }
mbed_official 573:ad23fe03a082 429 }
mbed_official 573:ad23fe03a082 430 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 573:ad23fe03a082 431 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 573:ad23fe03a082 432 {
mbed_official 573:ad23fe03a082 433 /* Check the parameters */
mbed_official 573:ad23fe03a082 434 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 573:ad23fe03a082 435
mbed_official 573:ad23fe03a082 436 /* Enable Power Clock*/
mbed_official 573:ad23fe03a082 437 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 573:ad23fe03a082 438
mbed_official 573:ad23fe03a082 439 /* Enable write access to Backup domain */
mbed_official 573:ad23fe03a082 440 PWR->CR1 |= PWR_CR1_DBP;
mbed_official 573:ad23fe03a082 441
mbed_official 573:ad23fe03a082 442 /* Wait for Backup domain Write protection disable */
mbed_official 573:ad23fe03a082 443 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 444
mbed_official 573:ad23fe03a082 445 while((PWR->CR1 & PWR_CR1_DBP) == RESET)
mbed_official 573:ad23fe03a082 446 {
mbed_official 573:ad23fe03a082 447 if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 448 {
mbed_official 573:ad23fe03a082 449 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 450 }
mbed_official 573:ad23fe03a082 451 }
mbed_official 573:ad23fe03a082 452
mbed_official 573:ad23fe03a082 453 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 573:ad23fe03a082 454 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 573:ad23fe03a082 455
mbed_official 573:ad23fe03a082 456 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 457 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 458
mbed_official 573:ad23fe03a082 459 /* Wait till LSE is ready */
mbed_official 573:ad23fe03a082 460 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 573:ad23fe03a082 461 {
mbed_official 573:ad23fe03a082 462 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 463 {
mbed_official 573:ad23fe03a082 464 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 465 }
mbed_official 573:ad23fe03a082 466 }
mbed_official 573:ad23fe03a082 467
mbed_official 573:ad23fe03a082 468 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 573:ad23fe03a082 469 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 573:ad23fe03a082 470 /* Check the LSE State */
mbed_official 573:ad23fe03a082 471 if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
mbed_official 573:ad23fe03a082 472 {
mbed_official 573:ad23fe03a082 473 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 474 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 475
mbed_official 573:ad23fe03a082 476 /* Wait till LSE is ready */
mbed_official 573:ad23fe03a082 477 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 573:ad23fe03a082 478 {
mbed_official 573:ad23fe03a082 479 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 480 {
mbed_official 573:ad23fe03a082 481 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 482 }
mbed_official 573:ad23fe03a082 483 }
mbed_official 573:ad23fe03a082 484 }
mbed_official 573:ad23fe03a082 485 else
mbed_official 573:ad23fe03a082 486 {
mbed_official 573:ad23fe03a082 487 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 488 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 489
mbed_official 573:ad23fe03a082 490 /* Wait till LSE is ready */
mbed_official 573:ad23fe03a082 491 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 573:ad23fe03a082 492 {
mbed_official 573:ad23fe03a082 493 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 494 {
mbed_official 573:ad23fe03a082 495 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 496 }
mbed_official 573:ad23fe03a082 497 }
mbed_official 573:ad23fe03a082 498 }
mbed_official 573:ad23fe03a082 499 }
mbed_official 573:ad23fe03a082 500 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 573:ad23fe03a082 501 /* Check the parameters */
mbed_official 573:ad23fe03a082 502 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 573:ad23fe03a082 503 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 573:ad23fe03a082 504 {
mbed_official 573:ad23fe03a082 505 /* Check if the PLL is used as system clock or not */
mbed_official 573:ad23fe03a082 506 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 573:ad23fe03a082 507 {
mbed_official 573:ad23fe03a082 508 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 573:ad23fe03a082 509 {
mbed_official 573:ad23fe03a082 510 /* Check the parameters */
mbed_official 573:ad23fe03a082 511 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 573:ad23fe03a082 512 assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
mbed_official 573:ad23fe03a082 513 assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
mbed_official 573:ad23fe03a082 514 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
mbed_official 573:ad23fe03a082 515 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
mbed_official 573:ad23fe03a082 516
mbed_official 573:ad23fe03a082 517 /* Disable the main PLL. */
mbed_official 573:ad23fe03a082 518 __HAL_RCC_PLL_DISABLE();
mbed_official 573:ad23fe03a082 519
mbed_official 573:ad23fe03a082 520 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 521 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 522
mbed_official 573:ad23fe03a082 523 /* Wait till PLL is ready */
mbed_official 573:ad23fe03a082 524 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 573:ad23fe03a082 525 {
mbed_official 573:ad23fe03a082 526 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 527 {
mbed_official 573:ad23fe03a082 528 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 529 }
mbed_official 573:ad23fe03a082 530 }
mbed_official 573:ad23fe03a082 531
mbed_official 573:ad23fe03a082 532 /* Configure the main PLL clock source, multiplication and division factors. */
mbed_official 573:ad23fe03a082 533 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official 573:ad23fe03a082 534 RCC_OscInitStruct->PLL.PLLM,
mbed_official 573:ad23fe03a082 535 RCC_OscInitStruct->PLL.PLLN,
mbed_official 573:ad23fe03a082 536 RCC_OscInitStruct->PLL.PLLP,
mbed_official 573:ad23fe03a082 537 RCC_OscInitStruct->PLL.PLLQ);
mbed_official 573:ad23fe03a082 538 /* Enable the main PLL. */
mbed_official 573:ad23fe03a082 539 __HAL_RCC_PLL_ENABLE();
mbed_official 573:ad23fe03a082 540
mbed_official 573:ad23fe03a082 541 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 542 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 543
mbed_official 573:ad23fe03a082 544 /* Wait till PLL is ready */
mbed_official 573:ad23fe03a082 545 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 573:ad23fe03a082 546 {
mbed_official 573:ad23fe03a082 547 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 548 {
mbed_official 573:ad23fe03a082 549 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 550 }
mbed_official 573:ad23fe03a082 551 }
mbed_official 573:ad23fe03a082 552 }
mbed_official 573:ad23fe03a082 553 else
mbed_official 573:ad23fe03a082 554 {
mbed_official 573:ad23fe03a082 555 /* Disable the main PLL. */
mbed_official 573:ad23fe03a082 556 __HAL_RCC_PLL_DISABLE();
mbed_official 573:ad23fe03a082 557
mbed_official 573:ad23fe03a082 558 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 559 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 560
mbed_official 573:ad23fe03a082 561 /* Wait till PLL is ready */
mbed_official 573:ad23fe03a082 562 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 573:ad23fe03a082 563 {
mbed_official 573:ad23fe03a082 564 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 565 {
mbed_official 573:ad23fe03a082 566 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 567 }
mbed_official 573:ad23fe03a082 568 }
mbed_official 573:ad23fe03a082 569 }
mbed_official 573:ad23fe03a082 570 }
mbed_official 573:ad23fe03a082 571 else
mbed_official 573:ad23fe03a082 572 {
mbed_official 573:ad23fe03a082 573 return HAL_ERROR;
mbed_official 573:ad23fe03a082 574 }
mbed_official 573:ad23fe03a082 575 }
mbed_official 573:ad23fe03a082 576 return HAL_OK;
mbed_official 573:ad23fe03a082 577 }
mbed_official 573:ad23fe03a082 578
mbed_official 573:ad23fe03a082 579 /**
mbed_official 573:ad23fe03a082 580 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 573:ad23fe03a082 581 * parameters in the RCC_ClkInitStruct.
mbed_official 573:ad23fe03a082 582 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 573:ad23fe03a082 583 * contains the configuration information for the RCC peripheral.
mbed_official 573:ad23fe03a082 584 * @param FLatency: FLASH Latency, this parameter depend on device selected
mbed_official 573:ad23fe03a082 585 *
mbed_official 573:ad23fe03a082 586 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 573:ad23fe03a082 587 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 573:ad23fe03a082 588 *
mbed_official 573:ad23fe03a082 589 * @note The HSI is used (enabled by hardware) as system clock source after
mbed_official 573:ad23fe03a082 590 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 573:ad23fe03a082 591 * of failure of the HSE used directly or indirectly as system clock
mbed_official 573:ad23fe03a082 592 * (if the Clock Security System CSS is enabled).
mbed_official 573:ad23fe03a082 593 *
mbed_official 573:ad23fe03a082 594 * @note A switch from one clock source to another occurs only if the target
mbed_official 573:ad23fe03a082 595 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 573:ad23fe03a082 596 * If a clock source which is not yet ready is selected, the switch will
mbed_official 573:ad23fe03a082 597 * occur when the clock source will be ready.
mbed_official 573:ad23fe03a082 598 * You can use HAL_RCC_GetClockConfig() function to know which clock is
mbed_official 573:ad23fe03a082 599 * currently used as system clock source.
mbed_official 573:ad23fe03a082 600 * @note Depending on the device voltage range, the software has to set correctly
mbed_official 573:ad23fe03a082 601 * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
mbed_official 573:ad23fe03a082 602 * (for more details refer to section above "Initialization/de-initialization functions")
mbed_official 573:ad23fe03a082 603 * @retval None
mbed_official 573:ad23fe03a082 604 */
mbed_official 573:ad23fe03a082 605 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 573:ad23fe03a082 606 {
mbed_official 573:ad23fe03a082 607 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 608
mbed_official 573:ad23fe03a082 609 /* Check the parameters */
mbed_official 573:ad23fe03a082 610 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 573:ad23fe03a082 611 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 573:ad23fe03a082 612
mbed_official 573:ad23fe03a082 613 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 573:ad23fe03a082 614 must be correctly programmed according to the frequency of the CPU clock
mbed_official 573:ad23fe03a082 615 (HCLK) and the supply voltage of the device. */
mbed_official 573:ad23fe03a082 616
mbed_official 573:ad23fe03a082 617 /* Increasing the CPU frequency */
mbed_official 573:ad23fe03a082 618 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 573:ad23fe03a082 619 {
mbed_official 573:ad23fe03a082 620 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 573:ad23fe03a082 621 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 573:ad23fe03a082 622
mbed_official 573:ad23fe03a082 623 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 573:ad23fe03a082 624 memory by reading the FLASH_ACR register */
mbed_official 573:ad23fe03a082 625 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 573:ad23fe03a082 626 {
mbed_official 573:ad23fe03a082 627 return HAL_ERROR;
mbed_official 573:ad23fe03a082 628 }
mbed_official 573:ad23fe03a082 629
mbed_official 573:ad23fe03a082 630 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 573:ad23fe03a082 631 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 573:ad23fe03a082 632 {
mbed_official 573:ad23fe03a082 633 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 573:ad23fe03a082 634 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 573:ad23fe03a082 635 }
mbed_official 573:ad23fe03a082 636
mbed_official 573:ad23fe03a082 637 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 573:ad23fe03a082 638 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 573:ad23fe03a082 639 {
mbed_official 573:ad23fe03a082 640 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 573:ad23fe03a082 641
mbed_official 573:ad23fe03a082 642 /* HSE is selected as System Clock Source */
mbed_official 573:ad23fe03a082 643 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 573:ad23fe03a082 644 {
mbed_official 573:ad23fe03a082 645 /* Check the HSE ready flag */
mbed_official 573:ad23fe03a082 646 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 573:ad23fe03a082 647 {
mbed_official 573:ad23fe03a082 648 return HAL_ERROR;
mbed_official 573:ad23fe03a082 649 }
mbed_official 573:ad23fe03a082 650 }
mbed_official 573:ad23fe03a082 651 /* PLL is selected as System Clock Source */
mbed_official 573:ad23fe03a082 652 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 573:ad23fe03a082 653 {
mbed_official 573:ad23fe03a082 654 /* Check the PLL ready flag */
mbed_official 573:ad23fe03a082 655 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 573:ad23fe03a082 656 {
mbed_official 573:ad23fe03a082 657 return HAL_ERROR;
mbed_official 573:ad23fe03a082 658 }
mbed_official 573:ad23fe03a082 659 }
mbed_official 573:ad23fe03a082 660 /* HSI is selected as System Clock Source */
mbed_official 573:ad23fe03a082 661 else
mbed_official 573:ad23fe03a082 662 {
mbed_official 573:ad23fe03a082 663 /* Check the HSI ready flag */
mbed_official 573:ad23fe03a082 664 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 573:ad23fe03a082 665 {
mbed_official 573:ad23fe03a082 666 return HAL_ERROR;
mbed_official 573:ad23fe03a082 667 }
mbed_official 573:ad23fe03a082 668 }
mbed_official 573:ad23fe03a082 669
mbed_official 573:ad23fe03a082 670 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
mbed_official 573:ad23fe03a082 671 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 672 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 673
mbed_official 573:ad23fe03a082 674 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 573:ad23fe03a082 675 {
mbed_official 573:ad23fe03a082 676 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 573:ad23fe03a082 677 {
mbed_official 573:ad23fe03a082 678 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 679 {
mbed_official 573:ad23fe03a082 680 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 681 }
mbed_official 573:ad23fe03a082 682 }
mbed_official 573:ad23fe03a082 683 }
mbed_official 573:ad23fe03a082 684 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 573:ad23fe03a082 685 {
mbed_official 573:ad23fe03a082 686 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 573:ad23fe03a082 687 {
mbed_official 573:ad23fe03a082 688 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 689 {
mbed_official 573:ad23fe03a082 690 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 691 }
mbed_official 573:ad23fe03a082 692 }
mbed_official 573:ad23fe03a082 693 }
mbed_official 573:ad23fe03a082 694 else
mbed_official 573:ad23fe03a082 695 {
mbed_official 573:ad23fe03a082 696 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 573:ad23fe03a082 697 {
mbed_official 573:ad23fe03a082 698 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 699 {
mbed_official 573:ad23fe03a082 700 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 701 }
mbed_official 573:ad23fe03a082 702 }
mbed_official 573:ad23fe03a082 703 }
mbed_official 573:ad23fe03a082 704 }
mbed_official 573:ad23fe03a082 705 }
mbed_official 573:ad23fe03a082 706 /* Decreasing the CPU frequency */
mbed_official 573:ad23fe03a082 707 else
mbed_official 573:ad23fe03a082 708 {
mbed_official 573:ad23fe03a082 709 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 573:ad23fe03a082 710 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 573:ad23fe03a082 711 {
mbed_official 573:ad23fe03a082 712 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 573:ad23fe03a082 713 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 573:ad23fe03a082 714 }
mbed_official 573:ad23fe03a082 715
mbed_official 573:ad23fe03a082 716 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 573:ad23fe03a082 717 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 573:ad23fe03a082 718 {
mbed_official 573:ad23fe03a082 719 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 573:ad23fe03a082 720
mbed_official 573:ad23fe03a082 721 /* HSE is selected as System Clock Source */
mbed_official 573:ad23fe03a082 722 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 573:ad23fe03a082 723 {
mbed_official 573:ad23fe03a082 724 /* Check the HSE ready flag */
mbed_official 573:ad23fe03a082 725 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 573:ad23fe03a082 726 {
mbed_official 573:ad23fe03a082 727 return HAL_ERROR;
mbed_official 573:ad23fe03a082 728 }
mbed_official 573:ad23fe03a082 729 }
mbed_official 573:ad23fe03a082 730 /* PLL is selected as System Clock Source */
mbed_official 573:ad23fe03a082 731 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 573:ad23fe03a082 732 {
mbed_official 573:ad23fe03a082 733 /* Check the PLL ready flag */
mbed_official 573:ad23fe03a082 734 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 573:ad23fe03a082 735 {
mbed_official 573:ad23fe03a082 736 return HAL_ERROR;
mbed_official 573:ad23fe03a082 737 }
mbed_official 573:ad23fe03a082 738 }
mbed_official 573:ad23fe03a082 739 /* HSI is selected as System Clock Source */
mbed_official 573:ad23fe03a082 740 else
mbed_official 573:ad23fe03a082 741 {
mbed_official 573:ad23fe03a082 742 /* Check the HSI ready flag */
mbed_official 573:ad23fe03a082 743 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 573:ad23fe03a082 744 {
mbed_official 573:ad23fe03a082 745 return HAL_ERROR;
mbed_official 573:ad23fe03a082 746 }
mbed_official 573:ad23fe03a082 747 }
mbed_official 573:ad23fe03a082 748 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
mbed_official 573:ad23fe03a082 749 /* Get Start Tick*/
mbed_official 573:ad23fe03a082 750 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 751
mbed_official 573:ad23fe03a082 752 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 573:ad23fe03a082 753 {
mbed_official 573:ad23fe03a082 754 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 573:ad23fe03a082 755 {
mbed_official 573:ad23fe03a082 756 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 757 {
mbed_official 573:ad23fe03a082 758 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 759 }
mbed_official 573:ad23fe03a082 760 }
mbed_official 573:ad23fe03a082 761 }
mbed_official 573:ad23fe03a082 762 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 573:ad23fe03a082 763 {
mbed_official 573:ad23fe03a082 764 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 573:ad23fe03a082 765 {
mbed_official 573:ad23fe03a082 766 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 767 {
mbed_official 573:ad23fe03a082 768 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 769 }
mbed_official 573:ad23fe03a082 770 }
mbed_official 573:ad23fe03a082 771 }
mbed_official 573:ad23fe03a082 772 else
mbed_official 573:ad23fe03a082 773 {
mbed_official 573:ad23fe03a082 774 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 573:ad23fe03a082 775 {
mbed_official 573:ad23fe03a082 776 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 777 {
mbed_official 573:ad23fe03a082 778 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 779 }
mbed_official 573:ad23fe03a082 780 }
mbed_official 573:ad23fe03a082 781 }
mbed_official 573:ad23fe03a082 782 }
mbed_official 573:ad23fe03a082 783
mbed_official 573:ad23fe03a082 784 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 573:ad23fe03a082 785 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 573:ad23fe03a082 786
mbed_official 573:ad23fe03a082 787 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 573:ad23fe03a082 788 memory by reading the FLASH_ACR register */
mbed_official 573:ad23fe03a082 789 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 573:ad23fe03a082 790 {
mbed_official 573:ad23fe03a082 791 return HAL_ERROR;
mbed_official 573:ad23fe03a082 792 }
mbed_official 573:ad23fe03a082 793 }
mbed_official 573:ad23fe03a082 794
mbed_official 573:ad23fe03a082 795 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 573:ad23fe03a082 796 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 573:ad23fe03a082 797 {
mbed_official 573:ad23fe03a082 798 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 573:ad23fe03a082 799 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 573:ad23fe03a082 800 }
mbed_official 573:ad23fe03a082 801
mbed_official 573:ad23fe03a082 802 /*-------------------------- PCLK2 Configuration ---------------------------*/
mbed_official 573:ad23fe03a082 803 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official 573:ad23fe03a082 804 {
mbed_official 573:ad23fe03a082 805 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official 573:ad23fe03a082 806 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official 573:ad23fe03a082 807 }
mbed_official 573:ad23fe03a082 808
mbed_official 573:ad23fe03a082 809 /* Configure the source of time base considering new system clocks settings*/
mbed_official 573:ad23fe03a082 810 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 573:ad23fe03a082 811
mbed_official 573:ad23fe03a082 812 return HAL_OK;
mbed_official 573:ad23fe03a082 813 }
mbed_official 573:ad23fe03a082 814
mbed_official 573:ad23fe03a082 815 /**
mbed_official 573:ad23fe03a082 816 * @}
mbed_official 573:ad23fe03a082 817 */
mbed_official 573:ad23fe03a082 818
mbed_official 573:ad23fe03a082 819 /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official 573:ad23fe03a082 820 * @brief RCC clocks control functions
mbed_official 573:ad23fe03a082 821 *
mbed_official 573:ad23fe03a082 822 @verbatim
mbed_official 573:ad23fe03a082 823 ===============================================================================
mbed_official 573:ad23fe03a082 824 ##### Peripheral Control functions #####
mbed_official 573:ad23fe03a082 825 ===============================================================================
mbed_official 573:ad23fe03a082 826 [..]
mbed_official 573:ad23fe03a082 827 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 573:ad23fe03a082 828 frequencies.
mbed_official 573:ad23fe03a082 829
mbed_official 573:ad23fe03a082 830 @endverbatim
mbed_official 573:ad23fe03a082 831 * @{
mbed_official 573:ad23fe03a082 832 */
mbed_official 573:ad23fe03a082 833
mbed_official 573:ad23fe03a082 834 /**
mbed_official 573:ad23fe03a082 835 * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
mbed_official 573:ad23fe03a082 836 * @note PA8/PC9 should be configured in alternate function mode.
mbed_official 573:ad23fe03a082 837 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 573:ad23fe03a082 838 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 839 * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
mbed_official 573:ad23fe03a082 840 * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
mbed_official 573:ad23fe03a082 841 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 573:ad23fe03a082 842 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 843 * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
mbed_official 573:ad23fe03a082 844 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
mbed_official 573:ad23fe03a082 845 * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
mbed_official 573:ad23fe03a082 846 * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
mbed_official 573:ad23fe03a082 847 * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
mbed_official 573:ad23fe03a082 848 * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source
mbed_official 573:ad23fe03a082 849 * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
mbed_official 573:ad23fe03a082 850 * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
mbed_official 573:ad23fe03a082 851 * @param RCC_MCODiv: specifies the MCOx prescaler.
mbed_official 573:ad23fe03a082 852 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 853 * @arg RCC_MCODIV_1: no division applied to MCOx clock
mbed_official 573:ad23fe03a082 854 * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
mbed_official 573:ad23fe03a082 855 * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
mbed_official 573:ad23fe03a082 856 * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
mbed_official 573:ad23fe03a082 857 * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
mbed_official 573:ad23fe03a082 858 * @retval None
mbed_official 573:ad23fe03a082 859 */
mbed_official 573:ad23fe03a082 860 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 573:ad23fe03a082 861 {
mbed_official 573:ad23fe03a082 862 GPIO_InitTypeDef GPIO_InitStruct;
mbed_official 573:ad23fe03a082 863 /* Check the parameters */
mbed_official 573:ad23fe03a082 864 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 573:ad23fe03a082 865 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 573:ad23fe03a082 866 /* RCC_MCO1 */
mbed_official 573:ad23fe03a082 867 if(RCC_MCOx == RCC_MCO1)
mbed_official 573:ad23fe03a082 868 {
mbed_official 573:ad23fe03a082 869 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 573:ad23fe03a082 870
mbed_official 573:ad23fe03a082 871 /* MCO1 Clock Enable */
mbed_official 573:ad23fe03a082 872 MCO1_CLK_ENABLE();
mbed_official 573:ad23fe03a082 873
mbed_official 573:ad23fe03a082 874 /* Configure the MCO1 pin in alternate function mode */
mbed_official 573:ad23fe03a082 875 GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official 573:ad23fe03a082 876 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 573:ad23fe03a082 877 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 573:ad23fe03a082 878 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 573:ad23fe03a082 879 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 573:ad23fe03a082 880 HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official 573:ad23fe03a082 881
mbed_official 573:ad23fe03a082 882 /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official 573:ad23fe03a082 883 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
mbed_official 573:ad23fe03a082 884 }
mbed_official 573:ad23fe03a082 885 else
mbed_official 573:ad23fe03a082 886 {
mbed_official 573:ad23fe03a082 887 assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
mbed_official 573:ad23fe03a082 888
mbed_official 573:ad23fe03a082 889 /* MCO2 Clock Enable */
mbed_official 573:ad23fe03a082 890 MCO2_CLK_ENABLE();
mbed_official 573:ad23fe03a082 891
mbed_official 573:ad23fe03a082 892 /* Configure the MCO2 pin in alternate function mode */
mbed_official 573:ad23fe03a082 893 GPIO_InitStruct.Pin = MCO2_PIN;
mbed_official 573:ad23fe03a082 894 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 573:ad23fe03a082 895 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 573:ad23fe03a082 896 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 573:ad23fe03a082 897 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 573:ad23fe03a082 898 HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
mbed_official 573:ad23fe03a082 899
mbed_official 573:ad23fe03a082 900 /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
mbed_official 573:ad23fe03a082 901 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3)));
mbed_official 573:ad23fe03a082 902 }
mbed_official 573:ad23fe03a082 903 }
mbed_official 573:ad23fe03a082 904
mbed_official 573:ad23fe03a082 905 /**
mbed_official 573:ad23fe03a082 906 * @brief Enables the Clock Security System.
mbed_official 573:ad23fe03a082 907 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 573:ad23fe03a082 908 * is automatically disabled and an interrupt is generated to inform the
mbed_official 573:ad23fe03a082 909 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 573:ad23fe03a082 910 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 573:ad23fe03a082 911 * the Cortex-M7 NMI (Non-Maskable Interrupt) exception vector.
mbed_official 573:ad23fe03a082 912 * @retval None
mbed_official 573:ad23fe03a082 913 */
mbed_official 573:ad23fe03a082 914 void HAL_RCC_EnableCSS(void)
mbed_official 573:ad23fe03a082 915 {
mbed_official 573:ad23fe03a082 916 SET_BIT(RCC->CR, RCC_CR_CSSON);
mbed_official 573:ad23fe03a082 917 }
mbed_official 573:ad23fe03a082 918
mbed_official 573:ad23fe03a082 919 /**
mbed_official 573:ad23fe03a082 920 * @brief Disables the Clock Security System.
mbed_official 573:ad23fe03a082 921 * @retval None
mbed_official 573:ad23fe03a082 922 */
mbed_official 573:ad23fe03a082 923 void HAL_RCC_DisableCSS(void)
mbed_official 573:ad23fe03a082 924 {
mbed_official 573:ad23fe03a082 925 CLEAR_BIT(RCC->CR, RCC_CR_CSSON);
mbed_official 573:ad23fe03a082 926 }
mbed_official 573:ad23fe03a082 927
mbed_official 573:ad23fe03a082 928 /**
mbed_official 573:ad23fe03a082 929 * @brief Returns the SYSCLK frequency
mbed_official 573:ad23fe03a082 930 *
mbed_official 573:ad23fe03a082 931 * @note The system frequency computed by this function is not the real
mbed_official 573:ad23fe03a082 932 * frequency in the chip. It is calculated based on the predefined
mbed_official 573:ad23fe03a082 933 * constant and the selected clock source:
mbed_official 573:ad23fe03a082 934 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 573:ad23fe03a082 935 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official 573:ad23fe03a082 936 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official 573:ad23fe03a082 937 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 573:ad23fe03a082 938 * @note (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
mbed_official 573:ad23fe03a082 939 * 16 MHz) but the real value may vary depending on the variations
mbed_official 573:ad23fe03a082 940 * in voltage and temperature.
mbed_official 573:ad23fe03a082 941 * @note (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
mbed_official 573:ad23fe03a082 942 * 25 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 573:ad23fe03a082 943 * frequency of the crystal used. Otherwise, this function may
mbed_official 573:ad23fe03a082 944 * have wrong result.
mbed_official 573:ad23fe03a082 945 *
mbed_official 573:ad23fe03a082 946 * @note The result of this function could be not correct when using fractional
mbed_official 573:ad23fe03a082 947 * value for HSE crystal.
mbed_official 573:ad23fe03a082 948 *
mbed_official 573:ad23fe03a082 949 * @note This function can be used by the user application to compute the
mbed_official 573:ad23fe03a082 950 * baudrate for the communication peripherals or configure other parameters.
mbed_official 573:ad23fe03a082 951 *
mbed_official 573:ad23fe03a082 952 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 573:ad23fe03a082 953 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 573:ad23fe03a082 954 *
mbed_official 573:ad23fe03a082 955 *
mbed_official 573:ad23fe03a082 956 * @retval SYSCLK frequency
mbed_official 573:ad23fe03a082 957 */
mbed_official 573:ad23fe03a082 958 uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 573:ad23fe03a082 959 {
mbed_official 573:ad23fe03a082 960 uint32_t pllm = 0, pllvco = 0, pllp = 0;
mbed_official 573:ad23fe03a082 961 uint32_t sysclockfreq = 0;
mbed_official 573:ad23fe03a082 962
mbed_official 573:ad23fe03a082 963 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 573:ad23fe03a082 964 switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official 573:ad23fe03a082 965 {
mbed_official 573:ad23fe03a082 966 case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
mbed_official 573:ad23fe03a082 967 {
mbed_official 573:ad23fe03a082 968 sysclockfreq = HSI_VALUE;
mbed_official 573:ad23fe03a082 969 break;
mbed_official 573:ad23fe03a082 970 }
mbed_official 573:ad23fe03a082 971 case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
mbed_official 573:ad23fe03a082 972 {
mbed_official 573:ad23fe03a082 973 sysclockfreq = HSE_VALUE;
mbed_official 573:ad23fe03a082 974 break;
mbed_official 573:ad23fe03a082 975 }
mbed_official 573:ad23fe03a082 976 case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */
mbed_official 573:ad23fe03a082 977 {
mbed_official 573:ad23fe03a082 978 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
mbed_official 573:ad23fe03a082 979 SYSCLK = PLL_VCO / PLLP */
mbed_official 573:ad23fe03a082 980 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 573:ad23fe03a082 981 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI)
mbed_official 573:ad23fe03a082 982 {
mbed_official 573:ad23fe03a082 983 /* HSE used as PLL clock source */
mbed_official 573:ad23fe03a082 984 pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 573:ad23fe03a082 985 }
mbed_official 573:ad23fe03a082 986 else
mbed_official 573:ad23fe03a082 987 {
mbed_official 573:ad23fe03a082 988 /* HSI used as PLL clock source */
mbed_official 573:ad23fe03a082 989 pllvco = ((HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 573:ad23fe03a082 990 }
mbed_official 573:ad23fe03a082 991 pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> POSITION_VAL(RCC_PLLCFGR_PLLP)) + 1 ) *2);
mbed_official 573:ad23fe03a082 992
mbed_official 573:ad23fe03a082 993 sysclockfreq = pllvco/pllp;
mbed_official 573:ad23fe03a082 994 break;
mbed_official 573:ad23fe03a082 995 }
mbed_official 573:ad23fe03a082 996 default:
mbed_official 573:ad23fe03a082 997 {
mbed_official 573:ad23fe03a082 998 sysclockfreq = HSI_VALUE;
mbed_official 573:ad23fe03a082 999 break;
mbed_official 573:ad23fe03a082 1000 }
mbed_official 573:ad23fe03a082 1001 }
mbed_official 573:ad23fe03a082 1002 return sysclockfreq;
mbed_official 573:ad23fe03a082 1003 }
mbed_official 573:ad23fe03a082 1004
mbed_official 573:ad23fe03a082 1005 /**
mbed_official 573:ad23fe03a082 1006 * @brief Returns the HCLK frequency
mbed_official 573:ad23fe03a082 1007 * @note Each time HCLK changes, this function must be called to update the
mbed_official 573:ad23fe03a082 1008 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 573:ad23fe03a082 1009 *
mbed_official 573:ad23fe03a082 1010 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 573:ad23fe03a082 1011 * and updated within this function
mbed_official 573:ad23fe03a082 1012 * @retval HCLK frequency
mbed_official 573:ad23fe03a082 1013 */
mbed_official 573:ad23fe03a082 1014 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 573:ad23fe03a082 1015 {
mbed_official 573:ad23fe03a082 1016 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
mbed_official 573:ad23fe03a082 1017 return SystemCoreClock;
mbed_official 573:ad23fe03a082 1018 }
mbed_official 573:ad23fe03a082 1019
mbed_official 573:ad23fe03a082 1020 /**
mbed_official 573:ad23fe03a082 1021 * @brief Returns the PCLK1 frequency
mbed_official 573:ad23fe03a082 1022 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 573:ad23fe03a082 1023 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 573:ad23fe03a082 1024 * @retval PCLK1 frequency
mbed_official 573:ad23fe03a082 1025 */
mbed_official 573:ad23fe03a082 1026 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 573:ad23fe03a082 1027 {
mbed_official 573:ad23fe03a082 1028 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official 573:ad23fe03a082 1029 return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
mbed_official 573:ad23fe03a082 1030 }
mbed_official 573:ad23fe03a082 1031
mbed_official 573:ad23fe03a082 1032 /**
mbed_official 573:ad23fe03a082 1033 * @brief Returns the PCLK2 frequency
mbed_official 573:ad23fe03a082 1034 * @note Each time PCLK2 changes, this function must be called to update the
mbed_official 573:ad23fe03a082 1035 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 573:ad23fe03a082 1036 * @retval PCLK2 frequency
mbed_official 573:ad23fe03a082 1037 */
mbed_official 573:ad23fe03a082 1038 uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official 573:ad23fe03a082 1039 {
mbed_official 573:ad23fe03a082 1040 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
mbed_official 573:ad23fe03a082 1041 return (HAL_RCC_GetHCLKFreq()>> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
mbed_official 573:ad23fe03a082 1042 }
mbed_official 573:ad23fe03a082 1043
mbed_official 573:ad23fe03a082 1044 /**
mbed_official 573:ad23fe03a082 1045 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 573:ad23fe03a082 1046 * RCC configuration registers.
mbed_official 573:ad23fe03a082 1047 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 573:ad23fe03a082 1048 * will be configured.
mbed_official 573:ad23fe03a082 1049 * @retval None
mbed_official 573:ad23fe03a082 1050 */
mbed_official 573:ad23fe03a082 1051 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 573:ad23fe03a082 1052 {
mbed_official 573:ad23fe03a082 1053 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 573:ad23fe03a082 1054 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
mbed_official 573:ad23fe03a082 1055
mbed_official 573:ad23fe03a082 1056 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 1057 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 573:ad23fe03a082 1058 {
mbed_official 573:ad23fe03a082 1059 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 573:ad23fe03a082 1060 }
mbed_official 573:ad23fe03a082 1061 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 573:ad23fe03a082 1062 {
mbed_official 573:ad23fe03a082 1063 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 573:ad23fe03a082 1064 }
mbed_official 573:ad23fe03a082 1065 else
mbed_official 573:ad23fe03a082 1066 {
mbed_official 573:ad23fe03a082 1067 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 573:ad23fe03a082 1068 }
mbed_official 573:ad23fe03a082 1069
mbed_official 573:ad23fe03a082 1070 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 1071 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 573:ad23fe03a082 1072 {
mbed_official 573:ad23fe03a082 1073 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 573:ad23fe03a082 1074 }
mbed_official 573:ad23fe03a082 1075 else
mbed_official 573:ad23fe03a082 1076 {
mbed_official 573:ad23fe03a082 1077 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 573:ad23fe03a082 1078 }
mbed_official 573:ad23fe03a082 1079
mbed_official 573:ad23fe03a082 1080 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> POSITION_VAL(RCC_CR_HSITRIM));
mbed_official 573:ad23fe03a082 1081
mbed_official 573:ad23fe03a082 1082 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 1083 if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
mbed_official 573:ad23fe03a082 1084 {
mbed_official 573:ad23fe03a082 1085 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 573:ad23fe03a082 1086 }
mbed_official 573:ad23fe03a082 1087 else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
mbed_official 573:ad23fe03a082 1088 {
mbed_official 573:ad23fe03a082 1089 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 573:ad23fe03a082 1090 }
mbed_official 573:ad23fe03a082 1091 else
mbed_official 573:ad23fe03a082 1092 {
mbed_official 573:ad23fe03a082 1093 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 573:ad23fe03a082 1094 }
mbed_official 573:ad23fe03a082 1095
mbed_official 573:ad23fe03a082 1096 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 1097 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 573:ad23fe03a082 1098 {
mbed_official 573:ad23fe03a082 1099 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 573:ad23fe03a082 1100 }
mbed_official 573:ad23fe03a082 1101 else
mbed_official 573:ad23fe03a082 1102 {
mbed_official 573:ad23fe03a082 1103 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 573:ad23fe03a082 1104 }
mbed_official 573:ad23fe03a082 1105
mbed_official 573:ad23fe03a082 1106 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 573:ad23fe03a082 1107 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 573:ad23fe03a082 1108 {
mbed_official 573:ad23fe03a082 1109 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 573:ad23fe03a082 1110 }
mbed_official 573:ad23fe03a082 1111 else
mbed_official 573:ad23fe03a082 1112 {
mbed_official 573:ad23fe03a082 1113 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 573:ad23fe03a082 1114 }
mbed_official 573:ad23fe03a082 1115 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official 573:ad23fe03a082 1116 RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
mbed_official 573:ad23fe03a082 1117 RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN));
mbed_official 573:ad23fe03a082 1118 RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1) >> POSITION_VAL(RCC_PLLCFGR_PLLP));
mbed_official 573:ad23fe03a082 1119 RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> POSITION_VAL(RCC_PLLCFGR_PLLQ));
mbed_official 573:ad23fe03a082 1120 }
mbed_official 573:ad23fe03a082 1121
mbed_official 573:ad23fe03a082 1122 /**
mbed_official 573:ad23fe03a082 1123 * @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official 573:ad23fe03a082 1124 * RCC configuration registers.
mbed_official 573:ad23fe03a082 1125 * @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 573:ad23fe03a082 1126 * will be configured.
mbed_official 573:ad23fe03a082 1127 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 573:ad23fe03a082 1128 * @retval None
mbed_official 573:ad23fe03a082 1129 */
mbed_official 573:ad23fe03a082 1130 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 573:ad23fe03a082 1131 {
mbed_official 573:ad23fe03a082 1132 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 573:ad23fe03a082 1133 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
mbed_official 573:ad23fe03a082 1134
mbed_official 573:ad23fe03a082 1135 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 573:ad23fe03a082 1136 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 573:ad23fe03a082 1137
mbed_official 573:ad23fe03a082 1138 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 573:ad23fe03a082 1139 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 573:ad23fe03a082 1140
mbed_official 573:ad23fe03a082 1141 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 573:ad23fe03a082 1142 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official 573:ad23fe03a082 1143
mbed_official 573:ad23fe03a082 1144 /* Get the APB2 configuration ----------------------------------------------*/
mbed_official 573:ad23fe03a082 1145 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official 573:ad23fe03a082 1146
mbed_official 573:ad23fe03a082 1147 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 573:ad23fe03a082 1148 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 573:ad23fe03a082 1149 }
mbed_official 573:ad23fe03a082 1150
mbed_official 573:ad23fe03a082 1151 /**
mbed_official 573:ad23fe03a082 1152 * @brief This function handles the RCC CSS interrupt request.
mbed_official 573:ad23fe03a082 1153 * @note This API should be called under the NMI_Handler().
mbed_official 573:ad23fe03a082 1154 * @retval None
mbed_official 573:ad23fe03a082 1155 */
mbed_official 573:ad23fe03a082 1156 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 573:ad23fe03a082 1157 {
mbed_official 573:ad23fe03a082 1158 /* Check RCC CSSF flag */
mbed_official 573:ad23fe03a082 1159 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 573:ad23fe03a082 1160 {
mbed_official 573:ad23fe03a082 1161 /* RCC Clock Security System interrupt user callback */
mbed_official 573:ad23fe03a082 1162 HAL_RCC_CSSCallback();
mbed_official 573:ad23fe03a082 1163
mbed_official 573:ad23fe03a082 1164 /* Clear RCC CSS pending bit */
mbed_official 573:ad23fe03a082 1165 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 573:ad23fe03a082 1166 }
mbed_official 573:ad23fe03a082 1167 }
mbed_official 573:ad23fe03a082 1168
mbed_official 573:ad23fe03a082 1169 /**
mbed_official 573:ad23fe03a082 1170 * @brief RCC Clock Security System interrupt callback
mbed_official 573:ad23fe03a082 1171 * @retval None
mbed_official 573:ad23fe03a082 1172 */
mbed_official 573:ad23fe03a082 1173 __weak void HAL_RCC_CSSCallback(void)
mbed_official 573:ad23fe03a082 1174 {
mbed_official 573:ad23fe03a082 1175 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1176 the HAL_RCC_CSSCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1177 */
mbed_official 573:ad23fe03a082 1178 }
mbed_official 573:ad23fe03a082 1179
mbed_official 573:ad23fe03a082 1180 /**
mbed_official 573:ad23fe03a082 1181 * @}
mbed_official 573:ad23fe03a082 1182 */
mbed_official 573:ad23fe03a082 1183
mbed_official 573:ad23fe03a082 1184 /**
mbed_official 573:ad23fe03a082 1185 * @}
mbed_official 573:ad23fe03a082 1186 */
mbed_official 573:ad23fe03a082 1187
mbed_official 573:ad23fe03a082 1188 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 1189 /**
mbed_official 573:ad23fe03a082 1190 * @}
mbed_official 573:ad23fe03a082 1191 */
mbed_official 573:ad23fe03a082 1192
mbed_official 573:ad23fe03a082 1193 /**
mbed_official 573:ad23fe03a082 1194 * @}
mbed_official 573:ad23fe03a082 1195 */
mbed_official 573:ad23fe03a082 1196
mbed_official 573:ad23fe03a082 1197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/