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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_qspi.h@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_qspi.h
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief Header file of QSPI HAL module.
mbed_official 573:ad23fe03a082 8 ******************************************************************************
mbed_official 573:ad23fe03a082 9 * @attention
mbed_official 573:ad23fe03a082 10 *
mbed_official 573:ad23fe03a082 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 12 *
mbed_official 573:ad23fe03a082 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 14 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 16 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 19 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 21 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 22 * without specific prior written permission.
mbed_official 573:ad23fe03a082 23 *
mbed_official 573:ad23fe03a082 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 34 *
mbed_official 573:ad23fe03a082 35 ******************************************************************************
mbed_official 573:ad23fe03a082 36 */
mbed_official 573:ad23fe03a082 37
mbed_official 573:ad23fe03a082 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 573:ad23fe03a082 39 #ifndef __STM32F7xx_HAL_QSPI_H
mbed_official 573:ad23fe03a082 40 #define __STM32F7xx_HAL_QSPI_H
mbed_official 573:ad23fe03a082 41
mbed_official 573:ad23fe03a082 42 #ifdef __cplusplus
mbed_official 573:ad23fe03a082 43 extern "C" {
mbed_official 573:ad23fe03a082 44 #endif
mbed_official 573:ad23fe03a082 45
mbed_official 573:ad23fe03a082 46 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 47 #include "stm32f7xx_hal_def.h"
mbed_official 573:ad23fe03a082 48
mbed_official 573:ad23fe03a082 49 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 50 * @{
mbed_official 573:ad23fe03a082 51 */
mbed_official 573:ad23fe03a082 52
mbed_official 573:ad23fe03a082 53 /** @addtogroup QSPI
mbed_official 573:ad23fe03a082 54 * @{
mbed_official 573:ad23fe03a082 55 */
mbed_official 573:ad23fe03a082 56
mbed_official 573:ad23fe03a082 57 /* Exported types ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 58 /** @defgroup QSPI_Exported_Types QSPI Exported Types
mbed_official 573:ad23fe03a082 59 * @{
mbed_official 573:ad23fe03a082 60 */
mbed_official 573:ad23fe03a082 61
mbed_official 573:ad23fe03a082 62 /**
mbed_official 573:ad23fe03a082 63 * @brief QSPI Init structure definition
mbed_official 573:ad23fe03a082 64 */
mbed_official 573:ad23fe03a082 65
mbed_official 573:ad23fe03a082 66 typedef struct
mbed_official 573:ad23fe03a082 67 {
mbed_official 573:ad23fe03a082 68 uint32_t ClockPrescaler; /* Specifies the prescaler factor for generating clock based on the AHB clock.
mbed_official 573:ad23fe03a082 69 This parameter can be a number between 0 and 255 */
mbed_official 573:ad23fe03a082 70
mbed_official 573:ad23fe03a082 71 uint32_t FifoThreshold; /* Specifies the threshold number of bytes in the FIFO (used only in indirect mode)
mbed_official 573:ad23fe03a082 72 This parameter can be a value between 1 and 32 */
mbed_official 573:ad23fe03a082 73
mbed_official 573:ad23fe03a082 74 uint32_t SampleShifting; /* Specifies the Sample Shift. The data is sampled 1/2 clock cycle delay later to
mbed_official 573:ad23fe03a082 75 take in account external signal delays. (It should be QSPI_SAMPLE_SHIFTING_NONE in DDR mode)
mbed_official 573:ad23fe03a082 76 This parameter can be a value of @ref QSPI_SampleShifting */
mbed_official 573:ad23fe03a082 77
mbed_official 573:ad23fe03a082 78 uint32_t FlashSize; /* Specifies the Flash Size. FlashSize+1 is effectively the number of address bits
mbed_official 573:ad23fe03a082 79 required to address the flash memory. The flash capacity can be up to 4GB
mbed_official 573:ad23fe03a082 80 (addressed using 32 bits) in indirect mode, but the addressable space in
mbed_official 573:ad23fe03a082 81 memory-mapped mode is limited to 256MB
mbed_official 573:ad23fe03a082 82 This parameter can be a number between 0 and 31 */
mbed_official 573:ad23fe03a082 83
mbed_official 573:ad23fe03a082 84 uint32_t ChipSelectHighTime; /* Specifies the Chip Select High Time. ChipSelectHighTime+1 defines the minimum number
mbed_official 573:ad23fe03a082 85 of clock cycles which the chip select must remain high between commands.
mbed_official 573:ad23fe03a082 86 This parameter can be a value of @ref QSPI_ChipSelectHighTime */
mbed_official 573:ad23fe03a082 87
mbed_official 573:ad23fe03a082 88 uint32_t ClockMode; /* Specifies the Clock Mode. It indicates the level that clock takes between commands.
mbed_official 573:ad23fe03a082 89 This parameter can be a value of @ref QSPI_ClockMode */
mbed_official 573:ad23fe03a082 90
mbed_official 573:ad23fe03a082 91 uint32_t FlashID; /* Specifies the Flash which will be used,
mbed_official 573:ad23fe03a082 92 This parameter can be a value of @ref QSPI_Flash_Select */
mbed_official 573:ad23fe03a082 93
mbed_official 573:ad23fe03a082 94 uint32_t DualFlash; /* Specifies the Dual Flash Mode State
mbed_official 573:ad23fe03a082 95 This parameter can be a value of @ref QSPI_DualFlash_Mode */
mbed_official 573:ad23fe03a082 96 }QSPI_InitTypeDef;
mbed_official 573:ad23fe03a082 97
mbed_official 573:ad23fe03a082 98 /**
mbed_official 573:ad23fe03a082 99 * @brief HAL QSPI State structures definition
mbed_official 573:ad23fe03a082 100 */
mbed_official 573:ad23fe03a082 101 typedef enum
mbed_official 573:ad23fe03a082 102 {
mbed_official 573:ad23fe03a082 103 HAL_QSPI_STATE_RESET = 0x00, /*!< Peripheral not initialized */
mbed_official 573:ad23fe03a082 104 HAL_QSPI_STATE_READY = 0x01, /*!< Peripheral initialized and ready for use */
mbed_official 573:ad23fe03a082 105 HAL_QSPI_STATE_BUSY = 0x02, /*!< Peripheral in indirect mode and busy */
mbed_official 573:ad23fe03a082 106 HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /*!< Peripheral in indirect mode with transmission ongoing */
mbed_official 573:ad23fe03a082 107 HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /*!< Peripheral in indirect mode with reception ongoing */
mbed_official 573:ad23fe03a082 108 HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42, /*!< Peripheral in auto polling mode ongoing */
mbed_official 573:ad23fe03a082 109 HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82, /*!< Peripheral in memory mapped mode ongoing */
mbed_official 573:ad23fe03a082 110 HAL_QSPI_STATE_ERROR = 0x04 /*!< Peripheral in error */
mbed_official 573:ad23fe03a082 111 }HAL_QSPI_StateTypeDef;
mbed_official 573:ad23fe03a082 112
mbed_official 573:ad23fe03a082 113 /**
mbed_official 573:ad23fe03a082 114 * @brief QSPI Handle Structure definition
mbed_official 573:ad23fe03a082 115 */
mbed_official 573:ad23fe03a082 116 typedef struct
mbed_official 573:ad23fe03a082 117 {
mbed_official 573:ad23fe03a082 118 QUADSPI_TypeDef *Instance; /* QSPI registers base address */
mbed_official 573:ad23fe03a082 119 QSPI_InitTypeDef Init; /* QSPI communication parameters */
mbed_official 573:ad23fe03a082 120 uint8_t *pTxBuffPtr; /* Pointer to QSPI Tx transfer Buffer */
mbed_official 573:ad23fe03a082 121 __IO uint16_t TxXferSize; /* QSPI Tx Transfer size */
mbed_official 573:ad23fe03a082 122 __IO uint16_t TxXferCount; /* QSPI Tx Transfer Counter */
mbed_official 573:ad23fe03a082 123 uint8_t *pRxBuffPtr; /* Pointer to QSPI Rx transfer Buffer */
mbed_official 573:ad23fe03a082 124 __IO uint16_t RxXferSize; /* QSPI Rx Transfer size */
mbed_official 573:ad23fe03a082 125 __IO uint16_t RxXferCount; /* QSPI Rx Transfer Counter */
mbed_official 573:ad23fe03a082 126 DMA_HandleTypeDef *hdma; /* QSPI Rx/Tx DMA Handle parameters */
mbed_official 573:ad23fe03a082 127 __IO HAL_LockTypeDef Lock; /* Locking object */
mbed_official 573:ad23fe03a082 128 __IO HAL_QSPI_StateTypeDef State; /* QSPI communication state */
mbed_official 573:ad23fe03a082 129 __IO uint32_t ErrorCode; /* QSPI Error code */
mbed_official 573:ad23fe03a082 130 uint32_t Timeout; /* Timeout for the QSPI memory access */
mbed_official 573:ad23fe03a082 131 }QSPI_HandleTypeDef;
mbed_official 573:ad23fe03a082 132
mbed_official 573:ad23fe03a082 133 /**
mbed_official 573:ad23fe03a082 134 * @brief QSPI Command structure definition
mbed_official 573:ad23fe03a082 135 */
mbed_official 573:ad23fe03a082 136 typedef struct
mbed_official 573:ad23fe03a082 137 {
mbed_official 573:ad23fe03a082 138 uint32_t Instruction; /* Specifies the Instruction to be sent
mbed_official 573:ad23fe03a082 139 This parameter can be a value (8-bit) between 0x00 and 0xFF */
mbed_official 573:ad23fe03a082 140 uint32_t Address; /* Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize)
mbed_official 573:ad23fe03a082 141 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
mbed_official 573:ad23fe03a082 142 uint32_t AlternateBytes; /* Specifies the Alternate Bytes to be sent (Size from 1 to 4 bytes according AlternateBytesSize)
mbed_official 573:ad23fe03a082 143 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
mbed_official 573:ad23fe03a082 144 uint32_t AddressSize; /* Specifies the Address Size
mbed_official 573:ad23fe03a082 145 This parameter can be a value of @ref QSPI_AddressSize */
mbed_official 573:ad23fe03a082 146 uint32_t AlternateBytesSize; /* Specifies the Alternate Bytes Size
mbed_official 573:ad23fe03a082 147 This parameter can be a value of @ref QSPI_AlternateBytesSize */
mbed_official 573:ad23fe03a082 148 uint32_t DummyCycles; /* Specifies the Number of Dummy Cycles.
mbed_official 573:ad23fe03a082 149 This parameter can be a number between 0 and 31 */
mbed_official 573:ad23fe03a082 150 uint32_t InstructionMode; /* Specifies the Instruction Mode
mbed_official 573:ad23fe03a082 151 This parameter can be a value of @ref QSPI_InstructionMode */
mbed_official 573:ad23fe03a082 152 uint32_t AddressMode; /* Specifies the Address Mode
mbed_official 573:ad23fe03a082 153 This parameter can be a value of @ref QSPI_AddressMode */
mbed_official 573:ad23fe03a082 154 uint32_t AlternateByteMode; /* Specifies the Alternate Bytes Mode
mbed_official 573:ad23fe03a082 155 This parameter can be a value of @ref QSPI_AlternateBytesMode */
mbed_official 573:ad23fe03a082 156 uint32_t DataMode; /* Specifies the Data Mode (used for dummy cycles and data phases)
mbed_official 573:ad23fe03a082 157 This parameter can be a value of @ref QSPI_DataMode */
mbed_official 573:ad23fe03a082 158 uint32_t NbData; /* Specifies the number of data to transfer.
mbed_official 573:ad23fe03a082 159 This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length
mbed_official 573:ad23fe03a082 160 until end of memory)*/
mbed_official 573:ad23fe03a082 161 uint32_t DdrMode; /* Specifies the double data rate mode for address, alternate byte and data phase
mbed_official 573:ad23fe03a082 162 This parameter can be a value of @ref QSPI_DdrMode */
mbed_official 573:ad23fe03a082 163 uint32_t DdrHoldHalfCycle; /* Specifies the DDR hold half cycle. It delays the data output by one half of
mbed_official 573:ad23fe03a082 164 system clock in DDR mode.
mbed_official 573:ad23fe03a082 165 This parameter can be a value of @ref QSPI_DdrHoldHalfCycle */
mbed_official 573:ad23fe03a082 166 uint32_t SIOOMode; /* Specifies the send instruction only once mode
mbed_official 573:ad23fe03a082 167 This parameter can be a value of @ref QSPI_SIOOMode */
mbed_official 573:ad23fe03a082 168 }QSPI_CommandTypeDef;
mbed_official 573:ad23fe03a082 169
mbed_official 573:ad23fe03a082 170 /**
mbed_official 573:ad23fe03a082 171 * @brief QSPI Auto Polling mode configuration structure definition
mbed_official 573:ad23fe03a082 172 */
mbed_official 573:ad23fe03a082 173 typedef struct
mbed_official 573:ad23fe03a082 174 {
mbed_official 573:ad23fe03a082 175 uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match.
mbed_official 573:ad23fe03a082 176 This parameter can be any value between 0 and 0xFFFFFFFF */
mbed_official 573:ad23fe03a082 177 uint32_t Mask; /* Specifies the mask to be applied to the status bytes received.
mbed_official 573:ad23fe03a082 178 This parameter can be any value between 0 and 0xFFFFFFFF */
mbed_official 573:ad23fe03a082 179 uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases.
mbed_official 573:ad23fe03a082 180 This parameter can be any value between 0 and 0xFFFF */
mbed_official 573:ad23fe03a082 181 uint32_t StatusBytesSize; /* Specifies the size of the status bytes received.
mbed_official 573:ad23fe03a082 182 This parameter can be any value between 1 and 4 */
mbed_official 573:ad23fe03a082 183 uint32_t MatchMode; /* Specifies the method used for determining a match.
mbed_official 573:ad23fe03a082 184 This parameter can be a value of @ref QSPI_MatchMode */
mbed_official 573:ad23fe03a082 185 uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match.
mbed_official 573:ad23fe03a082 186 This parameter can be a value of @ref QSPI_AutomaticStop */
mbed_official 573:ad23fe03a082 187 }QSPI_AutoPollingTypeDef;
mbed_official 573:ad23fe03a082 188
mbed_official 573:ad23fe03a082 189 /**
mbed_official 573:ad23fe03a082 190 * @brief QSPI Memory Mapped mode configuration structure definition
mbed_official 573:ad23fe03a082 191 */
mbed_official 573:ad23fe03a082 192 typedef struct
mbed_official 573:ad23fe03a082 193 {
mbed_official 573:ad23fe03a082 194 uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select.
mbed_official 573:ad23fe03a082 195 This parameter can be any value between 0 and 0xFFFF */
mbed_official 573:ad23fe03a082 196 uint32_t TimeOutActivation; /* Specifies if the time out counter is enabled to release the chip select.
mbed_official 573:ad23fe03a082 197 This parameter can be a value of @ref QSPI_TimeOutActivation */
mbed_official 573:ad23fe03a082 198 }QSPI_MemoryMappedTypeDef;
mbed_official 573:ad23fe03a082 199 /**
mbed_official 573:ad23fe03a082 200 * @}
mbed_official 573:ad23fe03a082 201 */
mbed_official 573:ad23fe03a082 202
mbed_official 573:ad23fe03a082 203 /* Exported constants --------------------------------------------------------*/
mbed_official 573:ad23fe03a082 204 /** @defgroup QSPI_Exported_Constants QSPI Exported Constants
mbed_official 573:ad23fe03a082 205 * @{
mbed_official 573:ad23fe03a082 206 */
mbed_official 573:ad23fe03a082 207 /** @defgroup QSPI_ErrorCode QSPI Error Code
mbed_official 573:ad23fe03a082 208 * @{
mbed_official 573:ad23fe03a082 209 */
mbed_official 573:ad23fe03a082 210 #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 573:ad23fe03a082 211 #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
mbed_official 573:ad23fe03a082 212 #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /*!< Transfer error */
mbed_official 573:ad23fe03a082 213 #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /*!< DMA transfer error */
mbed_official 573:ad23fe03a082 214 /**
mbed_official 573:ad23fe03a082 215 * @}
mbed_official 573:ad23fe03a082 216 */
mbed_official 573:ad23fe03a082 217
mbed_official 573:ad23fe03a082 218 /** @defgroup QSPI_SampleShifting QSPI Sample Shifting
mbed_official 573:ad23fe03a082 219 * @{
mbed_official 573:ad23fe03a082 220 */
mbed_official 573:ad23fe03a082 221 #define QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000) /*!<No clock cycle shift to sample data*/
mbed_official 573:ad23fe03a082 222 #define QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) /*!<1/2 clock cycle shift to sample data*/
mbed_official 573:ad23fe03a082 223 /**
mbed_official 573:ad23fe03a082 224 * @}
mbed_official 573:ad23fe03a082 225 */
mbed_official 573:ad23fe03a082 226
mbed_official 573:ad23fe03a082 227 /** @defgroup QSPI_ChipSelectHighTime QSPI Chip Select High Time
mbed_official 573:ad23fe03a082 228 * @{
mbed_official 573:ad23fe03a082 229 */
mbed_official 573:ad23fe03a082 230 #define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000) /*!<nCS stay high for at least 1 clock cycle between commands*/
mbed_official 573:ad23fe03a082 231 #define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 2 clock cycles between commands*/
mbed_official 573:ad23fe03a082 232 #define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 3 clock cycles between commands*/
mbed_official 573:ad23fe03a082 233 #define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 4 clock cycles between commands*/
mbed_official 573:ad23fe03a082 234 #define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) /*!<nCS stay high for at least 5 clock cycles between commands*/
mbed_official 573:ad23fe03a082 235 #define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 6 clock cycles between commands*/
mbed_official 573:ad23fe03a082 236 #define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 7 clock cycles between commands*/
mbed_official 573:ad23fe03a082 237 #define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) /*!<nCS stay high for at least 8 clock cycles between commands*/
mbed_official 573:ad23fe03a082 238 /**
mbed_official 573:ad23fe03a082 239 * @}
mbed_official 573:ad23fe03a082 240 */
mbed_official 573:ad23fe03a082 241
mbed_official 573:ad23fe03a082 242 /** @defgroup QSPI_ClockMode QSPI Clock Mode
mbed_official 573:ad23fe03a082 243 * @{
mbed_official 573:ad23fe03a082 244 */
mbed_official 573:ad23fe03a082 245 #define QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000) /*!<Clk stays low while nCS is released*/
mbed_official 573:ad23fe03a082 246 #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) /*!<Clk goes high while nCS is released*/
mbed_official 573:ad23fe03a082 247 /**
mbed_official 573:ad23fe03a082 248 * @}
mbed_official 573:ad23fe03a082 249 */
mbed_official 573:ad23fe03a082 250
mbed_official 573:ad23fe03a082 251 /** @defgroup QSPI_Flash_Select QSPI Flash Select
mbed_official 573:ad23fe03a082 252 * @{
mbed_official 573:ad23fe03a082 253 */
mbed_official 573:ad23fe03a082 254 #define QSPI_FLASH_ID_1 ((uint32_t)0x00000000)
mbed_official 573:ad23fe03a082 255 #define QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL)
mbed_official 573:ad23fe03a082 256 /**
mbed_official 573:ad23fe03a082 257 * @}
mbed_official 573:ad23fe03a082 258 */
mbed_official 573:ad23fe03a082 259
mbed_official 573:ad23fe03a082 260 /** @defgroup QSPI_DualFlash_Mode QSPI Dual Flash Mode
mbed_official 573:ad23fe03a082 261 * @{
mbed_official 573:ad23fe03a082 262 */
mbed_official 573:ad23fe03a082 263 #define QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM)
mbed_official 573:ad23fe03a082 264 #define QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000)
mbed_official 573:ad23fe03a082 265 /**
mbed_official 573:ad23fe03a082 266 * @}
mbed_official 573:ad23fe03a082 267 */
mbed_official 573:ad23fe03a082 268
mbed_official 573:ad23fe03a082 269 /** @defgroup QSPI_AddressSize QSPI Address Size
mbed_official 573:ad23fe03a082 270 * @{
mbed_official 573:ad23fe03a082 271 */
mbed_official 573:ad23fe03a082 272 #define QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000) /*!<8-bit address*/
mbed_official 573:ad23fe03a082 273 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
mbed_official 573:ad23fe03a082 274 #define QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) /*!<24-bit address*/
mbed_official 573:ad23fe03a082 275 #define QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) /*!<32-bit address*/
mbed_official 573:ad23fe03a082 276 /**
mbed_official 573:ad23fe03a082 277 * @}
mbed_official 573:ad23fe03a082 278 */
mbed_official 573:ad23fe03a082 279
mbed_official 573:ad23fe03a082 280 /** @defgroup QSPI_AlternateBytesSize QSPI Alternate Bytes Size
mbed_official 573:ad23fe03a082 281 * @{
mbed_official 573:ad23fe03a082 282 */
mbed_official 573:ad23fe03a082 283 #define QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000) /*!<8-bit alternate bytes*/
mbed_official 573:ad23fe03a082 284 #define QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) /*!<16-bit alternate bytes*/
mbed_official 573:ad23fe03a082 285 #define QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) /*!<24-bit alternate bytes*/
mbed_official 573:ad23fe03a082 286 #define QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) /*!<32-bit alternate bytes*/
mbed_official 573:ad23fe03a082 287 /**
mbed_official 573:ad23fe03a082 288 * @}
mbed_official 573:ad23fe03a082 289 */
mbed_official 573:ad23fe03a082 290
mbed_official 573:ad23fe03a082 291 /** @defgroup QSPI_InstructionMode QSPI Instruction Mode
mbed_official 573:ad23fe03a082 292 * @{
mbed_official 573:ad23fe03a082 293 */
mbed_official 573:ad23fe03a082 294 #define QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000) /*!<No instruction*/
mbed_official 573:ad23fe03a082 295 #define QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) /*!<Instruction on a single line*/
mbed_official 573:ad23fe03a082 296 #define QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) /*!<Instruction on two lines*/
mbed_official 573:ad23fe03a082 297 #define QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) /*!<Instruction on four lines*/
mbed_official 573:ad23fe03a082 298 /**
mbed_official 573:ad23fe03a082 299 * @}
mbed_official 573:ad23fe03a082 300 */
mbed_official 573:ad23fe03a082 301
mbed_official 573:ad23fe03a082 302 /** @defgroup QSPI_AddressMode QSPI Address Mode
mbed_official 573:ad23fe03a082 303 * @{
mbed_official 573:ad23fe03a082 304 */
mbed_official 573:ad23fe03a082 305 #define QSPI_ADDRESS_NONE ((uint32_t)0x00000000) /*!<No address*/
mbed_official 573:ad23fe03a082 306 #define QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) /*!<Address on a single line*/
mbed_official 573:ad23fe03a082 307 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
mbed_official 573:ad23fe03a082 308 #define QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) /*!<Address on four lines*/
mbed_official 573:ad23fe03a082 309 /**
mbed_official 573:ad23fe03a082 310 * @}
mbed_official 573:ad23fe03a082 311 */
mbed_official 573:ad23fe03a082 312
mbed_official 573:ad23fe03a082 313 /** @defgroup QSPI_AlternateBytesMode QSPI Alternate Bytes Mode
mbed_official 573:ad23fe03a082 314 * @{
mbed_official 573:ad23fe03a082 315 */
mbed_official 573:ad23fe03a082 316 #define QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000) /*!<No alternate bytes*/
mbed_official 573:ad23fe03a082 317 #define QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) /*!<Alternate bytes on a single line*/
mbed_official 573:ad23fe03a082 318 #define QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) /*!<Alternate bytes on two lines*/
mbed_official 573:ad23fe03a082 319 #define QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) /*!<Alternate bytes on four lines*/
mbed_official 573:ad23fe03a082 320 /**
mbed_official 573:ad23fe03a082 321 * @}
mbed_official 573:ad23fe03a082 322 */
mbed_official 573:ad23fe03a082 323
mbed_official 573:ad23fe03a082 324 /** @defgroup QSPI_DataMode QSPI Data Mode
mbed_official 573:ad23fe03a082 325 * @{
mbed_official 573:ad23fe03a082 326 */
mbed_official 573:ad23fe03a082 327 #define QSPI_DATA_NONE ((uint32_t)0X00000000) /*!<No data*/
mbed_official 573:ad23fe03a082 328 #define QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) /*!<Data on a single line*/
mbed_official 573:ad23fe03a082 329 #define QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) /*!<Data on two lines*/
mbed_official 573:ad23fe03a082 330 #define QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) /*!<Data on four lines*/
mbed_official 573:ad23fe03a082 331 /**
mbed_official 573:ad23fe03a082 332 * @}
mbed_official 573:ad23fe03a082 333 */
mbed_official 573:ad23fe03a082 334
mbed_official 573:ad23fe03a082 335 /** @defgroup QSPI_DdrMode QSPI Ddr Mode
mbed_official 573:ad23fe03a082 336 * @{
mbed_official 573:ad23fe03a082 337 */
mbed_official 573:ad23fe03a082 338 #define QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000) /*!<Double data rate mode disabled*/
mbed_official 573:ad23fe03a082 339 #define QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) /*!<Double data rate mode enabled*/
mbed_official 573:ad23fe03a082 340 /**
mbed_official 573:ad23fe03a082 341 * @}
mbed_official 573:ad23fe03a082 342 */
mbed_official 573:ad23fe03a082 343
mbed_official 573:ad23fe03a082 344 /** @defgroup QSPI_DdrHoldHalfCycle QSPI Ddr HoldHalfCycle
mbed_official 573:ad23fe03a082 345 * @{
mbed_official 573:ad23fe03a082 346 */
mbed_official 573:ad23fe03a082 347 #define QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000) /*!<Delay the data output using analog delay in DDR mode*/
mbed_official 573:ad23fe03a082 348 #define QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC) /*!<Delay the data output by 1/2 clock cycle in DDR mode*/
mbed_official 573:ad23fe03a082 349 /**
mbed_official 573:ad23fe03a082 350 * @}
mbed_official 573:ad23fe03a082 351 */
mbed_official 573:ad23fe03a082 352
mbed_official 573:ad23fe03a082 353 /** @defgroup QSPI_SIOOMode QSPI SIOO Mode
mbed_official 573:ad23fe03a082 354 * @{
mbed_official 573:ad23fe03a082 355 */
mbed_official 573:ad23fe03a082 356 #define QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000) /*!<Send instruction on every transaction*/
mbed_official 573:ad23fe03a082 357 #define QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) /*!<Send instruction only for the first command*/
mbed_official 573:ad23fe03a082 358 /**
mbed_official 573:ad23fe03a082 359 * @}
mbed_official 573:ad23fe03a082 360 */
mbed_official 573:ad23fe03a082 361
mbed_official 573:ad23fe03a082 362 /** @defgroup QSPI_MatchMode QSPI Match Mode
mbed_official 573:ad23fe03a082 363 * @{
mbed_official 573:ad23fe03a082 364 */
mbed_official 573:ad23fe03a082 365 #define QSPI_MATCH_MODE_AND ((uint32_t)0x00000000) /*!<AND match mode between unmasked bits*/
mbed_official 573:ad23fe03a082 366 #define QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) /*!<OR match mode between unmasked bits*/
mbed_official 573:ad23fe03a082 367 /**
mbed_official 573:ad23fe03a082 368 * @}
mbed_official 573:ad23fe03a082 369 */
mbed_official 573:ad23fe03a082 370
mbed_official 573:ad23fe03a082 371 /** @defgroup QSPI_AutomaticStop QSPI Automatic Stop
mbed_official 573:ad23fe03a082 372 * @{
mbed_official 573:ad23fe03a082 373 */
mbed_official 573:ad23fe03a082 374 #define QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000) /*!<AutoPolling stops only with abort or QSPI disabling*/
mbed_official 573:ad23fe03a082 375 #define QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) /*!<AutoPolling stops as soon as there is a match*/
mbed_official 573:ad23fe03a082 376 /**
mbed_official 573:ad23fe03a082 377 * @}
mbed_official 573:ad23fe03a082 378 */
mbed_official 573:ad23fe03a082 379
mbed_official 573:ad23fe03a082 380 /** @defgroup QSPI_TimeOutActivation QSPI TimeOut Activation
mbed_official 573:ad23fe03a082 381 * @{
mbed_official 573:ad23fe03a082 382 */
mbed_official 573:ad23fe03a082 383 #define QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000) /*!<Timeout counter disabled, nCS remains active*/
mbed_official 573:ad23fe03a082 384 #define QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) /*!<Timeout counter enabled, nCS released when timeout expires*/
mbed_official 573:ad23fe03a082 385 /**
mbed_official 573:ad23fe03a082 386 * @}
mbed_official 573:ad23fe03a082 387 */
mbed_official 573:ad23fe03a082 388
mbed_official 573:ad23fe03a082 389 /** @defgroup QSPI_Flags QSPI Flags
mbed_official 573:ad23fe03a082 390 * @{
mbed_official 573:ad23fe03a082 391 */
mbed_official 573:ad23fe03a082 392 #define QSPI_FLAG_BUSY QUADSPI_SR_BUSY /*!<Busy flag: operation is ongoing*/
mbed_official 573:ad23fe03a082 393 #define QSPI_FLAG_TO QUADSPI_SR_TOF /*!<Timeout flag: timeout occurs in memory-mapped mode*/
mbed_official 573:ad23fe03a082 394 #define QSPI_FLAG_SM QUADSPI_SR_SMF /*!<Status match flag: received data matches in autopolling mode*/
mbed_official 573:ad23fe03a082 395 #define QSPI_FLAG_FT QUADSPI_SR_FTF /*!<Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete*/
mbed_official 573:ad23fe03a082 396 #define QSPI_FLAG_TC QUADSPI_SR_TCF /*!<Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted*/
mbed_official 573:ad23fe03a082 397 #define QSPI_FLAG_TE QUADSPI_SR_TEF /*!<Transfer error flag: invalid address is being accessed*/
mbed_official 573:ad23fe03a082 398 /**
mbed_official 573:ad23fe03a082 399 * @}
mbed_official 573:ad23fe03a082 400 */
mbed_official 573:ad23fe03a082 401
mbed_official 573:ad23fe03a082 402 /** @defgroup QSPI_Interrupts QSPI Interrupts
mbed_official 573:ad23fe03a082 403 * @{
mbed_official 573:ad23fe03a082 404 */
mbed_official 573:ad23fe03a082 405 #define QSPI_IT_TO QUADSPI_CR_TOIE /*!<Interrupt on the timeout flag*/
mbed_official 573:ad23fe03a082 406 #define QSPI_IT_SM QUADSPI_CR_SMIE /*!<Interrupt on the status match flag*/
mbed_official 573:ad23fe03a082 407 #define QSPI_IT_FT QUADSPI_CR_FTIE /*!<Interrupt on the fifo threshold flag*/
mbed_official 573:ad23fe03a082 408 #define QSPI_IT_TC QUADSPI_CR_TCIE /*!<Interrupt on the transfer complete flag*/
mbed_official 573:ad23fe03a082 409 #define QSPI_IT_TE QUADSPI_CR_TEIE /*!<Interrupt on the transfer error flag*/
mbed_official 573:ad23fe03a082 410 /**
mbed_official 573:ad23fe03a082 411 * @}
mbed_official 573:ad23fe03a082 412 */
mbed_official 573:ad23fe03a082 413
mbed_official 573:ad23fe03a082 414 /** @defgroup QSPI_Timeout_definition QSPI Timeout definition
mbed_official 573:ad23fe03a082 415 * @{
mbed_official 573:ad23fe03a082 416 */
mbed_official 573:ad23fe03a082 417 #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */
mbed_official 573:ad23fe03a082 418 /**
mbed_official 573:ad23fe03a082 419 * @}
mbed_official 573:ad23fe03a082 420 */
mbed_official 573:ad23fe03a082 421
mbed_official 573:ad23fe03a082 422 /**
mbed_official 573:ad23fe03a082 423 * @}
mbed_official 573:ad23fe03a082 424 */
mbed_official 573:ad23fe03a082 425
mbed_official 573:ad23fe03a082 426 /* Exported macros -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 427 /** @defgroup QSPI_Exported_Macros QSPI Exported Macros
mbed_official 573:ad23fe03a082 428 * @{
mbed_official 573:ad23fe03a082 429 */
mbed_official 573:ad23fe03a082 430
mbed_official 573:ad23fe03a082 431 /** @brief Reset QSPI handle state
mbed_official 573:ad23fe03a082 432 * @param __HANDLE__: QSPI handle.
mbed_official 573:ad23fe03a082 433 * @retval None
mbed_official 573:ad23fe03a082 434 */
mbed_official 573:ad23fe03a082 435 #define __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET)
mbed_official 573:ad23fe03a082 436
mbed_official 573:ad23fe03a082 437 /** @brief Enable QSPI
mbed_official 573:ad23fe03a082 438 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 439 * @retval None
mbed_official 573:ad23fe03a082 440 */
mbed_official 573:ad23fe03a082 441 #define __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
mbed_official 573:ad23fe03a082 442
mbed_official 573:ad23fe03a082 443 /** @brief Disable QSPI
mbed_official 573:ad23fe03a082 444 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 445 * @retval None
mbed_official 573:ad23fe03a082 446 */
mbed_official 573:ad23fe03a082 447 #define __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
mbed_official 573:ad23fe03a082 448
mbed_official 573:ad23fe03a082 449 /** @brief Enables the specified QSPI interrupt.
mbed_official 573:ad23fe03a082 450 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 451 * @param __INTERRUPT__: specifies the QSPI interrupt source to enable.
mbed_official 573:ad23fe03a082 452 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 453 * @arg QSPI_IT_TO: QSPI Time out interrupt
mbed_official 573:ad23fe03a082 454 * @arg QSPI_IT_SM: QSPI Status match interrupt
mbed_official 573:ad23fe03a082 455 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
mbed_official 573:ad23fe03a082 456 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
mbed_official 573:ad23fe03a082 457 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
mbed_official 573:ad23fe03a082 458 * @retval None
mbed_official 573:ad23fe03a082 459 */
mbed_official 573:ad23fe03a082 460 #define __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
mbed_official 573:ad23fe03a082 461
mbed_official 573:ad23fe03a082 462
mbed_official 573:ad23fe03a082 463 /** @brief Disables the specified QSPI interrupt.
mbed_official 573:ad23fe03a082 464 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 465 * @param __INTERRUPT__: specifies the QSPI interrupt source to disable.
mbed_official 573:ad23fe03a082 466 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 467 * @arg QSPI_IT_TO: QSPI Timeout interrupt
mbed_official 573:ad23fe03a082 468 * @arg QSPI_IT_SM: QSPI Status match interrupt
mbed_official 573:ad23fe03a082 469 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
mbed_official 573:ad23fe03a082 470 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
mbed_official 573:ad23fe03a082 471 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
mbed_official 573:ad23fe03a082 472 * @retval None
mbed_official 573:ad23fe03a082 473 */
mbed_official 573:ad23fe03a082 474 #define __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
mbed_official 573:ad23fe03a082 475
mbed_official 573:ad23fe03a082 476 /** @brief Checks whether the specified QSPI interrupt source is enabled.
mbed_official 573:ad23fe03a082 477 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 478 * @param __INTERRUPT__: specifies the QSPI interrupt source to check.
mbed_official 573:ad23fe03a082 479 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 480 * @arg QSPI_IT_TO: QSPI Time out interrupt
mbed_official 573:ad23fe03a082 481 * @arg QSPI_IT_SM: QSPI Status match interrupt
mbed_official 573:ad23fe03a082 482 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
mbed_official 573:ad23fe03a082 483 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
mbed_official 573:ad23fe03a082 484 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
mbed_official 573:ad23fe03a082 485 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
mbed_official 573:ad23fe03a082 486 */
mbed_official 573:ad23fe03a082 487 #define __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__))
mbed_official 573:ad23fe03a082 488
mbed_official 573:ad23fe03a082 489 /**
mbed_official 573:ad23fe03a082 490 * @brief Get the selected QSPI's flag status.
mbed_official 573:ad23fe03a082 491 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 492 * @param __FLAG__: specifies the QSPI flag to check.
mbed_official 573:ad23fe03a082 493 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 494 * @arg QSPI_FLAG_BUSY: QSPI Busy flag
mbed_official 573:ad23fe03a082 495 * @arg QSPI_FLAG_TO: QSPI Time out flag
mbed_official 573:ad23fe03a082 496 * @arg QSPI_FLAG_SM: QSPI Status match flag
mbed_official 573:ad23fe03a082 497 * @arg QSPI_FLAG_FT: QSPI FIFO threshold flag
mbed_official 573:ad23fe03a082 498 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
mbed_official 573:ad23fe03a082 499 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
mbed_official 573:ad23fe03a082 500 * @retval None
mbed_official 573:ad23fe03a082 501 */
mbed_official 573:ad23fe03a082 502 #define __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0)
mbed_official 573:ad23fe03a082 503
mbed_official 573:ad23fe03a082 504 /** @brief Clears the specified QSPI's flag status.
mbed_official 573:ad23fe03a082 505 * @param __HANDLE__: specifies the QSPI Handle.
mbed_official 573:ad23fe03a082 506 * @param __FLAG__: specifies the QSPI clear register flag that needs to be set
mbed_official 573:ad23fe03a082 507 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 508 * @arg QSPI_FLAG_TO: QSPI Time out flag
mbed_official 573:ad23fe03a082 509 * @arg QSPI_FLAG_SM: QSPI Status match flag
mbed_official 573:ad23fe03a082 510 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
mbed_official 573:ad23fe03a082 511 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
mbed_official 573:ad23fe03a082 512 * @retval None
mbed_official 573:ad23fe03a082 513 */
mbed_official 573:ad23fe03a082 514 #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
mbed_official 573:ad23fe03a082 515 /**
mbed_official 573:ad23fe03a082 516 * @}
mbed_official 573:ad23fe03a082 517 */
mbed_official 573:ad23fe03a082 518
mbed_official 573:ad23fe03a082 519 /* Exported functions --------------------------------------------------------*/
mbed_official 573:ad23fe03a082 520 /** @addtogroup QSPI_Exported_Functions
mbed_official 573:ad23fe03a082 521 * @{
mbed_official 573:ad23fe03a082 522 */
mbed_official 573:ad23fe03a082 523
mbed_official 573:ad23fe03a082 524 /** @addtogroup QSPI_Exported_Functions_Group1
mbed_official 573:ad23fe03a082 525 * @{
mbed_official 573:ad23fe03a082 526 */
mbed_official 573:ad23fe03a082 527 /* Initialization/de-initialization functions ********************************/
mbed_official 573:ad23fe03a082 528 HAL_StatusTypeDef HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 529 HAL_StatusTypeDef HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 530 void HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 531 void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 532 /**
mbed_official 573:ad23fe03a082 533 * @}
mbed_official 573:ad23fe03a082 534 */
mbed_official 573:ad23fe03a082 535
mbed_official 573:ad23fe03a082 536 /** @addtogroup QSPI_Exported_Functions_Group2
mbed_official 573:ad23fe03a082 537 * @{
mbed_official 573:ad23fe03a082 538 */
mbed_official 573:ad23fe03a082 539 /* IO operation functions *****************************************************/
mbed_official 573:ad23fe03a082 540 /* QSPI IRQ handler method */
mbed_official 573:ad23fe03a082 541 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 542
mbed_official 573:ad23fe03a082 543 /* QSPI indirect mode */
mbed_official 573:ad23fe03a082 544 HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout);
mbed_official 573:ad23fe03a082 545 HAL_StatusTypeDef HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
mbed_official 573:ad23fe03a082 546 HAL_StatusTypeDef HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
mbed_official 573:ad23fe03a082 547 HAL_StatusTypeDef HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd);
mbed_official 573:ad23fe03a082 548 HAL_StatusTypeDef HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
mbed_official 573:ad23fe03a082 549 HAL_StatusTypeDef HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
mbed_official 573:ad23fe03a082 550 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
mbed_official 573:ad23fe03a082 551 HAL_StatusTypeDef HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
mbed_official 573:ad23fe03a082 552
mbed_official 573:ad23fe03a082 553 /* QSPI status flag polling mode */
mbed_official 573:ad23fe03a082 554 HAL_StatusTypeDef HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
mbed_official 573:ad23fe03a082 555 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
mbed_official 573:ad23fe03a082 556
mbed_official 573:ad23fe03a082 557 /* QSPI memory-mapped mode */
mbed_official 573:ad23fe03a082 558 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
mbed_official 573:ad23fe03a082 559 /**
mbed_official 573:ad23fe03a082 560 * @}
mbed_official 573:ad23fe03a082 561 */
mbed_official 573:ad23fe03a082 562
mbed_official 573:ad23fe03a082 563 /** @addtogroup QSPI_Exported_Functions_Group3
mbed_official 573:ad23fe03a082 564 * @{
mbed_official 573:ad23fe03a082 565 */
mbed_official 573:ad23fe03a082 566 /* Callback functions in non-blocking modes ***********************************/
mbed_official 573:ad23fe03a082 567 void HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 568 void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 569
mbed_official 573:ad23fe03a082 570 /* QSPI indirect mode */
mbed_official 573:ad23fe03a082 571 void HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 572 void HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 573 void HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 574 void HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 575 void HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 576
mbed_official 573:ad23fe03a082 577 /* QSPI status flag polling mode */
mbed_official 573:ad23fe03a082 578 void HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 579
mbed_official 573:ad23fe03a082 580 /* QSPI memory-mapped mode */
mbed_official 573:ad23fe03a082 581 void HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 582 /**
mbed_official 573:ad23fe03a082 583 * @}
mbed_official 573:ad23fe03a082 584 */
mbed_official 573:ad23fe03a082 585
mbed_official 573:ad23fe03a082 586 /** @addtogroup QSPI_Exported_Functions_Group4
mbed_official 573:ad23fe03a082 587 * @{
mbed_official 573:ad23fe03a082 588 */
mbed_official 573:ad23fe03a082 589 /* Peripheral Control and State functions ************************************/
mbed_official 573:ad23fe03a082 590 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 591 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 592 HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi);
mbed_official 573:ad23fe03a082 593 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
mbed_official 573:ad23fe03a082 594 /**
mbed_official 573:ad23fe03a082 595 * @}
mbed_official 573:ad23fe03a082 596 */
mbed_official 573:ad23fe03a082 597
mbed_official 573:ad23fe03a082 598 /**
mbed_official 573:ad23fe03a082 599 * @}
mbed_official 573:ad23fe03a082 600 */
mbed_official 573:ad23fe03a082 601
mbed_official 573:ad23fe03a082 602 /* Private types -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 603 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 604 /* Private constants ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 605 /** @defgroup QSPI_Private_Constants QSPI Private Constants
mbed_official 573:ad23fe03a082 606 * @{
mbed_official 573:ad23fe03a082 607 */
mbed_official 573:ad23fe03a082 608
mbed_official 573:ad23fe03a082 609 /**
mbed_official 573:ad23fe03a082 610 * @}
mbed_official 573:ad23fe03a082 611 */
mbed_official 573:ad23fe03a082 612
mbed_official 573:ad23fe03a082 613 /* Private macros ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 614 /** @defgroup QSPI_Private_Macros QSPI Private Macros
mbed_official 573:ad23fe03a082 615 * @{
mbed_official 573:ad23fe03a082 616 */
mbed_official 573:ad23fe03a082 617 /** @defgroup QSPI_ClockPrescaler QSPI Clock Prescaler
mbed_official 573:ad23fe03a082 618 * @{
mbed_official 573:ad23fe03a082 619 */
mbed_official 573:ad23fe03a082 620 #define IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF)
mbed_official 573:ad23fe03a082 621 /**
mbed_official 573:ad23fe03a082 622 * @}
mbed_official 573:ad23fe03a082 623 */
mbed_official 573:ad23fe03a082 624
mbed_official 573:ad23fe03a082 625 /** @defgroup QSPI_FifoThreshold QSPI Fifo Threshold
mbed_official 573:ad23fe03a082 626 * @{
mbed_official 573:ad23fe03a082 627 */
mbed_official 573:ad23fe03a082 628 #define IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32))
mbed_official 573:ad23fe03a082 629 /**
mbed_official 573:ad23fe03a082 630 * @}
mbed_official 573:ad23fe03a082 631 */
mbed_official 573:ad23fe03a082 632
mbed_official 573:ad23fe03a082 633 #define IS_QSPI_SSHIFT(SSHIFT) (((SSHIFT) == QSPI_SAMPLE_SHIFTING_NONE) || \
mbed_official 573:ad23fe03a082 634 ((SSHIFT) == QSPI_SAMPLE_SHIFTING_HALFCYCLE))
mbed_official 573:ad23fe03a082 635
mbed_official 573:ad23fe03a082 636 /** @defgroup QSPI_FlashSize QSPI Flash Size
mbed_official 573:ad23fe03a082 637 * @{
mbed_official 573:ad23fe03a082 638 */
mbed_official 573:ad23fe03a082 639 #define IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31))
mbed_official 573:ad23fe03a082 640 /**
mbed_official 573:ad23fe03a082 641 * @}
mbed_official 573:ad23fe03a082 642 */
mbed_official 573:ad23fe03a082 643
mbed_official 573:ad23fe03a082 644 #define IS_QSPI_CS_HIGH_TIME(CSHTIME) (((CSHTIME) == QSPI_CS_HIGH_TIME_1_CYCLE) || \
mbed_official 573:ad23fe03a082 645 ((CSHTIME) == QSPI_CS_HIGH_TIME_2_CYCLE) || \
mbed_official 573:ad23fe03a082 646 ((CSHTIME) == QSPI_CS_HIGH_TIME_3_CYCLE) || \
mbed_official 573:ad23fe03a082 647 ((CSHTIME) == QSPI_CS_HIGH_TIME_4_CYCLE) || \
mbed_official 573:ad23fe03a082 648 ((CSHTIME) == QSPI_CS_HIGH_TIME_5_CYCLE) || \
mbed_official 573:ad23fe03a082 649 ((CSHTIME) == QSPI_CS_HIGH_TIME_6_CYCLE) || \
mbed_official 573:ad23fe03a082 650 ((CSHTIME) == QSPI_CS_HIGH_TIME_7_CYCLE) || \
mbed_official 573:ad23fe03a082 651 ((CSHTIME) == QSPI_CS_HIGH_TIME_8_CYCLE))
mbed_official 573:ad23fe03a082 652
mbed_official 573:ad23fe03a082 653 #define IS_QSPI_CLOCK_MODE(CLKMODE) (((CLKMODE) == QSPI_CLOCK_MODE_0) || \
mbed_official 573:ad23fe03a082 654 ((CLKMODE) == QSPI_CLOCK_MODE_3))
mbed_official 573:ad23fe03a082 655
mbed_official 573:ad23fe03a082 656 #define IS_QSPI_FLASH_ID(FLA) (((FLA) == QSPI_FLASH_ID_1) || \
mbed_official 573:ad23fe03a082 657 ((FLA) == QSPI_FLASH_ID_2))
mbed_official 573:ad23fe03a082 658
mbed_official 573:ad23fe03a082 659 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \
mbed_official 573:ad23fe03a082 660 ((MODE) == QSPI_DUALFLASH_DISABLE))
mbed_official 573:ad23fe03a082 661
mbed_official 573:ad23fe03a082 662
mbed_official 573:ad23fe03a082 663 /** @defgroup QSPI_Instruction QSPI Instruction
mbed_official 573:ad23fe03a082 664 * @{
mbed_official 573:ad23fe03a082 665 */
mbed_official 573:ad23fe03a082 666 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF)
mbed_official 573:ad23fe03a082 667 /**
mbed_official 573:ad23fe03a082 668 * @}
mbed_official 573:ad23fe03a082 669 */
mbed_official 573:ad23fe03a082 670
mbed_official 573:ad23fe03a082 671 #define IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) (((ADDR_SIZE) == QSPI_ADDRESS_8_BITS) || \
mbed_official 573:ad23fe03a082 672 ((ADDR_SIZE) == QSPI_ADDRESS_16_BITS) || \
mbed_official 573:ad23fe03a082 673 ((ADDR_SIZE) == QSPI_ADDRESS_24_BITS) || \
mbed_official 573:ad23fe03a082 674 ((ADDR_SIZE) == QSPI_ADDRESS_32_BITS))
mbed_official 573:ad23fe03a082 675
mbed_official 573:ad23fe03a082 676 #define IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) (((SIZE) == QSPI_ALTERNATE_BYTES_8_BITS) || \
mbed_official 573:ad23fe03a082 677 ((SIZE) == QSPI_ALTERNATE_BYTES_16_BITS) || \
mbed_official 573:ad23fe03a082 678 ((SIZE) == QSPI_ALTERNATE_BYTES_24_BITS) || \
mbed_official 573:ad23fe03a082 679 ((SIZE) == QSPI_ALTERNATE_BYTES_32_BITS))
mbed_official 573:ad23fe03a082 680
mbed_official 573:ad23fe03a082 681
mbed_official 573:ad23fe03a082 682 /** @defgroup QSPI_DummyCycles QSPI Dummy Cycles
mbed_official 573:ad23fe03a082 683 * @{
mbed_official 573:ad23fe03a082 684 */
mbed_official 573:ad23fe03a082 685 #define IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31)
mbed_official 573:ad23fe03a082 686 /**
mbed_official 573:ad23fe03a082 687 * @}
mbed_official 573:ad23fe03a082 688 */
mbed_official 573:ad23fe03a082 689
mbed_official 573:ad23fe03a082 690 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \
mbed_official 573:ad23fe03a082 691 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
mbed_official 573:ad23fe03a082 692 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
mbed_official 573:ad23fe03a082 693 ((MODE) == QSPI_INSTRUCTION_4_LINES))
mbed_official 573:ad23fe03a082 694
mbed_official 573:ad23fe03a082 695 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \
mbed_official 573:ad23fe03a082 696 ((MODE) == QSPI_ADDRESS_1_LINE) || \
mbed_official 573:ad23fe03a082 697 ((MODE) == QSPI_ADDRESS_2_LINES) || \
mbed_official 573:ad23fe03a082 698 ((MODE) == QSPI_ADDRESS_4_LINES))
mbed_official 573:ad23fe03a082 699
mbed_official 573:ad23fe03a082 700 #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \
mbed_official 573:ad23fe03a082 701 ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \
mbed_official 573:ad23fe03a082 702 ((MODE) == QSPI_ALTERNATE_BYTES_2_LINES) || \
mbed_official 573:ad23fe03a082 703 ((MODE) == QSPI_ALTERNATE_BYTES_4_LINES))
mbed_official 573:ad23fe03a082 704
mbed_official 573:ad23fe03a082 705 #define IS_QSPI_DATA_MODE(MODE) (((MODE) == QSPI_DATA_NONE) || \
mbed_official 573:ad23fe03a082 706 ((MODE) == QSPI_DATA_1_LINE) || \
mbed_official 573:ad23fe03a082 707 ((MODE) == QSPI_DATA_2_LINES) || \
mbed_official 573:ad23fe03a082 708 ((MODE) == QSPI_DATA_4_LINES))
mbed_official 573:ad23fe03a082 709
mbed_official 573:ad23fe03a082 710 #define IS_QSPI_DDR_MODE(DDR_MODE) (((DDR_MODE) == QSPI_DDR_MODE_DISABLE) || \
mbed_official 573:ad23fe03a082 711 ((DDR_MODE) == QSPI_DDR_MODE_ENABLE))
mbed_official 573:ad23fe03a082 712
mbed_official 573:ad23fe03a082 713 #define IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY) || \
mbed_official 573:ad23fe03a082 714 ((DDR_HHC) == QSPI_DDR_HHC_HALF_CLK_DELAY))
mbed_official 573:ad23fe03a082 715
mbed_official 573:ad23fe03a082 716 #define IS_QSPI_SIOO_MODE(SIOO_MODE) (((SIOO_MODE) == QSPI_SIOO_INST_EVERY_CMD) || \
mbed_official 573:ad23fe03a082 717 ((SIOO_MODE) == QSPI_SIOO_INST_ONLY_FIRST_CMD))
mbed_official 573:ad23fe03a082 718
mbed_official 573:ad23fe03a082 719 /** @defgroup QSPI_Interval QSPI Interval
mbed_official 573:ad23fe03a082 720 * @{
mbed_official 573:ad23fe03a082 721 */
mbed_official 573:ad23fe03a082 722 #define IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL)
mbed_official 573:ad23fe03a082 723 /**
mbed_official 573:ad23fe03a082 724 * @}
mbed_official 573:ad23fe03a082 725 */
mbed_official 573:ad23fe03a082 726
mbed_official 573:ad23fe03a082 727 /** @defgroup QSPI_StatusBytesSize QSPI Status Bytes Size
mbed_official 573:ad23fe03a082 728 * @{
mbed_official 573:ad23fe03a082 729 */
mbed_official 573:ad23fe03a082 730 #define IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4))
mbed_official 573:ad23fe03a082 731 /**
mbed_official 573:ad23fe03a082 732 * @}
mbed_official 573:ad23fe03a082 733 */
mbed_official 573:ad23fe03a082 734 #define IS_QSPI_MATCH_MODE(MODE) (((MODE) == QSPI_MATCH_MODE_AND) || \
mbed_official 573:ad23fe03a082 735 ((MODE) == QSPI_MATCH_MODE_OR))
mbed_official 573:ad23fe03a082 736
mbed_official 573:ad23fe03a082 737 #define IS_QSPI_AUTOMATIC_STOP(APMS) (((APMS) == QSPI_AUTOMATIC_STOP_DISABLE) || \
mbed_official 573:ad23fe03a082 738 ((APMS) == QSPI_AUTOMATIC_STOP_ENABLE))
mbed_official 573:ad23fe03a082 739
mbed_official 573:ad23fe03a082 740 #define IS_QSPI_TIMEOUT_ACTIVATION(TCEN) (((TCEN) == QSPI_TIMEOUT_COUNTER_DISABLE) || \
mbed_official 573:ad23fe03a082 741 ((TCEN) == QSPI_TIMEOUT_COUNTER_ENABLE))
mbed_official 573:ad23fe03a082 742
mbed_official 573:ad23fe03a082 743 /** @defgroup QSPI_TimeOutPeriod QSPI TimeOut Period
mbed_official 573:ad23fe03a082 744 * @{
mbed_official 573:ad23fe03a082 745 */
mbed_official 573:ad23fe03a082 746 #define IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF)
mbed_official 573:ad23fe03a082 747 /**
mbed_official 573:ad23fe03a082 748 * @}
mbed_official 573:ad23fe03a082 749 */
mbed_official 573:ad23fe03a082 750
mbed_official 573:ad23fe03a082 751 #define IS_QSPI_GET_FLAG(FLAG) (((FLAG) == QSPI_FLAG_BUSY) || \
mbed_official 573:ad23fe03a082 752 ((FLAG) == QSPI_FLAG_TO) || \
mbed_official 573:ad23fe03a082 753 ((FLAG) == QSPI_FLAG_SM) || \
mbed_official 573:ad23fe03a082 754 ((FLAG) == QSPI_FLAG_FT) || \
mbed_official 573:ad23fe03a082 755 ((FLAG) == QSPI_FLAG_TC) || \
mbed_official 573:ad23fe03a082 756 ((FLAG) == QSPI_FLAG_TE))
mbed_official 573:ad23fe03a082 757
mbed_official 573:ad23fe03a082 758 #define IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFF) == 0x00000000) && ((IT) != 0x00000000))
mbed_official 573:ad23fe03a082 759 /**
mbed_official 573:ad23fe03a082 760 * @}
mbed_official 573:ad23fe03a082 761 */
mbed_official 573:ad23fe03a082 762
mbed_official 573:ad23fe03a082 763 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 764 /** @defgroup QSPI_Private_Functions QSPI Private Functions
mbed_official 573:ad23fe03a082 765 * @{
mbed_official 573:ad23fe03a082 766 */
mbed_official 573:ad23fe03a082 767
mbed_official 573:ad23fe03a082 768 /**
mbed_official 573:ad23fe03a082 769 * @}
mbed_official 573:ad23fe03a082 770 */
mbed_official 573:ad23fe03a082 771
mbed_official 573:ad23fe03a082 772 /**
mbed_official 573:ad23fe03a082 773 * @}
mbed_official 573:ad23fe03a082 774 */
mbed_official 573:ad23fe03a082 775
mbed_official 573:ad23fe03a082 776 /**
mbed_official 573:ad23fe03a082 777 * @}
mbed_official 573:ad23fe03a082 778 */
mbed_official 573:ad23fe03a082 779
mbed_official 573:ad23fe03a082 780 #ifdef __cplusplus
mbed_official 573:ad23fe03a082 781 }
mbed_official 573:ad23fe03a082 782 #endif
mbed_official 573:ad23fe03a082 783
mbed_official 573:ad23fe03a082 784 #endif /* __STM32F7xx_HAL_QSPI_H */
mbed_official 573:ad23fe03a082 785
mbed_official 573:ad23fe03a082 786 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/