mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_dma.h@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_dma.h
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief Header file of DMA HAL module.
mbed_official 573:ad23fe03a082 8 ******************************************************************************
mbed_official 573:ad23fe03a082 9 * @attention
mbed_official 573:ad23fe03a082 10 *
mbed_official 573:ad23fe03a082 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 12 *
mbed_official 573:ad23fe03a082 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 14 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 16 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 19 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 21 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 22 * without specific prior written permission.
mbed_official 573:ad23fe03a082 23 *
mbed_official 573:ad23fe03a082 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 34 *
mbed_official 573:ad23fe03a082 35 ******************************************************************************
mbed_official 573:ad23fe03a082 36 */
mbed_official 573:ad23fe03a082 37
mbed_official 573:ad23fe03a082 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 573:ad23fe03a082 39 #ifndef __STM32F7xx_HAL_DMA_H
mbed_official 573:ad23fe03a082 40 #define __STM32F7xx_HAL_DMA_H
mbed_official 573:ad23fe03a082 41
mbed_official 573:ad23fe03a082 42 #ifdef __cplusplus
mbed_official 573:ad23fe03a082 43 extern "C" {
mbed_official 573:ad23fe03a082 44 #endif
mbed_official 573:ad23fe03a082 45
mbed_official 573:ad23fe03a082 46 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 47 #include "stm32f7xx_hal_def.h"
mbed_official 573:ad23fe03a082 48
mbed_official 573:ad23fe03a082 49 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 50 * @{
mbed_official 573:ad23fe03a082 51 */
mbed_official 573:ad23fe03a082 52
mbed_official 573:ad23fe03a082 53 /** @addtogroup DMA
mbed_official 573:ad23fe03a082 54 * @{
mbed_official 573:ad23fe03a082 55 */
mbed_official 573:ad23fe03a082 56
mbed_official 573:ad23fe03a082 57 /* Exported types ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 58
mbed_official 573:ad23fe03a082 59 /** @defgroup DMA_Exported_Types DMA Exported Types
mbed_official 573:ad23fe03a082 60 * @brief DMA Exported Types
mbed_official 573:ad23fe03a082 61 * @{
mbed_official 573:ad23fe03a082 62 */
mbed_official 573:ad23fe03a082 63
mbed_official 573:ad23fe03a082 64 /**
mbed_official 573:ad23fe03a082 65 * @brief DMA Configuration Structure definition
mbed_official 573:ad23fe03a082 66 */
mbed_official 573:ad23fe03a082 67 typedef struct
mbed_official 573:ad23fe03a082 68 {
mbed_official 573:ad23fe03a082 69 uint32_t Channel; /*!< Specifies the channel used for the specified stream.
mbed_official 573:ad23fe03a082 70 This parameter can be a value of @ref DMA_Channel_selection */
mbed_official 573:ad23fe03a082 71
mbed_official 573:ad23fe03a082 72 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
mbed_official 573:ad23fe03a082 73 from memory to memory or from peripheral to memory.
mbed_official 573:ad23fe03a082 74 This parameter can be a value of @ref DMA_Data_transfer_direction */
mbed_official 573:ad23fe03a082 75
mbed_official 573:ad23fe03a082 76 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
mbed_official 573:ad23fe03a082 77 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
mbed_official 573:ad23fe03a082 78
mbed_official 573:ad23fe03a082 79 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
mbed_official 573:ad23fe03a082 80 This parameter can be a value of @ref DMA_Memory_incremented_mode */
mbed_official 573:ad23fe03a082 81
mbed_official 573:ad23fe03a082 82 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
mbed_official 573:ad23fe03a082 83 This parameter can be a value of @ref DMA_Peripheral_data_size */
mbed_official 573:ad23fe03a082 84
mbed_official 573:ad23fe03a082 85 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
mbed_official 573:ad23fe03a082 86 This parameter can be a value of @ref DMA_Memory_data_size */
mbed_official 573:ad23fe03a082 87
mbed_official 573:ad23fe03a082 88 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Streamx.
mbed_official 573:ad23fe03a082 89 This parameter can be a value of @ref DMA_mode
mbed_official 573:ad23fe03a082 90 @note The circular buffer mode cannot be used if the memory-to-memory
mbed_official 573:ad23fe03a082 91 data transfer is configured on the selected Stream */
mbed_official 573:ad23fe03a082 92
mbed_official 573:ad23fe03a082 93 uint32_t Priority; /*!< Specifies the software priority for the DMAy Streamx.
mbed_official 573:ad23fe03a082 94 This parameter can be a value of @ref DMA_Priority_level */
mbed_official 573:ad23fe03a082 95
mbed_official 573:ad23fe03a082 96 uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for the specified stream.
mbed_official 573:ad23fe03a082 97 This parameter can be a value of @ref DMA_FIFO_direct_mode
mbed_official 573:ad23fe03a082 98 @note The Direct mode (FIFO mode disabled) cannot be used if the
mbed_official 573:ad23fe03a082 99 memory-to-memory data transfer is configured on the selected stream */
mbed_official 573:ad23fe03a082 100
mbed_official 573:ad23fe03a082 101 uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level.
mbed_official 573:ad23fe03a082 102 This parameter can be a value of @ref DMA_FIFO_threshold_level */
mbed_official 573:ad23fe03a082 103
mbed_official 573:ad23fe03a082 104 uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory transfers.
mbed_official 573:ad23fe03a082 105 It specifies the amount of data to be transferred in a single non interruptible
mbed_official 573:ad23fe03a082 106 transaction.
mbed_official 573:ad23fe03a082 107 This parameter can be a value of @ref DMA_Memory_burst
mbed_official 573:ad23fe03a082 108 @note The burst mode is possible only if the address Increment mode is enabled. */
mbed_official 573:ad23fe03a082 109
mbed_official 573:ad23fe03a082 110 uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripheral transfers.
mbed_official 573:ad23fe03a082 111 It specifies the amount of data to be transferred in a single non interruptible
mbed_official 573:ad23fe03a082 112 transaction.
mbed_official 573:ad23fe03a082 113 This parameter can be a value of @ref DMA_Peripheral_burst
mbed_official 573:ad23fe03a082 114 @note The burst mode is possible only if the address Increment mode is enabled. */
mbed_official 573:ad23fe03a082 115 }DMA_InitTypeDef;
mbed_official 573:ad23fe03a082 116
mbed_official 573:ad23fe03a082 117 /**
mbed_official 573:ad23fe03a082 118 * @brief HAL DMA State structures definition
mbed_official 573:ad23fe03a082 119 */
mbed_official 573:ad23fe03a082 120 typedef enum
mbed_official 573:ad23fe03a082 121 {
mbed_official 573:ad23fe03a082 122 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
mbed_official 573:ad23fe03a082 123 HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */
mbed_official 573:ad23fe03a082 124 HAL_DMA_STATE_READY_MEM0 = 0x11, /*!< DMA Mem0 process success */
mbed_official 573:ad23fe03a082 125 HAL_DMA_STATE_READY_MEM1 = 0x21, /*!< DMA Mem1 process success */
mbed_official 573:ad23fe03a082 126 HAL_DMA_STATE_READY_HALF_MEM0 = 0x31, /*!< DMA Mem0 Half process success */
mbed_official 573:ad23fe03a082 127 HAL_DMA_STATE_READY_HALF_MEM1 = 0x41, /*!< DMA Mem1 Half process success */
mbed_official 573:ad23fe03a082 128 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
mbed_official 573:ad23fe03a082 129 HAL_DMA_STATE_BUSY_MEM0 = 0x12, /*!< DMA Mem0 process is ongoing */
mbed_official 573:ad23fe03a082 130 HAL_DMA_STATE_BUSY_MEM1 = 0x22, /*!< DMA Mem1 process is ongoing */
mbed_official 573:ad23fe03a082 131 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
mbed_official 573:ad23fe03a082 132 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
mbed_official 573:ad23fe03a082 133 }HAL_DMA_StateTypeDef;
mbed_official 573:ad23fe03a082 134
mbed_official 573:ad23fe03a082 135 /**
mbed_official 573:ad23fe03a082 136 * @brief HAL DMA Error Code structure definition
mbed_official 573:ad23fe03a082 137 */
mbed_official 573:ad23fe03a082 138 typedef enum
mbed_official 573:ad23fe03a082 139 {
mbed_official 573:ad23fe03a082 140 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
mbed_official 573:ad23fe03a082 141 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
mbed_official 573:ad23fe03a082 142 }HAL_DMA_LevelCompleteTypeDef;
mbed_official 573:ad23fe03a082 143
mbed_official 573:ad23fe03a082 144 /**
mbed_official 573:ad23fe03a082 145 * @brief DMA handle Structure definition
mbed_official 573:ad23fe03a082 146 */
mbed_official 573:ad23fe03a082 147 typedef struct __DMA_HandleTypeDef
mbed_official 573:ad23fe03a082 148 {
mbed_official 573:ad23fe03a082 149 DMA_Stream_TypeDef *Instance; /*!< Register base address */
mbed_official 573:ad23fe03a082 150
mbed_official 573:ad23fe03a082 151 DMA_InitTypeDef Init; /*!< DMA communication parameters */
mbed_official 573:ad23fe03a082 152
mbed_official 573:ad23fe03a082 153 HAL_LockTypeDef Lock; /*!< DMA locking object */
mbed_official 573:ad23fe03a082 154
mbed_official 573:ad23fe03a082 155 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
mbed_official 573:ad23fe03a082 156
mbed_official 573:ad23fe03a082 157 void *Parent; /*!< Parent object state */
mbed_official 573:ad23fe03a082 158
mbed_official 573:ad23fe03a082 159 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
mbed_official 573:ad23fe03a082 160
mbed_official 573:ad23fe03a082 161 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
mbed_official 573:ad23fe03a082 162
mbed_official 573:ad23fe03a082 163 void (* XferM1CpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete Memory1 callback */
mbed_official 573:ad23fe03a082 164
mbed_official 573:ad23fe03a082 165 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
mbed_official 573:ad23fe03a082 166
mbed_official 573:ad23fe03a082 167 __IO uint32_t ErrorCode; /*!< DMA Error code */
mbed_official 573:ad23fe03a082 168 }DMA_HandleTypeDef;
mbed_official 573:ad23fe03a082 169
mbed_official 573:ad23fe03a082 170 /**
mbed_official 573:ad23fe03a082 171 * @}
mbed_official 573:ad23fe03a082 172 */
mbed_official 573:ad23fe03a082 173
mbed_official 573:ad23fe03a082 174
mbed_official 573:ad23fe03a082 175 /* Exported constants --------------------------------------------------------*/
mbed_official 573:ad23fe03a082 176
mbed_official 573:ad23fe03a082 177 /** @defgroup DMA_Exported_Constants DMA Exported Constants
mbed_official 573:ad23fe03a082 178 * @brief DMA Exported constants
mbed_official 573:ad23fe03a082 179 * @{
mbed_official 573:ad23fe03a082 180 */
mbed_official 573:ad23fe03a082 181
mbed_official 573:ad23fe03a082 182 /** @defgroup DMA_Error_Code DMA Error Code
mbed_official 573:ad23fe03a082 183 * @brief DMA Error Code
mbed_official 573:ad23fe03a082 184 * @{
mbed_official 573:ad23fe03a082 185 */
mbed_official 573:ad23fe03a082 186 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 573:ad23fe03a082 187 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 573:ad23fe03a082 188 #define HAL_DMA_ERROR_FE ((uint32_t)0x00000002) /*!< FIFO error */
mbed_official 573:ad23fe03a082 189 #define HAL_DMA_ERROR_DME ((uint32_t)0x00000004) /*!< Direct Mode error */
mbed_official 573:ad23fe03a082 190 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 573:ad23fe03a082 191 /**
mbed_official 573:ad23fe03a082 192 * @}
mbed_official 573:ad23fe03a082 193 */
mbed_official 573:ad23fe03a082 194
mbed_official 573:ad23fe03a082 195 /** @defgroup DMA_Channel_selection DMA Channel selection
mbed_official 573:ad23fe03a082 196 * @brief DMA channel selection
mbed_official 573:ad23fe03a082 197 * @{
mbed_official 573:ad23fe03a082 198 */
mbed_official 573:ad23fe03a082 199 #define DMA_CHANNEL_0 ((uint32_t)0x00000000) /*!< DMA Channel 0 */
mbed_official 573:ad23fe03a082 200 #define DMA_CHANNEL_1 ((uint32_t)0x02000000) /*!< DMA Channel 1 */
mbed_official 573:ad23fe03a082 201 #define DMA_CHANNEL_2 ((uint32_t)0x04000000) /*!< DMA Channel 2 */
mbed_official 573:ad23fe03a082 202 #define DMA_CHANNEL_3 ((uint32_t)0x06000000) /*!< DMA Channel 3 */
mbed_official 573:ad23fe03a082 203 #define DMA_CHANNEL_4 ((uint32_t)0x08000000) /*!< DMA Channel 4 */
mbed_official 573:ad23fe03a082 204 #define DMA_CHANNEL_5 ((uint32_t)0x0A000000) /*!< DMA Channel 5 */
mbed_official 573:ad23fe03a082 205 #define DMA_CHANNEL_6 ((uint32_t)0x0C000000) /*!< DMA Channel 6 */
mbed_official 573:ad23fe03a082 206 #define DMA_CHANNEL_7 ((uint32_t)0x0E000000) /*!< DMA Channel 7 */
mbed_official 573:ad23fe03a082 207 /**
mbed_official 573:ad23fe03a082 208 * @}
mbed_official 573:ad23fe03a082 209 */
mbed_official 573:ad23fe03a082 210
mbed_official 573:ad23fe03a082 211 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
mbed_official 573:ad23fe03a082 212 * @brief DMA data transfer direction
mbed_official 573:ad23fe03a082 213 * @{
mbed_official 573:ad23fe03a082 214 */
mbed_official 573:ad23fe03a082 215 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
mbed_official 573:ad23fe03a082 216 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_SxCR_DIR_0) /*!< Memory to peripheral direction */
mbed_official 573:ad23fe03a082 217 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_SxCR_DIR_1) /*!< Memory to memory direction */
mbed_official 573:ad23fe03a082 218 /**
mbed_official 573:ad23fe03a082 219 * @}
mbed_official 573:ad23fe03a082 220 */
mbed_official 573:ad23fe03a082 221
mbed_official 573:ad23fe03a082 222 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
mbed_official 573:ad23fe03a082 223 * @brief DMA peripheral incremented mode
mbed_official 573:ad23fe03a082 224 * @{
mbed_official 573:ad23fe03a082 225 */
mbed_official 573:ad23fe03a082 226 #define DMA_PINC_ENABLE ((uint32_t)DMA_SxCR_PINC) /*!< Peripheral increment mode enable */
mbed_official 573:ad23fe03a082 227 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode disable */
mbed_official 573:ad23fe03a082 228 /**
mbed_official 573:ad23fe03a082 229 * @}
mbed_official 573:ad23fe03a082 230 */
mbed_official 573:ad23fe03a082 231
mbed_official 573:ad23fe03a082 232 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
mbed_official 573:ad23fe03a082 233 * @brief DMA memory incremented mode
mbed_official 573:ad23fe03a082 234 * @{
mbed_official 573:ad23fe03a082 235 */
mbed_official 573:ad23fe03a082 236 #define DMA_MINC_ENABLE ((uint32_t)DMA_SxCR_MINC) /*!< Memory increment mode enable */
mbed_official 573:ad23fe03a082 237 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode disable */
mbed_official 573:ad23fe03a082 238 /**
mbed_official 573:ad23fe03a082 239 * @}
mbed_official 573:ad23fe03a082 240 */
mbed_official 573:ad23fe03a082 241
mbed_official 573:ad23fe03a082 242
mbed_official 573:ad23fe03a082 243 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
mbed_official 573:ad23fe03a082 244 * @brief DMA peripheral data size
mbed_official 573:ad23fe03a082 245 * @{
mbed_official 573:ad23fe03a082 246 */
mbed_official 573:ad23fe03a082 247 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment: Byte */
mbed_official 573:ad23fe03a082 248 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
mbed_official 573:ad23fe03a082 249 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_SxCR_PSIZE_1) /*!< Peripheral data alignment: Word */
mbed_official 573:ad23fe03a082 250 /**
mbed_official 573:ad23fe03a082 251 * @}
mbed_official 573:ad23fe03a082 252 */
mbed_official 573:ad23fe03a082 253
mbed_official 573:ad23fe03a082 254
mbed_official 573:ad23fe03a082 255 /** @defgroup DMA_Memory_data_size DMA Memory data size
mbed_official 573:ad23fe03a082 256 * @brief DMA memory data size
mbed_official 573:ad23fe03a082 257 * @{
mbed_official 573:ad23fe03a082 258 */
mbed_official 573:ad23fe03a082 259 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment: Byte */
mbed_official 573:ad23fe03a082 260 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
mbed_official 573:ad23fe03a082 261 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_SxCR_MSIZE_1) /*!< Memory data alignment: Word */
mbed_official 573:ad23fe03a082 262 /**
mbed_official 573:ad23fe03a082 263 * @}
mbed_official 573:ad23fe03a082 264 */
mbed_official 573:ad23fe03a082 265
mbed_official 573:ad23fe03a082 266 /** @defgroup DMA_mode DMA mode
mbed_official 573:ad23fe03a082 267 * @brief DMA mode
mbed_official 573:ad23fe03a082 268 * @{
mbed_official 573:ad23fe03a082 269 */
mbed_official 573:ad23fe03a082 270 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
mbed_official 573:ad23fe03a082 271 #define DMA_CIRCULAR ((uint32_t)DMA_SxCR_CIRC) /*!< Circular mode */
mbed_official 573:ad23fe03a082 272 #define DMA_PFCTRL ((uint32_t)DMA_SxCR_PFCTRL) /*!< Peripheral flow control mode */
mbed_official 573:ad23fe03a082 273 /**
mbed_official 573:ad23fe03a082 274 * @}
mbed_official 573:ad23fe03a082 275 */
mbed_official 573:ad23fe03a082 276
mbed_official 573:ad23fe03a082 277
mbed_official 573:ad23fe03a082 278 /** @defgroup DMA_Priority_level DMA Priority level
mbed_official 573:ad23fe03a082 279 * @brief DMA priority levels
mbed_official 573:ad23fe03a082 280 * @{
mbed_official 573:ad23fe03a082 281 */
mbed_official 573:ad23fe03a082 282 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level: Low */
mbed_official 573:ad23fe03a082 283 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
mbed_official 573:ad23fe03a082 284 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_SxCR_PL_1) /*!< Priority level: High */
mbed_official 573:ad23fe03a082 285 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_SxCR_PL) /*!< Priority level: Very High */
mbed_official 573:ad23fe03a082 286 /**
mbed_official 573:ad23fe03a082 287 * @}
mbed_official 573:ad23fe03a082 288 */
mbed_official 573:ad23fe03a082 289
mbed_official 573:ad23fe03a082 290
mbed_official 573:ad23fe03a082 291 /** @defgroup DMA_FIFO_direct_mode DMA FIFO direct mode
mbed_official 573:ad23fe03a082 292 * @brief DMA FIFO direct mode
mbed_official 573:ad23fe03a082 293 * @{
mbed_official 573:ad23fe03a082 294 */
mbed_official 573:ad23fe03a082 295 #define DMA_FIFOMODE_DISABLE ((uint32_t)0x00000000) /*!< FIFO mode disable */
mbed_official 573:ad23fe03a082 296 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
mbed_official 573:ad23fe03a082 297 /**
mbed_official 573:ad23fe03a082 298 * @}
mbed_official 573:ad23fe03a082 299 */
mbed_official 573:ad23fe03a082 300
mbed_official 573:ad23fe03a082 301 /** @defgroup DMA_FIFO_threshold_level DMA FIFO threshold level
mbed_official 573:ad23fe03a082 302 * @brief DMA FIFO level
mbed_official 573:ad23fe03a082 303 * @{
mbed_official 573:ad23fe03a082 304 */
mbed_official 573:ad23fe03a082 305 #define DMA_FIFO_THRESHOLD_1QUARTERFULL ((uint32_t)0x00000000) /*!< FIFO threshold 1 quart full configuration */
mbed_official 573:ad23fe03a082 306 #define DMA_FIFO_THRESHOLD_HALFFULL ((uint32_t)DMA_SxFCR_FTH_0) /*!< FIFO threshold half full configuration */
mbed_official 573:ad23fe03a082 307 #define DMA_FIFO_THRESHOLD_3QUARTERSFULL ((uint32_t)DMA_SxFCR_FTH_1) /*!< FIFO threshold 3 quarts full configuration */
mbed_official 573:ad23fe03a082 308 #define DMA_FIFO_THRESHOLD_FULL ((uint32_t)DMA_SxFCR_FTH) /*!< FIFO threshold full configuration */
mbed_official 573:ad23fe03a082 309 /**
mbed_official 573:ad23fe03a082 310 * @}
mbed_official 573:ad23fe03a082 311 */
mbed_official 573:ad23fe03a082 312
mbed_official 573:ad23fe03a082 313 /** @defgroup DMA_Memory_burst DMA Memory burst
mbed_official 573:ad23fe03a082 314 * @brief DMA memory burst
mbed_official 573:ad23fe03a082 315 * @{
mbed_official 573:ad23fe03a082 316 */
mbed_official 573:ad23fe03a082 317 #define DMA_MBURST_SINGLE ((uint32_t)0x00000000)
mbed_official 573:ad23fe03a082 318 #define DMA_MBURST_INC4 ((uint32_t)DMA_SxCR_MBURST_0)
mbed_official 573:ad23fe03a082 319 #define DMA_MBURST_INC8 ((uint32_t)DMA_SxCR_MBURST_1)
mbed_official 573:ad23fe03a082 320 #define DMA_MBURST_INC16 ((uint32_t)DMA_SxCR_MBURST)
mbed_official 573:ad23fe03a082 321 /**
mbed_official 573:ad23fe03a082 322 * @}
mbed_official 573:ad23fe03a082 323 */
mbed_official 573:ad23fe03a082 324
mbed_official 573:ad23fe03a082 325
mbed_official 573:ad23fe03a082 326 /** @defgroup DMA_Peripheral_burst DMA Peripheral burst
mbed_official 573:ad23fe03a082 327 * @brief DMA peripheral burst
mbed_official 573:ad23fe03a082 328 * @{
mbed_official 573:ad23fe03a082 329 */
mbed_official 573:ad23fe03a082 330 #define DMA_PBURST_SINGLE ((uint32_t)0x00000000)
mbed_official 573:ad23fe03a082 331 #define DMA_PBURST_INC4 ((uint32_t)DMA_SxCR_PBURST_0)
mbed_official 573:ad23fe03a082 332 #define DMA_PBURST_INC8 ((uint32_t)DMA_SxCR_PBURST_1)
mbed_official 573:ad23fe03a082 333 #define DMA_PBURST_INC16 ((uint32_t)DMA_SxCR_PBURST)
mbed_official 573:ad23fe03a082 334 /**
mbed_official 573:ad23fe03a082 335 * @}
mbed_official 573:ad23fe03a082 336 */
mbed_official 573:ad23fe03a082 337
mbed_official 573:ad23fe03a082 338 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
mbed_official 573:ad23fe03a082 339 * @brief DMA interrupts definition
mbed_official 573:ad23fe03a082 340 * @{
mbed_official 573:ad23fe03a082 341 */
mbed_official 573:ad23fe03a082 342 #define DMA_IT_TC ((uint32_t)DMA_SxCR_TCIE)
mbed_official 573:ad23fe03a082 343 #define DMA_IT_HT ((uint32_t)DMA_SxCR_HTIE)
mbed_official 573:ad23fe03a082 344 #define DMA_IT_TE ((uint32_t)DMA_SxCR_TEIE)
mbed_official 573:ad23fe03a082 345 #define DMA_IT_DME ((uint32_t)DMA_SxCR_DMEIE)
mbed_official 573:ad23fe03a082 346 #define DMA_IT_FE ((uint32_t)0x00000080)
mbed_official 573:ad23fe03a082 347 /**
mbed_official 573:ad23fe03a082 348 * @}
mbed_official 573:ad23fe03a082 349 */
mbed_official 573:ad23fe03a082 350
mbed_official 573:ad23fe03a082 351 /** @defgroup DMA_flag_definitions DMA flag definitions
mbed_official 573:ad23fe03a082 352 * @brief DMA flag definitions
mbed_official 573:ad23fe03a082 353 * @{
mbed_official 573:ad23fe03a082 354 */
mbed_official 573:ad23fe03a082 355 #define DMA_FLAG_FEIF0_4 ((uint32_t)0x00800001)
mbed_official 573:ad23fe03a082 356 #define DMA_FLAG_DMEIF0_4 ((uint32_t)0x00800004)
mbed_official 573:ad23fe03a082 357 #define DMA_FLAG_TEIF0_4 ((uint32_t)0x00000008)
mbed_official 573:ad23fe03a082 358 #define DMA_FLAG_HTIF0_4 ((uint32_t)0x00000010)
mbed_official 573:ad23fe03a082 359 #define DMA_FLAG_TCIF0_4 ((uint32_t)0x00000020)
mbed_official 573:ad23fe03a082 360 #define DMA_FLAG_FEIF1_5 ((uint32_t)0x00000040)
mbed_official 573:ad23fe03a082 361 #define DMA_FLAG_DMEIF1_5 ((uint32_t)0x00000100)
mbed_official 573:ad23fe03a082 362 #define DMA_FLAG_TEIF1_5 ((uint32_t)0x00000200)
mbed_official 573:ad23fe03a082 363 #define DMA_FLAG_HTIF1_5 ((uint32_t)0x00000400)
mbed_official 573:ad23fe03a082 364 #define DMA_FLAG_TCIF1_5 ((uint32_t)0x00000800)
mbed_official 573:ad23fe03a082 365 #define DMA_FLAG_FEIF2_6 ((uint32_t)0x00010000)
mbed_official 573:ad23fe03a082 366 #define DMA_FLAG_DMEIF2_6 ((uint32_t)0x00040000)
mbed_official 573:ad23fe03a082 367 #define DMA_FLAG_TEIF2_6 ((uint32_t)0x00080000)
mbed_official 573:ad23fe03a082 368 #define DMA_FLAG_HTIF2_6 ((uint32_t)0x00100000)
mbed_official 573:ad23fe03a082 369 #define DMA_FLAG_TCIF2_6 ((uint32_t)0x00200000)
mbed_official 573:ad23fe03a082 370 #define DMA_FLAG_FEIF3_7 ((uint32_t)0x00400000)
mbed_official 573:ad23fe03a082 371 #define DMA_FLAG_DMEIF3_7 ((uint32_t)0x01000000)
mbed_official 573:ad23fe03a082 372 #define DMA_FLAG_TEIF3_7 ((uint32_t)0x02000000)
mbed_official 573:ad23fe03a082 373 #define DMA_FLAG_HTIF3_7 ((uint32_t)0x04000000)
mbed_official 573:ad23fe03a082 374 #define DMA_FLAG_TCIF3_7 ((uint32_t)0x08000000)
mbed_official 573:ad23fe03a082 375 /**
mbed_official 573:ad23fe03a082 376 * @}
mbed_official 573:ad23fe03a082 377 */
mbed_official 573:ad23fe03a082 378
mbed_official 573:ad23fe03a082 379 /**
mbed_official 573:ad23fe03a082 380 * @}
mbed_official 573:ad23fe03a082 381 */
mbed_official 573:ad23fe03a082 382
mbed_official 573:ad23fe03a082 383 /* Exported macro ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 384
mbed_official 573:ad23fe03a082 385 /** @brief Reset DMA handle state
mbed_official 573:ad23fe03a082 386 * @param __HANDLE__: specifies the DMA handle.
mbed_official 573:ad23fe03a082 387 * @retval None
mbed_official 573:ad23fe03a082 388 */
mbed_official 573:ad23fe03a082 389 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
mbed_official 573:ad23fe03a082 390
mbed_official 573:ad23fe03a082 391 /**
mbed_official 573:ad23fe03a082 392 * @brief Return the current DMA Stream FIFO filled level.
mbed_official 573:ad23fe03a082 393 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 394 * @retval The FIFO filling state.
mbed_official 573:ad23fe03a082 395 * - DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full
mbed_official 573:ad23fe03a082 396 * and not empty.
mbed_official 573:ad23fe03a082 397 * - DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official 573:ad23fe03a082 398 * - DMA_FIFOStatus_HalfFull: if more than 1 half-full.
mbed_official 573:ad23fe03a082 399 * - DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
mbed_official 573:ad23fe03a082 400 * - DMA_FIFOStatus_Empty: when FIFO is empty
mbed_official 573:ad23fe03a082 401 * - DMA_FIFOStatus_Full: when FIFO is full
mbed_official 573:ad23fe03a082 402 */
mbed_official 573:ad23fe03a082 403 #define __HAL_DMA_GET_FS(__HANDLE__) (((__HANDLE__)->Instance->FCR & (DMA_SxFCR_FS)))
mbed_official 573:ad23fe03a082 404
mbed_official 573:ad23fe03a082 405 /**
mbed_official 573:ad23fe03a082 406 * @brief Enable the specified DMA Stream.
mbed_official 573:ad23fe03a082 407 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 408 * @retval None
mbed_official 573:ad23fe03a082 409 */
mbed_official 573:ad23fe03a082 410 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)
mbed_official 573:ad23fe03a082 411
mbed_official 573:ad23fe03a082 412 /**
mbed_official 573:ad23fe03a082 413 * @brief Disable the specified DMA Stream.
mbed_official 573:ad23fe03a082 414 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 415 * @retval None
mbed_official 573:ad23fe03a082 416 */
mbed_official 573:ad23fe03a082 417 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
mbed_official 573:ad23fe03a082 418
mbed_official 573:ad23fe03a082 419 /* Interrupt & Flag management */
mbed_official 573:ad23fe03a082 420
mbed_official 573:ad23fe03a082 421 /**
mbed_official 573:ad23fe03a082 422 * @brief Return the current DMA Stream transfer complete flag.
mbed_official 573:ad23fe03a082 423 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 424 * @retval The specified transfer complete flag index.
mbed_official 573:ad23fe03a082 425 */
mbed_official 573:ad23fe03a082 426 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
mbed_official 573:ad23fe03a082 427 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
mbed_official 573:ad23fe03a082 428 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
mbed_official 573:ad23fe03a082 429 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
mbed_official 573:ad23fe03a082 430 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
mbed_official 573:ad23fe03a082 431 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
mbed_official 573:ad23fe03a082 432 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
mbed_official 573:ad23fe03a082 433 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
mbed_official 573:ad23fe03a082 434 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
mbed_official 573:ad23fe03a082 435 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
mbed_official 573:ad23fe03a082 436 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
mbed_official 573:ad23fe03a082 437 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
mbed_official 573:ad23fe03a082 438 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
mbed_official 573:ad23fe03a082 439 DMA_FLAG_TCIF3_7)
mbed_official 573:ad23fe03a082 440
mbed_official 573:ad23fe03a082 441 /**
mbed_official 573:ad23fe03a082 442 * @brief Return the current DMA Stream half transfer complete flag.
mbed_official 573:ad23fe03a082 443 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 444 * @retval The specified half transfer complete flag index.
mbed_official 573:ad23fe03a082 445 */
mbed_official 573:ad23fe03a082 446 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
mbed_official 573:ad23fe03a082 447 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
mbed_official 573:ad23fe03a082 448 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
mbed_official 573:ad23fe03a082 449 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
mbed_official 573:ad23fe03a082 450 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
mbed_official 573:ad23fe03a082 451 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
mbed_official 573:ad23fe03a082 452 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
mbed_official 573:ad23fe03a082 453 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
mbed_official 573:ad23fe03a082 454 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
mbed_official 573:ad23fe03a082 455 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
mbed_official 573:ad23fe03a082 456 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
mbed_official 573:ad23fe03a082 457 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
mbed_official 573:ad23fe03a082 458 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
mbed_official 573:ad23fe03a082 459 DMA_FLAG_HTIF3_7)
mbed_official 573:ad23fe03a082 460
mbed_official 573:ad23fe03a082 461 /**
mbed_official 573:ad23fe03a082 462 * @brief Return the current DMA Stream transfer error flag.
mbed_official 573:ad23fe03a082 463 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 464 * @retval The specified transfer error flag index.
mbed_official 573:ad23fe03a082 465 */
mbed_official 573:ad23fe03a082 466 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
mbed_official 573:ad23fe03a082 467 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
mbed_official 573:ad23fe03a082 468 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
mbed_official 573:ad23fe03a082 469 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
mbed_official 573:ad23fe03a082 470 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
mbed_official 573:ad23fe03a082 471 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
mbed_official 573:ad23fe03a082 472 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
mbed_official 573:ad23fe03a082 473 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
mbed_official 573:ad23fe03a082 474 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
mbed_official 573:ad23fe03a082 475 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
mbed_official 573:ad23fe03a082 476 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
mbed_official 573:ad23fe03a082 477 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
mbed_official 573:ad23fe03a082 478 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
mbed_official 573:ad23fe03a082 479 DMA_FLAG_TEIF3_7)
mbed_official 573:ad23fe03a082 480
mbed_official 573:ad23fe03a082 481 /**
mbed_official 573:ad23fe03a082 482 * @brief Return the current DMA Stream FIFO error flag.
mbed_official 573:ad23fe03a082 483 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 484 * @retval The specified FIFO error flag index.
mbed_official 573:ad23fe03a082 485 */
mbed_official 573:ad23fe03a082 486 #define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)\
mbed_official 573:ad23fe03a082 487 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
mbed_official 573:ad23fe03a082 488 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
mbed_official 573:ad23fe03a082 489 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
mbed_official 573:ad23fe03a082 490 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
mbed_official 573:ad23fe03a082 491 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
mbed_official 573:ad23fe03a082 492 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
mbed_official 573:ad23fe03a082 493 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
mbed_official 573:ad23fe03a082 494 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
mbed_official 573:ad23fe03a082 495 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
mbed_official 573:ad23fe03a082 496 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
mbed_official 573:ad23fe03a082 497 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
mbed_official 573:ad23fe03a082 498 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
mbed_official 573:ad23fe03a082 499 DMA_FLAG_FEIF3_7)
mbed_official 573:ad23fe03a082 500
mbed_official 573:ad23fe03a082 501 /**
mbed_official 573:ad23fe03a082 502 * @brief Return the current DMA Stream direct mode error flag.
mbed_official 573:ad23fe03a082 503 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 504 * @retval The specified direct mode error flag index.
mbed_official 573:ad23fe03a082 505 */
mbed_official 573:ad23fe03a082 506 #define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)\
mbed_official 573:ad23fe03a082 507 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
mbed_official 573:ad23fe03a082 508 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
mbed_official 573:ad23fe03a082 509 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
mbed_official 573:ad23fe03a082 510 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
mbed_official 573:ad23fe03a082 511 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
mbed_official 573:ad23fe03a082 512 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
mbed_official 573:ad23fe03a082 513 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
mbed_official 573:ad23fe03a082 514 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
mbed_official 573:ad23fe03a082 515 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
mbed_official 573:ad23fe03a082 516 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
mbed_official 573:ad23fe03a082 517 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
mbed_official 573:ad23fe03a082 518 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
mbed_official 573:ad23fe03a082 519 DMA_FLAG_DMEIF3_7)
mbed_official 573:ad23fe03a082 520
mbed_official 573:ad23fe03a082 521 /**
mbed_official 573:ad23fe03a082 522 * @brief Get the DMA Stream pending flags.
mbed_official 573:ad23fe03a082 523 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 524 * @param __FLAG__: Get the specified flag.
mbed_official 573:ad23fe03a082 525 * This parameter can be any combination of the following values:
mbed_official 573:ad23fe03a082 526 * @arg DMA_FLAG_TCIFx: Transfer complete flag.
mbed_official 573:ad23fe03a082 527 * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
mbed_official 573:ad23fe03a082 528 * @arg DMA_FLAG_TEIFx: Transfer error flag.
mbed_official 573:ad23fe03a082 529 * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
mbed_official 573:ad23fe03a082 530 * @arg DMA_FLAG_FEIFx: FIFO error flag.
mbed_official 573:ad23fe03a082 531 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
mbed_official 573:ad23fe03a082 532 * @retval The state of FLAG (SET or RESET).
mbed_official 573:ad23fe03a082 533 */
mbed_official 573:ad23fe03a082 534 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
mbed_official 573:ad23fe03a082 535 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
mbed_official 573:ad23fe03a082 536 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
mbed_official 573:ad23fe03a082 537 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))
mbed_official 573:ad23fe03a082 538
mbed_official 573:ad23fe03a082 539 /**
mbed_official 573:ad23fe03a082 540 * @brief Clear the DMA Stream pending flags.
mbed_official 573:ad23fe03a082 541 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 542 * @param __FLAG__: specifies the flag to clear.
mbed_official 573:ad23fe03a082 543 * This parameter can be any combination of the following values:
mbed_official 573:ad23fe03a082 544 * @arg DMA_FLAG_TCIFx: Transfer complete flag.
mbed_official 573:ad23fe03a082 545 * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
mbed_official 573:ad23fe03a082 546 * @arg DMA_FLAG_TEIFx: Transfer error flag.
mbed_official 573:ad23fe03a082 547 * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
mbed_official 573:ad23fe03a082 548 * @arg DMA_FLAG_FEIFx: FIFO error flag.
mbed_official 573:ad23fe03a082 549 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
mbed_official 573:ad23fe03a082 550 * @retval None
mbed_official 573:ad23fe03a082 551 */
mbed_official 573:ad23fe03a082 552 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
mbed_official 573:ad23fe03a082 553 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
mbed_official 573:ad23fe03a082 554 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
mbed_official 573:ad23fe03a082 555 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
mbed_official 573:ad23fe03a082 556
mbed_official 573:ad23fe03a082 557 /**
mbed_official 573:ad23fe03a082 558 * @brief Enable the specified DMA Stream interrupts.
mbed_official 573:ad23fe03a082 559 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 560 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 573:ad23fe03a082 561 * This parameter can be any combination of the following values:
mbed_official 573:ad23fe03a082 562 * @arg DMA_IT_TC: Transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 563 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 564 * @arg DMA_IT_TE: Transfer error interrupt mask.
mbed_official 573:ad23fe03a082 565 * @arg DMA_IT_FE: FIFO error interrupt mask.
mbed_official 573:ad23fe03a082 566 * @arg DMA_IT_DME: Direct mode error interrupt.
mbed_official 573:ad23fe03a082 567 * @retval None
mbed_official 573:ad23fe03a082 568 */
mbed_official 573:ad23fe03a082 569 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
mbed_official 573:ad23fe03a082 570 ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR |= (__INTERRUPT__)))
mbed_official 573:ad23fe03a082 571
mbed_official 573:ad23fe03a082 572 /**
mbed_official 573:ad23fe03a082 573 * @brief Disable the specified DMA Stream interrupts.
mbed_official 573:ad23fe03a082 574 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 575 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 573:ad23fe03a082 576 * This parameter can be any combination of the following values:
mbed_official 573:ad23fe03a082 577 * @arg DMA_IT_TC: Transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 578 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 579 * @arg DMA_IT_TE: Transfer error interrupt mask.
mbed_official 573:ad23fe03a082 580 * @arg DMA_IT_FE: FIFO error interrupt mask.
mbed_official 573:ad23fe03a082 581 * @arg DMA_IT_DME: Direct mode error interrupt.
mbed_official 573:ad23fe03a082 582 * @retval None
mbed_official 573:ad23fe03a082 583 */
mbed_official 573:ad23fe03a082 584 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
mbed_official 573:ad23fe03a082 585 ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__)))
mbed_official 573:ad23fe03a082 586
mbed_official 573:ad23fe03a082 587 /**
mbed_official 573:ad23fe03a082 588 * @brief Check whether the specified DMA Stream interrupt is enabled or not.
mbed_official 573:ad23fe03a082 589 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 590 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
mbed_official 573:ad23fe03a082 591 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 592 * @arg DMA_IT_TC: Transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 593 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
mbed_official 573:ad23fe03a082 594 * @arg DMA_IT_TE: Transfer error interrupt mask.
mbed_official 573:ad23fe03a082 595 * @arg DMA_IT_FE: FIFO error interrupt mask.
mbed_official 573:ad23fe03a082 596 * @arg DMA_IT_DME: Direct mode error interrupt.
mbed_official 573:ad23fe03a082 597 * @retval The state of DMA_IT.
mbed_official 573:ad23fe03a082 598 */
mbed_official 573:ad23fe03a082 599 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
mbed_official 573:ad23fe03a082 600 ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) : \
mbed_official 573:ad23fe03a082 601 ((__HANDLE__)->Instance->FCR & (__INTERRUPT__)))
mbed_official 573:ad23fe03a082 602
mbed_official 573:ad23fe03a082 603 /**
mbed_official 573:ad23fe03a082 604 * @brief Writes the number of data units to be transferred on the DMA Stream.
mbed_official 573:ad23fe03a082 605 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 606 * @param __COUNTER__: Number of data units to be transferred (from 0 to 65535)
mbed_official 573:ad23fe03a082 607 * Number of data items depends only on the Peripheral data format.
mbed_official 573:ad23fe03a082 608 *
mbed_official 573:ad23fe03a082 609 * @note If Peripheral data format is Bytes: number of data units is equal
mbed_official 573:ad23fe03a082 610 * to total number of bytes to be transferred.
mbed_official 573:ad23fe03a082 611 *
mbed_official 573:ad23fe03a082 612 * @note If Peripheral data format is Half-Word: number of data units is
mbed_official 573:ad23fe03a082 613 * equal to total number of bytes to be transferred / 2.
mbed_official 573:ad23fe03a082 614 *
mbed_official 573:ad23fe03a082 615 * @note If Peripheral data format is Word: number of data units is equal
mbed_official 573:ad23fe03a082 616 * to total number of bytes to be transferred / 4.
mbed_official 573:ad23fe03a082 617 *
mbed_official 573:ad23fe03a082 618 * @retval The number of remaining data units in the current DMAy Streamx transfer.
mbed_official 573:ad23fe03a082 619 */
mbed_official 573:ad23fe03a082 620 #define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->NDTR = (uint16_t)(__COUNTER__))
mbed_official 573:ad23fe03a082 621
mbed_official 573:ad23fe03a082 622 /**
mbed_official 573:ad23fe03a082 623 * @brief Returns the number of remaining data units in the current DMAy Streamx transfer.
mbed_official 573:ad23fe03a082 624 * @param __HANDLE__: DMA handle
mbed_official 573:ad23fe03a082 625 *
mbed_official 573:ad23fe03a082 626 * @retval The number of remaining data units in the current DMA Stream transfer.
mbed_official 573:ad23fe03a082 627 */
mbed_official 573:ad23fe03a082 628 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->NDTR)
mbed_official 573:ad23fe03a082 629
mbed_official 573:ad23fe03a082 630
mbed_official 573:ad23fe03a082 631 /* Include DMA HAL Extension module */
mbed_official 573:ad23fe03a082 632 #include "stm32f7xx_hal_dma_ex.h"
mbed_official 573:ad23fe03a082 633
mbed_official 573:ad23fe03a082 634 /* Exported functions --------------------------------------------------------*/
mbed_official 573:ad23fe03a082 635
mbed_official 573:ad23fe03a082 636 /** @defgroup DMA_Exported_Functions DMA Exported Functions
mbed_official 573:ad23fe03a082 637 * @brief DMA Exported functions
mbed_official 573:ad23fe03a082 638 * @{
mbed_official 573:ad23fe03a082 639 */
mbed_official 573:ad23fe03a082 640
mbed_official 573:ad23fe03a082 641 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 642 * @brief Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 643 * @{
mbed_official 573:ad23fe03a082 644 */
mbed_official 573:ad23fe03a082 645 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 646 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 647 /**
mbed_official 573:ad23fe03a082 648 * @}
mbed_official 573:ad23fe03a082 649 */
mbed_official 573:ad23fe03a082 650
mbed_official 573:ad23fe03a082 651 /** @defgroup DMA_Exported_Functions_Group2 I/O operation functions
mbed_official 573:ad23fe03a082 652 * @brief I/O operation functions
mbed_official 573:ad23fe03a082 653 * @{
mbed_official 573:ad23fe03a082 654 */
mbed_official 573:ad23fe03a082 655 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 573:ad23fe03a082 656 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 573:ad23fe03a082 657 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 658 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
mbed_official 573:ad23fe03a082 659 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 660 /**
mbed_official 573:ad23fe03a082 661 * @}
mbed_official 573:ad23fe03a082 662 */
mbed_official 573:ad23fe03a082 663
mbed_official 573:ad23fe03a082 664 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
mbed_official 573:ad23fe03a082 665 * @brief Peripheral State functions
mbed_official 573:ad23fe03a082 666 * @{
mbed_official 573:ad23fe03a082 667 */
mbed_official 573:ad23fe03a082 668 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 669 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 670 /**
mbed_official 573:ad23fe03a082 671 * @}
mbed_official 573:ad23fe03a082 672 */
mbed_official 573:ad23fe03a082 673 /**
mbed_official 573:ad23fe03a082 674 * @}
mbed_official 573:ad23fe03a082 675 */
mbed_official 573:ad23fe03a082 676 /* Private Constants -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 677 /** @defgroup DMA_Private_Constants DMA Private Constants
mbed_official 573:ad23fe03a082 678 * @brief DMA private defines and constants
mbed_official 573:ad23fe03a082 679 * @{
mbed_official 573:ad23fe03a082 680 */
mbed_official 573:ad23fe03a082 681 /**
mbed_official 573:ad23fe03a082 682 * @}
mbed_official 573:ad23fe03a082 683 */
mbed_official 573:ad23fe03a082 684
mbed_official 573:ad23fe03a082 685 /* Private macros ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 686 /** @defgroup DMA_Private_Macros DMA Private Macros
mbed_official 573:ad23fe03a082 687 * @brief DMA private macros
mbed_official 573:ad23fe03a082 688 * @{
mbed_official 573:ad23fe03a082 689 */
mbed_official 573:ad23fe03a082 690 #define IS_DMA_CHANNEL(CHANNEL) (((CHANNEL) == DMA_CHANNEL_0) || \
mbed_official 573:ad23fe03a082 691 ((CHANNEL) == DMA_CHANNEL_1) || \
mbed_official 573:ad23fe03a082 692 ((CHANNEL) == DMA_CHANNEL_2) || \
mbed_official 573:ad23fe03a082 693 ((CHANNEL) == DMA_CHANNEL_3) || \
mbed_official 573:ad23fe03a082 694 ((CHANNEL) == DMA_CHANNEL_4) || \
mbed_official 573:ad23fe03a082 695 ((CHANNEL) == DMA_CHANNEL_5) || \
mbed_official 573:ad23fe03a082 696 ((CHANNEL) == DMA_CHANNEL_6) || \
mbed_official 573:ad23fe03a082 697 ((CHANNEL) == DMA_CHANNEL_7))
mbed_official 573:ad23fe03a082 698
mbed_official 573:ad23fe03a082 699 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
mbed_official 573:ad23fe03a082 700 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
mbed_official 573:ad23fe03a082 701 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
mbed_official 573:ad23fe03a082 702
mbed_official 573:ad23fe03a082 703 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
mbed_official 573:ad23fe03a082 704
mbed_official 573:ad23fe03a082 705 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
mbed_official 573:ad23fe03a082 706 ((STATE) == DMA_PINC_DISABLE))
mbed_official 573:ad23fe03a082 707
mbed_official 573:ad23fe03a082 708 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
mbed_official 573:ad23fe03a082 709 ((STATE) == DMA_MINC_DISABLE))
mbed_official 573:ad23fe03a082 710
mbed_official 573:ad23fe03a082 711 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
mbed_official 573:ad23fe03a082 712 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
mbed_official 573:ad23fe03a082 713 ((SIZE) == DMA_PDATAALIGN_WORD))
mbed_official 573:ad23fe03a082 714
mbed_official 573:ad23fe03a082 715 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
mbed_official 573:ad23fe03a082 716 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
mbed_official 573:ad23fe03a082 717 ((SIZE) == DMA_MDATAALIGN_WORD ))
mbed_official 573:ad23fe03a082 718
mbed_official 573:ad23fe03a082 719 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
mbed_official 573:ad23fe03a082 720 ((MODE) == DMA_CIRCULAR) || \
mbed_official 573:ad23fe03a082 721 ((MODE) == DMA_PFCTRL))
mbed_official 573:ad23fe03a082 722
mbed_official 573:ad23fe03a082 723 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
mbed_official 573:ad23fe03a082 724 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
mbed_official 573:ad23fe03a082 725 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
mbed_official 573:ad23fe03a082 726 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
mbed_official 573:ad23fe03a082 727
mbed_official 573:ad23fe03a082 728 #define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMODE_DISABLE ) || \
mbed_official 573:ad23fe03a082 729 ((STATE) == DMA_FIFOMODE_ENABLE))
mbed_official 573:ad23fe03a082 730
mbed_official 573:ad23fe03a082 731 #define IS_DMA_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == DMA_FIFO_THRESHOLD_1QUARTERFULL ) || \
mbed_official 573:ad23fe03a082 732 ((THRESHOLD) == DMA_FIFO_THRESHOLD_HALFFULL) || \
mbed_official 573:ad23fe03a082 733 ((THRESHOLD) == DMA_FIFO_THRESHOLD_3QUARTERSFULL) || \
mbed_official 573:ad23fe03a082 734 ((THRESHOLD) == DMA_FIFO_THRESHOLD_FULL))
mbed_official 573:ad23fe03a082 735
mbed_official 573:ad23fe03a082 736 #define IS_DMA_MEMORY_BURST(BURST) (((BURST) == DMA_MBURST_SINGLE) || \
mbed_official 573:ad23fe03a082 737 ((BURST) == DMA_MBURST_INC4) || \
mbed_official 573:ad23fe03a082 738 ((BURST) == DMA_MBURST_INC8) || \
mbed_official 573:ad23fe03a082 739 ((BURST) == DMA_MBURST_INC16))
mbed_official 573:ad23fe03a082 740
mbed_official 573:ad23fe03a082 741 #define IS_DMA_PERIPHERAL_BURST(BURST) (((BURST) == DMA_PBURST_SINGLE) || \
mbed_official 573:ad23fe03a082 742 ((BURST) == DMA_PBURST_INC4) || \
mbed_official 573:ad23fe03a082 743 ((BURST) == DMA_PBURST_INC8) || \
mbed_official 573:ad23fe03a082 744 ((BURST) == DMA_PBURST_INC16))
mbed_official 573:ad23fe03a082 745 /**
mbed_official 573:ad23fe03a082 746 * @}
mbed_official 573:ad23fe03a082 747 */
mbed_official 573:ad23fe03a082 748
mbed_official 573:ad23fe03a082 749 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 750 /** @defgroup DMA_Private_Functions DMA Private Functions
mbed_official 573:ad23fe03a082 751 * @brief DMA private functions
mbed_official 573:ad23fe03a082 752 * @{
mbed_official 573:ad23fe03a082 753 */
mbed_official 573:ad23fe03a082 754 /**
mbed_official 573:ad23fe03a082 755 * @}
mbed_official 573:ad23fe03a082 756 */
mbed_official 573:ad23fe03a082 757
mbed_official 573:ad23fe03a082 758 /**
mbed_official 573:ad23fe03a082 759 * @}
mbed_official 573:ad23fe03a082 760 */
mbed_official 573:ad23fe03a082 761
mbed_official 573:ad23fe03a082 762 /**
mbed_official 573:ad23fe03a082 763 * @}
mbed_official 573:ad23fe03a082 764 */
mbed_official 573:ad23fe03a082 765
mbed_official 573:ad23fe03a082 766 #ifdef __cplusplus
mbed_official 573:ad23fe03a082 767 }
mbed_official 573:ad23fe03a082 768 #endif
mbed_official 573:ad23fe03a082 769
mbed_official 573:ad23fe03a082 770 #endif /* __STM32F7xx_HAL_DMA_H */
mbed_official 573:ad23fe03a082 771
mbed_official 573:ad23fe03a082 772 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/