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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_cryp_ex.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Parent:
573:ad23fe03a082 
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_cryp_ex.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.1
mbed_official 610:813dcc80987e 6 * @date 25-June-2015
mbed_official 573:ad23fe03a082 7 * @brief Extended CRYP HAL module driver
mbed_official 573:ad23fe03a082 8 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 9 * functionalities of CRYP extension peripheral:
mbed_official 573:ad23fe03a082 10 * + Extended AES processing functions
mbed_official 573:ad23fe03a082 11 *
mbed_official 573:ad23fe03a082 12 @verbatim
mbed_official 573:ad23fe03a082 13 ==============================================================================
mbed_official 573:ad23fe03a082 14 ##### How to use this driver #####
mbed_official 573:ad23fe03a082 15 ==============================================================================
mbed_official 573:ad23fe03a082 16 [..]
mbed_official 573:ad23fe03a082 17 The CRYP Extension HAL driver can be used as follows:
mbed_official 573:ad23fe03a082 18 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
mbed_official 573:ad23fe03a082 19 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
mbed_official 573:ad23fe03a082 20 (##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT())
mbed_official 573:ad23fe03a082 21 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
mbed_official 573:ad23fe03a082 22 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 610:813dcc80987e 23 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
mbed_official 573:ad23fe03a082 24 (##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
mbed_official 573:ad23fe03a082 25 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official 573:ad23fe03a082 26 (+++) Configure and enable two DMA streams one for managing data transfer from
mbed_official 573:ad23fe03a082 27 memory to peripheral (input stream) and another stream for managing data
mbed_official 573:ad23fe03a082 28 transfer from peripheral to memory (output stream)
mbed_official 573:ad23fe03a082 29 (+++) Associate the initialized DMA handle to the CRYP DMA handle
mbed_official 573:ad23fe03a082 30 using __HAL_LINKDMA()
mbed_official 573:ad23fe03a082 31 (+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official 573:ad23fe03a082 32 interrupt on the two DMA Streams. The output stream should have higher
mbed_official 573:ad23fe03a082 33 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official 573:ad23fe03a082 34 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
mbed_official 573:ad23fe03a082 35 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
mbed_official 573:ad23fe03a082 36 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
mbed_official 573:ad23fe03a082 37 (##) The encryption/decryption key. Its size depends on the algorithm
mbed_official 573:ad23fe03a082 38 used for encryption/decryption
mbed_official 573:ad23fe03a082 39 (##) The initialization vector (counter). It is not used ECB mode.
mbed_official 573:ad23fe03a082 40 (#)Three processing (encryption/decryption) functions are available:
mbed_official 573:ad23fe03a082 41 (##) Polling mode: encryption and decryption APIs are blocking functions
mbed_official 573:ad23fe03a082 42 i.e. they process the data and wait till the processing is finished
mbed_official 573:ad23fe03a082 43 e.g. HAL_CRYPEx_AESGCM_Encrypt()
mbed_official 573:ad23fe03a082 44 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official 573:ad23fe03a082 45 i.e. they process the data under interrupt
mbed_official 573:ad23fe03a082 46 e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()
mbed_official 573:ad23fe03a082 47 (##) DMA mode: encryption and decryption APIs are not blocking functions
mbed_official 573:ad23fe03a082 48 i.e. the data transfer is ensured by DMA
mbed_official 573:ad23fe03a082 49 e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA()
mbed_official 573:ad23fe03a082 50 (#)When the processing function is called at first time after HAL_CRYP_Init()
mbed_official 573:ad23fe03a082 51 the CRYP peripheral is initialized and processes the buffer in input.
mbed_official 573:ad23fe03a082 52 At second call, the processing function performs an append of the already
mbed_official 573:ad23fe03a082 53 processed buffer.
mbed_official 573:ad23fe03a082 54 When a new data block is to be processed, call HAL_CRYP_Init() then the
mbed_official 573:ad23fe03a082 55 processing function.
mbed_official 573:ad23fe03a082 56 (#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms
mbed_official 573:ad23fe03a082 57 which provide authentication messages.
mbed_official 573:ad23fe03a082 58 HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those
mbed_official 573:ad23fe03a082 59 authentication messages.
mbed_official 573:ad23fe03a082 60 Call those functions after the processing ones (polling, interrupt or DMA).
mbed_official 573:ad23fe03a082 61 e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data
mbed_official 610:813dcc80987e 62 then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message
mbed_official 610:813dcc80987e 63 -@- For CCM Encrypt/Decrypt API's, only DataType = 8-bit is supported by this version.
mbed_official 610:813dcc80987e 64 -@- The HAL_CRYPEx_AESGCM_xxxx() implementation is limited to 32bits inputs data length
mbed_official 610:813dcc80987e 65 (Plain/Cyphertext, Header) compared with GCM standards specifications (800-38D).
mbed_official 573:ad23fe03a082 66 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
mbed_official 573:ad23fe03a082 67
mbed_official 573:ad23fe03a082 68 @endverbatim
mbed_official 573:ad23fe03a082 69 ******************************************************************************
mbed_official 573:ad23fe03a082 70 * @attention
mbed_official 573:ad23fe03a082 71 *
mbed_official 573:ad23fe03a082 72 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 73 *
mbed_official 573:ad23fe03a082 74 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 75 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 76 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 77 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 78 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 79 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 80 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 81 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 82 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 83 * without specific prior written permission.
mbed_official 573:ad23fe03a082 84 *
mbed_official 573:ad23fe03a082 85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 88 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 92 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 93 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 94 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 95 *
mbed_official 573:ad23fe03a082 96 ******************************************************************************
mbed_official 573:ad23fe03a082 97 */
mbed_official 573:ad23fe03a082 98
mbed_official 573:ad23fe03a082 99 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 100 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 101
mbed_official 573:ad23fe03a082 102 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 103 * @{
mbed_official 573:ad23fe03a082 104 */
mbed_official 573:ad23fe03a082 105 #if defined(STM32F756xx)
mbed_official 573:ad23fe03a082 106 /** @defgroup CRYPEx CRYPEx
mbed_official 573:ad23fe03a082 107 * @brief CRYP Extension HAL module driver.
mbed_official 573:ad23fe03a082 108 * @{
mbed_official 573:ad23fe03a082 109 */
mbed_official 573:ad23fe03a082 110
mbed_official 573:ad23fe03a082 111
mbed_official 573:ad23fe03a082 112 #ifdef HAL_CRYP_MODULE_ENABLED
mbed_official 573:ad23fe03a082 113
mbed_official 573:ad23fe03a082 114 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 115 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 116 /** @addtogroup CRYPEx_Private_define
mbed_official 573:ad23fe03a082 117 * @{
mbed_official 573:ad23fe03a082 118 */
mbed_official 573:ad23fe03a082 119 #define CRYPEx_TIMEOUT_VALUE 1
mbed_official 573:ad23fe03a082 120 /**
mbed_official 573:ad23fe03a082 121 * @}
mbed_official 573:ad23fe03a082 122 */
mbed_official 573:ad23fe03a082 123
mbed_official 573:ad23fe03a082 124 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 125 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 126 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 127 /** @defgroup CRYPEx_Private_Functions_prototypes CRYP Private Functions Prototypes
mbed_official 573:ad23fe03a082 128 * @{
mbed_official 573:ad23fe03a082 129 */
mbed_official 573:ad23fe03a082 130 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
mbed_official 573:ad23fe03a082 131 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
mbed_official 573:ad23fe03a082 132 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout);
mbed_official 573:ad23fe03a082 133 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout);
mbed_official 573:ad23fe03a082 134 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 135 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 136 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 137 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
mbed_official 573:ad23fe03a082 138 /**
mbed_official 573:ad23fe03a082 139 * @}
mbed_official 573:ad23fe03a082 140 */
mbed_official 573:ad23fe03a082 141
mbed_official 573:ad23fe03a082 142 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 143 /** @addtogroup CRYPEx_Private_Functions
mbed_official 573:ad23fe03a082 144 * @{
mbed_official 573:ad23fe03a082 145 */
mbed_official 573:ad23fe03a082 146
mbed_official 573:ad23fe03a082 147 /**
mbed_official 573:ad23fe03a082 148 * @brief DMA CRYP Input Data process complete callback.
mbed_official 573:ad23fe03a082 149 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 150 * @retval None
mbed_official 573:ad23fe03a082 151 */
mbed_official 573:ad23fe03a082 152 static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 153 {
mbed_official 573:ad23fe03a082 154 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 155
mbed_official 573:ad23fe03a082 156 /* Disable the DMA transfer for input Fifo request by resetting the DIEN bit
mbed_official 573:ad23fe03a082 157 in the DMACR register */
mbed_official 573:ad23fe03a082 158 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
mbed_official 573:ad23fe03a082 159
mbed_official 573:ad23fe03a082 160 /* Call input data transfer complete callback */
mbed_official 573:ad23fe03a082 161 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 162 }
mbed_official 573:ad23fe03a082 163
mbed_official 573:ad23fe03a082 164 /**
mbed_official 573:ad23fe03a082 165 * @brief DMA CRYP Output Data process complete callback.
mbed_official 573:ad23fe03a082 166 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 167 * @retval None
mbed_official 573:ad23fe03a082 168 */
mbed_official 573:ad23fe03a082 169 static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 170 {
mbed_official 573:ad23fe03a082 171 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 172
mbed_official 573:ad23fe03a082 173 /* Disable the DMA transfer for output Fifo request by resetting the DOEN bit
mbed_official 573:ad23fe03a082 174 in the DMACR register */
mbed_official 573:ad23fe03a082 175 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
mbed_official 573:ad23fe03a082 176
mbed_official 573:ad23fe03a082 177 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 178 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 179
mbed_official 573:ad23fe03a082 180 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 181 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 182
mbed_official 573:ad23fe03a082 183 /* Call output data transfer complete callback */
mbed_official 573:ad23fe03a082 184 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 185 }
mbed_official 573:ad23fe03a082 186
mbed_official 573:ad23fe03a082 187 /**
mbed_official 573:ad23fe03a082 188 * @brief DMA CRYP communication error callback.
mbed_official 573:ad23fe03a082 189 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 190 * @retval None
mbed_official 573:ad23fe03a082 191 */
mbed_official 573:ad23fe03a082 192 static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 193 {
mbed_official 573:ad23fe03a082 194 CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 195 hcryp->State= HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 196 HAL_CRYP_ErrorCallback(hcryp);
mbed_official 573:ad23fe03a082 197 }
mbed_official 573:ad23fe03a082 198
mbed_official 573:ad23fe03a082 199 /**
mbed_official 573:ad23fe03a082 200 * @brief Writes the Key in Key registers.
mbed_official 573:ad23fe03a082 201 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 202 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 203 * @param Key: Pointer to Key buffer
mbed_official 573:ad23fe03a082 204 * @param KeySize: Size of Key
mbed_official 573:ad23fe03a082 205 * @retval None
mbed_official 573:ad23fe03a082 206 */
mbed_official 573:ad23fe03a082 207 static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
mbed_official 573:ad23fe03a082 208 {
mbed_official 573:ad23fe03a082 209 uint32_t keyaddr = (uint32_t)Key;
mbed_official 573:ad23fe03a082 210
mbed_official 573:ad23fe03a082 211 switch(KeySize)
mbed_official 573:ad23fe03a082 212 {
mbed_official 573:ad23fe03a082 213 case CRYP_KEYSIZE_256B:
mbed_official 573:ad23fe03a082 214 /* Key Initialisation */
mbed_official 573:ad23fe03a082 215 hcryp->Instance->K0LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 216 keyaddr+=4;
mbed_official 573:ad23fe03a082 217 hcryp->Instance->K0RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 218 keyaddr+=4;
mbed_official 573:ad23fe03a082 219 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 220 keyaddr+=4;
mbed_official 573:ad23fe03a082 221 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 222 keyaddr+=4;
mbed_official 573:ad23fe03a082 223 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 224 keyaddr+=4;
mbed_official 573:ad23fe03a082 225 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 226 keyaddr+=4;
mbed_official 573:ad23fe03a082 227 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 228 keyaddr+=4;
mbed_official 573:ad23fe03a082 229 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 230 break;
mbed_official 573:ad23fe03a082 231 case CRYP_KEYSIZE_192B:
mbed_official 573:ad23fe03a082 232 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 233 keyaddr+=4;
mbed_official 573:ad23fe03a082 234 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 235 keyaddr+=4;
mbed_official 573:ad23fe03a082 236 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 237 keyaddr+=4;
mbed_official 573:ad23fe03a082 238 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 239 keyaddr+=4;
mbed_official 573:ad23fe03a082 240 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 241 keyaddr+=4;
mbed_official 573:ad23fe03a082 242 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 243 break;
mbed_official 573:ad23fe03a082 244 case CRYP_KEYSIZE_128B:
mbed_official 573:ad23fe03a082 245 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 246 keyaddr+=4;
mbed_official 573:ad23fe03a082 247 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 248 keyaddr+=4;
mbed_official 573:ad23fe03a082 249 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 250 keyaddr+=4;
mbed_official 573:ad23fe03a082 251 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
mbed_official 573:ad23fe03a082 252 break;
mbed_official 573:ad23fe03a082 253 default:
mbed_official 573:ad23fe03a082 254 break;
mbed_official 573:ad23fe03a082 255 }
mbed_official 573:ad23fe03a082 256 }
mbed_official 573:ad23fe03a082 257
mbed_official 573:ad23fe03a082 258 /**
mbed_official 573:ad23fe03a082 259 * @brief Writes the InitVector/InitCounter in IV registers.
mbed_official 573:ad23fe03a082 260 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 261 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 262 * @param InitVector: Pointer to InitVector/InitCounter buffer
mbed_official 573:ad23fe03a082 263 * @retval None
mbed_official 573:ad23fe03a082 264 */
mbed_official 573:ad23fe03a082 265 static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
mbed_official 573:ad23fe03a082 266 {
mbed_official 573:ad23fe03a082 267 uint32_t ivaddr = (uint32_t)InitVector;
mbed_official 573:ad23fe03a082 268
mbed_official 573:ad23fe03a082 269 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 573:ad23fe03a082 270 ivaddr+=4;
mbed_official 573:ad23fe03a082 271 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 573:ad23fe03a082 272 ivaddr+=4;
mbed_official 573:ad23fe03a082 273 hcryp->Instance->IV1LR = __REV(*(uint32_t*)(ivaddr));
mbed_official 573:ad23fe03a082 274 ivaddr+=4;
mbed_official 573:ad23fe03a082 275 hcryp->Instance->IV1RR = __REV(*(uint32_t*)(ivaddr));
mbed_official 573:ad23fe03a082 276 }
mbed_official 573:ad23fe03a082 277
mbed_official 573:ad23fe03a082 278 /**
mbed_official 573:ad23fe03a082 279 * @brief Process Data: Writes Input data in polling mode and read the Output data.
mbed_official 573:ad23fe03a082 280 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 281 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 282 * @param Input: Pointer to the Input buffer.
mbed_official 573:ad23fe03a082 283 * @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 284 * @param Output: Pointer to the returned buffer
mbed_official 573:ad23fe03a082 285 * @param Timeout: Timeout value
mbed_official 573:ad23fe03a082 286 * @retval None
mbed_official 573:ad23fe03a082 287 */
mbed_official 573:ad23fe03a082 288 static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
mbed_official 573:ad23fe03a082 289 {
mbed_official 573:ad23fe03a082 290 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 291 uint32_t i = 0;
mbed_official 573:ad23fe03a082 292 uint32_t inputaddr = (uint32_t)Input;
mbed_official 573:ad23fe03a082 293 uint32_t outputaddr = (uint32_t)Output;
mbed_official 573:ad23fe03a082 294
mbed_official 573:ad23fe03a082 295 for(i=0; (i < Ilength); i+=16)
mbed_official 573:ad23fe03a082 296 {
mbed_official 573:ad23fe03a082 297 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 298 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 299 inputaddr+=4;
mbed_official 573:ad23fe03a082 300 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 301 inputaddr+=4;
mbed_official 573:ad23fe03a082 302 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 303 inputaddr+=4;
mbed_official 573:ad23fe03a082 304 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 305 inputaddr+=4;
mbed_official 573:ad23fe03a082 306
mbed_official 573:ad23fe03a082 307 /* Get tick */
mbed_official 573:ad23fe03a082 308 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 309
mbed_official 573:ad23fe03a082 310 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
mbed_official 573:ad23fe03a082 311 {
mbed_official 573:ad23fe03a082 312 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 313 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 314 {
mbed_official 573:ad23fe03a082 315 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 316 {
mbed_official 573:ad23fe03a082 317 /* Change state */
mbed_official 573:ad23fe03a082 318 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 319
mbed_official 573:ad23fe03a082 320 /* Process Unlocked */
mbed_official 573:ad23fe03a082 321 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 322
mbed_official 573:ad23fe03a082 323 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 324 }
mbed_official 573:ad23fe03a082 325 }
mbed_official 573:ad23fe03a082 326 }
mbed_official 573:ad23fe03a082 327 /* Read the Output block from the OUT FIFO */
mbed_official 573:ad23fe03a082 328 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 329 outputaddr+=4;
mbed_official 573:ad23fe03a082 330 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 331 outputaddr+=4;
mbed_official 573:ad23fe03a082 332 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 333 outputaddr+=4;
mbed_official 573:ad23fe03a082 334 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 335 outputaddr+=4;
mbed_official 573:ad23fe03a082 336 }
mbed_official 573:ad23fe03a082 337 /* Return function status */
mbed_official 573:ad23fe03a082 338 return HAL_OK;
mbed_official 573:ad23fe03a082 339 }
mbed_official 573:ad23fe03a082 340
mbed_official 573:ad23fe03a082 341 /**
mbed_official 573:ad23fe03a082 342 * @brief Sets the header phase
mbed_official 573:ad23fe03a082 343 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 344 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 345 * @param Input: Pointer to the Input buffer.
mbed_official 573:ad23fe03a082 346 * @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 347 * @param Timeout: Timeout value
mbed_official 573:ad23fe03a082 348 * @retval None
mbed_official 573:ad23fe03a082 349 */
mbed_official 573:ad23fe03a082 350 static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout)
mbed_official 573:ad23fe03a082 351 {
mbed_official 573:ad23fe03a082 352 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 353 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 354 uint32_t headeraddr = (uint32_t)Input;
mbed_official 573:ad23fe03a082 355
mbed_official 573:ad23fe03a082 356 /***************************** Header phase *********************************/
mbed_official 573:ad23fe03a082 357 if(hcryp->Init.HeaderSize != 0)
mbed_official 573:ad23fe03a082 358 {
mbed_official 573:ad23fe03a082 359 /* Select header phase */
mbed_official 573:ad23fe03a082 360 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 361 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 362 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 363
mbed_official 573:ad23fe03a082 364 for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16)
mbed_official 573:ad23fe03a082 365 {
mbed_official 573:ad23fe03a082 366 /* Get tick */
mbed_official 573:ad23fe03a082 367 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 368
mbed_official 573:ad23fe03a082 369 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 370 {
mbed_official 573:ad23fe03a082 371 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 372 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 373 {
mbed_official 573:ad23fe03a082 374 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 375 {
mbed_official 573:ad23fe03a082 376 /* Change state */
mbed_official 573:ad23fe03a082 377 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 378
mbed_official 573:ad23fe03a082 379 /* Process Unlocked */
mbed_official 573:ad23fe03a082 380 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 381
mbed_official 573:ad23fe03a082 382 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 383 }
mbed_official 573:ad23fe03a082 384 }
mbed_official 573:ad23fe03a082 385 }
mbed_official 573:ad23fe03a082 386 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 387 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 388 headeraddr+=4;
mbed_official 573:ad23fe03a082 389 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 390 headeraddr+=4;
mbed_official 573:ad23fe03a082 391 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 392 headeraddr+=4;
mbed_official 573:ad23fe03a082 393 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 394 headeraddr+=4;
mbed_official 573:ad23fe03a082 395 }
mbed_official 573:ad23fe03a082 396
mbed_official 573:ad23fe03a082 397 /* Wait until the complete message has been processed */
mbed_official 573:ad23fe03a082 398
mbed_official 573:ad23fe03a082 399 /* Get tick */
mbed_official 573:ad23fe03a082 400 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 401
mbed_official 573:ad23fe03a082 402 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 403 {
mbed_official 573:ad23fe03a082 404 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 405 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 406 {
mbed_official 573:ad23fe03a082 407 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 408 {
mbed_official 573:ad23fe03a082 409 /* Change state */
mbed_official 573:ad23fe03a082 410 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 411
mbed_official 573:ad23fe03a082 412 /* Process Unlocked */
mbed_official 573:ad23fe03a082 413 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 414
mbed_official 573:ad23fe03a082 415 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 416 }
mbed_official 573:ad23fe03a082 417 }
mbed_official 573:ad23fe03a082 418 }
mbed_official 573:ad23fe03a082 419 }
mbed_official 573:ad23fe03a082 420 /* Return function status */
mbed_official 573:ad23fe03a082 421 return HAL_OK;
mbed_official 573:ad23fe03a082 422 }
mbed_official 573:ad23fe03a082 423
mbed_official 573:ad23fe03a082 424 /**
mbed_official 573:ad23fe03a082 425 * @brief Sets the DMA configuration and start the DMA transfer.
mbed_official 573:ad23fe03a082 426 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 427 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 428 * @param inputaddr: Address of the Input buffer
mbed_official 573:ad23fe03a082 429 * @param Size: Size of the Input buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 430 * @param outputaddr: Address of the Output buffer
mbed_official 573:ad23fe03a082 431 * @retval None
mbed_official 573:ad23fe03a082 432 */
mbed_official 573:ad23fe03a082 433 static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
mbed_official 573:ad23fe03a082 434 {
mbed_official 573:ad23fe03a082 435 /* Set the CRYP DMA transfer complete callback */
mbed_official 573:ad23fe03a082 436 hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt;
mbed_official 573:ad23fe03a082 437 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 438 hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official 573:ad23fe03a082 439
mbed_official 573:ad23fe03a082 440 /* Set the CRYP DMA transfer complete callback */
mbed_official 573:ad23fe03a082 441 hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt;
mbed_official 573:ad23fe03a082 442 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 443 hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official 573:ad23fe03a082 444
mbed_official 573:ad23fe03a082 445 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 446 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 447
mbed_official 573:ad23fe03a082 448 /* Enable the DMA In DMA Stream */
mbed_official 573:ad23fe03a082 449 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4);
mbed_official 573:ad23fe03a082 450
mbed_official 573:ad23fe03a082 451 /* Enable In DMA request */
mbed_official 573:ad23fe03a082 452 hcryp->Instance->DMACR = CRYP_DMACR_DIEN;
mbed_official 573:ad23fe03a082 453
mbed_official 573:ad23fe03a082 454 /* Enable the DMA Out DMA Stream */
mbed_official 573:ad23fe03a082 455 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4);
mbed_official 573:ad23fe03a082 456
mbed_official 573:ad23fe03a082 457 /* Enable Out DMA request */
mbed_official 573:ad23fe03a082 458 hcryp->Instance->DMACR |= CRYP_DMACR_DOEN;
mbed_official 573:ad23fe03a082 459 }
mbed_official 573:ad23fe03a082 460
mbed_official 573:ad23fe03a082 461 /**
mbed_official 573:ad23fe03a082 462 * @}
mbed_official 573:ad23fe03a082 463 */
mbed_official 573:ad23fe03a082 464
mbed_official 573:ad23fe03a082 465 /* Exported functions---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 466 /** @addtogroup CRYPEx_Exported_Functions
mbed_official 573:ad23fe03a082 467 * @{
mbed_official 573:ad23fe03a082 468 */
mbed_official 573:ad23fe03a082 469
mbed_official 573:ad23fe03a082 470 /** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
mbed_official 573:ad23fe03a082 471 * @brief Extended processing functions.
mbed_official 573:ad23fe03a082 472 *
mbed_official 573:ad23fe03a082 473 @verbatim
mbed_official 573:ad23fe03a082 474 ==============================================================================
mbed_official 573:ad23fe03a082 475 ##### Extended AES processing functions #####
mbed_official 573:ad23fe03a082 476 ==============================================================================
mbed_official 573:ad23fe03a082 477 [..] This section provides functions allowing to:
mbed_official 573:ad23fe03a082 478 (+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official 573:ad23fe03a082 479 (+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official 573:ad23fe03a082 480 (+) Finish the processing. This function is available only for GCM and CCM
mbed_official 573:ad23fe03a082 481 [..] Three processing methods are available:
mbed_official 573:ad23fe03a082 482 (+) Polling mode
mbed_official 573:ad23fe03a082 483 (+) Interrupt mode
mbed_official 573:ad23fe03a082 484 (+) DMA mode
mbed_official 573:ad23fe03a082 485
mbed_official 573:ad23fe03a082 486 @endverbatim
mbed_official 573:ad23fe03a082 487 * @{
mbed_official 573:ad23fe03a082 488 */
mbed_official 573:ad23fe03a082 489
mbed_official 573:ad23fe03a082 490
mbed_official 573:ad23fe03a082 491 /**
mbed_official 573:ad23fe03a082 492 * @brief Initializes the CRYP peripheral in AES CCM encryption mode then
mbed_official 573:ad23fe03a082 493 * encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official 573:ad23fe03a082 494 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 495 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 496 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 497 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 498 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 499 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 500 * @retval HAL status
mbed_official 573:ad23fe03a082 501 */
mbed_official 573:ad23fe03a082 502 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 503 {
mbed_official 573:ad23fe03a082 504 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 505 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 506 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 507 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 508 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 509 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 510 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 511 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 512
mbed_official 573:ad23fe03a082 513 /* Process Locked */
mbed_official 573:ad23fe03a082 514 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 515
mbed_official 573:ad23fe03a082 516 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 517 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 518
mbed_official 573:ad23fe03a082 519 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 520 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 521 {
mbed_official 573:ad23fe03a082 522 /************************ Formatting the header block *********************/
mbed_official 573:ad23fe03a082 523 if(headersize != 0)
mbed_official 573:ad23fe03a082 524 {
mbed_official 573:ad23fe03a082 525 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 526 if(headersize < 65280)
mbed_official 573:ad23fe03a082 527 {
mbed_official 573:ad23fe03a082 528 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 529 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 530 headersize += 2;
mbed_official 573:ad23fe03a082 531 }
mbed_official 573:ad23fe03a082 532 else
mbed_official 573:ad23fe03a082 533 {
mbed_official 573:ad23fe03a082 534 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 535 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 536 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 537 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 538 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 539 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 540 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 541 headersize += 6;
mbed_official 573:ad23fe03a082 542 }
mbed_official 573:ad23fe03a082 543 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 544 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 545 {
mbed_official 573:ad23fe03a082 546 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 547 }
mbed_official 573:ad23fe03a082 548 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 549 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 550 {
mbed_official 573:ad23fe03a082 551 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 552 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 553 {
mbed_official 573:ad23fe03a082 554 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 555 }
mbed_official 573:ad23fe03a082 556 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 557 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 558 }
mbed_official 573:ad23fe03a082 559 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 560 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 561 }
mbed_official 573:ad23fe03a082 562 /*********************** Formatting the block B0 **************************/
mbed_official 573:ad23fe03a082 563 if(headersize != 0)
mbed_official 573:ad23fe03a082 564 {
mbed_official 573:ad23fe03a082 565 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 566 }
mbed_official 573:ad23fe03a082 567 /* Flags byte */
mbed_official 573:ad23fe03a082 568 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 569 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 570 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 571
mbed_official 573:ad23fe03a082 572 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 573 {
mbed_official 573:ad23fe03a082 574 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 575 }
mbed_official 573:ad23fe03a082 576 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 577 {
mbed_official 573:ad23fe03a082 578 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 579 }
mbed_official 573:ad23fe03a082 580
mbed_official 573:ad23fe03a082 581 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 582 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 583
mbed_official 573:ad23fe03a082 584 /************************* Formatting the initial counter *****************/
mbed_official 573:ad23fe03a082 585 /* Byte 0:
mbed_official 573:ad23fe03a082 586 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 587 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks
mbed_official 573:ad23fe03a082 588 are distinct from B0
mbed_official 573:ad23fe03a082 589 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 590 */
mbed_official 573:ad23fe03a082 591 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 592 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 593 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 594 {
mbed_official 573:ad23fe03a082 595 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 596 }
mbed_official 573:ad23fe03a082 597 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 598 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 599
mbed_official 573:ad23fe03a082 600 /* Set the key */
mbed_official 573:ad23fe03a082 601 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 602
mbed_official 573:ad23fe03a082 603 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 604 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 573:ad23fe03a082 605
mbed_official 573:ad23fe03a082 606 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 607 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 608
mbed_official 573:ad23fe03a082 609 /* Select init phase */
mbed_official 573:ad23fe03a082 610 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 611
mbed_official 573:ad23fe03a082 612 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 613 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 614 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 615 b0addr+=4;
mbed_official 573:ad23fe03a082 616 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 617 b0addr+=4;
mbed_official 573:ad23fe03a082 618 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 619 b0addr+=4;
mbed_official 573:ad23fe03a082 620 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 621
mbed_official 573:ad23fe03a082 622 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 623 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 624
mbed_official 573:ad23fe03a082 625 /* Get tick */
mbed_official 573:ad23fe03a082 626 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 627
mbed_official 573:ad23fe03a082 628 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 629 {
mbed_official 573:ad23fe03a082 630 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 631 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 632 {
mbed_official 573:ad23fe03a082 633 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 634 {
mbed_official 573:ad23fe03a082 635 /* Change state */
mbed_official 573:ad23fe03a082 636 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 637
mbed_official 573:ad23fe03a082 638 /* Process Unlocked */
mbed_official 573:ad23fe03a082 639 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 640
mbed_official 573:ad23fe03a082 641 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 642 }
mbed_official 573:ad23fe03a082 643 }
mbed_official 573:ad23fe03a082 644 }
mbed_official 573:ad23fe03a082 645 /***************************** Header phase *******************************/
mbed_official 573:ad23fe03a082 646 if(headersize != 0)
mbed_official 573:ad23fe03a082 647 {
mbed_official 573:ad23fe03a082 648 /* Select header phase */
mbed_official 573:ad23fe03a082 649 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 650
mbed_official 573:ad23fe03a082 651 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 652 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 653
mbed_official 573:ad23fe03a082 654 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 655 {
mbed_official 573:ad23fe03a082 656 /* Get tick */
mbed_official 573:ad23fe03a082 657 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 658
mbed_official 573:ad23fe03a082 659 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 660 {
mbed_official 573:ad23fe03a082 661 {
mbed_official 573:ad23fe03a082 662 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 663 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 664 {
mbed_official 573:ad23fe03a082 665 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 666 {
mbed_official 573:ad23fe03a082 667 /* Change state */
mbed_official 573:ad23fe03a082 668 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 669
mbed_official 573:ad23fe03a082 670 /* Process Unlocked */
mbed_official 573:ad23fe03a082 671 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 672
mbed_official 573:ad23fe03a082 673 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 674 }
mbed_official 573:ad23fe03a082 675 }
mbed_official 573:ad23fe03a082 676 }
mbed_official 573:ad23fe03a082 677 }
mbed_official 573:ad23fe03a082 678 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 679 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 680 headeraddr+=4;
mbed_official 573:ad23fe03a082 681 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 682 headeraddr+=4;
mbed_official 573:ad23fe03a082 683 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 684 headeraddr+=4;
mbed_official 573:ad23fe03a082 685 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 686 headeraddr+=4;
mbed_official 573:ad23fe03a082 687 }
mbed_official 573:ad23fe03a082 688
mbed_official 573:ad23fe03a082 689 /* Get tick */
mbed_official 573:ad23fe03a082 690 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 691
mbed_official 573:ad23fe03a082 692 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 693 {
mbed_official 573:ad23fe03a082 694 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 695 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 696 {
mbed_official 573:ad23fe03a082 697 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 698 {
mbed_official 573:ad23fe03a082 699 /* Change state */
mbed_official 573:ad23fe03a082 700 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 701
mbed_official 573:ad23fe03a082 702 /* Process Unlocked */
mbed_official 573:ad23fe03a082 703 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 704
mbed_official 573:ad23fe03a082 705 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 706 }
mbed_official 573:ad23fe03a082 707 }
mbed_official 573:ad23fe03a082 708 }
mbed_official 573:ad23fe03a082 709 }
mbed_official 573:ad23fe03a082 710 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 711 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 712 {
mbed_official 573:ad23fe03a082 713 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 714 }
mbed_official 573:ad23fe03a082 715 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 716 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 717
mbed_official 573:ad23fe03a082 718 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 719 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 720
mbed_official 573:ad23fe03a082 721 /* Flush FIFO */
mbed_official 573:ad23fe03a082 722 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 723
mbed_official 573:ad23fe03a082 724 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 725 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 726
mbed_official 573:ad23fe03a082 727 /* Set the phase */
mbed_official 573:ad23fe03a082 728 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 729 }
mbed_official 573:ad23fe03a082 730
mbed_official 573:ad23fe03a082 731 /* Write Plain Data and Get Cypher Data */
mbed_official 573:ad23fe03a082 732 if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 733 {
mbed_official 573:ad23fe03a082 734 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 735 }
mbed_official 573:ad23fe03a082 736
mbed_official 573:ad23fe03a082 737 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 738 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 739
mbed_official 573:ad23fe03a082 740 /* Process Unlocked */
mbed_official 573:ad23fe03a082 741 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 742
mbed_official 573:ad23fe03a082 743 /* Return function status */
mbed_official 573:ad23fe03a082 744 return HAL_OK;
mbed_official 573:ad23fe03a082 745 }
mbed_official 573:ad23fe03a082 746
mbed_official 573:ad23fe03a082 747 /**
mbed_official 573:ad23fe03a082 748 * @brief Initializes the CRYP peripheral in AES GCM encryption mode then
mbed_official 573:ad23fe03a082 749 * encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official 573:ad23fe03a082 750 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 751 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 752 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 753 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 754 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 755 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 756 * @retval HAL status
mbed_official 573:ad23fe03a082 757 */
mbed_official 573:ad23fe03a082 758 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 759 {
mbed_official 573:ad23fe03a082 760 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 761
mbed_official 573:ad23fe03a082 762 /* Process Locked */
mbed_official 573:ad23fe03a082 763 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 764
mbed_official 573:ad23fe03a082 765 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 766 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 767
mbed_official 573:ad23fe03a082 768 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 769 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 770 {
mbed_official 573:ad23fe03a082 771 /* Set the key */
mbed_official 573:ad23fe03a082 772 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 773
mbed_official 573:ad23fe03a082 774 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 573:ad23fe03a082 775 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 573:ad23fe03a082 776
mbed_official 573:ad23fe03a082 777 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 778 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 779
mbed_official 573:ad23fe03a082 780 /* Flush FIFO */
mbed_official 573:ad23fe03a082 781 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 782
mbed_official 573:ad23fe03a082 783 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 784 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 785
mbed_official 573:ad23fe03a082 786 /* Get tick */
mbed_official 573:ad23fe03a082 787 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 788
mbed_official 573:ad23fe03a082 789 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 790 {
mbed_official 573:ad23fe03a082 791 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 792 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 793 {
mbed_official 573:ad23fe03a082 794 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 795 {
mbed_official 573:ad23fe03a082 796 /* Change state */
mbed_official 573:ad23fe03a082 797 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 798
mbed_official 573:ad23fe03a082 799 /* Process Unlocked */
mbed_official 573:ad23fe03a082 800 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 801
mbed_official 573:ad23fe03a082 802 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 803 }
mbed_official 573:ad23fe03a082 804 }
mbed_official 573:ad23fe03a082 805 }
mbed_official 573:ad23fe03a082 806
mbed_official 573:ad23fe03a082 807 /* Set the header phase */
mbed_official 573:ad23fe03a082 808 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 809 {
mbed_official 573:ad23fe03a082 810 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 811 }
mbed_official 573:ad23fe03a082 812
mbed_official 573:ad23fe03a082 813 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 814 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 815
mbed_official 573:ad23fe03a082 816 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 817 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 818
mbed_official 573:ad23fe03a082 819 /* Flush FIFO */
mbed_official 573:ad23fe03a082 820 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 821
mbed_official 573:ad23fe03a082 822 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 823 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 824
mbed_official 573:ad23fe03a082 825 /* Set the phase */
mbed_official 573:ad23fe03a082 826 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 827 }
mbed_official 573:ad23fe03a082 828
mbed_official 573:ad23fe03a082 829 /* Write Plain Data and Get Cypher Data */
mbed_official 573:ad23fe03a082 830 if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 831 {
mbed_official 573:ad23fe03a082 832 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 833 }
mbed_official 573:ad23fe03a082 834
mbed_official 573:ad23fe03a082 835 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 836 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 837
mbed_official 573:ad23fe03a082 838 /* Process Unlocked */
mbed_official 573:ad23fe03a082 839 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 840
mbed_official 573:ad23fe03a082 841 /* Return function status */
mbed_official 573:ad23fe03a082 842 return HAL_OK;
mbed_official 573:ad23fe03a082 843 }
mbed_official 573:ad23fe03a082 844
mbed_official 573:ad23fe03a082 845 /**
mbed_official 573:ad23fe03a082 846 * @brief Initializes the CRYP peripheral in AES GCM decryption mode then
mbed_official 573:ad23fe03a082 847 * decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 573:ad23fe03a082 848 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 849 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 850 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 851 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 852 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 853 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 854 * @retval HAL status
mbed_official 573:ad23fe03a082 855 */
mbed_official 573:ad23fe03a082 856 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 857 {
mbed_official 573:ad23fe03a082 858 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 859
mbed_official 573:ad23fe03a082 860 /* Process Locked */
mbed_official 573:ad23fe03a082 861 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 862
mbed_official 573:ad23fe03a082 863 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 864 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 865
mbed_official 573:ad23fe03a082 866 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 867 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 868 {
mbed_official 573:ad23fe03a082 869 /* Set the key */
mbed_official 573:ad23fe03a082 870 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 871
mbed_official 573:ad23fe03a082 872 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 573:ad23fe03a082 873 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 573:ad23fe03a082 874
mbed_official 573:ad23fe03a082 875 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 876 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 877
mbed_official 573:ad23fe03a082 878 /* Flush FIFO */
mbed_official 573:ad23fe03a082 879 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 880
mbed_official 573:ad23fe03a082 881 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 882 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 883
mbed_official 573:ad23fe03a082 884 /* Get tick */
mbed_official 573:ad23fe03a082 885 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 886
mbed_official 573:ad23fe03a082 887 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 888 {
mbed_official 573:ad23fe03a082 889 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 890 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 891 {
mbed_official 573:ad23fe03a082 892 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 893 {
mbed_official 573:ad23fe03a082 894 /* Change state */
mbed_official 573:ad23fe03a082 895 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 896
mbed_official 573:ad23fe03a082 897 /* Process Unlocked */
mbed_official 573:ad23fe03a082 898 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 899
mbed_official 573:ad23fe03a082 900 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 901 }
mbed_official 573:ad23fe03a082 902 }
mbed_official 573:ad23fe03a082 903 }
mbed_official 573:ad23fe03a082 904
mbed_official 573:ad23fe03a082 905 /* Set the header phase */
mbed_official 573:ad23fe03a082 906 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 907 {
mbed_official 573:ad23fe03a082 908 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 909 }
mbed_official 573:ad23fe03a082 910 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 911 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 912
mbed_official 573:ad23fe03a082 913 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 914 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 915
mbed_official 573:ad23fe03a082 916 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 917 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 918
mbed_official 573:ad23fe03a082 919 /* Set the phase */
mbed_official 573:ad23fe03a082 920 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 921 }
mbed_official 573:ad23fe03a082 922
mbed_official 573:ad23fe03a082 923 /* Write Plain Data and Get Cypher Data */
mbed_official 573:ad23fe03a082 924 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 925 {
mbed_official 573:ad23fe03a082 926 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 927 }
mbed_official 573:ad23fe03a082 928
mbed_official 573:ad23fe03a082 929 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 930 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 931
mbed_official 573:ad23fe03a082 932 /* Process Unlocked */
mbed_official 573:ad23fe03a082 933 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 934
mbed_official 573:ad23fe03a082 935 /* Return function status */
mbed_official 573:ad23fe03a082 936 return HAL_OK;
mbed_official 573:ad23fe03a082 937 }
mbed_official 573:ad23fe03a082 938
mbed_official 573:ad23fe03a082 939 /**
mbed_official 573:ad23fe03a082 940 * @brief Computes the authentication TAG.
mbed_official 573:ad23fe03a082 941 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 942 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 943 * @param Size: Total length of the plain/cyphertext buffer
mbed_official 573:ad23fe03a082 944 * @param AuthTag: Pointer to the authentication buffer
mbed_official 573:ad23fe03a082 945 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 946 * @retval HAL status
mbed_official 573:ad23fe03a082 947 */
mbed_official 573:ad23fe03a082 948 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint32_t Size, uint8_t *AuthTag, uint32_t Timeout)
mbed_official 573:ad23fe03a082 949 {
mbed_official 573:ad23fe03a082 950 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 951 uint64_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
mbed_official 573:ad23fe03a082 952 uint64_t inputlength = Size * 8; /* input length in bits */
mbed_official 573:ad23fe03a082 953 uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official 573:ad23fe03a082 954
mbed_official 573:ad23fe03a082 955 /* Process Locked */
mbed_official 573:ad23fe03a082 956 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 957
mbed_official 573:ad23fe03a082 958 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 959 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 960
mbed_official 573:ad23fe03a082 961 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 962 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official 573:ad23fe03a082 963 {
mbed_official 573:ad23fe03a082 964 /* Change the CRYP phase */
mbed_official 573:ad23fe03a082 965 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official 573:ad23fe03a082 966
mbed_official 573:ad23fe03a082 967 /* Disable CRYP to start the final phase */
mbed_official 573:ad23fe03a082 968 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 969
mbed_official 573:ad23fe03a082 970 /* Select final phase */
mbed_official 573:ad23fe03a082 971 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
mbed_official 573:ad23fe03a082 972
mbed_official 573:ad23fe03a082 973 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 974 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 975
mbed_official 573:ad23fe03a082 976 /* Write the number of bits in header (64 bits) followed by the number of bits
mbed_official 573:ad23fe03a082 977 in the payload */
mbed_official 573:ad23fe03a082 978 if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
mbed_official 573:ad23fe03a082 979 {
mbed_official 573:ad23fe03a082 980 hcryp->Instance->DR = __RBIT(headerlength >> 32);
mbed_official 573:ad23fe03a082 981 hcryp->Instance->DR = __RBIT(headerlength);
mbed_official 573:ad23fe03a082 982 hcryp->Instance->DR = __RBIT(inputlength >> 32);
mbed_official 573:ad23fe03a082 983 hcryp->Instance->DR = __RBIT(inputlength);
mbed_official 573:ad23fe03a082 984 }
mbed_official 573:ad23fe03a082 985 else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
mbed_official 573:ad23fe03a082 986 {
mbed_official 573:ad23fe03a082 987 hcryp->Instance->DR = __REV(headerlength >> 32);
mbed_official 573:ad23fe03a082 988 hcryp->Instance->DR = __REV(headerlength);
mbed_official 573:ad23fe03a082 989 hcryp->Instance->DR = __REV(inputlength >> 32);
mbed_official 573:ad23fe03a082 990 hcryp->Instance->DR = __REV(inputlength);
mbed_official 573:ad23fe03a082 991 }
mbed_official 573:ad23fe03a082 992 else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
mbed_official 573:ad23fe03a082 993 {
mbed_official 573:ad23fe03a082 994 hcryp->Instance->DR = __ROR((uint32_t)(headerlength >> 32), 16);
mbed_official 573:ad23fe03a082 995 hcryp->Instance->DR = __ROR((uint32_t)headerlength, 16);
mbed_official 573:ad23fe03a082 996 hcryp->Instance->DR = __ROR((uint32_t)(inputlength >> 32), 16);
mbed_official 573:ad23fe03a082 997 hcryp->Instance->DR = __ROR((uint32_t)inputlength, 16);
mbed_official 573:ad23fe03a082 998 }
mbed_official 573:ad23fe03a082 999 else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
mbed_official 573:ad23fe03a082 1000 {
mbed_official 573:ad23fe03a082 1001 hcryp->Instance->DR = (uint32_t)(headerlength >> 32);
mbed_official 573:ad23fe03a082 1002 hcryp->Instance->DR = (uint32_t)(headerlength);
mbed_official 573:ad23fe03a082 1003 hcryp->Instance->DR = (uint32_t)(inputlength >> 32);
mbed_official 573:ad23fe03a082 1004 hcryp->Instance->DR = (uint32_t)(inputlength);
mbed_official 573:ad23fe03a082 1005 }
mbed_official 573:ad23fe03a082 1006 /* Get tick */
mbed_official 573:ad23fe03a082 1007 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1008
mbed_official 573:ad23fe03a082 1009 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
mbed_official 573:ad23fe03a082 1010 {
mbed_official 573:ad23fe03a082 1011 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1012 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1013 {
mbed_official 573:ad23fe03a082 1014 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 1015 {
mbed_official 573:ad23fe03a082 1016 /* Change state */
mbed_official 573:ad23fe03a082 1017 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1018
mbed_official 573:ad23fe03a082 1019 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1020 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1021
mbed_official 573:ad23fe03a082 1022 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1023 }
mbed_official 573:ad23fe03a082 1024 }
mbed_official 573:ad23fe03a082 1025 }
mbed_official 573:ad23fe03a082 1026
mbed_official 573:ad23fe03a082 1027 /* Read the Auth TAG in the IN FIFO */
mbed_official 573:ad23fe03a082 1028 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1029 tagaddr+=4;
mbed_official 573:ad23fe03a082 1030 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1031 tagaddr+=4;
mbed_official 573:ad23fe03a082 1032 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1033 tagaddr+=4;
mbed_official 573:ad23fe03a082 1034 *(uint32_t*)(tagaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1035 }
mbed_official 573:ad23fe03a082 1036
mbed_official 573:ad23fe03a082 1037 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1038 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1039
mbed_official 573:ad23fe03a082 1040 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1041 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1042
mbed_official 573:ad23fe03a082 1043 /* Return function status */
mbed_official 573:ad23fe03a082 1044 return HAL_OK;
mbed_official 573:ad23fe03a082 1045 }
mbed_official 573:ad23fe03a082 1046
mbed_official 573:ad23fe03a082 1047 /**
mbed_official 573:ad23fe03a082 1048 * @brief Computes the authentication TAG for AES CCM mode.
mbed_official 573:ad23fe03a082 1049 * @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
mbed_official 573:ad23fe03a082 1050 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1051 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1052 * @param AuthTag: Pointer to the authentication buffer
mbed_official 573:ad23fe03a082 1053 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 1054 * @retval HAL status
mbed_official 573:ad23fe03a082 1055 */
mbed_official 573:ad23fe03a082 1056 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1057 {
mbed_official 573:ad23fe03a082 1058 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 1059 uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official 573:ad23fe03a082 1060 uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 1061 uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */
mbed_official 573:ad23fe03a082 1062 uint32_t loopcounter;
mbed_official 573:ad23fe03a082 1063
mbed_official 573:ad23fe03a082 1064 /* Process Locked */
mbed_official 573:ad23fe03a082 1065 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 1066
mbed_official 573:ad23fe03a082 1067 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1068 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 1069
mbed_official 573:ad23fe03a082 1070 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 1071 if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official 573:ad23fe03a082 1072 {
mbed_official 573:ad23fe03a082 1073 /* Change the CRYP phase */
mbed_official 573:ad23fe03a082 1074 hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official 573:ad23fe03a082 1075
mbed_official 573:ad23fe03a082 1076 /* Disable CRYP to start the final phase */
mbed_official 573:ad23fe03a082 1077 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 1078
mbed_official 573:ad23fe03a082 1079 /* Select final phase */
mbed_official 573:ad23fe03a082 1080 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_FINAL);
mbed_official 573:ad23fe03a082 1081
mbed_official 573:ad23fe03a082 1082 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1083 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1084
mbed_official 573:ad23fe03a082 1085 /* Write the counter block in the IN FIFO */
mbed_official 573:ad23fe03a082 1086 hcryp->Instance->DR = *(uint32_t*)ctraddr;
mbed_official 573:ad23fe03a082 1087 ctraddr+=4;
mbed_official 573:ad23fe03a082 1088 hcryp->Instance->DR = *(uint32_t*)ctraddr;
mbed_official 573:ad23fe03a082 1089 ctraddr+=4;
mbed_official 573:ad23fe03a082 1090 hcryp->Instance->DR = *(uint32_t*)ctraddr;
mbed_official 573:ad23fe03a082 1091 ctraddr+=4;
mbed_official 573:ad23fe03a082 1092 hcryp->Instance->DR = *(uint32_t*)ctraddr;
mbed_official 573:ad23fe03a082 1093
mbed_official 573:ad23fe03a082 1094 /* Get tick */
mbed_official 573:ad23fe03a082 1095 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1096
mbed_official 573:ad23fe03a082 1097 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
mbed_official 573:ad23fe03a082 1098 {
mbed_official 573:ad23fe03a082 1099 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1100 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1101 {
mbed_official 573:ad23fe03a082 1102 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 1103 {
mbed_official 573:ad23fe03a082 1104 /* Change state */
mbed_official 573:ad23fe03a082 1105 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1106
mbed_official 573:ad23fe03a082 1107 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1108 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1109
mbed_official 573:ad23fe03a082 1110 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1111 }
mbed_official 573:ad23fe03a082 1112 }
mbed_official 573:ad23fe03a082 1113 }
mbed_official 573:ad23fe03a082 1114
mbed_official 573:ad23fe03a082 1115 /* Read the Auth TAG in the IN FIFO */
mbed_official 573:ad23fe03a082 1116 temptag[0] = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1117 temptag[1] = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1118 temptag[2] = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1119 temptag[3] = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1120 }
mbed_official 573:ad23fe03a082 1121
mbed_official 573:ad23fe03a082 1122 /* Copy temporary authentication TAG in user TAG buffer */
mbed_official 573:ad23fe03a082 1123 for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++)
mbed_official 573:ad23fe03a082 1124 {
mbed_official 573:ad23fe03a082 1125 /* Set the authentication TAG buffer */
mbed_official 573:ad23fe03a082 1126 *((uint8_t*)tagaddr+loopcounter) = *((uint8_t*)temptag+loopcounter);
mbed_official 573:ad23fe03a082 1127 }
mbed_official 573:ad23fe03a082 1128
mbed_official 573:ad23fe03a082 1129 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1130 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1131
mbed_official 573:ad23fe03a082 1132 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1133 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1134
mbed_official 573:ad23fe03a082 1135 /* Return function status */
mbed_official 573:ad23fe03a082 1136 return HAL_OK;
mbed_official 573:ad23fe03a082 1137 }
mbed_official 573:ad23fe03a082 1138
mbed_official 573:ad23fe03a082 1139 /**
mbed_official 573:ad23fe03a082 1140 * @brief Initializes the CRYP peripheral in AES CCM decryption mode then
mbed_official 573:ad23fe03a082 1141 * decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 573:ad23fe03a082 1142 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1143 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1144 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 1145 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 1146 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 1147 * @param Timeout: Timeout duration
mbed_official 573:ad23fe03a082 1148 * @retval HAL status
mbed_official 573:ad23fe03a082 1149 */
mbed_official 573:ad23fe03a082 1150 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1151 {
mbed_official 573:ad23fe03a082 1152 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 1153 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 1154 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 1155 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 1156 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 1157 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 1158 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 1159 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 1160
mbed_official 573:ad23fe03a082 1161 /* Process Locked */
mbed_official 573:ad23fe03a082 1162 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 1163
mbed_official 573:ad23fe03a082 1164 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1165 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 1166
mbed_official 573:ad23fe03a082 1167 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 1168 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 1169 {
mbed_official 573:ad23fe03a082 1170 /************************ Formatting the header block *********************/
mbed_official 573:ad23fe03a082 1171 if(headersize != 0)
mbed_official 573:ad23fe03a082 1172 {
mbed_official 573:ad23fe03a082 1173 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 1174 if(headersize < 65280)
mbed_official 573:ad23fe03a082 1175 {
mbed_official 573:ad23fe03a082 1176 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 1177 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 1178 headersize += 2;
mbed_official 573:ad23fe03a082 1179 }
mbed_official 573:ad23fe03a082 1180 else
mbed_official 573:ad23fe03a082 1181 {
mbed_official 573:ad23fe03a082 1182 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 1183 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 1184 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 1185 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 1186 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 1187 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 1188 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 1189 headersize += 6;
mbed_official 573:ad23fe03a082 1190 }
mbed_official 573:ad23fe03a082 1191 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 1192 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 1193 {
mbed_official 573:ad23fe03a082 1194 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 1195 }
mbed_official 573:ad23fe03a082 1196 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 1197 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 1198 {
mbed_official 573:ad23fe03a082 1199 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 1200 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 1201 {
mbed_official 573:ad23fe03a082 1202 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 1203 }
mbed_official 573:ad23fe03a082 1204 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 1205 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 1206 }
mbed_official 573:ad23fe03a082 1207 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 1208 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 1209 }
mbed_official 573:ad23fe03a082 1210 /*********************** Formatting the block B0 **************************/
mbed_official 573:ad23fe03a082 1211 if(headersize != 0)
mbed_official 573:ad23fe03a082 1212 {
mbed_official 573:ad23fe03a082 1213 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 1214 }
mbed_official 573:ad23fe03a082 1215 /* Flags byte */
mbed_official 573:ad23fe03a082 1216 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 1217 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 1218 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 1219
mbed_official 573:ad23fe03a082 1220 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 1221 {
mbed_official 573:ad23fe03a082 1222 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 1223 }
mbed_official 573:ad23fe03a082 1224 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 1225 {
mbed_official 573:ad23fe03a082 1226 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 1227 }
mbed_official 573:ad23fe03a082 1228
mbed_official 573:ad23fe03a082 1229 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 1230 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 1231
mbed_official 573:ad23fe03a082 1232 /************************* Formatting the initial counter *****************/
mbed_official 573:ad23fe03a082 1233 /* Byte 0:
mbed_official 573:ad23fe03a082 1234 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 1235 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 573:ad23fe03a082 1236 blocks are distinct from B0
mbed_official 573:ad23fe03a082 1237 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 1238 */
mbed_official 573:ad23fe03a082 1239 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 1240 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 1241 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 1242 {
mbed_official 573:ad23fe03a082 1243 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 1244 }
mbed_official 573:ad23fe03a082 1245 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 1246 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 1247
mbed_official 573:ad23fe03a082 1248 /* Set the key */
mbed_official 573:ad23fe03a082 1249 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 1250
mbed_official 573:ad23fe03a082 1251 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 1252 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 573:ad23fe03a082 1253
mbed_official 573:ad23fe03a082 1254 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 1255 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 1256
mbed_official 573:ad23fe03a082 1257 /* Select init phase */
mbed_official 573:ad23fe03a082 1258 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 1259
mbed_official 573:ad23fe03a082 1260 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 1261 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 1262 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1263 b0addr+=4;
mbed_official 573:ad23fe03a082 1264 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1265 b0addr+=4;
mbed_official 573:ad23fe03a082 1266 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1267 b0addr+=4;
mbed_official 573:ad23fe03a082 1268 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1269
mbed_official 573:ad23fe03a082 1270 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1271 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1272
mbed_official 573:ad23fe03a082 1273 /* Get tick */
mbed_official 573:ad23fe03a082 1274 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1275
mbed_official 573:ad23fe03a082 1276 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 1277 {
mbed_official 573:ad23fe03a082 1278 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1279 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1280 {
mbed_official 573:ad23fe03a082 1281 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 1282 {
mbed_official 573:ad23fe03a082 1283 /* Change state */
mbed_official 573:ad23fe03a082 1284 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1285
mbed_official 573:ad23fe03a082 1286 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1287 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1288
mbed_official 573:ad23fe03a082 1289 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1290 }
mbed_official 573:ad23fe03a082 1291 }
mbed_official 573:ad23fe03a082 1292 }
mbed_official 573:ad23fe03a082 1293 /***************************** Header phase *******************************/
mbed_official 573:ad23fe03a082 1294 if(headersize != 0)
mbed_official 573:ad23fe03a082 1295 {
mbed_official 573:ad23fe03a082 1296 /* Select header phase */
mbed_official 573:ad23fe03a082 1297 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 1298
mbed_official 573:ad23fe03a082 1299 /* Enable Crypto processor */
mbed_official 573:ad23fe03a082 1300 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1301
mbed_official 573:ad23fe03a082 1302 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 1303 {
mbed_official 573:ad23fe03a082 1304 /* Get tick */
mbed_official 573:ad23fe03a082 1305 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1306
mbed_official 573:ad23fe03a082 1307 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 1308 {
mbed_official 573:ad23fe03a082 1309 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1310 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1311 {
mbed_official 573:ad23fe03a082 1312 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 1313 {
mbed_official 573:ad23fe03a082 1314 /* Change state */
mbed_official 573:ad23fe03a082 1315 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1316
mbed_official 573:ad23fe03a082 1317 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1318 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1319
mbed_official 573:ad23fe03a082 1320 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1321 }
mbed_official 573:ad23fe03a082 1322 }
mbed_official 573:ad23fe03a082 1323 }
mbed_official 573:ad23fe03a082 1324 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 1325 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1326 headeraddr+=4;
mbed_official 573:ad23fe03a082 1327 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1328 headeraddr+=4;
mbed_official 573:ad23fe03a082 1329 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1330 headeraddr+=4;
mbed_official 573:ad23fe03a082 1331 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1332 headeraddr+=4;
mbed_official 573:ad23fe03a082 1333 }
mbed_official 573:ad23fe03a082 1334
mbed_official 573:ad23fe03a082 1335 /* Get tick */
mbed_official 573:ad23fe03a082 1336 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1337
mbed_official 573:ad23fe03a082 1338 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 1339 {
mbed_official 573:ad23fe03a082 1340 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1341 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1342 {
mbed_official 573:ad23fe03a082 1343 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 1344 {
mbed_official 573:ad23fe03a082 1345 /* Change state */
mbed_official 573:ad23fe03a082 1346 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1347
mbed_official 573:ad23fe03a082 1348 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1349 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1350
mbed_official 573:ad23fe03a082 1351 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1352 }
mbed_official 573:ad23fe03a082 1353 }
mbed_official 573:ad23fe03a082 1354 }
mbed_official 573:ad23fe03a082 1355 }
mbed_official 573:ad23fe03a082 1356 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 1357 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 1358 {
mbed_official 573:ad23fe03a082 1359 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 1360 }
mbed_official 573:ad23fe03a082 1361 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 1362 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 1363 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 1364 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 1365
mbed_official 573:ad23fe03a082 1366 /* Flush FIFO */
mbed_official 573:ad23fe03a082 1367 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 1368
mbed_official 573:ad23fe03a082 1369 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1370 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1371
mbed_official 573:ad23fe03a082 1372 /* Set the phase */
mbed_official 573:ad23fe03a082 1373 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 1374 }
mbed_official 573:ad23fe03a082 1375
mbed_official 573:ad23fe03a082 1376 /* Write Plain Data and Get Cypher Data */
mbed_official 573:ad23fe03a082 1377 if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1378 {
mbed_official 573:ad23fe03a082 1379 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1380 }
mbed_official 573:ad23fe03a082 1381
mbed_official 573:ad23fe03a082 1382 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1383 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1384
mbed_official 573:ad23fe03a082 1385 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1386 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1387
mbed_official 573:ad23fe03a082 1388 /* Return function status */
mbed_official 573:ad23fe03a082 1389 return HAL_OK;
mbed_official 573:ad23fe03a082 1390 }
mbed_official 573:ad23fe03a082 1391
mbed_official 573:ad23fe03a082 1392 /**
mbed_official 573:ad23fe03a082 1393 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
mbed_official 573:ad23fe03a082 1394 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1395 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1396 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 1397 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 1398 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 1399 * @retval HAL status
mbed_official 573:ad23fe03a082 1400 */
mbed_official 573:ad23fe03a082 1401 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 573:ad23fe03a082 1402 {
mbed_official 573:ad23fe03a082 1403 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 1404 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 1405 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 1406
mbed_official 573:ad23fe03a082 1407 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 573:ad23fe03a082 1408 {
mbed_official 573:ad23fe03a082 1409 /* Process Locked */
mbed_official 573:ad23fe03a082 1410 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 1411
mbed_official 573:ad23fe03a082 1412 /* Get the buffer addresses and sizes */
mbed_official 573:ad23fe03a082 1413 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 1414 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 1415 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 1416 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 1417
mbed_official 573:ad23fe03a082 1418 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1419 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 1420
mbed_official 573:ad23fe03a082 1421 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 1422 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 1423 {
mbed_official 573:ad23fe03a082 1424 /* Set the key */
mbed_official 573:ad23fe03a082 1425 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 1426
mbed_official 573:ad23fe03a082 1427 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 573:ad23fe03a082 1428 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 573:ad23fe03a082 1429
mbed_official 573:ad23fe03a082 1430 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 1431 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 1432
mbed_official 573:ad23fe03a082 1433 /* Flush FIFO */
mbed_official 573:ad23fe03a082 1434 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 1435
mbed_official 573:ad23fe03a082 1436 /* Enable CRYP to start the init phase */
mbed_official 573:ad23fe03a082 1437 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1438
mbed_official 573:ad23fe03a082 1439 /* Get tick */
mbed_official 573:ad23fe03a082 1440 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1441
mbed_official 573:ad23fe03a082 1442 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 1443 {
mbed_official 573:ad23fe03a082 1444 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1445
mbed_official 573:ad23fe03a082 1446 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 1447 {
mbed_official 573:ad23fe03a082 1448 /* Change state */
mbed_official 573:ad23fe03a082 1449 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1450
mbed_official 573:ad23fe03a082 1451 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1452 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1453
mbed_official 573:ad23fe03a082 1454 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1455
mbed_official 573:ad23fe03a082 1456 }
mbed_official 573:ad23fe03a082 1457 }
mbed_official 573:ad23fe03a082 1458
mbed_official 573:ad23fe03a082 1459 /* Set the header phase */
mbed_official 573:ad23fe03a082 1460 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 573:ad23fe03a082 1461 {
mbed_official 573:ad23fe03a082 1462 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1463 }
mbed_official 573:ad23fe03a082 1464 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1465 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 1466
mbed_official 573:ad23fe03a082 1467 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 1468 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 1469
mbed_official 573:ad23fe03a082 1470 /* Flush FIFO */
mbed_official 573:ad23fe03a082 1471 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 1472
mbed_official 573:ad23fe03a082 1473 /* Set the phase */
mbed_official 573:ad23fe03a082 1474 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 1475 }
mbed_official 573:ad23fe03a082 1476
mbed_official 573:ad23fe03a082 1477 if(Size != 0)
mbed_official 573:ad23fe03a082 1478 {
mbed_official 573:ad23fe03a082 1479 /* Enable Interrupts */
mbed_official 573:ad23fe03a082 1480 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1481 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1482 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1483 }
mbed_official 573:ad23fe03a082 1484 else
mbed_official 573:ad23fe03a082 1485 {
mbed_official 573:ad23fe03a082 1486 /* Process Locked */
mbed_official 573:ad23fe03a082 1487 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1488 /* Change the CRYP state and phase */
mbed_official 573:ad23fe03a082 1489 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1490 }
mbed_official 573:ad23fe03a082 1491 /* Return function status */
mbed_official 573:ad23fe03a082 1492 return HAL_OK;
mbed_official 573:ad23fe03a082 1493 }
mbed_official 573:ad23fe03a082 1494 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
mbed_official 573:ad23fe03a082 1495 {
mbed_official 573:ad23fe03a082 1496 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 573:ad23fe03a082 1497 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 1498 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1499 inputaddr+=4;
mbed_official 573:ad23fe03a082 1500 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1501 inputaddr+=4;
mbed_official 573:ad23fe03a082 1502 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1503 inputaddr+=4;
mbed_official 573:ad23fe03a082 1504 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1505 hcryp->pCrypInBuffPtr += 16;
mbed_official 573:ad23fe03a082 1506 hcryp->CrypInCount -= 16;
mbed_official 573:ad23fe03a082 1507 if(hcryp->CrypInCount == 0)
mbed_official 573:ad23fe03a082 1508 {
mbed_official 573:ad23fe03a082 1509 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
mbed_official 573:ad23fe03a082 1510 /* Call the Input data transfer complete callback */
mbed_official 573:ad23fe03a082 1511 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1512 }
mbed_official 573:ad23fe03a082 1513 }
mbed_official 573:ad23fe03a082 1514 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
mbed_official 573:ad23fe03a082 1515 {
mbed_official 573:ad23fe03a082 1516 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 573:ad23fe03a082 1517 /* Read the Output block from the Output FIFO */
mbed_official 573:ad23fe03a082 1518 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1519 outputaddr+=4;
mbed_official 573:ad23fe03a082 1520 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1521 outputaddr+=4;
mbed_official 573:ad23fe03a082 1522 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1523 outputaddr+=4;
mbed_official 573:ad23fe03a082 1524 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1525 hcryp->pCrypOutBuffPtr += 16;
mbed_official 573:ad23fe03a082 1526 hcryp->CrypOutCount -= 16;
mbed_official 573:ad23fe03a082 1527 if(hcryp->CrypOutCount == 0)
mbed_official 573:ad23fe03a082 1528 {
mbed_official 573:ad23fe03a082 1529 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1530 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1531 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1532 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1533 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1534 /* Call Input transfer complete callback */
mbed_official 573:ad23fe03a082 1535 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1536 }
mbed_official 573:ad23fe03a082 1537 }
mbed_official 573:ad23fe03a082 1538
mbed_official 573:ad23fe03a082 1539 /* Return function status */
mbed_official 573:ad23fe03a082 1540 return HAL_OK;
mbed_official 573:ad23fe03a082 1541 }
mbed_official 573:ad23fe03a082 1542
mbed_official 573:ad23fe03a082 1543 /**
mbed_official 573:ad23fe03a082 1544 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official 573:ad23fe03a082 1545 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1546 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1547 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 1548 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 1549 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 1550 * @retval HAL status
mbed_official 573:ad23fe03a082 1551 */
mbed_official 573:ad23fe03a082 1552 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 573:ad23fe03a082 1553 {
mbed_official 573:ad23fe03a082 1554 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 1555 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 1556 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 1557
mbed_official 573:ad23fe03a082 1558 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 1559 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 1560 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 1561 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 1562 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 1563 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 1564 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 1565
mbed_official 573:ad23fe03a082 1566 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 573:ad23fe03a082 1567 {
mbed_official 573:ad23fe03a082 1568 /* Process Locked */
mbed_official 573:ad23fe03a082 1569 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 1570
mbed_official 573:ad23fe03a082 1571 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 1572 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 1573 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 1574 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 1575
mbed_official 573:ad23fe03a082 1576 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1577 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 1578
mbed_official 573:ad23fe03a082 1579 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 1580 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 1581 {
mbed_official 573:ad23fe03a082 1582 /************************ Formatting the header block *******************/
mbed_official 573:ad23fe03a082 1583 if(headersize != 0)
mbed_official 573:ad23fe03a082 1584 {
mbed_official 573:ad23fe03a082 1585 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 1586 if(headersize < 65280)
mbed_official 573:ad23fe03a082 1587 {
mbed_official 573:ad23fe03a082 1588 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 1589 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 1590 headersize += 2;
mbed_official 573:ad23fe03a082 1591 }
mbed_official 573:ad23fe03a082 1592 else
mbed_official 573:ad23fe03a082 1593 {
mbed_official 573:ad23fe03a082 1594 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 1595 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 1596 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 1597 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 1598 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 1599 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 1600 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 1601 headersize += 6;
mbed_official 573:ad23fe03a082 1602 }
mbed_official 573:ad23fe03a082 1603 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 1604 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 1605 {
mbed_official 573:ad23fe03a082 1606 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 1607 }
mbed_official 573:ad23fe03a082 1608 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 1609 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 1610 {
mbed_official 573:ad23fe03a082 1611 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 1612 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 1613 {
mbed_official 573:ad23fe03a082 1614 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 1615 }
mbed_official 573:ad23fe03a082 1616 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 1617 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 1618 }
mbed_official 573:ad23fe03a082 1619 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 1620 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 1621 }
mbed_official 573:ad23fe03a082 1622 /*********************** Formatting the block B0 ************************/
mbed_official 573:ad23fe03a082 1623 if(headersize != 0)
mbed_official 573:ad23fe03a082 1624 {
mbed_official 573:ad23fe03a082 1625 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 1626 }
mbed_official 573:ad23fe03a082 1627 /* Flags byte */
mbed_official 573:ad23fe03a082 1628 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 1629 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 1630 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 1631
mbed_official 573:ad23fe03a082 1632 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 1633 {
mbed_official 573:ad23fe03a082 1634 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 1635 }
mbed_official 573:ad23fe03a082 1636 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 1637 {
mbed_official 573:ad23fe03a082 1638 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 1639 }
mbed_official 573:ad23fe03a082 1640
mbed_official 573:ad23fe03a082 1641 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 1642 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 1643
mbed_official 573:ad23fe03a082 1644 /************************* Formatting the initial counter ***************/
mbed_official 573:ad23fe03a082 1645 /* Byte 0:
mbed_official 573:ad23fe03a082 1646 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 1647 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 573:ad23fe03a082 1648 blocks are distinct from B0
mbed_official 573:ad23fe03a082 1649 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 1650 */
mbed_official 573:ad23fe03a082 1651 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 1652 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 1653 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 1654 {
mbed_official 573:ad23fe03a082 1655 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 1656 }
mbed_official 573:ad23fe03a082 1657 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 1658 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 1659
mbed_official 573:ad23fe03a082 1660 /* Set the key */
mbed_official 573:ad23fe03a082 1661 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 1662
mbed_official 573:ad23fe03a082 1663 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 1664 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 573:ad23fe03a082 1665
mbed_official 573:ad23fe03a082 1666 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 1667 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 1668
mbed_official 573:ad23fe03a082 1669 /* Select init phase */
mbed_official 573:ad23fe03a082 1670 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 1671
mbed_official 573:ad23fe03a082 1672 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 1673 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 1674 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1675 b0addr+=4;
mbed_official 573:ad23fe03a082 1676 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1677 b0addr+=4;
mbed_official 573:ad23fe03a082 1678 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1679 b0addr+=4;
mbed_official 573:ad23fe03a082 1680 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 1681
mbed_official 573:ad23fe03a082 1682 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1683 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1684
mbed_official 573:ad23fe03a082 1685 /* Get tick */
mbed_official 573:ad23fe03a082 1686 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1687
mbed_official 573:ad23fe03a082 1688 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 1689 {
mbed_official 573:ad23fe03a082 1690 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1691 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 1692 {
mbed_official 573:ad23fe03a082 1693 /* Change state */
mbed_official 573:ad23fe03a082 1694 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1695
mbed_official 573:ad23fe03a082 1696 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1697 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1698
mbed_official 573:ad23fe03a082 1699 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1700 }
mbed_official 573:ad23fe03a082 1701 }
mbed_official 573:ad23fe03a082 1702 /***************************** Header phase *****************************/
mbed_official 573:ad23fe03a082 1703 if(headersize != 0)
mbed_official 573:ad23fe03a082 1704 {
mbed_official 573:ad23fe03a082 1705 /* Select header phase */
mbed_official 573:ad23fe03a082 1706 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 1707
mbed_official 573:ad23fe03a082 1708 /* Enable Crypto processor */
mbed_official 573:ad23fe03a082 1709 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1710
mbed_official 573:ad23fe03a082 1711 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 1712 {
mbed_official 573:ad23fe03a082 1713 /* Get tick */
mbed_official 573:ad23fe03a082 1714 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1715
mbed_official 573:ad23fe03a082 1716 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 1717 {
mbed_official 573:ad23fe03a082 1718 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1719 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 1720 {
mbed_official 573:ad23fe03a082 1721 /* Change state */
mbed_official 573:ad23fe03a082 1722 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1723
mbed_official 573:ad23fe03a082 1724 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1725 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1726
mbed_official 573:ad23fe03a082 1727 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1728 }
mbed_official 573:ad23fe03a082 1729 }
mbed_official 573:ad23fe03a082 1730 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 1731 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1732 headeraddr+=4;
mbed_official 573:ad23fe03a082 1733 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1734 headeraddr+=4;
mbed_official 573:ad23fe03a082 1735 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1736 headeraddr+=4;
mbed_official 573:ad23fe03a082 1737 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 1738 headeraddr+=4;
mbed_official 573:ad23fe03a082 1739 }
mbed_official 573:ad23fe03a082 1740
mbed_official 573:ad23fe03a082 1741 /* Get tick */
mbed_official 573:ad23fe03a082 1742 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1743
mbed_official 573:ad23fe03a082 1744 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 1745 {
mbed_official 573:ad23fe03a082 1746 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1747 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 1748 {
mbed_official 573:ad23fe03a082 1749 /* Change state */
mbed_official 573:ad23fe03a082 1750 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1751
mbed_official 573:ad23fe03a082 1752 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1753 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1754
mbed_official 573:ad23fe03a082 1755 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1756 }
mbed_official 573:ad23fe03a082 1757 }
mbed_official 573:ad23fe03a082 1758 }
mbed_official 573:ad23fe03a082 1759 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 1760 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 1761 {
mbed_official 573:ad23fe03a082 1762 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 1763 }
mbed_official 573:ad23fe03a082 1764 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 1765 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 1766
mbed_official 573:ad23fe03a082 1767 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 1768 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 1769
mbed_official 573:ad23fe03a082 1770 /* Flush FIFO */
mbed_official 573:ad23fe03a082 1771 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 1772
mbed_official 573:ad23fe03a082 1773 /* Set the phase */
mbed_official 573:ad23fe03a082 1774 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 1775 }
mbed_official 573:ad23fe03a082 1776
mbed_official 573:ad23fe03a082 1777 if(Size != 0)
mbed_official 573:ad23fe03a082 1778 {
mbed_official 573:ad23fe03a082 1779 /* Enable Interrupts */
mbed_official 573:ad23fe03a082 1780 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1781 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1782 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1783 }
mbed_official 573:ad23fe03a082 1784 else
mbed_official 573:ad23fe03a082 1785 {
mbed_official 573:ad23fe03a082 1786 /* Change the CRYP state and phase */
mbed_official 573:ad23fe03a082 1787 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1788 }
mbed_official 573:ad23fe03a082 1789
mbed_official 573:ad23fe03a082 1790 /* Return function status */
mbed_official 573:ad23fe03a082 1791 return HAL_OK;
mbed_official 573:ad23fe03a082 1792 }
mbed_official 573:ad23fe03a082 1793 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
mbed_official 573:ad23fe03a082 1794 {
mbed_official 573:ad23fe03a082 1795 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 573:ad23fe03a082 1796 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 1797 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1798 inputaddr+=4;
mbed_official 573:ad23fe03a082 1799 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1800 inputaddr+=4;
mbed_official 573:ad23fe03a082 1801 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1802 inputaddr+=4;
mbed_official 573:ad23fe03a082 1803 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1804 hcryp->pCrypInBuffPtr += 16;
mbed_official 573:ad23fe03a082 1805 hcryp->CrypInCount -= 16;
mbed_official 573:ad23fe03a082 1806 if(hcryp->CrypInCount == 0)
mbed_official 573:ad23fe03a082 1807 {
mbed_official 573:ad23fe03a082 1808 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
mbed_official 573:ad23fe03a082 1809 /* Call Input transfer complete callback */
mbed_official 573:ad23fe03a082 1810 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1811 }
mbed_official 573:ad23fe03a082 1812 }
mbed_official 573:ad23fe03a082 1813 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
mbed_official 573:ad23fe03a082 1814 {
mbed_official 573:ad23fe03a082 1815 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 573:ad23fe03a082 1816 /* Read the Output block from the Output FIFO */
mbed_official 573:ad23fe03a082 1817 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1818 outputaddr+=4;
mbed_official 573:ad23fe03a082 1819 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1820 outputaddr+=4;
mbed_official 573:ad23fe03a082 1821 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1822 outputaddr+=4;
mbed_official 573:ad23fe03a082 1823 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1824 hcryp->pCrypOutBuffPtr += 16;
mbed_official 573:ad23fe03a082 1825 hcryp->CrypOutCount -= 16;
mbed_official 573:ad23fe03a082 1826 if(hcryp->CrypOutCount == 0)
mbed_official 573:ad23fe03a082 1827 {
mbed_official 573:ad23fe03a082 1828 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1829 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1830 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1831 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1832 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1833 /* Call Input transfer complete callback */
mbed_official 573:ad23fe03a082 1834 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1835 }
mbed_official 573:ad23fe03a082 1836 }
mbed_official 573:ad23fe03a082 1837
mbed_official 573:ad23fe03a082 1838 /* Return function status */
mbed_official 573:ad23fe03a082 1839 return HAL_OK;
mbed_official 573:ad23fe03a082 1840 }
mbed_official 573:ad23fe03a082 1841
mbed_official 573:ad23fe03a082 1842 /**
mbed_official 573:ad23fe03a082 1843 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
mbed_official 573:ad23fe03a082 1844 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1845 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1846 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 1847 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 1848 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 1849 * @retval HAL status
mbed_official 573:ad23fe03a082 1850 */
mbed_official 573:ad23fe03a082 1851 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 573:ad23fe03a082 1852 {
mbed_official 573:ad23fe03a082 1853 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 1854 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 1855 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 1856
mbed_official 573:ad23fe03a082 1857 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 573:ad23fe03a082 1858 {
mbed_official 573:ad23fe03a082 1859 /* Process Locked */
mbed_official 573:ad23fe03a082 1860 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 1861
mbed_official 573:ad23fe03a082 1862 /* Get the buffer addresses and sizes */
mbed_official 573:ad23fe03a082 1863 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 1864 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 1865 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 1866 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 1867
mbed_official 573:ad23fe03a082 1868 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1869 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 1870
mbed_official 573:ad23fe03a082 1871 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 1872 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 1873 {
mbed_official 573:ad23fe03a082 1874 /* Set the key */
mbed_official 573:ad23fe03a082 1875 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 1876
mbed_official 573:ad23fe03a082 1877 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 573:ad23fe03a082 1878 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 573:ad23fe03a082 1879
mbed_official 573:ad23fe03a082 1880 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 1881 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 1882
mbed_official 573:ad23fe03a082 1883 /* Flush FIFO */
mbed_official 573:ad23fe03a082 1884 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 1885
mbed_official 573:ad23fe03a082 1886 /* Enable CRYP to start the init phase */
mbed_official 573:ad23fe03a082 1887 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1888
mbed_official 573:ad23fe03a082 1889 /* Get tick */
mbed_official 573:ad23fe03a082 1890 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1891
mbed_official 573:ad23fe03a082 1892 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 1893 {
mbed_official 573:ad23fe03a082 1894 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1895 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 1896 {
mbed_official 573:ad23fe03a082 1897 /* Change state */
mbed_official 573:ad23fe03a082 1898 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 1899
mbed_official 573:ad23fe03a082 1900 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1901 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1902
mbed_official 573:ad23fe03a082 1903 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1904 }
mbed_official 573:ad23fe03a082 1905 }
mbed_official 573:ad23fe03a082 1906
mbed_official 573:ad23fe03a082 1907 /* Set the header phase */
mbed_official 573:ad23fe03a082 1908 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 573:ad23fe03a082 1909 {
mbed_official 573:ad23fe03a082 1910 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1911 }
mbed_official 573:ad23fe03a082 1912 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1913 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 1914
mbed_official 573:ad23fe03a082 1915 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 1916 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 1917
mbed_official 573:ad23fe03a082 1918 /* Set the phase */
mbed_official 573:ad23fe03a082 1919 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 1920 }
mbed_official 573:ad23fe03a082 1921
mbed_official 573:ad23fe03a082 1922 if(Size != 0)
mbed_official 573:ad23fe03a082 1923 {
mbed_official 573:ad23fe03a082 1924 /* Enable Interrupts */
mbed_official 573:ad23fe03a082 1925 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1926 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 1927 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 1928 }
mbed_official 573:ad23fe03a082 1929 else
mbed_official 573:ad23fe03a082 1930 {
mbed_official 573:ad23fe03a082 1931 /* Process Locked */
mbed_official 573:ad23fe03a082 1932 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1933 /* Change the CRYP state and phase */
mbed_official 573:ad23fe03a082 1934 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1935 }
mbed_official 573:ad23fe03a082 1936
mbed_official 573:ad23fe03a082 1937 /* Return function status */
mbed_official 573:ad23fe03a082 1938 return HAL_OK;
mbed_official 573:ad23fe03a082 1939 }
mbed_official 573:ad23fe03a082 1940 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
mbed_official 573:ad23fe03a082 1941 {
mbed_official 573:ad23fe03a082 1942 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 573:ad23fe03a082 1943 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 1944 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1945 inputaddr+=4;
mbed_official 573:ad23fe03a082 1946 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1947 inputaddr+=4;
mbed_official 573:ad23fe03a082 1948 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1949 inputaddr+=4;
mbed_official 573:ad23fe03a082 1950 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 1951 hcryp->pCrypInBuffPtr += 16;
mbed_official 573:ad23fe03a082 1952 hcryp->CrypInCount -= 16;
mbed_official 573:ad23fe03a082 1953 if(hcryp->CrypInCount == 0)
mbed_official 573:ad23fe03a082 1954 {
mbed_official 573:ad23fe03a082 1955 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
mbed_official 573:ad23fe03a082 1956 /* Call the Input data transfer complete callback */
mbed_official 573:ad23fe03a082 1957 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1958 }
mbed_official 573:ad23fe03a082 1959 }
mbed_official 573:ad23fe03a082 1960 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
mbed_official 573:ad23fe03a082 1961 {
mbed_official 573:ad23fe03a082 1962 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 573:ad23fe03a082 1963 /* Read the Output block from the Output FIFO */
mbed_official 573:ad23fe03a082 1964 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1965 outputaddr+=4;
mbed_official 573:ad23fe03a082 1966 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1967 outputaddr+=4;
mbed_official 573:ad23fe03a082 1968 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1969 outputaddr+=4;
mbed_official 573:ad23fe03a082 1970 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 1971 hcryp->pCrypOutBuffPtr += 16;
mbed_official 573:ad23fe03a082 1972 hcryp->CrypOutCount -= 16;
mbed_official 573:ad23fe03a082 1973 if(hcryp->CrypOutCount == 0)
mbed_official 573:ad23fe03a082 1974 {
mbed_official 573:ad23fe03a082 1975 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 1976 /* Process Unlocked */
mbed_official 573:ad23fe03a082 1977 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 1978 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 1979 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 1980 /* Call Input transfer complete callback */
mbed_official 573:ad23fe03a082 1981 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 1982 }
mbed_official 573:ad23fe03a082 1983 }
mbed_official 573:ad23fe03a082 1984
mbed_official 573:ad23fe03a082 1985 /* Return function status */
mbed_official 573:ad23fe03a082 1986 return HAL_OK;
mbed_official 573:ad23fe03a082 1987 }
mbed_official 573:ad23fe03a082 1988
mbed_official 573:ad23fe03a082 1989 /**
mbed_official 573:ad23fe03a082 1990 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
mbed_official 573:ad23fe03a082 1991 * then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 573:ad23fe03a082 1992 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 1993 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 1994 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 1995 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 1996 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 1997 * @retval HAL status
mbed_official 573:ad23fe03a082 1998 */
mbed_official 573:ad23fe03a082 1999 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 573:ad23fe03a082 2000 {
mbed_official 573:ad23fe03a082 2001 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 2002 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 2003 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 2004 uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 2005 uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 2006 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 2007 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 2008 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 2009 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 2010 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2011
mbed_official 573:ad23fe03a082 2012 if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official 573:ad23fe03a082 2013 {
mbed_official 573:ad23fe03a082 2014 /* Process Locked */
mbed_official 573:ad23fe03a082 2015 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 2016
mbed_official 573:ad23fe03a082 2017 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 2018 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 2019 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 2020 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 2021
mbed_official 573:ad23fe03a082 2022 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2023 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 2024
mbed_official 573:ad23fe03a082 2025 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 2026 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 2027 {
mbed_official 573:ad23fe03a082 2028 /************************ Formatting the header block *******************/
mbed_official 573:ad23fe03a082 2029 if(headersize != 0)
mbed_official 573:ad23fe03a082 2030 {
mbed_official 573:ad23fe03a082 2031 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 2032 if(headersize < 65280)
mbed_official 573:ad23fe03a082 2033 {
mbed_official 573:ad23fe03a082 2034 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 2035 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 2036 headersize += 2;
mbed_official 573:ad23fe03a082 2037 }
mbed_official 573:ad23fe03a082 2038 else
mbed_official 573:ad23fe03a082 2039 {
mbed_official 573:ad23fe03a082 2040 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 2041 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 2042 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 2043 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 2044 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 2045 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 2046 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 2047 headersize += 6;
mbed_official 573:ad23fe03a082 2048 }
mbed_official 573:ad23fe03a082 2049 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 2050 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 2051 {
mbed_official 573:ad23fe03a082 2052 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 2053 }
mbed_official 573:ad23fe03a082 2054 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 2055 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 2056 {
mbed_official 573:ad23fe03a082 2057 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 2058 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 2059 {
mbed_official 573:ad23fe03a082 2060 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 2061 }
mbed_official 573:ad23fe03a082 2062 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 2063 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 2064 }
mbed_official 573:ad23fe03a082 2065 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 2066 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 2067 }
mbed_official 573:ad23fe03a082 2068 /*********************** Formatting the block B0 ************************/
mbed_official 573:ad23fe03a082 2069 if(headersize != 0)
mbed_official 573:ad23fe03a082 2070 {
mbed_official 573:ad23fe03a082 2071 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 2072 }
mbed_official 573:ad23fe03a082 2073 /* Flags byte */
mbed_official 573:ad23fe03a082 2074 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 2075 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 2076 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 2077
mbed_official 573:ad23fe03a082 2078 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 2079 {
mbed_official 573:ad23fe03a082 2080 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 2081 }
mbed_official 573:ad23fe03a082 2082 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 2083 {
mbed_official 573:ad23fe03a082 2084 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 2085 }
mbed_official 573:ad23fe03a082 2086
mbed_official 573:ad23fe03a082 2087 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 2088 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 2089
mbed_official 573:ad23fe03a082 2090 /************************* Formatting the initial counter ***************/
mbed_official 573:ad23fe03a082 2091 /* Byte 0:
mbed_official 573:ad23fe03a082 2092 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 2093 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 573:ad23fe03a082 2094 blocks are distinct from B0
mbed_official 573:ad23fe03a082 2095 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 2096 */
mbed_official 573:ad23fe03a082 2097 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 2098 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 2099 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 2100 {
mbed_official 573:ad23fe03a082 2101 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 2102 }
mbed_official 573:ad23fe03a082 2103 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 2104 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 2105
mbed_official 573:ad23fe03a082 2106 /* Set the key */
mbed_official 573:ad23fe03a082 2107 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 2108
mbed_official 573:ad23fe03a082 2109 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 2110 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 573:ad23fe03a082 2111
mbed_official 573:ad23fe03a082 2112 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 2113 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 2114
mbed_official 573:ad23fe03a082 2115 /* Select init phase */
mbed_official 573:ad23fe03a082 2116 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 2117
mbed_official 573:ad23fe03a082 2118 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2119 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 2120 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2121 b0addr+=4;
mbed_official 573:ad23fe03a082 2122 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2123 b0addr+=4;
mbed_official 573:ad23fe03a082 2124 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2125 b0addr+=4;
mbed_official 573:ad23fe03a082 2126 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2127
mbed_official 573:ad23fe03a082 2128 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2129 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2130
mbed_official 573:ad23fe03a082 2131 /* Get tick */
mbed_official 573:ad23fe03a082 2132 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2133
mbed_official 573:ad23fe03a082 2134 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 2135 {
mbed_official 573:ad23fe03a082 2136 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2137 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2138 {
mbed_official 573:ad23fe03a082 2139 /* Change state */
mbed_official 573:ad23fe03a082 2140 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2141
mbed_official 573:ad23fe03a082 2142 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2143 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2144
mbed_official 573:ad23fe03a082 2145 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2146 }
mbed_official 573:ad23fe03a082 2147 }
mbed_official 573:ad23fe03a082 2148 /***************************** Header phase *****************************/
mbed_official 573:ad23fe03a082 2149 if(headersize != 0)
mbed_official 573:ad23fe03a082 2150 {
mbed_official 573:ad23fe03a082 2151 /* Select header phase */
mbed_official 573:ad23fe03a082 2152 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 2153
mbed_official 573:ad23fe03a082 2154 /* Enable Crypto processor */
mbed_official 573:ad23fe03a082 2155 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2156
mbed_official 573:ad23fe03a082 2157 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 2158 {
mbed_official 573:ad23fe03a082 2159 /* Get tick */
mbed_official 573:ad23fe03a082 2160 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2161
mbed_official 573:ad23fe03a082 2162 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 2163 {
mbed_official 573:ad23fe03a082 2164 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2165 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2166 {
mbed_official 573:ad23fe03a082 2167 /* Change state */
mbed_official 573:ad23fe03a082 2168 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2169
mbed_official 573:ad23fe03a082 2170 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2171 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2172
mbed_official 573:ad23fe03a082 2173 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2174 }
mbed_official 573:ad23fe03a082 2175 }
mbed_official 573:ad23fe03a082 2176 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 2177 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2178 headeraddr+=4;
mbed_official 573:ad23fe03a082 2179 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2180 headeraddr+=4;
mbed_official 573:ad23fe03a082 2181 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2182 headeraddr+=4;
mbed_official 573:ad23fe03a082 2183 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2184 headeraddr+=4;
mbed_official 573:ad23fe03a082 2185 }
mbed_official 573:ad23fe03a082 2186
mbed_official 573:ad23fe03a082 2187 /* Get tick */
mbed_official 573:ad23fe03a082 2188 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2189
mbed_official 573:ad23fe03a082 2190 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 2191 {
mbed_official 573:ad23fe03a082 2192 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2193 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2194 {
mbed_official 573:ad23fe03a082 2195 /* Change state */
mbed_official 573:ad23fe03a082 2196 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2197
mbed_official 573:ad23fe03a082 2198 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2199 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2200
mbed_official 573:ad23fe03a082 2201 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2202 }
mbed_official 573:ad23fe03a082 2203 }
mbed_official 573:ad23fe03a082 2204 }
mbed_official 573:ad23fe03a082 2205 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 2206 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 2207 {
mbed_official 573:ad23fe03a082 2208 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 2209 }
mbed_official 573:ad23fe03a082 2210 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 2211 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 2212 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 2213 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 2214
mbed_official 573:ad23fe03a082 2215 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2216 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2217
mbed_official 573:ad23fe03a082 2218 /* Set the phase */
mbed_official 573:ad23fe03a082 2219 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 2220 }
mbed_official 573:ad23fe03a082 2221
mbed_official 573:ad23fe03a082 2222 /* Enable Interrupts */
mbed_official 573:ad23fe03a082 2223 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 2224
mbed_official 573:ad23fe03a082 2225 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2226 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2227
mbed_official 573:ad23fe03a082 2228 /* Return function status */
mbed_official 573:ad23fe03a082 2229 return HAL_OK;
mbed_official 573:ad23fe03a082 2230 }
mbed_official 573:ad23fe03a082 2231 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
mbed_official 573:ad23fe03a082 2232 {
mbed_official 573:ad23fe03a082 2233 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official 573:ad23fe03a082 2234 /* Write the Input block in the IN FIFO */
mbed_official 573:ad23fe03a082 2235 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 2236 inputaddr+=4;
mbed_official 573:ad23fe03a082 2237 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 2238 inputaddr+=4;
mbed_official 573:ad23fe03a082 2239 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 2240 inputaddr+=4;
mbed_official 573:ad23fe03a082 2241 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
mbed_official 573:ad23fe03a082 2242 hcryp->pCrypInBuffPtr += 16;
mbed_official 573:ad23fe03a082 2243 hcryp->CrypInCount -= 16;
mbed_official 573:ad23fe03a082 2244 if(hcryp->CrypInCount == 0)
mbed_official 573:ad23fe03a082 2245 {
mbed_official 573:ad23fe03a082 2246 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
mbed_official 573:ad23fe03a082 2247 /* Call the Input data transfer complete callback */
mbed_official 573:ad23fe03a082 2248 HAL_CRYP_InCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 2249 }
mbed_official 573:ad23fe03a082 2250 }
mbed_official 573:ad23fe03a082 2251 else if (__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
mbed_official 573:ad23fe03a082 2252 {
mbed_official 573:ad23fe03a082 2253 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official 573:ad23fe03a082 2254 /* Read the Output block from the Output FIFO */
mbed_official 573:ad23fe03a082 2255 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 2256 outputaddr+=4;
mbed_official 573:ad23fe03a082 2257 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 2258 outputaddr+=4;
mbed_official 573:ad23fe03a082 2259 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 2260 outputaddr+=4;
mbed_official 573:ad23fe03a082 2261 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
mbed_official 573:ad23fe03a082 2262 hcryp->pCrypOutBuffPtr += 16;
mbed_official 573:ad23fe03a082 2263 hcryp->CrypOutCount -= 16;
mbed_official 573:ad23fe03a082 2264 if(hcryp->CrypOutCount == 0)
mbed_official 573:ad23fe03a082 2265 {
mbed_official 573:ad23fe03a082 2266 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
mbed_official 573:ad23fe03a082 2267 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2268 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2269 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2270 hcryp->State = HAL_CRYP_STATE_READY;
mbed_official 573:ad23fe03a082 2271 /* Call Input transfer complete callback */
mbed_official 573:ad23fe03a082 2272 HAL_CRYP_OutCpltCallback(hcryp);
mbed_official 573:ad23fe03a082 2273 }
mbed_official 573:ad23fe03a082 2274 }
mbed_official 573:ad23fe03a082 2275
mbed_official 573:ad23fe03a082 2276 /* Return function status */
mbed_official 573:ad23fe03a082 2277 return HAL_OK;
mbed_official 573:ad23fe03a082 2278 }
mbed_official 573:ad23fe03a082 2279
mbed_official 573:ad23fe03a082 2280 /**
mbed_official 573:ad23fe03a082 2281 * @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
mbed_official 573:ad23fe03a082 2282 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2283 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 2284 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 2285 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 2286 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 2287 * @retval HAL status
mbed_official 573:ad23fe03a082 2288 */
mbed_official 573:ad23fe03a082 2289 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 573:ad23fe03a082 2290 {
mbed_official 573:ad23fe03a082 2291 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 2292 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 2293 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 2294
mbed_official 573:ad23fe03a082 2295 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 573:ad23fe03a082 2296 {
mbed_official 573:ad23fe03a082 2297 /* Process Locked */
mbed_official 573:ad23fe03a082 2298 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 2299
mbed_official 573:ad23fe03a082 2300 inputaddr = (uint32_t)pPlainData;
mbed_official 573:ad23fe03a082 2301 outputaddr = (uint32_t)pCypherData;
mbed_official 573:ad23fe03a082 2302
mbed_official 573:ad23fe03a082 2303 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2304 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 2305
mbed_official 573:ad23fe03a082 2306 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 2307 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 2308 {
mbed_official 573:ad23fe03a082 2309 /* Set the key */
mbed_official 573:ad23fe03a082 2310 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 2311
mbed_official 573:ad23fe03a082 2312 /* Set the CRYP peripheral in AES GCM mode */
mbed_official 573:ad23fe03a082 2313 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official 573:ad23fe03a082 2314
mbed_official 573:ad23fe03a082 2315 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 2316 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 2317
mbed_official 573:ad23fe03a082 2318 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2319 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2320
mbed_official 573:ad23fe03a082 2321 /* Enable CRYP to start the init phase */
mbed_official 573:ad23fe03a082 2322 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2323
mbed_official 573:ad23fe03a082 2324 /* Get tick */
mbed_official 573:ad23fe03a082 2325 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2326
mbed_official 573:ad23fe03a082 2327 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 2328 {
mbed_official 573:ad23fe03a082 2329 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2330 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2331 {
mbed_official 573:ad23fe03a082 2332 /* Change state */
mbed_official 573:ad23fe03a082 2333 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2334
mbed_official 573:ad23fe03a082 2335 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2336 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2337
mbed_official 573:ad23fe03a082 2338 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2339 }
mbed_official 573:ad23fe03a082 2340 }
mbed_official 573:ad23fe03a082 2341 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2342 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2343
mbed_official 573:ad23fe03a082 2344 /* Set the header phase */
mbed_official 573:ad23fe03a082 2345 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 573:ad23fe03a082 2346 {
mbed_official 573:ad23fe03a082 2347 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2348 }
mbed_official 573:ad23fe03a082 2349 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2350 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 2351
mbed_official 573:ad23fe03a082 2352 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 2353 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 2354
mbed_official 573:ad23fe03a082 2355 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2356 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2357
mbed_official 573:ad23fe03a082 2358 /* Set the phase */
mbed_official 573:ad23fe03a082 2359 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 2360 }
mbed_official 573:ad23fe03a082 2361
mbed_official 573:ad23fe03a082 2362 /* Set the input and output addresses and start DMA transfer */
mbed_official 573:ad23fe03a082 2363 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 573:ad23fe03a082 2364
mbed_official 573:ad23fe03a082 2365 /* Unlock process */
mbed_official 573:ad23fe03a082 2366 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2367
mbed_official 573:ad23fe03a082 2368 /* Return function status */
mbed_official 573:ad23fe03a082 2369 return HAL_OK;
mbed_official 573:ad23fe03a082 2370 }
mbed_official 573:ad23fe03a082 2371 else
mbed_official 573:ad23fe03a082 2372 {
mbed_official 573:ad23fe03a082 2373 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2374 }
mbed_official 573:ad23fe03a082 2375 }
mbed_official 573:ad23fe03a082 2376
mbed_official 573:ad23fe03a082 2377 /**
mbed_official 573:ad23fe03a082 2378 * @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official 573:ad23fe03a082 2379 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2380 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 2381 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 2382 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 2383 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 2384 * @retval HAL status
mbed_official 573:ad23fe03a082 2385 */
mbed_official 573:ad23fe03a082 2386 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official 573:ad23fe03a082 2387 {
mbed_official 573:ad23fe03a082 2388 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 2389 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 2390 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 2391 uint32_t headersize;
mbed_official 573:ad23fe03a082 2392 uint32_t headeraddr;
mbed_official 573:ad23fe03a082 2393 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 2394 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 2395 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 2396 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 2397 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2398
mbed_official 573:ad23fe03a082 2399 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 573:ad23fe03a082 2400 {
mbed_official 573:ad23fe03a082 2401 /* Process Locked */
mbed_official 573:ad23fe03a082 2402 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 2403
mbed_official 573:ad23fe03a082 2404 inputaddr = (uint32_t)pPlainData;
mbed_official 573:ad23fe03a082 2405 outputaddr = (uint32_t)pCypherData;
mbed_official 573:ad23fe03a082 2406
mbed_official 573:ad23fe03a082 2407 headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 2408 headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 2409
mbed_official 573:ad23fe03a082 2410 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 2411 hcryp->pCrypInBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 2412 hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 2413 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 2414
mbed_official 573:ad23fe03a082 2415 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2416 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 2417
mbed_official 573:ad23fe03a082 2418 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 2419 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 2420 {
mbed_official 573:ad23fe03a082 2421 /************************ Formatting the header block *******************/
mbed_official 573:ad23fe03a082 2422 if(headersize != 0)
mbed_official 573:ad23fe03a082 2423 {
mbed_official 573:ad23fe03a082 2424 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 2425 if(headersize < 65280)
mbed_official 573:ad23fe03a082 2426 {
mbed_official 573:ad23fe03a082 2427 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 2428 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 2429 headersize += 2;
mbed_official 573:ad23fe03a082 2430 }
mbed_official 573:ad23fe03a082 2431 else
mbed_official 573:ad23fe03a082 2432 {
mbed_official 573:ad23fe03a082 2433 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 2434 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 2435 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 2436 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 2437 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 2438 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 2439 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 2440 headersize += 6;
mbed_official 573:ad23fe03a082 2441 }
mbed_official 573:ad23fe03a082 2442 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 2443 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 2444 {
mbed_official 573:ad23fe03a082 2445 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 2446 }
mbed_official 573:ad23fe03a082 2447 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 2448 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 2449 {
mbed_official 573:ad23fe03a082 2450 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 2451 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 2452 {
mbed_official 573:ad23fe03a082 2453 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 2454 }
mbed_official 573:ad23fe03a082 2455 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 2456 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 2457 }
mbed_official 573:ad23fe03a082 2458 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 2459 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 2460 }
mbed_official 573:ad23fe03a082 2461 /*********************** Formatting the block B0 ************************/
mbed_official 573:ad23fe03a082 2462 if(headersize != 0)
mbed_official 573:ad23fe03a082 2463 {
mbed_official 573:ad23fe03a082 2464 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 2465 }
mbed_official 573:ad23fe03a082 2466 /* Flags byte */
mbed_official 573:ad23fe03a082 2467 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 2468 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 2469 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 2470
mbed_official 573:ad23fe03a082 2471 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 2472 {
mbed_official 573:ad23fe03a082 2473 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 2474 }
mbed_official 573:ad23fe03a082 2475 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 2476 {
mbed_official 573:ad23fe03a082 2477 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 2478 }
mbed_official 573:ad23fe03a082 2479
mbed_official 573:ad23fe03a082 2480 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 2481 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 2482
mbed_official 573:ad23fe03a082 2483 /************************* Formatting the initial counter ***************/
mbed_official 573:ad23fe03a082 2484 /* Byte 0:
mbed_official 573:ad23fe03a082 2485 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 2486 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 573:ad23fe03a082 2487 blocks are distinct from B0
mbed_official 573:ad23fe03a082 2488 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 2489 */
mbed_official 573:ad23fe03a082 2490 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 2491 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 2492 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 2493 {
mbed_official 573:ad23fe03a082 2494 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 2495 }
mbed_official 573:ad23fe03a082 2496 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 2497 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 2498
mbed_official 573:ad23fe03a082 2499 /* Set the key */
mbed_official 573:ad23fe03a082 2500 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 2501
mbed_official 573:ad23fe03a082 2502 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 2503 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official 573:ad23fe03a082 2504
mbed_official 573:ad23fe03a082 2505 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 2506 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 2507
mbed_official 573:ad23fe03a082 2508 /* Select init phase */
mbed_official 573:ad23fe03a082 2509 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 2510
mbed_official 573:ad23fe03a082 2511 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2512 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 2513 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2514 b0addr+=4;
mbed_official 573:ad23fe03a082 2515 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2516 b0addr+=4;
mbed_official 573:ad23fe03a082 2517 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2518 b0addr+=4;
mbed_official 573:ad23fe03a082 2519 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2520
mbed_official 573:ad23fe03a082 2521 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2522 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2523
mbed_official 573:ad23fe03a082 2524 /* Get tick */
mbed_official 573:ad23fe03a082 2525 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2526
mbed_official 573:ad23fe03a082 2527 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 2528 {
mbed_official 573:ad23fe03a082 2529 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2530 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2531 {
mbed_official 573:ad23fe03a082 2532 /* Change state */
mbed_official 573:ad23fe03a082 2533 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2534
mbed_official 573:ad23fe03a082 2535 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2536 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2537
mbed_official 573:ad23fe03a082 2538 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2539 }
mbed_official 573:ad23fe03a082 2540 }
mbed_official 573:ad23fe03a082 2541 /***************************** Header phase *****************************/
mbed_official 573:ad23fe03a082 2542 if(headersize != 0)
mbed_official 573:ad23fe03a082 2543 {
mbed_official 573:ad23fe03a082 2544 /* Select header phase */
mbed_official 573:ad23fe03a082 2545 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 2546
mbed_official 573:ad23fe03a082 2547 /* Enable Crypto processor */
mbed_official 573:ad23fe03a082 2548 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2549
mbed_official 573:ad23fe03a082 2550 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 2551 {
mbed_official 573:ad23fe03a082 2552 /* Get tick */
mbed_official 573:ad23fe03a082 2553 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2554
mbed_official 573:ad23fe03a082 2555 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 2556 {
mbed_official 573:ad23fe03a082 2557 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2558 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2559 {
mbed_official 573:ad23fe03a082 2560 /* Change state */
mbed_official 573:ad23fe03a082 2561 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2562
mbed_official 573:ad23fe03a082 2563 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2564 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2565
mbed_official 573:ad23fe03a082 2566 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2567 }
mbed_official 573:ad23fe03a082 2568 }
mbed_official 573:ad23fe03a082 2569 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 2570 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2571 headeraddr+=4;
mbed_official 573:ad23fe03a082 2572 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2573 headeraddr+=4;
mbed_official 573:ad23fe03a082 2574 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2575 headeraddr+=4;
mbed_official 573:ad23fe03a082 2576 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2577 headeraddr+=4;
mbed_official 573:ad23fe03a082 2578 }
mbed_official 573:ad23fe03a082 2579
mbed_official 573:ad23fe03a082 2580 /* Get tick */
mbed_official 573:ad23fe03a082 2581 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2582
mbed_official 573:ad23fe03a082 2583 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 2584 {
mbed_official 573:ad23fe03a082 2585 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2586 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2587 {
mbed_official 573:ad23fe03a082 2588 /* Change state */
mbed_official 573:ad23fe03a082 2589 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2590
mbed_official 573:ad23fe03a082 2591 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2592 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2593
mbed_official 573:ad23fe03a082 2594 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2595 }
mbed_official 573:ad23fe03a082 2596 }
mbed_official 573:ad23fe03a082 2597 }
mbed_official 573:ad23fe03a082 2598 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 2599 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 2600 {
mbed_official 573:ad23fe03a082 2601 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 2602 }
mbed_official 573:ad23fe03a082 2603 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 2604 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 2605
mbed_official 573:ad23fe03a082 2606 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 2607 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 2608
mbed_official 573:ad23fe03a082 2609 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2610 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2611
mbed_official 573:ad23fe03a082 2612 /* Set the phase */
mbed_official 573:ad23fe03a082 2613 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 2614 }
mbed_official 573:ad23fe03a082 2615
mbed_official 573:ad23fe03a082 2616 /* Set the input and output addresses and start DMA transfer */
mbed_official 573:ad23fe03a082 2617 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 573:ad23fe03a082 2618
mbed_official 573:ad23fe03a082 2619 /* Unlock process */
mbed_official 573:ad23fe03a082 2620 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2621
mbed_official 573:ad23fe03a082 2622 /* Return function status */
mbed_official 573:ad23fe03a082 2623 return HAL_OK;
mbed_official 573:ad23fe03a082 2624 }
mbed_official 573:ad23fe03a082 2625 else
mbed_official 573:ad23fe03a082 2626 {
mbed_official 573:ad23fe03a082 2627 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2628 }
mbed_official 573:ad23fe03a082 2629 }
mbed_official 573:ad23fe03a082 2630
mbed_official 573:ad23fe03a082 2631 /**
mbed_official 573:ad23fe03a082 2632 * @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
mbed_official 573:ad23fe03a082 2633 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2634 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 2635 * @param pCypherData: Pointer to the cyphertext buffer.
mbed_official 573:ad23fe03a082 2636 * @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 2637 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 2638 * @retval HAL status
mbed_official 573:ad23fe03a082 2639 */
mbed_official 573:ad23fe03a082 2640 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 573:ad23fe03a082 2641 {
mbed_official 573:ad23fe03a082 2642 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 2643 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 2644 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 2645
mbed_official 573:ad23fe03a082 2646 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 573:ad23fe03a082 2647 {
mbed_official 573:ad23fe03a082 2648 /* Process Locked */
mbed_official 573:ad23fe03a082 2649 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 2650
mbed_official 573:ad23fe03a082 2651 inputaddr = (uint32_t)pCypherData;
mbed_official 573:ad23fe03a082 2652 outputaddr = (uint32_t)pPlainData;
mbed_official 573:ad23fe03a082 2653
mbed_official 573:ad23fe03a082 2654 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2655 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 2656
mbed_official 573:ad23fe03a082 2657 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 2658 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 2659 {
mbed_official 573:ad23fe03a082 2660 /* Set the key */
mbed_official 573:ad23fe03a082 2661 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 2662
mbed_official 573:ad23fe03a082 2663 /* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official 573:ad23fe03a082 2664 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official 573:ad23fe03a082 2665
mbed_official 573:ad23fe03a082 2666 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 2667 CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect);
mbed_official 573:ad23fe03a082 2668
mbed_official 573:ad23fe03a082 2669 /* Enable CRYP to start the init phase */
mbed_official 573:ad23fe03a082 2670 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2671
mbed_official 573:ad23fe03a082 2672 /* Get tick */
mbed_official 573:ad23fe03a082 2673 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2674
mbed_official 573:ad23fe03a082 2675 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 2676 {
mbed_official 573:ad23fe03a082 2677 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2678 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2679 {
mbed_official 573:ad23fe03a082 2680 /* Change state */
mbed_official 573:ad23fe03a082 2681 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2682
mbed_official 573:ad23fe03a082 2683 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2684 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2685
mbed_official 573:ad23fe03a082 2686 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2687 }
mbed_official 573:ad23fe03a082 2688 }
mbed_official 573:ad23fe03a082 2689
mbed_official 573:ad23fe03a082 2690 /* Set the header phase */
mbed_official 573:ad23fe03a082 2691 if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official 573:ad23fe03a082 2692 {
mbed_official 573:ad23fe03a082 2693 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2694 }
mbed_official 573:ad23fe03a082 2695 /* Disable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2696 __HAL_CRYP_DISABLE(hcryp);
mbed_official 573:ad23fe03a082 2697
mbed_official 573:ad23fe03a082 2698 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 2699 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 2700
mbed_official 573:ad23fe03a082 2701 /* Set the phase */
mbed_official 573:ad23fe03a082 2702 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 2703 }
mbed_official 573:ad23fe03a082 2704
mbed_official 573:ad23fe03a082 2705 /* Set the input and output addresses and start DMA transfer */
mbed_official 573:ad23fe03a082 2706 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 573:ad23fe03a082 2707
mbed_official 573:ad23fe03a082 2708 /* Unlock process */
mbed_official 573:ad23fe03a082 2709 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2710
mbed_official 573:ad23fe03a082 2711 /* Return function status */
mbed_official 573:ad23fe03a082 2712 return HAL_OK;
mbed_official 573:ad23fe03a082 2713 }
mbed_official 573:ad23fe03a082 2714 else
mbed_official 573:ad23fe03a082 2715 {
mbed_official 573:ad23fe03a082 2716 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2717 }
mbed_official 573:ad23fe03a082 2718 }
mbed_official 573:ad23fe03a082 2719
mbed_official 573:ad23fe03a082 2720 /**
mbed_official 573:ad23fe03a082 2721 * @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
mbed_official 573:ad23fe03a082 2722 * then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official 573:ad23fe03a082 2723 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2724 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 2725 * @param pCypherData: Pointer to the cyphertext buffer
mbed_official 573:ad23fe03a082 2726 * @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official 573:ad23fe03a082 2727 * @param pPlainData: Pointer to the plaintext buffer
mbed_official 573:ad23fe03a082 2728 * @retval HAL status
mbed_official 573:ad23fe03a082 2729 */
mbed_official 573:ad23fe03a082 2730 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official 573:ad23fe03a082 2731 {
mbed_official 573:ad23fe03a082 2732 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 2733 uint32_t inputaddr;
mbed_official 573:ad23fe03a082 2734 uint32_t outputaddr;
mbed_official 573:ad23fe03a082 2735 uint32_t headersize;
mbed_official 573:ad23fe03a082 2736 uint32_t headeraddr;
mbed_official 573:ad23fe03a082 2737 uint32_t loopcounter = 0;
mbed_official 573:ad23fe03a082 2738 uint32_t bufferidx = 0;
mbed_official 573:ad23fe03a082 2739 uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official 573:ad23fe03a082 2740 uint8_t ctr[16] = {0}; /* Counter */
mbed_official 573:ad23fe03a082 2741 uint32_t b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2742
mbed_official 573:ad23fe03a082 2743 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official 573:ad23fe03a082 2744 {
mbed_official 573:ad23fe03a082 2745 /* Process Locked */
mbed_official 573:ad23fe03a082 2746 __HAL_LOCK(hcryp);
mbed_official 573:ad23fe03a082 2747
mbed_official 573:ad23fe03a082 2748 inputaddr = (uint32_t)pCypherData;
mbed_official 573:ad23fe03a082 2749 outputaddr = (uint32_t)pPlainData;
mbed_official 573:ad23fe03a082 2750
mbed_official 573:ad23fe03a082 2751 headersize = hcryp->Init.HeaderSize;
mbed_official 573:ad23fe03a082 2752 headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official 573:ad23fe03a082 2753
mbed_official 573:ad23fe03a082 2754 hcryp->CrypInCount = Size;
mbed_official 573:ad23fe03a082 2755 hcryp->pCrypInBuffPtr = pCypherData;
mbed_official 573:ad23fe03a082 2756 hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official 573:ad23fe03a082 2757 hcryp->CrypOutCount = Size;
mbed_official 573:ad23fe03a082 2758
mbed_official 573:ad23fe03a082 2759 /* Change the CRYP peripheral state */
mbed_official 573:ad23fe03a082 2760 hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official 573:ad23fe03a082 2761
mbed_official 573:ad23fe03a082 2762 /* Check if initialization phase has already been performed */
mbed_official 573:ad23fe03a082 2763 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official 573:ad23fe03a082 2764 {
mbed_official 573:ad23fe03a082 2765 /************************ Formatting the header block *******************/
mbed_official 573:ad23fe03a082 2766 if(headersize != 0)
mbed_official 573:ad23fe03a082 2767 {
mbed_official 573:ad23fe03a082 2768 /* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official 573:ad23fe03a082 2769 if(headersize < 65280)
mbed_official 573:ad23fe03a082 2770 {
mbed_official 573:ad23fe03a082 2771 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official 573:ad23fe03a082 2772 hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official 573:ad23fe03a082 2773 headersize += 2;
mbed_official 573:ad23fe03a082 2774 }
mbed_official 573:ad23fe03a082 2775 else
mbed_official 573:ad23fe03a082 2776 {
mbed_official 573:ad23fe03a082 2777 /* Header is encoded as 0xff || 0xfe || [headersize]32, i.e., six octets */
mbed_official 573:ad23fe03a082 2778 hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official 573:ad23fe03a082 2779 hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official 573:ad23fe03a082 2780 hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official 573:ad23fe03a082 2781 hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official 573:ad23fe03a082 2782 hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official 573:ad23fe03a082 2783 hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official 573:ad23fe03a082 2784 headersize += 6;
mbed_official 573:ad23fe03a082 2785 }
mbed_official 573:ad23fe03a082 2786 /* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official 573:ad23fe03a082 2787 for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official 573:ad23fe03a082 2788 {
mbed_official 573:ad23fe03a082 2789 hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official 573:ad23fe03a082 2790 }
mbed_official 573:ad23fe03a082 2791 /* Check if the header size is modulo 16 */
mbed_official 573:ad23fe03a082 2792 if ((headersize % 16) != 0)
mbed_official 573:ad23fe03a082 2793 {
mbed_official 573:ad23fe03a082 2794 /* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official 573:ad23fe03a082 2795 for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official 573:ad23fe03a082 2796 {
mbed_official 573:ad23fe03a082 2797 hcryp->Init.pScratch[loopcounter] = 0;
mbed_official 573:ad23fe03a082 2798 }
mbed_official 573:ad23fe03a082 2799 /* Set the header size to modulo 16 */
mbed_official 573:ad23fe03a082 2800 headersize = ((headersize/16) + 1) * 16;
mbed_official 573:ad23fe03a082 2801 }
mbed_official 573:ad23fe03a082 2802 /* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official 573:ad23fe03a082 2803 headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official 573:ad23fe03a082 2804 }
mbed_official 573:ad23fe03a082 2805 /*********************** Formatting the block B0 ************************/
mbed_official 573:ad23fe03a082 2806 if(headersize != 0)
mbed_official 573:ad23fe03a082 2807 {
mbed_official 573:ad23fe03a082 2808 blockb0[0] = 0x40;
mbed_official 573:ad23fe03a082 2809 }
mbed_official 573:ad23fe03a082 2810 /* Flags byte */
mbed_official 573:ad23fe03a082 2811 /* blockb0[0] |= 0u | (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) | ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official 573:ad23fe03a082 2812 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official 573:ad23fe03a082 2813 blockb0[0] |= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official 573:ad23fe03a082 2814
mbed_official 573:ad23fe03a082 2815 for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official 573:ad23fe03a082 2816 {
mbed_official 573:ad23fe03a082 2817 blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official 573:ad23fe03a082 2818 }
mbed_official 573:ad23fe03a082 2819 for ( ; loopcounter < 13; loopcounter++)
mbed_official 573:ad23fe03a082 2820 {
mbed_official 573:ad23fe03a082 2821 blockb0[loopcounter+1] = 0;
mbed_official 573:ad23fe03a082 2822 }
mbed_official 573:ad23fe03a082 2823
mbed_official 573:ad23fe03a082 2824 blockb0[14] = (Size >> 8);
mbed_official 573:ad23fe03a082 2825 blockb0[15] = (Size & 0xFF);
mbed_official 573:ad23fe03a082 2826
mbed_official 573:ad23fe03a082 2827 /************************* Formatting the initial counter ***************/
mbed_official 573:ad23fe03a082 2828 /* Byte 0:
mbed_official 573:ad23fe03a082 2829 Bits 7 and 6 are reserved and shall be set to 0
mbed_official 573:ad23fe03a082 2830 Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official 573:ad23fe03a082 2831 blocks are distinct from B0
mbed_official 573:ad23fe03a082 2832 Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official 573:ad23fe03a082 2833 */
mbed_official 573:ad23fe03a082 2834 ctr[0] = blockb0[0] & 0x07;
mbed_official 573:ad23fe03a082 2835 /* byte 1 to NonceSize is the IV (Nonce) */
mbed_official 573:ad23fe03a082 2836 for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official 573:ad23fe03a082 2837 {
mbed_official 573:ad23fe03a082 2838 ctr[loopcounter] = blockb0[loopcounter];
mbed_official 573:ad23fe03a082 2839 }
mbed_official 573:ad23fe03a082 2840 /* Set the LSB to 1 */
mbed_official 573:ad23fe03a082 2841 ctr[15] |= 0x01;
mbed_official 573:ad23fe03a082 2842
mbed_official 573:ad23fe03a082 2843 /* Set the key */
mbed_official 573:ad23fe03a082 2844 CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official 573:ad23fe03a082 2845
mbed_official 573:ad23fe03a082 2846 /* Set the CRYP peripheral in AES CCM mode */
mbed_official 573:ad23fe03a082 2847 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official 573:ad23fe03a082 2848
mbed_official 573:ad23fe03a082 2849 /* Set the Initialization Vector */
mbed_official 573:ad23fe03a082 2850 CRYPEx_GCMCCM_SetInitVector(hcryp, ctr);
mbed_official 573:ad23fe03a082 2851
mbed_official 573:ad23fe03a082 2852 /* Select init phase */
mbed_official 573:ad23fe03a082 2853 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT);
mbed_official 573:ad23fe03a082 2854
mbed_official 573:ad23fe03a082 2855 b0addr = (uint32_t)blockb0;
mbed_official 573:ad23fe03a082 2856 /* Write the blockb0 block in the IN FIFO */
mbed_official 573:ad23fe03a082 2857 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2858 b0addr+=4;
mbed_official 573:ad23fe03a082 2859 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2860 b0addr+=4;
mbed_official 573:ad23fe03a082 2861 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2862 b0addr+=4;
mbed_official 573:ad23fe03a082 2863 hcryp->Instance->DR = *(uint32_t*)(b0addr);
mbed_official 573:ad23fe03a082 2864
mbed_official 573:ad23fe03a082 2865 /* Enable the CRYP peripheral */
mbed_official 573:ad23fe03a082 2866 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2867
mbed_official 573:ad23fe03a082 2868 /* Get tick */
mbed_official 573:ad23fe03a082 2869 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2870
mbed_official 573:ad23fe03a082 2871 while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official 573:ad23fe03a082 2872 {
mbed_official 573:ad23fe03a082 2873 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2874
mbed_official 573:ad23fe03a082 2875 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2876 {
mbed_official 573:ad23fe03a082 2877 /* Change state */
mbed_official 573:ad23fe03a082 2878 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2879
mbed_official 573:ad23fe03a082 2880 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2881 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2882
mbed_official 573:ad23fe03a082 2883 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2884
mbed_official 573:ad23fe03a082 2885 }
mbed_official 573:ad23fe03a082 2886 }
mbed_official 573:ad23fe03a082 2887 /***************************** Header phase *****************************/
mbed_official 573:ad23fe03a082 2888 if(headersize != 0)
mbed_official 573:ad23fe03a082 2889 {
mbed_official 573:ad23fe03a082 2890 /* Select header phase */
mbed_official 573:ad23fe03a082 2891 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER);
mbed_official 573:ad23fe03a082 2892
mbed_official 573:ad23fe03a082 2893 /* Enable Crypto processor */
mbed_official 573:ad23fe03a082 2894 __HAL_CRYP_ENABLE(hcryp);
mbed_official 573:ad23fe03a082 2895
mbed_official 573:ad23fe03a082 2896 for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official 573:ad23fe03a082 2897 {
mbed_official 573:ad23fe03a082 2898 /* Get tick */
mbed_official 573:ad23fe03a082 2899 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2900
mbed_official 573:ad23fe03a082 2901 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_IFEM))
mbed_official 573:ad23fe03a082 2902 {
mbed_official 573:ad23fe03a082 2903 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2904 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2905 {
mbed_official 573:ad23fe03a082 2906 /* Change state */
mbed_official 573:ad23fe03a082 2907 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2908
mbed_official 573:ad23fe03a082 2909 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2910 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2911
mbed_official 573:ad23fe03a082 2912 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2913 }
mbed_official 573:ad23fe03a082 2914 }
mbed_official 573:ad23fe03a082 2915 /* Write the header block in the IN FIFO */
mbed_official 573:ad23fe03a082 2916 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2917 headeraddr+=4;
mbed_official 573:ad23fe03a082 2918 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2919 headeraddr+=4;
mbed_official 573:ad23fe03a082 2920 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2921 headeraddr+=4;
mbed_official 573:ad23fe03a082 2922 hcryp->Instance->DR = *(uint32_t*)(headeraddr);
mbed_official 573:ad23fe03a082 2923 headeraddr+=4;
mbed_official 573:ad23fe03a082 2924 }
mbed_official 573:ad23fe03a082 2925
mbed_official 573:ad23fe03a082 2926 /* Get tick */
mbed_official 573:ad23fe03a082 2927 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 2928
mbed_official 573:ad23fe03a082 2929 while((hcryp->Instance->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official 573:ad23fe03a082 2930 {
mbed_official 573:ad23fe03a082 2931 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 2932 if((HAL_GetTick() - tickstart ) > CRYPEx_TIMEOUT_VALUE)
mbed_official 573:ad23fe03a082 2933 {
mbed_official 573:ad23fe03a082 2934 /* Change state */
mbed_official 573:ad23fe03a082 2935 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 2936
mbed_official 573:ad23fe03a082 2937 /* Process Unlocked */
mbed_official 573:ad23fe03a082 2938 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2939
mbed_official 573:ad23fe03a082 2940 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 2941 }
mbed_official 573:ad23fe03a082 2942 }
mbed_official 573:ad23fe03a082 2943 }
mbed_official 573:ad23fe03a082 2944 /* Save formatted counter into the scratch buffer pScratch */
mbed_official 573:ad23fe03a082 2945 for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official 573:ad23fe03a082 2946 {
mbed_official 573:ad23fe03a082 2947 hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official 573:ad23fe03a082 2948 }
mbed_official 573:ad23fe03a082 2949 /* Reset bit 0 */
mbed_official 573:ad23fe03a082 2950 hcryp->Init.pScratch[15] &= 0xfe;
mbed_official 573:ad23fe03a082 2951 /* Select payload phase once the header phase is performed */
mbed_official 573:ad23fe03a082 2952 __HAL_CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD);
mbed_official 573:ad23fe03a082 2953
mbed_official 573:ad23fe03a082 2954 /* Flush FIFO */
mbed_official 573:ad23fe03a082 2955 __HAL_CRYP_FIFO_FLUSH(hcryp);
mbed_official 573:ad23fe03a082 2956
mbed_official 573:ad23fe03a082 2957 /* Set the phase */
mbed_official 573:ad23fe03a082 2958 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official 573:ad23fe03a082 2959 }
mbed_official 573:ad23fe03a082 2960 /* Set the input and output addresses and start DMA transfer */
mbed_official 573:ad23fe03a082 2961 CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official 573:ad23fe03a082 2962
mbed_official 573:ad23fe03a082 2963 /* Unlock process */
mbed_official 573:ad23fe03a082 2964 __HAL_UNLOCK(hcryp);
mbed_official 573:ad23fe03a082 2965
mbed_official 573:ad23fe03a082 2966 /* Return function status */
mbed_official 573:ad23fe03a082 2967 return HAL_OK;
mbed_official 573:ad23fe03a082 2968 }
mbed_official 573:ad23fe03a082 2969 else
mbed_official 573:ad23fe03a082 2970 {
mbed_official 573:ad23fe03a082 2971 return HAL_ERROR;
mbed_official 573:ad23fe03a082 2972 }
mbed_official 573:ad23fe03a082 2973 }
mbed_official 573:ad23fe03a082 2974
mbed_official 573:ad23fe03a082 2975 /**
mbed_official 573:ad23fe03a082 2976 * @}
mbed_official 573:ad23fe03a082 2977 */
mbed_official 573:ad23fe03a082 2978
mbed_official 573:ad23fe03a082 2979 /** @defgroup CRYPEx_Exported_Functions_Group2 CRYPEx IRQ handler management
mbed_official 573:ad23fe03a082 2980 * @brief CRYPEx IRQ handler.
mbed_official 573:ad23fe03a082 2981 *
mbed_official 573:ad23fe03a082 2982 @verbatim
mbed_official 573:ad23fe03a082 2983 ==============================================================================
mbed_official 573:ad23fe03a082 2984 ##### CRYPEx IRQ handler management #####
mbed_official 573:ad23fe03a082 2985 ==============================================================================
mbed_official 573:ad23fe03a082 2986 [..] This section provides CRYPEx IRQ handler function.
mbed_official 573:ad23fe03a082 2987
mbed_official 573:ad23fe03a082 2988 @endverbatim
mbed_official 573:ad23fe03a082 2989 * @{
mbed_official 573:ad23fe03a082 2990 */
mbed_official 573:ad23fe03a082 2991
mbed_official 573:ad23fe03a082 2992 /**
mbed_official 573:ad23fe03a082 2993 * @brief This function handles CRYPEx interrupt request.
mbed_official 573:ad23fe03a082 2994 * @param hcryp: pointer to a CRYPEx_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 2995 * the configuration information for CRYP module
mbed_official 573:ad23fe03a082 2996 * @retval None
mbed_official 573:ad23fe03a082 2997 */
mbed_official 573:ad23fe03a082 2998 void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
mbed_official 573:ad23fe03a082 2999 {
mbed_official 573:ad23fe03a082 3000 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
mbed_official 573:ad23fe03a082 3001 {
mbed_official 573:ad23fe03a082 3002 case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
mbed_official 573:ad23fe03a082 3003 HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 573:ad23fe03a082 3004 break;
mbed_official 573:ad23fe03a082 3005
mbed_official 573:ad23fe03a082 3006 case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
mbed_official 573:ad23fe03a082 3007 HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 573:ad23fe03a082 3008 break;
mbed_official 573:ad23fe03a082 3009
mbed_official 573:ad23fe03a082 3010 case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
mbed_official 573:ad23fe03a082 3011 HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 573:ad23fe03a082 3012 break;
mbed_official 573:ad23fe03a082 3013
mbed_official 573:ad23fe03a082 3014 case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
mbed_official 573:ad23fe03a082 3015 HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official 573:ad23fe03a082 3016 break;
mbed_official 573:ad23fe03a082 3017
mbed_official 573:ad23fe03a082 3018 default:
mbed_official 573:ad23fe03a082 3019 break;
mbed_official 573:ad23fe03a082 3020 }
mbed_official 573:ad23fe03a082 3021 }
mbed_official 573:ad23fe03a082 3022
mbed_official 573:ad23fe03a082 3023 /**
mbed_official 573:ad23fe03a082 3024 * @}
mbed_official 573:ad23fe03a082 3025 */
mbed_official 573:ad23fe03a082 3026
mbed_official 573:ad23fe03a082 3027 /**
mbed_official 573:ad23fe03a082 3028 * @}
mbed_official 573:ad23fe03a082 3029 */
mbed_official 573:ad23fe03a082 3030 #endif /* HAL_CRYP_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 3031
mbed_official 573:ad23fe03a082 3032 /**
mbed_official 573:ad23fe03a082 3033 * @}
mbed_official 573:ad23fe03a082 3034 */
mbed_official 573:ad23fe03a082 3035 #endif /* STM32F756xx */
mbed_official 573:ad23fe03a082 3036 /**
mbed_official 573:ad23fe03a082 3037 * @}
mbed_official 573:ad23fe03a082 3038 */
mbed_official 573:ad23fe03a082 3039
mbed_official 573:ad23fe03a082 3040 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/