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mbed library sources

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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC82X/serial_api.c@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
503:486aded571c7 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 337:6ed01c00b962 1 /* mbed Microcontroller Library
mbed_official 337:6ed01c00b962 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 337:6ed01c00b962 3 *
mbed_official 337:6ed01c00b962 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 337:6ed01c00b962 5 * you may not use this file except in compliance with the License.
mbed_official 337:6ed01c00b962 6 * You may obtain a copy of the License at
mbed_official 337:6ed01c00b962 7 *
mbed_official 337:6ed01c00b962 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 337:6ed01c00b962 9 *
mbed_official 337:6ed01c00b962 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 337:6ed01c00b962 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 337:6ed01c00b962 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 337:6ed01c00b962 13 * See the License for the specific language governing permissions and
mbed_official 337:6ed01c00b962 14 * limitations under the License.
mbed_official 337:6ed01c00b962 15 */
mbed_official 337:6ed01c00b962 16 // math.h required for floating point operations for baud rate calculation
mbed_official 337:6ed01c00b962 17 #include "mbed_assert.h"
mbed_official 337:6ed01c00b962 18 #include <math.h>
mbed_official 337:6ed01c00b962 19 #include <string.h>
mbed_official 337:6ed01c00b962 20
mbed_official 337:6ed01c00b962 21 #include "serial_api.h"
mbed_official 337:6ed01c00b962 22 #include "cmsis.h"
mbed_official 337:6ed01c00b962 23 #include "pinmap.h"
mbed_official 337:6ed01c00b962 24 #include "mbed_error.h"
mbed_official 337:6ed01c00b962 25
mbed_official 337:6ed01c00b962 26 #if DEVICE_SERIAL
mbed_official 337:6ed01c00b962 27
mbed_official 337:6ed01c00b962 28 /******************************************************************************
mbed_official 337:6ed01c00b962 29 * INITIALIZATION
mbed_official 337:6ed01c00b962 30 ******************************************************************************/
mbed_official 337:6ed01c00b962 31 #define UART_NUM 3
mbed_official 337:6ed01c00b962 32
mbed_official 337:6ed01c00b962 33 static const SWM_Map SWM_UART_TX[] = {
mbed_official 337:6ed01c00b962 34 {0, 0},
mbed_official 337:6ed01c00b962 35 {1, 8},
mbed_official 337:6ed01c00b962 36 {2, 16},
mbed_official 337:6ed01c00b962 37 };
mbed_official 337:6ed01c00b962 38
mbed_official 337:6ed01c00b962 39 static const SWM_Map SWM_UART_RX[] = {
mbed_official 337:6ed01c00b962 40 {0, 8},
mbed_official 337:6ed01c00b962 41 {1, 16},
mbed_official 337:6ed01c00b962 42 {2, 24},
mbed_official 337:6ed01c00b962 43 };
mbed_official 337:6ed01c00b962 44
mbed_official 337:6ed01c00b962 45 static const SWM_Map SWM_UART_RTS[] = {
mbed_official 337:6ed01c00b962 46 {0, 16},
mbed_official 337:6ed01c00b962 47 {1, 24},
mbed_official 337:6ed01c00b962 48 {3, 0},
mbed_official 337:6ed01c00b962 49 };
mbed_official 337:6ed01c00b962 50
mbed_official 337:6ed01c00b962 51 static const SWM_Map SWM_UART_CTS[] = {
mbed_official 337:6ed01c00b962 52 {0, 24},
mbed_official 337:6ed01c00b962 53 {2, 0},
mbed_official 337:6ed01c00b962 54 {3, 8}
mbed_official 337:6ed01c00b962 55 };
mbed_official 337:6ed01c00b962 56
mbed_official 337:6ed01c00b962 57 // bit flags for used UARTs
mbed_official 337:6ed01c00b962 58 static unsigned char uart_used = 0;
mbed_official 337:6ed01c00b962 59
mbed_official 337:6ed01c00b962 60 static int get_available_uart(void)
mbed_official 337:6ed01c00b962 61 {
mbed_official 337:6ed01c00b962 62 int i;
mbed_official 337:6ed01c00b962 63 for (i=0; i<UART_NUM; i++) {
mbed_official 337:6ed01c00b962 64 if ((uart_used & (1 << i)) == 0)
mbed_official 337:6ed01c00b962 65 return i;
mbed_official 337:6ed01c00b962 66 }
mbed_official 337:6ed01c00b962 67 return -1;
mbed_official 337:6ed01c00b962 68 }
mbed_official 337:6ed01c00b962 69
mbed_official 337:6ed01c00b962 70 #define UART_EN (0x01<<0)
mbed_official 337:6ed01c00b962 71
mbed_official 337:6ed01c00b962 72 #define CTS_DELTA (0x01<<5)
mbed_official 337:6ed01c00b962 73 #define RXBRK (0x01<<10)
mbed_official 337:6ed01c00b962 74 #define DELTA_RXBRK (0x01<<11)
mbed_official 337:6ed01c00b962 75
mbed_official 337:6ed01c00b962 76 #define RXRDY (0x01<<0)
mbed_official 337:6ed01c00b962 77 #define TXRDY (0x01<<2)
mbed_official 337:6ed01c00b962 78
mbed_official 387:643a59b3dbac 79 #define RXRDYEN RXRDY
mbed_official 387:643a59b3dbac 80 #define TXRDYEN TXRDY
mbed_official 387:643a59b3dbac 81
mbed_official 337:6ed01c00b962 82 #define TXBRKEN (0x01<<1)
mbed_official 337:6ed01c00b962 83 #define CTSEN (0x01<<9)
mbed_official 337:6ed01c00b962 84
mbed_official 337:6ed01c00b962 85 static uint32_t UARTSysClk;
mbed_official 337:6ed01c00b962 86
mbed_official 337:6ed01c00b962 87 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 337:6ed01c00b962 88 static uart_irq_handler irq_handler;
mbed_official 337:6ed01c00b962 89
mbed_official 337:6ed01c00b962 90 int stdio_uart_inited = 0;
mbed_official 337:6ed01c00b962 91 serial_t stdio_uart;
mbed_official 337:6ed01c00b962 92
mbed_official 503:486aded571c7 93 static int check_duplication(serial_t *obj, PinName tx, PinName rx)
mbed_official 503:486aded571c7 94 {
mbed_official 503:486aded571c7 95 if (uart_used == 0)
mbed_official 503:486aded571c7 96 return 0;
mbed_official 503:486aded571c7 97
mbed_official 503:486aded571c7 98 const SWM_Map *swm;
mbed_official 503:486aded571c7 99 uint32_t assigned_tx, assigned_rx;
mbed_official 503:486aded571c7 100 int ch;
mbed_official 503:486aded571c7 101 for (ch=0; ch<UART_NUM; ch++) {
mbed_official 503:486aded571c7 102 // read assigned TX in the UART channel of switch matrix
mbed_official 503:486aded571c7 103 swm = &SWM_UART_TX[ch];
mbed_official 503:486aded571c7 104 assigned_tx = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
mbed_official 503:486aded571c7 105 assigned_tx = assigned_tx >> swm->offset;
mbed_official 503:486aded571c7 106 // read assigned RX in the UART channel of switch matrix
mbed_official 503:486aded571c7 107 swm = &SWM_UART_RX[ch];
mbed_official 503:486aded571c7 108 assigned_rx = LPC_SWM->PINASSIGN[swm->n] & (0xFF << swm->offset);
mbed_official 503:486aded571c7 109 assigned_rx = assigned_rx >> swm->offset;
mbed_official 503:486aded571c7 110 if ((assigned_tx == (uint32_t)(tx >> PIN_SHIFT)) && (assigned_rx == (uint32_t)(rx >> PIN_SHIFT))) {
mbed_official 503:486aded571c7 111 obj->index = ch;
mbed_official 503:486aded571c7 112 obj->uart = (LPC_USART0_Type *)(LPC_USART0_BASE + (0x4000 * ch));
mbed_official 503:486aded571c7 113 return 1;
mbed_official 503:486aded571c7 114 }
mbed_official 503:486aded571c7 115 }
mbed_official 503:486aded571c7 116 return 0;
mbed_official 503:486aded571c7 117 }
mbed_official 503:486aded571c7 118
mbed_official 337:6ed01c00b962 119 void serial_init(serial_t *obj, PinName tx, PinName rx)
mbed_official 337:6ed01c00b962 120 {
mbed_official 337:6ed01c00b962 121 int is_stdio_uart = 0;
mbed_official 337:6ed01c00b962 122
mbed_official 503:486aded571c7 123 if (check_duplication(obj, tx, rx) == 1)
mbed_official 503:486aded571c7 124 return;
mbed_official 503:486aded571c7 125
mbed_official 337:6ed01c00b962 126 int uart_n = get_available_uart();
mbed_official 337:6ed01c00b962 127 if (uart_n == -1) {
mbed_official 337:6ed01c00b962 128 error("No available UART");
mbed_official 337:6ed01c00b962 129 }
mbed_official 337:6ed01c00b962 130 obj->index = uart_n;
mbed_official 337:6ed01c00b962 131 obj->uart = (LPC_USART0_Type *)(LPC_USART0_BASE + (0x4000 * uart_n));
mbed_official 337:6ed01c00b962 132 uart_used |= (1 << uart_n);
mbed_official 337:6ed01c00b962 133
mbed_official 337:6ed01c00b962 134 const SWM_Map *swm;
mbed_official 337:6ed01c00b962 135 uint32_t regVal;
mbed_official 337:6ed01c00b962 136
mbed_official 337:6ed01c00b962 137 swm = &SWM_UART_TX[uart_n];
mbed_official 337:6ed01c00b962 138 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 139 LPC_SWM->PINASSIGN[swm->n] = regVal | ((tx >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 140
mbed_official 337:6ed01c00b962 141 swm = &SWM_UART_RX[uart_n];
mbed_official 337:6ed01c00b962 142 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
mbed_official 337:6ed01c00b962 143 LPC_SWM->PINASSIGN[swm->n] = regVal | ((rx >> PIN_SHIFT) << swm->offset);
mbed_official 337:6ed01c00b962 144
mbed_official 337:6ed01c00b962 145 /* uart clock divided by 1 */
mbed_official 337:6ed01c00b962 146 LPC_SYSCON->UARTCLKDIV = 1;
mbed_official 337:6ed01c00b962 147
mbed_official 337:6ed01c00b962 148 /* disable uart interrupts */
mbed_official 337:6ed01c00b962 149 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 337:6ed01c00b962 150
mbed_official 337:6ed01c00b962 151 /* Enable UART clock */
mbed_official 337:6ed01c00b962 152 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (14 + uart_n));
mbed_official 337:6ed01c00b962 153
mbed_official 337:6ed01c00b962 154 /* Peripheral reset control to UART, a "1" bring it out of reset. */
mbed_official 337:6ed01c00b962 155 LPC_SYSCON->PRESETCTRL &= ~(0x1 << (3 + uart_n));
mbed_official 337:6ed01c00b962 156 LPC_SYSCON->PRESETCTRL |= (0x1 << (3 + uart_n));
mbed_official 337:6ed01c00b962 157
mbed_official 337:6ed01c00b962 158 UARTSysClk = MainClock / LPC_SYSCON->UARTCLKDIV;
mbed_official 337:6ed01c00b962 159
mbed_official 337:6ed01c00b962 160 // set default baud rate and format
mbed_official 337:6ed01c00b962 161 serial_baud (obj, 9600);
mbed_official 337:6ed01c00b962 162 serial_format(obj, 8, ParityNone, 1);
mbed_official 337:6ed01c00b962 163
mbed_official 337:6ed01c00b962 164 /* Clear all status bits. */
mbed_official 337:6ed01c00b962 165 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
mbed_official 337:6ed01c00b962 166
mbed_official 337:6ed01c00b962 167 /* enable uart interrupts */
mbed_official 337:6ed01c00b962 168 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
mbed_official 337:6ed01c00b962 169
mbed_official 337:6ed01c00b962 170 /* Enable UART */
mbed_official 337:6ed01c00b962 171 obj->uart->CFG |= UART_EN;
mbed_official 337:6ed01c00b962 172
mbed_official 337:6ed01c00b962 173 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
mbed_official 337:6ed01c00b962 174
mbed_official 337:6ed01c00b962 175 if (is_stdio_uart) {
mbed_official 337:6ed01c00b962 176 stdio_uart_inited = 1;
mbed_official 337:6ed01c00b962 177 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 337:6ed01c00b962 178 }
mbed_official 337:6ed01c00b962 179 }
mbed_official 337:6ed01c00b962 180
mbed_official 337:6ed01c00b962 181 void serial_free(serial_t *obj)
mbed_official 337:6ed01c00b962 182 {
mbed_official 337:6ed01c00b962 183 uart_used &= ~(1 << obj->index);
mbed_official 337:6ed01c00b962 184 serial_irq_ids[obj->index] = 0;
mbed_official 337:6ed01c00b962 185 }
mbed_official 337:6ed01c00b962 186
mbed_official 337:6ed01c00b962 187 void serial_baud(serial_t *obj, int baudrate)
mbed_official 337:6ed01c00b962 188 {
mbed_official 337:6ed01c00b962 189 /* Integer divider:
mbed_official 337:6ed01c00b962 190 BRG = UARTSysClk/(Baudrate * 16) - 1
mbed_official 337:6ed01c00b962 191
mbed_official 337:6ed01c00b962 192 Frational divider:
mbed_official 337:6ed01c00b962 193 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
mbed_official 337:6ed01c00b962 194
mbed_official 337:6ed01c00b962 195 where
mbed_official 337:6ed01c00b962 196 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
mbed_official 337:6ed01c00b962 197
mbed_official 337:6ed01c00b962 198 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
mbed_official 337:6ed01c00b962 199 register is 0xFF.
mbed_official 337:6ed01c00b962 200 (2) In ADD register value, depending on the value of UartSysClk,
mbed_official 337:6ed01c00b962 201 baudrate, BRG register value, and SUB register value, be careful
mbed_official 337:6ed01c00b962 202 about the order of multiplier and divider and make sure any
mbed_official 337:6ed01c00b962 203 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
mbed_official 337:6ed01c00b962 204 down below one(integer 0).
mbed_official 337:6ed01c00b962 205 (3) ADD should be always less than SUB.
mbed_official 337:6ed01c00b962 206 */
mbed_official 337:6ed01c00b962 207 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
mbed_official 337:6ed01c00b962 208
mbed_official 337:6ed01c00b962 209 LPC_SYSCON->UARTFRGDIV = 0xFF;
mbed_official 337:6ed01c00b962 210 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
mbed_official 337:6ed01c00b962 211 (baudrate * (obj->uart->BRG + 1))
mbed_official 337:6ed01c00b962 212 ) - (LPC_SYSCON->UARTFRGDIV + 1);
mbed_official 337:6ed01c00b962 213 }
mbed_official 337:6ed01c00b962 214
mbed_official 337:6ed01c00b962 215 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
mbed_official 337:6ed01c00b962 216 {
mbed_official 337:6ed01c00b962 217 // 0: 1 stop bits, 1: 2 stop bits
mbed_official 337:6ed01c00b962 218 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
mbed_official 337:6ed01c00b962 219 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
mbed_official 337:6ed01c00b962 220 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
mbed_official 337:6ed01c00b962 221 stop_bits -= 1;
mbed_official 337:6ed01c00b962 222 data_bits -= 7;
mbed_official 337:6ed01c00b962 223
mbed_official 503:486aded571c7 224 int paritysel = 0;
mbed_official 337:6ed01c00b962 225 switch (parity) {
mbed_official 337:6ed01c00b962 226 case ParityNone: paritysel = 0; break;
mbed_official 337:6ed01c00b962 227 case ParityEven: paritysel = 2; break;
mbed_official 337:6ed01c00b962 228 case ParityOdd : paritysel = 3; break;
mbed_official 337:6ed01c00b962 229 default:
mbed_official 337:6ed01c00b962 230 break;
mbed_official 337:6ed01c00b962 231 }
mbed_official 337:6ed01c00b962 232
mbed_official 600:7d17ca308cd1 233 // First disable the the usart as described in documentation and then enable while updating CFG
mbed_official 600:7d17ca308cd1 234
mbed_official 600:7d17ca308cd1 235 // 24.6.1 USART Configuration register
mbed_official 600:7d17ca308cd1 236 // Remark: If software needs to change configuration values, the following sequence should
mbed_official 600:7d17ca308cd1 237 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
mbed_official 600:7d17ca308cd1 238 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
mbed_official 600:7d17ca308cd1 239 // Write the new configuration value, with the ENABLE bit set to 1.
mbed_official 600:7d17ca308cd1 240 obj->uart->CFG &= ~(1 << 0);
mbed_official 600:7d17ca308cd1 241
mbed_official 600:7d17ca308cd1 242 obj->uart->CFG = (1 << 0) // this will enable the usart
mbed_official 600:7d17ca308cd1 243 | (data_bits << 2)
mbed_official 337:6ed01c00b962 244 | (paritysel << 4)
mbed_official 337:6ed01c00b962 245 | (stop_bits << 6);
mbed_official 337:6ed01c00b962 246 }
mbed_official 337:6ed01c00b962 247
mbed_official 337:6ed01c00b962 248 /******************************************************************************
mbed_official 337:6ed01c00b962 249 * INTERRUPTS HANDLING
mbed_official 337:6ed01c00b962 250 ******************************************************************************/
mbed_official 387:643a59b3dbac 251 static inline void uart_irq(SerialIrq irq_type, uint32_t index)
mbed_official 337:6ed01c00b962 252 {
mbed_official 337:6ed01c00b962 253 if (serial_irq_ids[index] != 0)
mbed_official 337:6ed01c00b962 254 irq_handler(serial_irq_ids[index], irq_type);
mbed_official 337:6ed01c00b962 255 }
mbed_official 337:6ed01c00b962 256
mbed_official 387:643a59b3dbac 257 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & RXRDY) ? RxIrq : TxIrq, 0);}
mbed_official 387:643a59b3dbac 258 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & RXRDY) ? RxIrq : TxIrq, 1);}
mbed_official 387:643a59b3dbac 259 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & RXRDY) ? RxIrq : TxIrq, 2);}
mbed_official 337:6ed01c00b962 260
mbed_official 337:6ed01c00b962 261 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
mbed_official 337:6ed01c00b962 262 {
mbed_official 337:6ed01c00b962 263 irq_handler = handler;
mbed_official 337:6ed01c00b962 264 serial_irq_ids[obj->index] = id;
mbed_official 337:6ed01c00b962 265 }
mbed_official 337:6ed01c00b962 266
mbed_official 337:6ed01c00b962 267 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
mbed_official 337:6ed01c00b962 268 {
mbed_official 337:6ed01c00b962 269 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 337:6ed01c00b962 270 uint32_t vector = 0;
mbed_official 337:6ed01c00b962 271 switch ((int)obj->uart) {
mbed_official 337:6ed01c00b962 272 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
mbed_official 337:6ed01c00b962 273 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
mbed_official 337:6ed01c00b962 274 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
mbed_official 337:6ed01c00b962 275 }
mbed_official 337:6ed01c00b962 276
mbed_official 337:6ed01c00b962 277 if (enable) {
mbed_official 387:643a59b3dbac 278 NVIC_DisableIRQ(irq_n);
mbed_official 387:643a59b3dbac 279 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 337:6ed01c00b962 280 NVIC_SetVector(irq_n, vector);
mbed_official 337:6ed01c00b962 281 NVIC_EnableIRQ(irq_n);
mbed_official 337:6ed01c00b962 282 } else { // disable
mbed_official 387:643a59b3dbac 283 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2));
mbed_official 387:643a59b3dbac 284 if ( (obj->uart->INTENSET & (RXRDYEN | TXRDYEN)) == 0) {
mbed_official 337:6ed01c00b962 285 NVIC_DisableIRQ(irq_n);
mbed_official 387:643a59b3dbac 286 }
mbed_official 337:6ed01c00b962 287 }
mbed_official 337:6ed01c00b962 288 }
mbed_official 337:6ed01c00b962 289
mbed_official 337:6ed01c00b962 290 /******************************************************************************
mbed_official 337:6ed01c00b962 291 * READ/WRITE
mbed_official 337:6ed01c00b962 292 ******************************************************************************/
mbed_official 337:6ed01c00b962 293 int serial_getc(serial_t *obj)
mbed_official 337:6ed01c00b962 294 {
mbed_official 337:6ed01c00b962 295 while (!serial_readable(obj));
mbed_official 337:6ed01c00b962 296 return obj->uart->RXDAT;
mbed_official 337:6ed01c00b962 297 }
mbed_official 337:6ed01c00b962 298
mbed_official 337:6ed01c00b962 299 void serial_putc(serial_t *obj, int c)
mbed_official 337:6ed01c00b962 300 {
mbed_official 337:6ed01c00b962 301 while (!serial_writable(obj));
mbed_official 337:6ed01c00b962 302 obj->uart->TXDAT = c;
mbed_official 337:6ed01c00b962 303 }
mbed_official 337:6ed01c00b962 304
mbed_official 337:6ed01c00b962 305 int serial_readable(serial_t *obj)
mbed_official 337:6ed01c00b962 306 {
mbed_official 337:6ed01c00b962 307 return obj->uart->STAT & RXRDY;
mbed_official 337:6ed01c00b962 308 }
mbed_official 337:6ed01c00b962 309
mbed_official 337:6ed01c00b962 310 int serial_writable(serial_t *obj)
mbed_official 337:6ed01c00b962 311 {
mbed_official 337:6ed01c00b962 312 return obj->uart->STAT & TXRDY;
mbed_official 337:6ed01c00b962 313 }
mbed_official 337:6ed01c00b962 314
mbed_official 337:6ed01c00b962 315 void serial_clear(serial_t *obj)
mbed_official 337:6ed01c00b962 316 {
mbed_official 337:6ed01c00b962 317 // [TODO]
mbed_official 337:6ed01c00b962 318 }
mbed_official 337:6ed01c00b962 319
mbed_official 337:6ed01c00b962 320 void serial_pinout_tx(PinName tx)
mbed_official 337:6ed01c00b962 321 {
mbed_official 337:6ed01c00b962 322
mbed_official 337:6ed01c00b962 323 }
mbed_official 337:6ed01c00b962 324
mbed_official 337:6ed01c00b962 325 void serial_break_set(serial_t *obj)
mbed_official 337:6ed01c00b962 326 {
mbed_official 337:6ed01c00b962 327 obj->uart->CTL |= TXBRKEN;
mbed_official 337:6ed01c00b962 328 }
mbed_official 337:6ed01c00b962 329
mbed_official 337:6ed01c00b962 330 void serial_break_clear(serial_t *obj)
mbed_official 337:6ed01c00b962 331 {
mbed_official 337:6ed01c00b962 332 obj->uart->CTL &= ~TXBRKEN;
mbed_official 337:6ed01c00b962 333 }
mbed_official 337:6ed01c00b962 334
mbed_official 337:6ed01c00b962 335 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
mbed_official 337:6ed01c00b962 336 {
mbed_official 337:6ed01c00b962 337 const SWM_Map *swm_rts, *swm_cts;
mbed_official 337:6ed01c00b962 338 uint32_t regVal_rts, regVal_cts;
mbed_official 337:6ed01c00b962 339
mbed_official 337:6ed01c00b962 340 swm_rts = &SWM_UART_RTS[obj->index];
mbed_official 337:6ed01c00b962 341 swm_cts = &SWM_UART_CTS[obj->index];
mbed_official 337:6ed01c00b962 342 regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
mbed_official 337:6ed01c00b962 343 regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
mbed_official 337:6ed01c00b962 344
mbed_official 337:6ed01c00b962 345 if (FlowControlNone == type) {
mbed_official 337:6ed01c00b962 346 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 337:6ed01c00b962 347 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 337:6ed01c00b962 348 obj->uart->CFG &= ~CTSEN;
mbed_official 337:6ed01c00b962 349 return;
mbed_official 337:6ed01c00b962 350 }
mbed_official 337:6ed01c00b962 351 if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) {
mbed_official 337:6ed01c00b962 352 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | ((rxflow >> PIN_SHIFT) << swm_rts->offset);
mbed_official 337:6ed01c00b962 353 if (FlowControlRTS == type) {
mbed_official 337:6ed01c00b962 354 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
mbed_official 337:6ed01c00b962 355 obj->uart->CFG &= ~CTSEN;
mbed_official 337:6ed01c00b962 356 }
mbed_official 337:6ed01c00b962 357 }
mbed_official 337:6ed01c00b962 358 if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
mbed_official 337:6ed01c00b962 359 LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | ((txflow >> PIN_SHIFT) << swm_cts->offset);
mbed_official 337:6ed01c00b962 360 obj->uart->CFG |= CTSEN;
mbed_official 337:6ed01c00b962 361 if (FlowControlCTS == type) {
mbed_official 337:6ed01c00b962 362 LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
mbed_official 337:6ed01c00b962 363 }
mbed_official 337:6ed01c00b962 364 }
mbed_official 337:6ed01c00b962 365 }
mbed_official 337:6ed01c00b962 366
mbed_official 337:6ed01c00b962 367 #endif