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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_adc_ex.h@274:6937b19af361, 2014-08-06 (annotated)

Committer:
mbed_official
Date:
Wed Aug 06 08:15:07 2014 +0100
Revision:
274:6937b19af361
Parent:
226:b062af740e40
Child:
369:2e96f1b71984
Synchronized with git revision 5b145e4f6c509376173c3ea2aa35a6da879a2124



Full URL: https://github.com/mbedmicro/mbed/commit/5b145e4f6c509376173c3ea2aa35a6da879a2124/



[TARGET_LPC11UXX] PeripheralNames.h and PinMap definitions separation for LPC11UXX platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_adc.h
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 226:b062af740e40 5 * @version V1.1.0RC2
mbed_official 226:b062af740e40 6 * @date 14-May-2014
mbed_official 87:085cde657901 7 * @brief Header file of ADC HAL module.
mbed_official 87:085cde657901 8 ******************************************************************************
mbed_official 87:085cde657901 9 * @attention
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 12 *
mbed_official 87:085cde657901 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 14 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 16 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 19 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 21 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 22 * without specific prior written permission.
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 34 *
mbed_official 87:085cde657901 35 ******************************************************************************
mbed_official 87:085cde657901 36 */
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 87:085cde657901 39 #ifndef __STM32F4xx_ADC_EX_H
mbed_official 87:085cde657901 40 #define __STM32F4xx_ADC_EX_H
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 #ifdef __cplusplus
mbed_official 87:085cde657901 43 extern "C" {
mbed_official 87:085cde657901 44 #endif
mbed_official 87:085cde657901 45
mbed_official 87:085cde657901 46 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 47 #include "stm32f4xx_hal_def.h"
mbed_official 87:085cde657901 48
mbed_official 87:085cde657901 49 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 50 * @{
mbed_official 87:085cde657901 51 */
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 /** @addtogroup ADCEx
mbed_official 87:085cde657901 54 * @{
mbed_official 87:085cde657901 55 */
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 /* Exported types ------------------------------------------------------------*/
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 /**
mbed_official 87:085cde657901 60 * @brief ADC Configuration injected Channel structure definition
mbed_official 87:085cde657901 61 */
mbed_official 87:085cde657901 62 typedef struct
mbed_official 87:085cde657901 63 {
mbed_official 226:b062af740e40 64 uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
mbed_official 226:b062af740e40 65 This parameter can be a value of @ref ADC_channels */
mbed_official 87:085cde657901 66 uint32_t InjectedRank; /*!< The rank in the injected group sequencer
mbed_official 87:085cde657901 67 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
mbed_official 87:085cde657901 68 uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
mbed_official 87:085cde657901 69 This parameter can be a value of @ref ADC_sampling_times */
mbed_official 87:085cde657901 70 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
mbed_official 87:085cde657901 71 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
mbed_official 87:085cde657901 72 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
mbed_official 87:085cde657901 73 injected channel group.
mbed_official 87:085cde657901 74 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
mbed_official 87:085cde657901 75 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
mbed_official 87:085cde657901 76 conversion after regular one */
mbed_official 87:085cde657901 77 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
mbed_official 87:085cde657901 78 This parameter can be set to ENABLE or DISABLE. */
mbed_official 87:085cde657901 79 uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
mbed_official 226:b062af740e40 80 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
mbed_official 87:085cde657901 81 uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
mbed_official 226:b062af740e40 82 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
mbed_official 87:085cde657901 83 }ADC_InjectionConfTypeDef;
mbed_official 87:085cde657901 84
mbed_official 87:085cde657901 85 /**
mbed_official 87:085cde657901 86 * @brief ADC Configuration multi-mode structure definition
mbed_official 87:085cde657901 87 */
mbed_official 87:085cde657901 88 typedef struct
mbed_official 87:085cde657901 89 {
mbed_official 87:085cde657901 90 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
mbed_official 226:b062af740e40 91 This parameter can be a value of @ref ADCEx_Common_mode */
mbed_official 87:085cde657901 92 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
mbed_official 226:b062af740e40 93 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
mbed_official 87:085cde657901 94 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
mbed_official 226:b062af740e40 95 This parameter can be a value of @ref ADCEx_delay_between_2_sampling_phases */
mbed_official 87:085cde657901 96 }ADC_MultiModeTypeDef;
mbed_official 87:085cde657901 97
mbed_official 87:085cde657901 98 /* Exported constants --------------------------------------------------------*/
mbed_official 87:085cde657901 99
mbed_official 87:085cde657901 100 /** @defgroup ADCEx_Exported_Constants
mbed_official 87:085cde657901 101 * @{
mbed_official 87:085cde657901 102 */
mbed_official 87:085cde657901 103
mbed_official 87:085cde657901 104
mbed_official 87:085cde657901 105 /** @defgroup ADCEx_Common_mode
mbed_official 87:085cde657901 106 * @{
mbed_official 87:085cde657901 107 */
mbed_official 87:085cde657901 108 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
mbed_official 87:085cde657901 109 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
mbed_official 87:085cde657901 110 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
mbed_official 87:085cde657901 111 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 112 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
mbed_official 87:085cde657901 113 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 114 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 115 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 116 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
mbed_official 87:085cde657901 117 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 118 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
mbed_official 87:085cde657901 119 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 120 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
mbed_official 87:085cde657901 121
mbed_official 87:085cde657901 122 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
mbed_official 87:085cde657901 123 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
mbed_official 87:085cde657901 124 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
mbed_official 87:085cde657901 125 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
mbed_official 87:085cde657901 126 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
mbed_official 87:085cde657901 127 ((MODE) == ADC_DUALMODE_INTERL) || \
mbed_official 87:085cde657901 128 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
mbed_official 87:085cde657901 129 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
mbed_official 87:085cde657901 130 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
mbed_official 87:085cde657901 131 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
mbed_official 87:085cde657901 132 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
mbed_official 87:085cde657901 133 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
mbed_official 87:085cde657901 134 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
mbed_official 87:085cde657901 135 /**
mbed_official 87:085cde657901 136 * @}
mbed_official 87:085cde657901 137 */
mbed_official 87:085cde657901 138
mbed_official 87:085cde657901 139 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode
mbed_official 87:085cde657901 140 * @{
mbed_official 87:085cde657901 141 */
mbed_official 87:085cde657901 142 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
mbed_official 87:085cde657901 143 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
mbed_official 87:085cde657901 144 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
mbed_official 87:085cde657901 145 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
mbed_official 87:085cde657901 146
mbed_official 87:085cde657901 147 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
mbed_official 87:085cde657901 148 ((MODE) == ADC_DMAACCESSMODE_1) || \
mbed_official 87:085cde657901 149 ((MODE) == ADC_DMAACCESSMODE_2) || \
mbed_official 87:085cde657901 150 ((MODE) == ADC_DMAACCESSMODE_3))
mbed_official 87:085cde657901 151 /**
mbed_official 87:085cde657901 152 * @}
mbed_official 87:085cde657901 153 */
mbed_official 87:085cde657901 154
mbed_official 226:b062af740e40 155 /** @defgroup ADCEx_delay_between_2_sampling_phases
mbed_official 226:b062af740e40 156 * @{
mbed_official 226:b062af740e40 157 */
mbed_official 226:b062af740e40 158 #define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)0x00000000)
mbed_official 226:b062af740e40 159 #define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
mbed_official 226:b062af740e40 160 #define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
mbed_official 226:b062af740e40 161 #define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 162 #define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)ADC_CCR_DELAY_2)
mbed_official 226:b062af740e40 163 #define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 164 #define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
mbed_official 226:b062af740e40 165 #define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 166 #define ADC_TWOSAMPLINGDELAY_13CYCLES ((uint32_t)ADC_CCR_DELAY_3)
mbed_official 226:b062af740e40 167 #define ADC_TWOSAMPLINGDELAY_14CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 168 #define ADC_TWOSAMPLINGDELAY_15CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1))
mbed_official 226:b062af740e40 169 #define ADC_TWOSAMPLINGDELAY_16CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 170 #define ADC_TWOSAMPLINGDELAY_17CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2))
mbed_official 226:b062af740e40 171 #define ADC_TWOSAMPLINGDELAY_18CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0))
mbed_official 226:b062af740e40 172 #define ADC_TWOSAMPLINGDELAY_19CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1))
mbed_official 226:b062af740e40 173 #define ADC_TWOSAMPLINGDELAY_20CYCLES ((uint32_t)ADC_CCR_DELAY)
mbed_official 226:b062af740e40 174
mbed_official 226:b062af740e40 175 #define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
mbed_official 226:b062af740e40 176 ((DELAY) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
mbed_official 226:b062af740e40 177 ((DELAY) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
mbed_official 226:b062af740e40 178 ((DELAY) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
mbed_official 226:b062af740e40 179 ((DELAY) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \
mbed_official 226:b062af740e40 180 ((DELAY) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \
mbed_official 226:b062af740e40 181 ((DELAY) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \
mbed_official 226:b062af740e40 182 ((DELAY) == ADC_TWOSAMPLINGDELAY_12CYCLES) || \
mbed_official 226:b062af740e40 183 ((DELAY) == ADC_TWOSAMPLINGDELAY_13CYCLES) || \
mbed_official 226:b062af740e40 184 ((DELAY) == ADC_TWOSAMPLINGDELAY_14CYCLES) || \
mbed_official 226:b062af740e40 185 ((DELAY) == ADC_TWOSAMPLINGDELAY_15CYCLES) || \
mbed_official 226:b062af740e40 186 ((DELAY) == ADC_TWOSAMPLINGDELAY_16CYCLES) || \
mbed_official 226:b062af740e40 187 ((DELAY) == ADC_TWOSAMPLINGDELAY_17CYCLES) || \
mbed_official 226:b062af740e40 188 ((DELAY) == ADC_TWOSAMPLINGDELAY_18CYCLES) || \
mbed_official 226:b062af740e40 189 ((DELAY) == ADC_TWOSAMPLINGDELAY_19CYCLES) || \
mbed_official 226:b062af740e40 190 ((DELAY) == ADC_TWOSAMPLINGDELAY_20CYCLES))
mbed_official 226:b062af740e40 191 /**
mbed_official 226:b062af740e40 192 * @}
mbed_official 226:b062af740e40 193 */
mbed_official 226:b062af740e40 194
mbed_official 87:085cde657901 195 /** @defgroup ADCEx_External_trigger_edge_Injected
mbed_official 87:085cde657901 196 * @{
mbed_official 87:085cde657901 197 */
mbed_official 87:085cde657901 198 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
mbed_official 87:085cde657901 199 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
mbed_official 87:085cde657901 200 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
mbed_official 87:085cde657901 201 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
mbed_official 87:085cde657901 202
mbed_official 87:085cde657901 203 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
mbed_official 87:085cde657901 204 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
mbed_official 87:085cde657901 205 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
mbed_official 87:085cde657901 206 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
mbed_official 87:085cde657901 207 /**
mbed_official 87:085cde657901 208 * @}
mbed_official 87:085cde657901 209 */
mbed_official 87:085cde657901 210
mbed_official 87:085cde657901 211 /** @defgroup ADCEx_External_trigger_Source_Injected
mbed_official 87:085cde657901 212 * @{
mbed_official 87:085cde657901 213 */
mbed_official 87:085cde657901 214 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
mbed_official 87:085cde657901 215 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
mbed_official 87:085cde657901 216 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
mbed_official 87:085cde657901 217 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 218 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
mbed_official 87:085cde657901 219 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 220 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
mbed_official 87:085cde657901 221 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 222 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
mbed_official 87:085cde657901 223 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 224 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
mbed_official 87:085cde657901 225 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 226 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
mbed_official 87:085cde657901 227 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
mbed_official 87:085cde657901 228 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
mbed_official 87:085cde657901 229 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
mbed_official 87:085cde657901 232 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
mbed_official 87:085cde657901 233 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
mbed_official 87:085cde657901 234 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
mbed_official 87:085cde657901 235 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
mbed_official 87:085cde657901 236 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
mbed_official 87:085cde657901 237 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
mbed_official 87:085cde657901 238 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
mbed_official 87:085cde657901 239 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
mbed_official 87:085cde657901 240 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
mbed_official 87:085cde657901 241 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
mbed_official 87:085cde657901 242 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
mbed_official 87:085cde657901 243 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
mbed_official 87:085cde657901 244 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
mbed_official 87:085cde657901 245 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
mbed_official 87:085cde657901 246 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
mbed_official 87:085cde657901 247 /**
mbed_official 87:085cde657901 248 * @}
mbed_official 87:085cde657901 249 */
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 /** @defgroup ADCEx_injected_channel_selection
mbed_official 87:085cde657901 252 * @{
mbed_official 87:085cde657901 253 */
mbed_official 87:085cde657901 254 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
mbed_official 87:085cde657901 255 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
mbed_official 87:085cde657901 256 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
mbed_official 87:085cde657901 257 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
mbed_official 87:085cde657901 258
mbed_official 87:085cde657901 259 /**
mbed_official 87:085cde657901 260 * @}
mbed_official 87:085cde657901 261 */
mbed_official 87:085cde657901 262
mbed_official 87:085cde657901 263 /** @defgroup ADCEx_injected_length
mbed_official 87:085cde657901 264 * @{
mbed_official 87:085cde657901 265 */
mbed_official 87:085cde657901 266 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
mbed_official 87:085cde657901 267 /**
mbed_official 87:085cde657901 268 * @}
mbed_official 87:085cde657901 269 */
mbed_official 87:085cde657901 270
mbed_official 87:085cde657901 271 /** @defgroup ADCEx_injected_rank
mbed_official 87:085cde657901 272 * @{
mbed_official 87:085cde657901 273 */
mbed_official 87:085cde657901 274 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
mbed_official 87:085cde657901 275 /**
mbed_official 87:085cde657901 276 * @}
mbed_official 87:085cde657901 277 */
mbed_official 87:085cde657901 278
mbed_official 87:085cde657901 279 /**
mbed_official 87:085cde657901 280 * @}
mbed_official 87:085cde657901 281 */
mbed_official 87:085cde657901 282
mbed_official 87:085cde657901 283 /* Exported macro ------------------------------------------------------------*/
mbed_official 87:085cde657901 284
mbed_official 87:085cde657901 285 /**
mbed_official 87:085cde657901 286 * @brief Set the selected injected Channel rank.
mbed_official 87:085cde657901 287 * @param _CHANNELNB_: Channel number.
mbed_official 87:085cde657901 288 * @param _RANKNB_: Rank number.
mbed_official 87:085cde657901 289 * @param _JSQR_JL_: Sequence length.
mbed_official 87:085cde657901 290 * @retval None
mbed_official 87:085cde657901 291 */
mbed_official 87:085cde657901 292 #define __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \
mbed_official 87:085cde657901 293 ((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
mbed_official 87:085cde657901 294
mbed_official 87:085cde657901 295 /* Exported functions --------------------------------------------------------*/
mbed_official 87:085cde657901 296
mbed_official 87:085cde657901 297 /* I/O operation functions ******************************************************/
mbed_official 87:085cde657901 298 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 299 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
mbed_official 87:085cde657901 300 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 301 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 302 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 303 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
mbed_official 87:085cde657901 304 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
mbed_official 87:085cde657901 305 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 306 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
mbed_official 106:ced8cbb51063 307 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 87:085cde657901 308
mbed_official 87:085cde657901 309 /* Peripheral Control functions *************************************************/
mbed_official 87:085cde657901 310 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
mbed_official 87:085cde657901 311 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
mbed_official 87:085cde657901 312
mbed_official 87:085cde657901 313 /**
mbed_official 87:085cde657901 314 * @}
mbed_official 87:085cde657901 315 */
mbed_official 87:085cde657901 316
mbed_official 87:085cde657901 317 /**
mbed_official 87:085cde657901 318 * @}
mbed_official 87:085cde657901 319 */
mbed_official 87:085cde657901 320
mbed_official 87:085cde657901 321 #ifdef __cplusplus
mbed_official 87:085cde657901 322 }
mbed_official 87:085cde657901 323 #endif
mbed_official 87:085cde657901 324
mbed_official 87:085cde657901 325 #endif /*__STM32F4xx_ADC_EX_H */
mbed_official 87:085cde657901 326
mbed_official 87:085cde657901 327
mbed_official 87:085cde657901 328 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/