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Last commit 20 Feb 2019 by 
mbed official
targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/lptmr/fsl_lptmr_hal.h@324:406fd2029f23, 2014-09-18 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Sep 18 14:00:17 2014 +0100
- Revision:
- 324:406fd2029f23
Synchronized with git revision a73f28e6fbca9559fbed2726410eeb4c0534a4a5
Full URL: https://github.com/mbedmicro/mbed/commit/a73f28e6fbca9559fbed2726410eeb4c0534a4a5/
Extended #476, which does not break ethernet for K64F
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 324:406fd2029f23 | 1 | /* |
| mbed_official | 324:406fd2029f23 | 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. |
| mbed_official | 324:406fd2029f23 | 3 | * All rights reserved. |
| mbed_official | 324:406fd2029f23 | 4 | * |
| mbed_official | 324:406fd2029f23 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 324:406fd2029f23 | 6 | * are permitted provided that the following conditions are met: |
| mbed_official | 324:406fd2029f23 | 7 | * |
| mbed_official | 324:406fd2029f23 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
| mbed_official | 324:406fd2029f23 | 9 | * of conditions and the following disclaimer. |
| mbed_official | 324:406fd2029f23 | 10 | * |
| mbed_official | 324:406fd2029f23 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
| mbed_official | 324:406fd2029f23 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
| mbed_official | 324:406fd2029f23 | 13 | * other materials provided with the distribution. |
| mbed_official | 324:406fd2029f23 | 14 | * |
| mbed_official | 324:406fd2029f23 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
| mbed_official | 324:406fd2029f23 | 16 | * contributors may be used to endorse or promote products derived from this |
| mbed_official | 324:406fd2029f23 | 17 | * software without specific prior written permission. |
| mbed_official | 324:406fd2029f23 | 18 | * |
| mbed_official | 324:406fd2029f23 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| mbed_official | 324:406fd2029f23 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| mbed_official | 324:406fd2029f23 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 324:406fd2029f23 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| mbed_official | 324:406fd2029f23 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| mbed_official | 324:406fd2029f23 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| mbed_official | 324:406fd2029f23 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| mbed_official | 324:406fd2029f23 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| mbed_official | 324:406fd2029f23 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| mbed_official | 324:406fd2029f23 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 324:406fd2029f23 | 29 | */ |
| mbed_official | 324:406fd2029f23 | 30 | #ifndef __FSL_LPTMR_HAL_H__ |
| mbed_official | 324:406fd2029f23 | 31 | #define __FSL_LPTMR_HAL_H__ |
| mbed_official | 324:406fd2029f23 | 32 | |
| mbed_official | 324:406fd2029f23 | 33 | #include <assert.h> |
| mbed_official | 324:406fd2029f23 | 34 | #include <stdint.h> |
| mbed_official | 324:406fd2029f23 | 35 | #include <stdbool.h> |
| mbed_official | 324:406fd2029f23 | 36 | #include "fsl_lptmr_features.h" |
| mbed_official | 324:406fd2029f23 | 37 | #include "fsl_device_registers.h" |
| mbed_official | 324:406fd2029f23 | 38 | |
| mbed_official | 324:406fd2029f23 | 39 | /*! |
| mbed_official | 324:406fd2029f23 | 40 | * @addtogroup lptmr_hal |
| mbed_official | 324:406fd2029f23 | 41 | * @{ |
| mbed_official | 324:406fd2029f23 | 42 | */ |
| mbed_official | 324:406fd2029f23 | 43 | |
| mbed_official | 324:406fd2029f23 | 44 | /******************************************************************************* |
| mbed_official | 324:406fd2029f23 | 45 | * Definitions |
| mbed_official | 324:406fd2029f23 | 46 | *******************************************************************************/ |
| mbed_official | 324:406fd2029f23 | 47 | |
| mbed_official | 324:406fd2029f23 | 48 | /*! @brief LPTMR pin selection.*/ |
| mbed_official | 324:406fd2029f23 | 49 | typedef enum _lptmr_pin_select{ |
| mbed_official | 324:406fd2029f23 | 50 | kLptmrPinSelectCmpOut = 0x0U, /*!< Lptmr Pin is CMP0 output pin.*/ |
| mbed_official | 324:406fd2029f23 | 51 | kLptmrPinSelectLptmrAlt1 = 0x1U, /*!< Lptmr Pin is LPTMR_ALT1 pin.*/ |
| mbed_official | 324:406fd2029f23 | 52 | kLptmrPinSelectLptmrAlt2 = 0x2U, /*!< Lptmr Pin is LPTMR_ALT2 pin.*/ |
| mbed_official | 324:406fd2029f23 | 53 | kLptmrPinSelectLptmrAlt3 = 0x3U /*!< Lptmr Pin is LPTMR_ALT3 pin.*/ |
| mbed_official | 324:406fd2029f23 | 54 | } lptmr_pin_select_t; |
| mbed_official | 324:406fd2029f23 | 55 | |
| mbed_official | 324:406fd2029f23 | 56 | /*! @brief LPTMR pin polarity, used while in pluse counter mode.*/ |
| mbed_official | 324:406fd2029f23 | 57 | typedef enum _lptmr_pin_polarity{ |
| mbed_official | 324:406fd2029f23 | 58 | kLptmrPinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high.*/ |
| mbed_official | 324:406fd2029f23 | 59 | kLptmrPinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low.*/ |
| mbed_official | 324:406fd2029f23 | 60 | } lptmr_pin_polarity_t; |
| mbed_official | 324:406fd2029f23 | 61 | |
| mbed_official | 324:406fd2029f23 | 62 | /*! @brief LPTMR timer mode selection.*/ |
| mbed_official | 324:406fd2029f23 | 63 | typedef enum _lptmr_timer_mode{ |
| mbed_official | 324:406fd2029f23 | 64 | kLptmrTimerModeTimeCounter = 0x0U, /*!< Time Counter mode.*/ |
| mbed_official | 324:406fd2029f23 | 65 | kLptmrTimerModePluseCounter = 0x1U /*!< Pulse Counter mode.*/ |
| mbed_official | 324:406fd2029f23 | 66 | } lptmr_timer_mode_t; |
| mbed_official | 324:406fd2029f23 | 67 | |
| mbed_official | 324:406fd2029f23 | 68 | /*! @brief LPTMR proscaler value.*/ |
| mbed_official | 324:406fd2029f23 | 69 | typedef enum _lptmr_prescaler_value{ |
| mbed_official | 324:406fd2029f23 | 70 | kLptmrPrescalerDivide2 = 0x0U, /*!< Prescaler divide 2, glitch filter invalid.*/ |
| mbed_official | 324:406fd2029f23 | 71 | kLptmrPrescalerDivide4GlichFiltch2 = 0x1U, /*!< Prescaler divide 4, glitch filter 2.*/ |
| mbed_official | 324:406fd2029f23 | 72 | kLptmrPrescalerDivide8GlichFiltch4 = 0x2U, /*!< Prescaler divide 8, glitch filter 4.*/ |
| mbed_official | 324:406fd2029f23 | 73 | kLptmrPrescalerDivide16GlichFiltch8 = 0x3U, /*!< Prescaler divide 16, glitch filter 8.*/ |
| mbed_official | 324:406fd2029f23 | 74 | kLptmrPrescalerDivide32GlichFiltch16 = 0x4U, /*!< Prescaler divide 32, glitch filter 16.*/ |
| mbed_official | 324:406fd2029f23 | 75 | kLptmrPrescalerDivide64GlichFiltch32 = 0x5U, /*!< Prescaler divide 64, glitch filter 32.*/ |
| mbed_official | 324:406fd2029f23 | 76 | kLptmrPrescalerDivide128GlichFiltch64 = 0x6U, /*!< Prescaler divide 128, glitch filter 64.*/ |
| mbed_official | 324:406fd2029f23 | 77 | kLptmrPrescalerDivide256GlichFiltch128 = 0x7U, /*!< Prescaler divide 256, glitch filter 128.*/ |
| mbed_official | 324:406fd2029f23 | 78 | kLptmrPrescalerDivide512GlichFiltch256 = 0x8U, /*!< Prescaler divide 512, glitch filter 256.*/ |
| mbed_official | 324:406fd2029f23 | 79 | kLptmrPrescalerDivide1024GlichFiltch512 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512.*/ |
| mbed_official | 324:406fd2029f23 | 80 | kLptmrPrescalerDivide2048lichFiltch1024 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024.*/ |
| mbed_official | 324:406fd2029f23 | 81 | kLptmrPrescalerDivide4096GlichFiltch2048 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048.*/ |
| mbed_official | 324:406fd2029f23 | 82 | kLptmrPrescalerDivide8192GlichFiltch4096 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096.*/ |
| mbed_official | 324:406fd2029f23 | 83 | kLptmrPrescalerDivide16384GlichFiltch8192 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192.*/ |
| mbed_official | 324:406fd2029f23 | 84 | kLptmrPrescalerDivide32768GlichFiltch16384 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384.*/ |
| mbed_official | 324:406fd2029f23 | 85 | kLptmrPrescalerDivide65535GlichFiltch32768 = 0xFU /*!< Prescaler divide 65535, glitch filter 32768.*/ |
| mbed_official | 324:406fd2029f23 | 86 | } lptmr_prescaler_value_t; |
| mbed_official | 324:406fd2029f23 | 87 | |
| mbed_official | 324:406fd2029f23 | 88 | /*! @brief LPTMR clock source selection.*/ |
| mbed_official | 324:406fd2029f23 | 89 | typedef enum _lptmr_prescaler_clock_source{ |
| mbed_official | 324:406fd2029f23 | 90 | kLptmrPrescalerClockSourceMcgIrcClk = 0x0U, /*!< Clock source is MCGIRCLK.*/ |
| mbed_official | 324:406fd2029f23 | 91 | kLptmrPrescalerClockSourceLpo = 0x1U, /*!< Clock source is LPO.*/ |
| mbed_official | 324:406fd2029f23 | 92 | kLptmrPrescalerClockSourceErClk32K = 0x2U, /*!< Clock source is ERCLK32K.*/ |
| mbed_official | 324:406fd2029f23 | 93 | kLptmrPrescalerClockSourceOscErClk = 0x3U /*!< Clock source is OSCERCLK.*/ |
| mbed_official | 324:406fd2029f23 | 94 | } lptmr_prescaler_clock_source_t; |
| mbed_official | 324:406fd2029f23 | 95 | |
| mbed_official | 324:406fd2029f23 | 96 | /*! @brief LPTMR status return codes.*/ |
| mbed_official | 324:406fd2029f23 | 97 | typedef enum _lptmr_status { |
| mbed_official | 324:406fd2029f23 | 98 | kStatus_LPTMR_Success = 0x0U, /*!< Succeed. */ |
| mbed_official | 324:406fd2029f23 | 99 | kStatus_LPTMR_NotInitlialized = 0x1U, /*!< LPTMR is not initialized yet. */ |
| mbed_official | 324:406fd2029f23 | 100 | kStatus_LPTMR_NullArgument = 0x2U, /*!< Argument is NULL.*/ |
| mbed_official | 324:406fd2029f23 | 101 | kStatus_LPTMR_InvalidPrescalerValue = 0x3U, /*!< Value 0 is not valid in pulse counter mode. */ |
| mbed_official | 324:406fd2029f23 | 102 | kStatus_LPTMR_InvalidInTimeCounterMode = 0x4U, /*!< Function can not called in time counter mode. */ |
| mbed_official | 324:406fd2029f23 | 103 | kStatus_LPTMR_InvalidInPluseCounterMode = 0x5U, /*!< Function can not called in pulse counter mode. */ |
| mbed_official | 324:406fd2029f23 | 104 | kStatus_LPTMR_InvalidPlusePeriodCount = 0x6U, /*!< Pulse period count must be integer multiples of the glitch filter divider. */ |
| mbed_official | 324:406fd2029f23 | 105 | kStatus_LPTMR_TcfNotSet = 0x7U, /*!< If LPTMR is enabled, compare register can only altered when TCF is set. */ |
| mbed_official | 324:406fd2029f23 | 106 | kStatus_LPTMR_TimerPeriodUsTooSmall = 0x8U, /*!< Timer period time is too small for current clock source. */ |
| mbed_official | 324:406fd2029f23 | 107 | kStatus_LPTMR_TimerPeriodUsTooLarge = 0x9U /*!< Timer period time is too large for current clock source. */ |
| mbed_official | 324:406fd2029f23 | 108 | } lptmr_status_t; |
| mbed_official | 324:406fd2029f23 | 109 | |
| mbed_official | 324:406fd2029f23 | 110 | /******************************************************************************* |
| mbed_official | 324:406fd2029f23 | 111 | ** Variables |
| mbed_official | 324:406fd2029f23 | 112 | *******************************************************************************/ |
| mbed_official | 324:406fd2029f23 | 113 | |
| mbed_official | 324:406fd2029f23 | 114 | /******************************************************************************* |
| mbed_official | 324:406fd2029f23 | 115 | * API |
| mbed_official | 324:406fd2029f23 | 116 | *******************************************************************************/ |
| mbed_official | 324:406fd2029f23 | 117 | |
| mbed_official | 324:406fd2029f23 | 118 | #if defined(__cplusplus) |
| mbed_official | 324:406fd2029f23 | 119 | extern "C" { |
| mbed_official | 324:406fd2029f23 | 120 | #endif |
| mbed_official | 324:406fd2029f23 | 121 | |
| mbed_official | 324:406fd2029f23 | 122 | /*! |
| mbed_official | 324:406fd2029f23 | 123 | * @name LPTMR HAL. |
| mbed_official | 324:406fd2029f23 | 124 | * @{ |
| mbed_official | 324:406fd2029f23 | 125 | */ |
| mbed_official | 324:406fd2029f23 | 126 | |
| mbed_official | 324:406fd2029f23 | 127 | /*! |
| mbed_official | 324:406fd2029f23 | 128 | * @brief Enables the LPTMR module operation. |
| mbed_official | 324:406fd2029f23 | 129 | * |
| mbed_official | 324:406fd2029f23 | 130 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 131 | */ |
| mbed_official | 324:406fd2029f23 | 132 | static inline void LPTMR_HAL_Enable(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 133 | { |
| mbed_official | 324:406fd2029f23 | 134 | BW_LPTMR_CSR_TEN(baseAddr, (uint8_t)true); |
| mbed_official | 324:406fd2029f23 | 135 | } |
| mbed_official | 324:406fd2029f23 | 136 | |
| mbed_official | 324:406fd2029f23 | 137 | /*! |
| mbed_official | 324:406fd2029f23 | 138 | * @brief Disables the LPTMR module operation. |
| mbed_official | 324:406fd2029f23 | 139 | * |
| mbed_official | 324:406fd2029f23 | 140 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 141 | */ |
| mbed_official | 324:406fd2029f23 | 142 | static inline void LPTMR_HAL_Disable(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 143 | { |
| mbed_official | 324:406fd2029f23 | 144 | BW_LPTMR_CSR_TEN(baseAddr, (uint8_t)false); |
| mbed_official | 324:406fd2029f23 | 145 | } |
| mbed_official | 324:406fd2029f23 | 146 | |
| mbed_official | 324:406fd2029f23 | 147 | /*! |
| mbed_official | 324:406fd2029f23 | 148 | * @brief Checks whether the LPTMR module is enabled. |
| mbed_official | 324:406fd2029f23 | 149 | * |
| mbed_official | 324:406fd2029f23 | 150 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 151 | * @retval true LPTMR module is enabled. |
| mbed_official | 324:406fd2029f23 | 152 | * @retval false LPTMR module is disabled. |
| mbed_official | 324:406fd2029f23 | 153 | */ |
| mbed_official | 324:406fd2029f23 | 154 | static inline bool LPTMR_HAL_IsEnabled(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 155 | { |
| mbed_official | 324:406fd2029f23 | 156 | return (bool)BR_LPTMR_CSR_TEN(baseAddr); |
| mbed_official | 324:406fd2029f23 | 157 | } |
| mbed_official | 324:406fd2029f23 | 158 | |
| mbed_official | 324:406fd2029f23 | 159 | /*! |
| mbed_official | 324:406fd2029f23 | 160 | * @brief Clears the LPTMR interrupt flag if set. |
| mbed_official | 324:406fd2029f23 | 161 | * |
| mbed_official | 324:406fd2029f23 | 162 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 163 | */ |
| mbed_official | 324:406fd2029f23 | 164 | static inline void LPTMR_HAL_ClearIntFlag(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 165 | { |
| mbed_official | 324:406fd2029f23 | 166 | BW_LPTMR_CSR_TCF(baseAddr, 1); |
| mbed_official | 324:406fd2029f23 | 167 | } |
| mbed_official | 324:406fd2029f23 | 168 | |
| mbed_official | 324:406fd2029f23 | 169 | /*! |
| mbed_official | 324:406fd2029f23 | 170 | * @brief Returns the current LPTMR interrupt flag. |
| mbed_official | 324:406fd2029f23 | 171 | * |
| mbed_official | 324:406fd2029f23 | 172 | * @param baseAddr The LPTMR peripheral base address |
| mbed_official | 324:406fd2029f23 | 173 | * @retval true An interrupt is pending. |
| mbed_official | 324:406fd2029f23 | 174 | * @retval false No interrupt is pending. |
| mbed_official | 324:406fd2029f23 | 175 | */ |
| mbed_official | 324:406fd2029f23 | 176 | static inline bool LPTMR_HAL_IsIntPending(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 177 | { |
| mbed_official | 324:406fd2029f23 | 178 | return ((bool)BR_LPTMR_CSR_TCF(baseAddr)); |
| mbed_official | 324:406fd2029f23 | 179 | } |
| mbed_official | 324:406fd2029f23 | 180 | |
| mbed_official | 324:406fd2029f23 | 181 | /*! |
| mbed_official | 324:406fd2029f23 | 182 | * @brief Enables or disables the LPTMR interrupt. |
| mbed_official | 324:406fd2029f23 | 183 | * |
| mbed_official | 324:406fd2029f23 | 184 | * @param baseAddr The LPTMR peripheral base address |
| mbed_official | 324:406fd2029f23 | 185 | * @param enable Pass true to enable LPTMR interrupt |
| mbed_official | 324:406fd2029f23 | 186 | */ |
| mbed_official | 324:406fd2029f23 | 187 | static inline void LPTMR_HAL_SetIntCmd(uint32_t baseAddr, bool enable) |
| mbed_official | 324:406fd2029f23 | 188 | { |
| mbed_official | 324:406fd2029f23 | 189 | BW_LPTMR_CSR_TIE(baseAddr, (uint8_t)enable); |
| mbed_official | 324:406fd2029f23 | 190 | } |
| mbed_official | 324:406fd2029f23 | 191 | |
| mbed_official | 324:406fd2029f23 | 192 | /*! |
| mbed_official | 324:406fd2029f23 | 193 | * @brief Returns whether the LPTMR interrupt is enabled. |
| mbed_official | 324:406fd2029f23 | 194 | * |
| mbed_official | 324:406fd2029f23 | 195 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 196 | * @retval true LPTMR interrupt is enabled. |
| mbed_official | 324:406fd2029f23 | 197 | * @retval false LPTMR interrupt is disabled. |
| mbed_official | 324:406fd2029f23 | 198 | */ |
| mbed_official | 324:406fd2029f23 | 199 | static inline bool LPTMR_HAL_GetIntCmd(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 200 | { |
| mbed_official | 324:406fd2029f23 | 201 | return ((bool)BR_LPTMR_CSR_TIE(baseAddr)); |
| mbed_official | 324:406fd2029f23 | 202 | } |
| mbed_official | 324:406fd2029f23 | 203 | |
| mbed_official | 324:406fd2029f23 | 204 | /*! |
| mbed_official | 324:406fd2029f23 | 205 | * @brief Selects the LPTMR pulse input pin select. |
| mbed_official | 324:406fd2029f23 | 206 | * |
| mbed_official | 324:406fd2029f23 | 207 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 208 | * @param pinSelect Specifies LPTMR pulse input pin select, see #lptmr_pin_select_t |
| mbed_official | 324:406fd2029f23 | 209 | */ |
| mbed_official | 324:406fd2029f23 | 210 | static inline void LPTMR_HAL_SetPinSelectMode(uint32_t baseAddr, lptmr_pin_select_t pinSelect) |
| mbed_official | 324:406fd2029f23 | 211 | { |
| mbed_official | 324:406fd2029f23 | 212 | BW_LPTMR_CSR_TPS(baseAddr, (uint8_t)pinSelect); |
| mbed_official | 324:406fd2029f23 | 213 | } |
| mbed_official | 324:406fd2029f23 | 214 | |
| mbed_official | 324:406fd2029f23 | 215 | /*! |
| mbed_official | 324:406fd2029f23 | 216 | * @brief Returns the LPTMR pulse input pin select. |
| mbed_official | 324:406fd2029f23 | 217 | * |
| mbed_official | 324:406fd2029f23 | 218 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 219 | * @return LPTMR pulse input pin select, see #lptmr_pin_select_t |
| mbed_official | 324:406fd2029f23 | 220 | */ |
| mbed_official | 324:406fd2029f23 | 221 | static inline lptmr_pin_select_t LPTMR_HAL_GetPinSelectMode(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 222 | { |
| mbed_official | 324:406fd2029f23 | 223 | return (lptmr_pin_select_t)BR_LPTMR_CSR_TPS(baseAddr); |
| mbed_official | 324:406fd2029f23 | 224 | } |
| mbed_official | 324:406fd2029f23 | 225 | |
| mbed_official | 324:406fd2029f23 | 226 | /*! |
| mbed_official | 324:406fd2029f23 | 227 | * @brief Selects the LPTMR pulse input pin polarity. |
| mbed_official | 324:406fd2029f23 | 228 | * |
| mbed_official | 324:406fd2029f23 | 229 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 230 | * @param pinPolarity Specifies LPTMR pulse input pin polarity, see #lptmr_pin_polarity_t |
| mbed_official | 324:406fd2029f23 | 231 | */ |
| mbed_official | 324:406fd2029f23 | 232 | static inline void LPTMR_HAL_SetPinPolarityMode(uint32_t baseAddr, lptmr_pin_polarity_t pinPolarity) |
| mbed_official | 324:406fd2029f23 | 233 | { |
| mbed_official | 324:406fd2029f23 | 234 | BW_LPTMR_CSR_TPP(baseAddr, (uint8_t)pinPolarity); |
| mbed_official | 324:406fd2029f23 | 235 | } |
| mbed_official | 324:406fd2029f23 | 236 | |
| mbed_official | 324:406fd2029f23 | 237 | /*! |
| mbed_official | 324:406fd2029f23 | 238 | * @brief Returns the LPTMR pulse input pin polarity. |
| mbed_official | 324:406fd2029f23 | 239 | * |
| mbed_official | 324:406fd2029f23 | 240 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 241 | * @return LPTMR pulse input pin polarity, see #lptmr_pin_polarity_t |
| mbed_official | 324:406fd2029f23 | 242 | */ |
| mbed_official | 324:406fd2029f23 | 243 | static inline lptmr_pin_polarity_t LPTMR_HAL_GetPinPolarityMode(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 244 | { |
| mbed_official | 324:406fd2029f23 | 245 | return (lptmr_pin_polarity_t)BR_LPTMR_CSR_TPP(baseAddr); |
| mbed_official | 324:406fd2029f23 | 246 | } |
| mbed_official | 324:406fd2029f23 | 247 | |
| mbed_official | 324:406fd2029f23 | 248 | /*! |
| mbed_official | 324:406fd2029f23 | 249 | * @brief Enables or disables the LPTMR free running. |
| mbed_official | 324:406fd2029f23 | 250 | * |
| mbed_official | 324:406fd2029f23 | 251 | * @param baseAddr The LPTMR peripheral base address |
| mbed_official | 324:406fd2029f23 | 252 | * @param enable Pass true to enable LPTMR free running |
| mbed_official | 324:406fd2029f23 | 253 | */ |
| mbed_official | 324:406fd2029f23 | 254 | static inline void LPTMR_HAL_SetFreeRunningCmd(uint32_t baseAddr, bool enable) |
| mbed_official | 324:406fd2029f23 | 255 | { |
| mbed_official | 324:406fd2029f23 | 256 | BW_LPTMR_CSR_TFC(baseAddr, (uint8_t)enable); |
| mbed_official | 324:406fd2029f23 | 257 | } |
| mbed_official | 324:406fd2029f23 | 258 | |
| mbed_official | 324:406fd2029f23 | 259 | /*! |
| mbed_official | 324:406fd2029f23 | 260 | * @brief Returns whether the LPTMR free running is enabled. |
| mbed_official | 324:406fd2029f23 | 261 | * |
| mbed_official | 324:406fd2029f23 | 262 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 263 | * @retval true LPTMR free running is enabled. |
| mbed_official | 324:406fd2029f23 | 264 | * @retval false LPTMR free running is disabled. |
| mbed_official | 324:406fd2029f23 | 265 | */ |
| mbed_official | 324:406fd2029f23 | 266 | static inline bool LPTMR_HAL_GetFreeRunningCmd(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 267 | { |
| mbed_official | 324:406fd2029f23 | 268 | return ((bool)BR_LPTMR_CSR_TFC(baseAddr)); |
| mbed_official | 324:406fd2029f23 | 269 | } |
| mbed_official | 324:406fd2029f23 | 270 | |
| mbed_official | 324:406fd2029f23 | 271 | /*! |
| mbed_official | 324:406fd2029f23 | 272 | * @brief Selects the LPTMR working mode. |
| mbed_official | 324:406fd2029f23 | 273 | * |
| mbed_official | 324:406fd2029f23 | 274 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 275 | * @param timerMode Specifies LPTMR working mode, see #lptmr_timer_mode_t |
| mbed_official | 324:406fd2029f23 | 276 | */ |
| mbed_official | 324:406fd2029f23 | 277 | static inline void LPTMR_HAL_SetTimerModeMode(uint32_t baseAddr, lptmr_timer_mode_t timerMode) |
| mbed_official | 324:406fd2029f23 | 278 | { |
| mbed_official | 324:406fd2029f23 | 279 | BW_LPTMR_CSR_TMS(baseAddr, (uint8_t)timerMode); |
| mbed_official | 324:406fd2029f23 | 280 | } |
| mbed_official | 324:406fd2029f23 | 281 | |
| mbed_official | 324:406fd2029f23 | 282 | /*! |
| mbed_official | 324:406fd2029f23 | 283 | * @brief Returns the LPTMR working mode. |
| mbed_official | 324:406fd2029f23 | 284 | * |
| mbed_official | 324:406fd2029f23 | 285 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 286 | * @return LPTMR working mode, see #lptmr_timer_mode_t |
| mbed_official | 324:406fd2029f23 | 287 | */ |
| mbed_official | 324:406fd2029f23 | 288 | static inline lptmr_timer_mode_t LPTMR_HAL_GetTimerModeMode(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 289 | { |
| mbed_official | 324:406fd2029f23 | 290 | return (lptmr_timer_mode_t)BR_LPTMR_CSR_TMS(baseAddr); |
| mbed_official | 324:406fd2029f23 | 291 | } |
| mbed_official | 324:406fd2029f23 | 292 | |
| mbed_official | 324:406fd2029f23 | 293 | /*! |
| mbed_official | 324:406fd2029f23 | 294 | * @brief Selects the LPTMR prescaler value. |
| mbed_official | 324:406fd2029f23 | 295 | * |
| mbed_official | 324:406fd2029f23 | 296 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 297 | * @param prescaleValue Specifies LPTMR prescaler value, see #lptmr_prescaler_value_t |
| mbed_official | 324:406fd2029f23 | 298 | */ |
| mbed_official | 324:406fd2029f23 | 299 | static inline void LPTMR_HAL_SetPrescalerValueMode(uint32_t baseAddr, lptmr_prescaler_value_t prescaleValue) |
| mbed_official | 324:406fd2029f23 | 300 | { |
| mbed_official | 324:406fd2029f23 | 301 | BW_LPTMR_PSR_PRESCALE(baseAddr, (uint8_t)prescaleValue); |
| mbed_official | 324:406fd2029f23 | 302 | } |
| mbed_official | 324:406fd2029f23 | 303 | |
| mbed_official | 324:406fd2029f23 | 304 | /*! |
| mbed_official | 324:406fd2029f23 | 305 | * @brief Returns the LPTMR prescaler value. |
| mbed_official | 324:406fd2029f23 | 306 | * |
| mbed_official | 324:406fd2029f23 | 307 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 308 | * @return LPTMR prescaler value, see #lptmr_prescaler_value_t |
| mbed_official | 324:406fd2029f23 | 309 | */ |
| mbed_official | 324:406fd2029f23 | 310 | static inline lptmr_prescaler_value_t LPTMR_HAL_GetPrescalerValueMode(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 311 | { |
| mbed_official | 324:406fd2029f23 | 312 | return (lptmr_prescaler_value_t)BR_LPTMR_PSR_PRESCALE(baseAddr); |
| mbed_official | 324:406fd2029f23 | 313 | } |
| mbed_official | 324:406fd2029f23 | 314 | |
| mbed_official | 324:406fd2029f23 | 315 | /*! |
| mbed_official | 324:406fd2029f23 | 316 | * @brief Enables or disables the LPTMR prescaler. |
| mbed_official | 324:406fd2029f23 | 317 | * |
| mbed_official | 324:406fd2029f23 | 318 | * @param baseAddr The LPTMR peripheral base address |
| mbed_official | 324:406fd2029f23 | 319 | * @param enable Pass true to enable LPTMR free running |
| mbed_official | 324:406fd2029f23 | 320 | */ |
| mbed_official | 324:406fd2029f23 | 321 | static inline void LPTMR_HAL_SetPrescalerCmd(uint32_t baseAddr, bool enable) |
| mbed_official | 324:406fd2029f23 | 322 | { |
| mbed_official | 324:406fd2029f23 | 323 | BW_LPTMR_PSR_PBYP(baseAddr, (uint8_t)(enable == false)); /* 1 means disable prelsaler , 0 means enalbe prescaler */ |
| mbed_official | 324:406fd2029f23 | 324 | } |
| mbed_official | 324:406fd2029f23 | 325 | |
| mbed_official | 324:406fd2029f23 | 326 | /*! |
| mbed_official | 324:406fd2029f23 | 327 | * @brief Returns whether the LPTMR prescaler is enabled. |
| mbed_official | 324:406fd2029f23 | 328 | * |
| mbed_official | 324:406fd2029f23 | 329 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 330 | * @retval true LPTMR prescaler is enabled. |
| mbed_official | 324:406fd2029f23 | 331 | * @retval false LPTMR prescaler is disabled. |
| mbed_official | 324:406fd2029f23 | 332 | */ |
| mbed_official | 324:406fd2029f23 | 333 | static inline bool LPTMR_HAL_GetPrescalerCmd(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 334 | { |
| mbed_official | 324:406fd2029f23 | 335 | return (bool)(0 == BR_LPTMR_PSR_PBYP(baseAddr)); /* 1 means prelsaler is disabled, 0 means prescaler is enalbed*/ |
| mbed_official | 324:406fd2029f23 | 336 | } |
| mbed_official | 324:406fd2029f23 | 337 | |
| mbed_official | 324:406fd2029f23 | 338 | /*! |
| mbed_official | 324:406fd2029f23 | 339 | * @brief Selects the LPTMR clock source. |
| mbed_official | 324:406fd2029f23 | 340 | * |
| mbed_official | 324:406fd2029f23 | 341 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 342 | * @param prescalerClockSource Specifies LPTMR clock source, see #lptmr_prescaler_clock_source_t |
| mbed_official | 324:406fd2029f23 | 343 | */ |
| mbed_official | 324:406fd2029f23 | 344 | static inline void LPTMR_HAL_SetPrescalerClockSourceMode(uint32_t baseAddr, lptmr_prescaler_clock_source_t prescalerClockSource) |
| mbed_official | 324:406fd2029f23 | 345 | { |
| mbed_official | 324:406fd2029f23 | 346 | BW_LPTMR_PSR_PCS(baseAddr, (uint8_t)prescalerClockSource); |
| mbed_official | 324:406fd2029f23 | 347 | } |
| mbed_official | 324:406fd2029f23 | 348 | |
| mbed_official | 324:406fd2029f23 | 349 | /*! |
| mbed_official | 324:406fd2029f23 | 350 | * @brief Gets the LPTMR clock source. |
| mbed_official | 324:406fd2029f23 | 351 | * |
| mbed_official | 324:406fd2029f23 | 352 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 353 | * @return LPTMR clock source, see #lptmr_prescaler_clock_source_t |
| mbed_official | 324:406fd2029f23 | 354 | */ |
| mbed_official | 324:406fd2029f23 | 355 | static inline lptmr_prescaler_clock_source_t LPTMR_HAL_GetPrescalerClockSourceMode(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 356 | { |
| mbed_official | 324:406fd2029f23 | 357 | return (lptmr_prescaler_clock_source_t)BR_LPTMR_PSR_PCS(baseAddr); |
| mbed_official | 324:406fd2029f23 | 358 | } |
| mbed_official | 324:406fd2029f23 | 359 | |
| mbed_official | 324:406fd2029f23 | 360 | /*! |
| mbed_official | 324:406fd2029f23 | 361 | * @brief Sets the LPTMR compare value. |
| mbed_official | 324:406fd2029f23 | 362 | * |
| mbed_official | 324:406fd2029f23 | 363 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 364 | * @param compareValue Specifies LPTMR compare value, less than 0xFFFFU |
| mbed_official | 324:406fd2029f23 | 365 | */ |
| mbed_official | 324:406fd2029f23 | 366 | static inline void LPTMR_HAL_SetCompareValue(uint32_t baseAddr, uint32_t compareValue) |
| mbed_official | 324:406fd2029f23 | 367 | { |
| mbed_official | 324:406fd2029f23 | 368 | BW_LPTMR_CMR_COMPARE(baseAddr, compareValue & 0xFFFFU); |
| mbed_official | 324:406fd2029f23 | 369 | } |
| mbed_official | 324:406fd2029f23 | 370 | |
| mbed_official | 324:406fd2029f23 | 371 | /*! |
| mbed_official | 324:406fd2029f23 | 372 | * @brief Gets the LPTMR compare value. |
| mbed_official | 324:406fd2029f23 | 373 | * |
| mbed_official | 324:406fd2029f23 | 374 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 375 | * @return Current LPTMR compare value |
| mbed_official | 324:406fd2029f23 | 376 | */ |
| mbed_official | 324:406fd2029f23 | 377 | static inline uint32_t LPTMR_HAL_GetCompareValue(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 378 | { |
| mbed_official | 324:406fd2029f23 | 379 | return (uint32_t)(BR_LPTMR_CMR_COMPARE(baseAddr) & 0xFFFFU); |
| mbed_official | 324:406fd2029f23 | 380 | } |
| mbed_official | 324:406fd2029f23 | 381 | |
| mbed_official | 324:406fd2029f23 | 382 | /*! |
| mbed_official | 324:406fd2029f23 | 383 | * @brief Gets the LPTMR counter value. |
| mbed_official | 324:406fd2029f23 | 384 | * |
| mbed_official | 324:406fd2029f23 | 385 | * @param baseAddr The LPTMR peripheral base address. |
| mbed_official | 324:406fd2029f23 | 386 | * @return Current LPTMR counter value |
| mbed_official | 324:406fd2029f23 | 387 | */ |
| mbed_official | 324:406fd2029f23 | 388 | static inline uint32_t LPTMR_HAL_GetCounterValue(uint32_t baseAddr) |
| mbed_official | 324:406fd2029f23 | 389 | { |
| mbed_official | 324:406fd2029f23 | 390 | BW_LPTMR_CNR_COUNTER(baseAddr, 0); /* Must first write to the CNR with any value */ |
| mbed_official | 324:406fd2029f23 | 391 | return (uint32_t)(BR_LPTMR_CNR_COUNTER(baseAddr) & 0xFFFFU); |
| mbed_official | 324:406fd2029f23 | 392 | } |
| mbed_official | 324:406fd2029f23 | 393 | |
| mbed_official | 324:406fd2029f23 | 394 | /*! |
| mbed_official | 324:406fd2029f23 | 395 | * @brief Restores the LPTMR module to reset state. |
| mbed_official | 324:406fd2029f23 | 396 | * |
| mbed_official | 324:406fd2029f23 | 397 | * @param baseAddr The LPTMR peripheral base address |
| mbed_official | 324:406fd2029f23 | 398 | */ |
| mbed_official | 324:406fd2029f23 | 399 | void LPTMR_HAL_Init(uint32_t baseAddr); |
| mbed_official | 324:406fd2029f23 | 400 | |
| mbed_official | 324:406fd2029f23 | 401 | /*@}*/ |
| mbed_official | 324:406fd2029f23 | 402 | |
| mbed_official | 324:406fd2029f23 | 403 | #if defined(__cplusplus) |
| mbed_official | 324:406fd2029f23 | 404 | } |
| mbed_official | 324:406fd2029f23 | 405 | #endif |
| mbed_official | 324:406fd2029f23 | 406 | |
| mbed_official | 324:406fd2029f23 | 407 | /*! @}*/ |
| mbed_official | 324:406fd2029f23 | 408 | |
| mbed_official | 324:406fd2029f23 | 409 | #endif /* __FSL_LPTMR_HAL_H__*/ |
| mbed_official | 324:406fd2029f23 | 410 | /******************************************************************************* |
| mbed_official | 324:406fd2029f23 | 411 | * EOF |
| mbed_official | 324:406fd2029f23 | 412 | *******************************************************************************/ |
| mbed_official | 324:406fd2029f23 | 413 |
