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mbed library sources

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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC23XX/vector_defns.h@323:3e2706a32e81, 2014-09-15 (annotated)

Committer:
mbed_official
Date:
Mon Sep 15 15:30:06 2014 +0100
Revision:
323:3e2706a32e81
Parent:
15:4892fe388435 
Synchronized with git revision ffa4168e11172fe7e9f2905047fa8a65eaa09588



Full URL: https://github.com/mbedmicro/mbed/commit/ffa4168e11172fe7e9f2905047fa8a65eaa09588/



[HAL] MTS_GAMBIT - SPI pin names expansion

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library - Vectors
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2009 ARM Limited. All rights reserved.
bogdanm 13:0645d8841f51 3 */
bogdanm 13:0645d8841f51 4
bogdanm 13:0645d8841f51 5 #ifndef MBED_VECTOR_DEFNS_H
bogdanm 13:0645d8841f51 6 #define MBED_VECTOR_DEFNS_H
bogdanm 13:0645d8841f51 7
bogdanm 13:0645d8841f51 8 // Assember Macros
bogdanm 13:0645d8841f51 9 #ifdef __ARMCC_VERSION
bogdanm 13:0645d8841f51 10 #define EXPORT(x) EXPORT x
bogdanm 13:0645d8841f51 11 #define WEAK_EXPORT(x) EXPORT x [WEAK]
bogdanm 13:0645d8841f51 12 #define IMPORT(x) IMPORT x
bogdanm 13:0645d8841f51 13 #define LABEL(x) x
bogdanm 13:0645d8841f51 14 #else
bogdanm 13:0645d8841f51 15 #define EXPORT(x) .global x
bogdanm 13:0645d8841f51 16 #define WEAK_EXPORT(x) .weak x
bogdanm 13:0645d8841f51 17 #define IMPORT(x) .global x
bogdanm 13:0645d8841f51 18 #define LABEL(x) x:
bogdanm 13:0645d8841f51 19 #endif
bogdanm 13:0645d8841f51 20
bogdanm 13:0645d8841f51 21 // RealMonitor
bogdanm 13:0645d8841f51 22 // Requires RAM (0x40000040-0x4000011F) to be allocated by the linker
bogdanm 13:0645d8841f51 23
bogdanm 13:0645d8841f51 24 // RealMonitor entry points
bogdanm 13:0645d8841f51 25 #define rm_init_entry 0x7fffff91
bogdanm 13:0645d8841f51 26 #define rm_undef_handler 0x7fffffa0
bogdanm 13:0645d8841f51 27 #define rm_prefetchabort_handler 0x7fffffb0
bogdanm 13:0645d8841f51 28 #define rm_dataabort_handler 0x7fffffc0
bogdanm 13:0645d8841f51 29 #define rm_irqhandler2 0x7fffffe0
bogdanm 13:0645d8841f51 30 //#define rm_RunningToStopped 0x7ffff808 // ARM - MBED64
bogdanm 13:0645d8841f51 31 #define rm_RunningToStopped 0x7ffff820 // ARM - PHAT40
bogdanm 13:0645d8841f51 32
bogdanm 13:0645d8841f51 33 // Unofficial RealMonitor entry points and variables
bogdanm 13:0645d8841f51 34 #define RM_MSG_SWI 0x00940000
bogdanm 13:0645d8841f51 35 #define StateP 0x40000040
bogdanm 13:0645d8841f51 36
bogdanm 13:0645d8841f51 37 // VIC register addresses
bogdanm 13:0645d8841f51 38 #define VIC_Base 0xfffff000
bogdanm 13:0645d8841f51 39 #define VICAddress_Offset 0xf00
bogdanm 15:4892fe388435 40 #define VICVectAddr0_Offset 0x100
bogdanm 13:0645d8841f51 41 #define VICVectAddr2_Offset 0x108
bogdanm 13:0645d8841f51 42 #define VICVectAddr3_Offset 0x10c
bogdanm 15:4892fe388435 43 #define VICVectAddr31_Offset 0x17c
bogdanm 13:0645d8841f51 44 #define VICIntEnClr_Offset 0x014
bogdanm 13:0645d8841f51 45 #define VICIntEnClr (*(volatile unsigned long *)(VIC_Base + 0x014))
bogdanm 13:0645d8841f51 46 #define VICVectAddr2 (*(volatile unsigned long *)(VIC_Base + 0x108))
bogdanm 13:0645d8841f51 47 #define VICVectAddr3 (*(volatile unsigned long *)(VIC_Base + 0x10C))
bogdanm 13:0645d8841f51 48
bogdanm 13:0645d8841f51 49 // ARM Mode bits and Interrupt flags in PSRs
bogdanm 13:0645d8841f51 50 #define Mode_USR 0x10
bogdanm 13:0645d8841f51 51 #define Mode_FIQ 0x11
bogdanm 13:0645d8841f51 52 #define Mode_IRQ 0x12
bogdanm 13:0645d8841f51 53 #define Mode_SVC 0x13
bogdanm 13:0645d8841f51 54 #define Mode_ABT 0x17
bogdanm 13:0645d8841f51 55 #define Mode_UND 0x1B
bogdanm 13:0645d8841f51 56 #define Mode_SYS 0x1F
bogdanm 13:0645d8841f51 57 #define I_Bit 0x80 // when I bit is set, IRQ is disabled
bogdanm 13:0645d8841f51 58 #define F_Bit 0x40 // when F bit is set, FIQ is disabled
bogdanm 13:0645d8841f51 59
bogdanm 13:0645d8841f51 60 // MCU RAM
bogdanm 13:0645d8841f51 61 #define LPC2368_RAM_ADDRESS 0x40000000 // RAM Base
bogdanm 13:0645d8841f51 62 #define LPC2368_RAM_SIZE 0x8000 // 32KB
bogdanm 13:0645d8841f51 63
bogdanm 13:0645d8841f51 64 // ISR Stack Allocation
bogdanm 13:0645d8841f51 65 #define UND_stack_size 0x00000040
bogdanm 13:0645d8841f51 66 #define SVC_stack_size 0x00000040
bogdanm 13:0645d8841f51 67 #define ABT_stack_size 0x00000040
bogdanm 13:0645d8841f51 68 #define FIQ_stack_size 0x00000000
bogdanm 13:0645d8841f51 69 #define IRQ_stack_size 0x00000040
bogdanm 13:0645d8841f51 70
bogdanm 13:0645d8841f51 71 #define ISR_stack_size (UND_stack_size + SVC_stack_size + ABT_stack_size + FIQ_stack_size + IRQ_stack_size)
bogdanm 13:0645d8841f51 72
bogdanm 13:0645d8841f51 73 // Full Descending Stack, so top-most stack points to just above the top of RAM
bogdanm 13:0645d8841f51 74 #define LPC2368_STACK_TOP (LPC2368_RAM_ADDRESS + LPC2368_RAM_SIZE)
bogdanm 13:0645d8841f51 75 #define USR_STACK_TOP (LPC2368_STACK_TOP - ISR_stack_size)
bogdanm 13:0645d8841f51 76
bogdanm 13:0645d8841f51 77 #endif