mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

vendor/NXP/LPC812/hal/serial_api.c@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 // math.h required for floating point operations for baud rate calculation
emilmont 10:3bc89ef62ce7 17 #include <math.h>
emilmont 10:3bc89ef62ce7 18 #include <string.h>
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 #include "serial_api.h"
emilmont 10:3bc89ef62ce7 21 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 22 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 23 #include "error.h"
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 /******************************************************************************
emilmont 10:3bc89ef62ce7 26 * INITIALIZATION
emilmont 10:3bc89ef62ce7 27 ******************************************************************************/
emilmont 10:3bc89ef62ce7 28 #define UART_NUM 3
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30 static const SWM_Map SWM_UART_TX[] = {
emilmont 10:3bc89ef62ce7 31 {0, 0},
emilmont 10:3bc89ef62ce7 32 {1, 8},
emilmont 10:3bc89ef62ce7 33 {2, 16},
emilmont 10:3bc89ef62ce7 34 };
emilmont 10:3bc89ef62ce7 35
emilmont 10:3bc89ef62ce7 36 static const SWM_Map SWM_UART_RX[] = {
emilmont 10:3bc89ef62ce7 37 {0, 8},
emilmont 10:3bc89ef62ce7 38 {1, 16},
emilmont 10:3bc89ef62ce7 39 {2, 24},
emilmont 10:3bc89ef62ce7 40 };
emilmont 10:3bc89ef62ce7 41
emilmont 10:3bc89ef62ce7 42 // bit flags for used UARTs
emilmont 10:3bc89ef62ce7 43 static unsigned char uart_used = 0;
emilmont 10:3bc89ef62ce7 44 static int get_available_uart(void) {
emilmont 10:3bc89ef62ce7 45 int i;
emilmont 10:3bc89ef62ce7 46 for (i=0; i<3; i++) {
emilmont 10:3bc89ef62ce7 47 if ((uart_used & (1 << i)) == 0)
emilmont 10:3bc89ef62ce7 48 return i;
emilmont 10:3bc89ef62ce7 49 }
emilmont 10:3bc89ef62ce7 50 return -1;
emilmont 10:3bc89ef62ce7 51 }
emilmont 10:3bc89ef62ce7 52
emilmont 10:3bc89ef62ce7 53 #define UART_EN (0x01<<0)
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 #define CTS_DELTA (0x01<<5)
emilmont 10:3bc89ef62ce7 56 #define RXBRK (0x01<<10)
emilmont 10:3bc89ef62ce7 57 #define DELTA_RXBRK (0x01<<11)
emilmont 10:3bc89ef62ce7 58
emilmont 10:3bc89ef62ce7 59 #define RXRDY (0x01<<0)
emilmont 10:3bc89ef62ce7 60 #define TXRDY (0x01<<2)
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 static uint32_t UARTSysClk;
emilmont 10:3bc89ef62ce7 63
emilmont 10:3bc89ef62ce7 64 static uint32_t serial_irq_ids[UART_NUM] = {0};
emilmont 10:3bc89ef62ce7 65 static uart_irq_handler irq_handler;
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 int stdio_uart_inited = 0;
emilmont 10:3bc89ef62ce7 68 serial_t stdio_uart;
emilmont 10:3bc89ef62ce7 69
emilmont 10:3bc89ef62ce7 70 void serial_init(serial_t *obj, PinName tx, PinName rx) {
emilmont 10:3bc89ef62ce7 71 int is_stdio_uart = 0;
emilmont 10:3bc89ef62ce7 72
emilmont 10:3bc89ef62ce7 73 int uart_n = get_available_uart();
emilmont 10:3bc89ef62ce7 74 if (uart_n == -1) {
emilmont 10:3bc89ef62ce7 75 error("No available UART");
emilmont 10:3bc89ef62ce7 76 }
emilmont 10:3bc89ef62ce7 77 obj->index = uart_n;
emilmont 10:3bc89ef62ce7 78 obj->uart = (LPC_USART_TypeDef *)(LPC_USART0_BASE + (0x4000 * uart_n));
emilmont 10:3bc89ef62ce7 79 uart_used |= (1 << uart_n);
emilmont 10:3bc89ef62ce7 80
emilmont 10:3bc89ef62ce7 81 const SWM_Map *swm;
emilmont 10:3bc89ef62ce7 82 uint32_t regVal;
emilmont 10:3bc89ef62ce7 83
emilmont 10:3bc89ef62ce7 84 swm = &SWM_UART_TX[uart_n];
emilmont 10:3bc89ef62ce7 85 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
emilmont 10:3bc89ef62ce7 86 LPC_SWM->PINASSIGN[swm->n] = regVal | (tx << swm->offset);
emilmont 10:3bc89ef62ce7 87
emilmont 10:3bc89ef62ce7 88 swm = &SWM_UART_RX[uart_n];
emilmont 10:3bc89ef62ce7 89 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
emilmont 10:3bc89ef62ce7 90 LPC_SWM->PINASSIGN[swm->n] = regVal | (rx << swm->offset);
emilmont 10:3bc89ef62ce7 91
emilmont 10:3bc89ef62ce7 92 /* uart clock divided by 1 */
emilmont 10:3bc89ef62ce7 93 LPC_SYSCON->UARTCLKDIV = 1;
emilmont 10:3bc89ef62ce7 94
emilmont 10:3bc89ef62ce7 95 /* disable uart interrupts */
emilmont 10:3bc89ef62ce7 96 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 /* Enable UART clock */
emilmont 10:3bc89ef62ce7 99 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (14 + uart_n));
emilmont 10:3bc89ef62ce7 100
emilmont 10:3bc89ef62ce7 101 /* Peripheral reset control to UART, a "1" bring it out of reset. */
emilmont 10:3bc89ef62ce7 102 LPC_SYSCON->PRESETCTRL &= ~(0x1 << (3 + uart_n));
emilmont 10:3bc89ef62ce7 103 LPC_SYSCON->PRESETCTRL |= (0x1 << (3 + uart_n));
emilmont 10:3bc89ef62ce7 104
emilmont 10:3bc89ef62ce7 105 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 // set default baud rate and format
emilmont 10:3bc89ef62ce7 108 serial_baud (obj, 9600);
emilmont 10:3bc89ef62ce7 109 serial_format(obj, 8, ParityNone, 1);
emilmont 10:3bc89ef62ce7 110
emilmont 10:3bc89ef62ce7 111 /* Clear all status bits. */
emilmont 10:3bc89ef62ce7 112 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
emilmont 10:3bc89ef62ce7 113
emilmont 10:3bc89ef62ce7 114 /* enable uart interrupts */
emilmont 10:3bc89ef62ce7 115 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
emilmont 10:3bc89ef62ce7 116
emilmont 10:3bc89ef62ce7 117 /* Enable UART interrupt */
emilmont 10:3bc89ef62ce7 118 // obj->uart->INTENSET = RXRDY | TXRDY | DELTA_RXBRK;
emilmont 10:3bc89ef62ce7 119
emilmont 10:3bc89ef62ce7 120 /* Enable UART */
emilmont 10:3bc89ef62ce7 121 obj->uart->CFG |= UART_EN;
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
emilmont 10:3bc89ef62ce7 124
emilmont 10:3bc89ef62ce7 125 if (is_stdio_uart) {
emilmont 10:3bc89ef62ce7 126 stdio_uart_inited = 1;
emilmont 10:3bc89ef62ce7 127 memcpy(&stdio_uart, obj, sizeof(serial_t));
emilmont 10:3bc89ef62ce7 128 }
emilmont 10:3bc89ef62ce7 129 }
emilmont 10:3bc89ef62ce7 130
emilmont 10:3bc89ef62ce7 131 void serial_free(serial_t *obj) {
emilmont 10:3bc89ef62ce7 132 uart_used &= ~(1 << obj->index);
emilmont 10:3bc89ef62ce7 133 serial_irq_ids[obj->index] = 0;
emilmont 10:3bc89ef62ce7 134 }
emilmont 10:3bc89ef62ce7 135
emilmont 10:3bc89ef62ce7 136 // serial_baud
emilmont 10:3bc89ef62ce7 137 // set the baud rate, taking in to account the current SystemFrequency
emilmont 10:3bc89ef62ce7 138 void serial_baud(serial_t *obj, int baudrate) {
emilmont 10:3bc89ef62ce7 139 /* Integer divider:
emilmont 10:3bc89ef62ce7 140 BRG = UARTSysClk/(Baudrate * 16) - 1
emilmont 10:3bc89ef62ce7 141
emilmont 10:3bc89ef62ce7 142 Frational divider:
emilmont 10:3bc89ef62ce7 143 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
emilmont 10:3bc89ef62ce7 144
emilmont 10:3bc89ef62ce7 145 where
emilmont 10:3bc89ef62ce7 146 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
emilmont 10:3bc89ef62ce7 147
emilmont 10:3bc89ef62ce7 148 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
emilmont 10:3bc89ef62ce7 149 register is 0xFF.
emilmont 10:3bc89ef62ce7 150 (2) In ADD register value, depending on the value of UartSysClk,
emilmont 10:3bc89ef62ce7 151 baudrate, BRG register value, and SUB register value, be careful
emilmont 10:3bc89ef62ce7 152 about the order of multiplier and divider and make sure any
emilmont 10:3bc89ef62ce7 153 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
emilmont 10:3bc89ef62ce7 154 down below one(integer 0).
emilmont 10:3bc89ef62ce7 155 (3) ADD should be always less than SUB.
emilmont 10:3bc89ef62ce7 156 */
emilmont 10:3bc89ef62ce7 157 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
emilmont 10:3bc89ef62ce7 158
emilmont 10:3bc89ef62ce7 159 LPC_SYSCON->UARTFRGDIV = 0xFF;
emilmont 10:3bc89ef62ce7 160 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
emilmont 10:3bc89ef62ce7 161 (baudrate * (obj->uart->BRG + 1))
emilmont 10:3bc89ef62ce7 162 ) - (LPC_SYSCON->UARTFRGDIV + 1);
emilmont 10:3bc89ef62ce7 163
emilmont 10:3bc89ef62ce7 164 }
emilmont 10:3bc89ef62ce7 165
emilmont 10:3bc89ef62ce7 166 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
emilmont 10:3bc89ef62ce7 167 // 0: 1 stop bits, 1: 2 stop bits
emilmont 10:3bc89ef62ce7 168 if (stop_bits != 1 && stop_bits != 2) {
emilmont 10:3bc89ef62ce7 169 error("Invalid stop bits specified");
emilmont 10:3bc89ef62ce7 170 }
emilmont 10:3bc89ef62ce7 171 stop_bits -= 1;
emilmont 10:3bc89ef62ce7 172
emilmont 10:3bc89ef62ce7 173 // 0: 7 data bits ... 2: 9 data bits
emilmont 10:3bc89ef62ce7 174 if (data_bits < 7 || data_bits > 9) {
emilmont 10:3bc89ef62ce7 175 error("Invalid number of bits (%d) in serial format, should be 7..9", data_bits);
emilmont 10:3bc89ef62ce7 176 }
emilmont 10:3bc89ef62ce7 177 data_bits -= 7;
emilmont 10:3bc89ef62ce7 178
emilmont 10:3bc89ef62ce7 179 int paritysel;
emilmont 10:3bc89ef62ce7 180 switch (parity) {
emilmont 10:3bc89ef62ce7 181 case ParityNone: paritysel = 0; break;
emilmont 10:3bc89ef62ce7 182 case ParityEven: paritysel = 2; break;
emilmont 10:3bc89ef62ce7 183 case ParityOdd : paritysel = 3; break;
emilmont 10:3bc89ef62ce7 184 default:
emilmont 10:3bc89ef62ce7 185 error("Invalid serial parity setting");
emilmont 10:3bc89ef62ce7 186 return;
emilmont 10:3bc89ef62ce7 187 }
emilmont 10:3bc89ef62ce7 188
emilmont 10:3bc89ef62ce7 189 obj->uart->CFG = (data_bits << 2)
emilmont 10:3bc89ef62ce7 190 | (paritysel << 4)
emilmont 10:3bc89ef62ce7 191 | (stop_bits << 6);
emilmont 10:3bc89ef62ce7 192 }
emilmont 10:3bc89ef62ce7 193
emilmont 10:3bc89ef62ce7 194 /******************************************************************************
emilmont 10:3bc89ef62ce7 195 * INTERRUPTS HANDLING
emilmont 10:3bc89ef62ce7 196 ******************************************************************************/
emilmont 10:3bc89ef62ce7 197 static inline void uart_irq(uint32_t iir, uint32_t index) {
emilmont 10:3bc89ef62ce7 198 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
emilmont 10:3bc89ef62ce7 199 SerialIrq irq_type;
emilmont 10:3bc89ef62ce7 200 switch (iir) {
emilmont 10:3bc89ef62ce7 201 case 1: irq_type = TxIrq; break;
emilmont 10:3bc89ef62ce7 202 case 2: irq_type = RxIrq; break;
emilmont 10:3bc89ef62ce7 203 default: return;
emilmont 10:3bc89ef62ce7 204 }
emilmont 10:3bc89ef62ce7 205
emilmont 10:3bc89ef62ce7 206 if (serial_irq_ids[index] != 0)
emilmont 10:3bc89ef62ce7 207 irq_handler(serial_irq_ids[index], irq_type);
emilmont 10:3bc89ef62ce7 208 }
emilmont 10:3bc89ef62ce7 209
emilmont 10:3bc89ef62ce7 210 void uart0_irq() {uart_irq((LPC_USART0->STAT & (1 << 2)) ? 2 : 1, 0);}
emilmont 10:3bc89ef62ce7 211 void uart1_irq() {uart_irq((LPC_USART1->STAT & (1 << 2)) ? 2 : 1, 1);}
emilmont 10:3bc89ef62ce7 212 void uart2_irq() {uart_irq((LPC_USART2->STAT & (1 << 2)) ? 2 : 1, 2);}
emilmont 10:3bc89ef62ce7 213
emilmont 10:3bc89ef62ce7 214 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
emilmont 10:3bc89ef62ce7 215 irq_handler = handler;
emilmont 10:3bc89ef62ce7 216 serial_irq_ids[obj->index] = id;
emilmont 10:3bc89ef62ce7 217 }
emilmont 10:3bc89ef62ce7 218
emilmont 10:3bc89ef62ce7 219 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
emilmont 10:3bc89ef62ce7 220 IRQn_Type irq_n = (IRQn_Type)0;
emilmont 10:3bc89ef62ce7 221 uint32_t vector = 0;
emilmont 10:3bc89ef62ce7 222 switch ((int)obj->uart) {
emilmont 10:3bc89ef62ce7 223 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
emilmont 10:3bc89ef62ce7 224 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
emilmont 10:3bc89ef62ce7 225 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
emilmont 10:3bc89ef62ce7 226 }
emilmont 10:3bc89ef62ce7 227
emilmont 10:3bc89ef62ce7 228 if (enable) {
emilmont 10:3bc89ef62ce7 229 obj->uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
emilmont 10:3bc89ef62ce7 230 NVIC_SetVector(irq_n, vector);
emilmont 10:3bc89ef62ce7 231 NVIC_EnableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 232 } else { // disable
emilmont 10:3bc89ef62ce7 233 int all_disabled = 0;
emilmont 10:3bc89ef62ce7 234 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
emilmont 10:3bc89ef62ce7 235 obj->uart->INTENSET &= ~(1 << ((irq == RxIrq) ? 0 : 2));
emilmont 10:3bc89ef62ce7 236 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
emilmont 10:3bc89ef62ce7 237 if (all_disabled)
emilmont 10:3bc89ef62ce7 238 NVIC_DisableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 239 }
emilmont 10:3bc89ef62ce7 240 }
emilmont 10:3bc89ef62ce7 241
emilmont 10:3bc89ef62ce7 242 /******************************************************************************
emilmont 10:3bc89ef62ce7 243 * READ/WRITE
emilmont 10:3bc89ef62ce7 244 ******************************************************************************/
emilmont 10:3bc89ef62ce7 245 int serial_getc(serial_t *obj) {
emilmont 10:3bc89ef62ce7 246 while (!serial_readable(obj));
emilmont 10:3bc89ef62ce7 247 return obj->uart->RXDATA;
emilmont 10:3bc89ef62ce7 248 }
emilmont 10:3bc89ef62ce7 249
emilmont 10:3bc89ef62ce7 250 void serial_putc(serial_t *obj, int c) {
emilmont 10:3bc89ef62ce7 251 while (!serial_writable(obj));
emilmont 10:3bc89ef62ce7 252 obj->uart->TXDATA = c;
emilmont 10:3bc89ef62ce7 253 }
emilmont 10:3bc89ef62ce7 254
emilmont 10:3bc89ef62ce7 255 int serial_readable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 256 return obj->uart->STAT & RXRDY;
emilmont 10:3bc89ef62ce7 257 }
emilmont 10:3bc89ef62ce7 258
emilmont 10:3bc89ef62ce7 259 int serial_writable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 260 return obj->uart->STAT & TXRDY;
emilmont 10:3bc89ef62ce7 261 }
emilmont 10:3bc89ef62ce7 262
emilmont 10:3bc89ef62ce7 263 void serial_clear(serial_t *obj) {
emilmont 10:3bc89ef62ce7 264 // [TODO]
emilmont 10:3bc89ef62ce7 265 }
emilmont 10:3bc89ef62ce7 266
emilmont 10:3bc89ef62ce7 267 void serial_pinout_tx(PinName tx) {
emilmont 10:3bc89ef62ce7 268
emilmont 10:3bc89ef62ce7 269 }