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Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

vendor/NXP/LPC2368/cmsis/GCC_ARM/vector_functions.s@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 # 1 "vector_functions.s"
emilmont 10:3bc89ef62ce7 2 # 1 "<built-in>"
emilmont 10:3bc89ef62ce7 3 # 1 "<command line>"
emilmont 10:3bc89ef62ce7 4 # 1 "vector_functions.s"
emilmont 10:3bc89ef62ce7 5 ;
emilmont 10:3bc89ef62ce7 6 ;
emilmont 10:3bc89ef62ce7 7 ;
emilmont 10:3bc89ef62ce7 8
emilmont 10:3bc89ef62ce7 9 # 1 "vector_defns.h" 1
emilmont 10:3bc89ef62ce7 10 # 6 "vector_functions.s" 2
emilmont 10:3bc89ef62ce7 11
emilmont 10:3bc89ef62ce7 12
emilmont 10:3bc89ef62ce7 13
emilmont 10:3bc89ef62ce7 14
emilmont 10:3bc89ef62ce7 15
emilmont 10:3bc89ef62ce7 16
emilmont 10:3bc89ef62ce7 17 .section VECFUNCS, "ax"
emilmont 10:3bc89ef62ce7 18 .arm
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 .weak __mbed_fiq
emilmont 10:3bc89ef62ce7 22 .weak __mbed_undef
emilmont 10:3bc89ef62ce7 23 .weak __mbed_prefetch_abort
emilmont 10:3bc89ef62ce7 24 .weak __mbed_data_abort
emilmont 10:3bc89ef62ce7 25 .weak __mbed_irq
emilmont 10:3bc89ef62ce7 26 .weak __mbed_swi
emilmont 10:3bc89ef62ce7 27 .weak __mbed_dcc_irq
emilmont 10:3bc89ef62ce7 28 .weak __mbed_reset
emilmont 10:3bc89ef62ce7 29 .global __mbed_init_realmonitor
emilmont 10:3bc89ef62ce7 30 .global __mbed_init
emilmont 10:3bc89ef62ce7 31
emilmont 10:3bc89ef62ce7 32 ;
emilmont 10:3bc89ef62ce7 33 ;
emilmont 10:3bc89ef62ce7 34 __mbed_fiq:
emilmont 10:3bc89ef62ce7 35 B __mbed_fiq
emilmont 10:3bc89ef62ce7 36
emilmont 10:3bc89ef62ce7 37 ;
emilmont 10:3bc89ef62ce7 38 ;
emilmont 10:3bc89ef62ce7 39 __mbed_undef:
emilmont 10:3bc89ef62ce7 40 LDR PC, =0x7fffffa0
emilmont 10:3bc89ef62ce7 41
emilmont 10:3bc89ef62ce7 42 ;
emilmont 10:3bc89ef62ce7 43 ;
emilmont 10:3bc89ef62ce7 44 __mbed_prefetch_abort:
emilmont 10:3bc89ef62ce7 45 LDR PC, =0x7fffffb0
emilmont 10:3bc89ef62ce7 46
emilmont 10:3bc89ef62ce7 47 ;
emilmont 10:3bc89ef62ce7 48 ;
emilmont 10:3bc89ef62ce7 49 __mbed_data_abort:
emilmont 10:3bc89ef62ce7 50 LDR PC, =0x7fffffc0
emilmont 10:3bc89ef62ce7 51
emilmont 10:3bc89ef62ce7 52 ;
emilmont 10:3bc89ef62ce7 53 ;
emilmont 10:3bc89ef62ce7 54 ;
emilmont 10:3bc89ef62ce7 55 ;
emilmont 10:3bc89ef62ce7 56 ;
emilmont 10:3bc89ef62ce7 57 ;
emilmont 10:3bc89ef62ce7 58 ;
emilmont 10:3bc89ef62ce7 59 ;
emilmont 10:3bc89ef62ce7 60 ;
emilmont 10:3bc89ef62ce7 61 __mbed_irq:
emilmont 10:3bc89ef62ce7 62 ;
emilmont 10:3bc89ef62ce7 63 MSR CPSR_c, #0x1F|0x80|0x40
emilmont 10:3bc89ef62ce7 64
emilmont 10:3bc89ef62ce7 65 ;
emilmont 10:3bc89ef62ce7 66 STMDB sp!, {r0-r3,r12,lr}
emilmont 10:3bc89ef62ce7 67
emilmont 10:3bc89ef62ce7 68 ;
emilmont 10:3bc89ef62ce7 69 MOV r0, #0xFFFFFF00
emilmont 10:3bc89ef62ce7 70 LDR r0, [r0]
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 ;
emilmont 10:3bc89ef62ce7 73 MOV lr, pc
emilmont 10:3bc89ef62ce7 74 BX r0
emilmont 10:3bc89ef62ce7 75
emilmont 10:3bc89ef62ce7 76 ;
emilmont 10:3bc89ef62ce7 77 MOV r0, #0xFFFFFF00
emilmont 10:3bc89ef62ce7 78 STR r0, [r0] ;
emilmont 10:3bc89ef62ce7 79
emilmont 10:3bc89ef62ce7 80 ;
emilmont 10:3bc89ef62ce7 81 LDMFD sp!,{r0-r3,r12,lr}
emilmont 10:3bc89ef62ce7 82
emilmont 10:3bc89ef62ce7 83 ;
emilmont 10:3bc89ef62ce7 84 MSR CPSR_c, #0x12|0x80|0x40
emilmont 10:3bc89ef62ce7 85
emilmont 10:3bc89ef62ce7 86 ;
emilmont 10:3bc89ef62ce7 87 SUBS pc, lr, #4
emilmont 10:3bc89ef62ce7 88
emilmont 10:3bc89ef62ce7 89 ;
emilmont 10:3bc89ef62ce7 90 ;
emilmont 10:3bc89ef62ce7 91 ;
emilmont 10:3bc89ef62ce7 92 ;
emilmont 10:3bc89ef62ce7 93 __mbed_swi:
emilmont 10:3bc89ef62ce7 94 ;
emilmont 10:3bc89ef62ce7 95 ;
emilmont 10:3bc89ef62ce7 96 STMFD sp!, {a4, r4, ip, lr}
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 ;
emilmont 10:3bc89ef62ce7 99 LDR r4, =0x40000040
emilmont 10:3bc89ef62ce7 100
emilmont 10:3bc89ef62ce7 101 ;
emilmont 10:3bc89ef62ce7 102 ;
emilmont 10:3bc89ef62ce7 103 LDR a4, =0x00940000
emilmont 10:3bc89ef62ce7 104 LDR PC, =0x7ffff820
emilmont 10:3bc89ef62ce7 105
emilmont 10:3bc89ef62ce7 106 ;
emilmont 10:3bc89ef62ce7 107 ;
emilmont 10:3bc89ef62ce7 108 ;
emilmont 10:3bc89ef62ce7 109 ;
emilmont 10:3bc89ef62ce7 110 __mbed_dcc_irq:
emilmont 10:3bc89ef62ce7 111
emilmont 10:3bc89ef62ce7 112 ;
emilmont 10:3bc89ef62ce7 113
emilmont 10:3bc89ef62ce7 114 ;
emilmont 10:3bc89ef62ce7 115 LDMFD sp!,{r0-r3,r12,lr}
emilmont 10:3bc89ef62ce7 116
emilmont 10:3bc89ef62ce7 117 ;
emilmont 10:3bc89ef62ce7 118 MSR CPSR_c, #0x12|0x80|0x40
emilmont 10:3bc89ef62ce7 119
emilmont 10:3bc89ef62ce7 120 ;
emilmont 10:3bc89ef62ce7 121
emilmont 10:3bc89ef62ce7 122 ;
emilmont 10:3bc89ef62ce7 123 SUB lr, lr, #4 ;
emilmont 10:3bc89ef62ce7 124 STMFD sp!, {ip,lr} ;
emilmont 10:3bc89ef62ce7 125
emilmont 10:3bc89ef62ce7 126 ;
emilmont 10:3bc89ef62ce7 127 LDR LR, =0xfffff000
emilmont 10:3bc89ef62ce7 128 STR LR, [LR, #0xf00]
emilmont 10:3bc89ef62ce7 129
emilmont 10:3bc89ef62ce7 130 ;
emilmont 10:3bc89ef62ce7 131 ;
emilmont 10:3bc89ef62ce7 132 ;
emilmont 10:3bc89ef62ce7 133 ;
emilmont 10:3bc89ef62ce7 134 LDR PC, =0x7fffffe0
emilmont 10:3bc89ef62ce7 135
emilmont 10:3bc89ef62ce7 136 ;
emilmont 10:3bc89ef62ce7 137 ;
emilmont 10:3bc89ef62ce7 138 __mbed_reset:
emilmont 10:3bc89ef62ce7 139
emilmont 10:3bc89ef62ce7 140 ;
emilmont 10:3bc89ef62ce7 141
emilmont 10:3bc89ef62ce7 142 LDR R0, =(0x40000000 + 0x8000)
emilmont 10:3bc89ef62ce7 143
emilmont 10:3bc89ef62ce7 144 ;
emilmont 10:3bc89ef62ce7 145 MSR CPSR_c, #0x1B|0x80|0x40
emilmont 10:3bc89ef62ce7 146 MOV SP, R0
emilmont 10:3bc89ef62ce7 147 SUB R0, R0, #0x00000040
emilmont 10:3bc89ef62ce7 148
emilmont 10:3bc89ef62ce7 149 ;
emilmont 10:3bc89ef62ce7 150 MSR CPSR_c, #0x17|0x80|0x40
emilmont 10:3bc89ef62ce7 151 MOV SP, R0
emilmont 10:3bc89ef62ce7 152 SUB R0, R0, #0x00000040
emilmont 10:3bc89ef62ce7 153
emilmont 10:3bc89ef62ce7 154 ;
emilmont 10:3bc89ef62ce7 155 MSR CPSR_c, #0x11|0x80|0x40
emilmont 10:3bc89ef62ce7 156 MOV SP, R0
emilmont 10:3bc89ef62ce7 157 SUB R0, R0, #0x00000000
emilmont 10:3bc89ef62ce7 158
emilmont 10:3bc89ef62ce7 159 ;
emilmont 10:3bc89ef62ce7 160 MSR CPSR_c, #0x12|0x80|0x40
emilmont 10:3bc89ef62ce7 161 MOV SP, R0
emilmont 10:3bc89ef62ce7 162 SUB R0, R0, #0x00000040
emilmont 10:3bc89ef62ce7 163
emilmont 10:3bc89ef62ce7 164 ;
emilmont 10:3bc89ef62ce7 165 MSR CPSR_c, #0x13|0x80|0x40
emilmont 10:3bc89ef62ce7 166 MOV SP, R0
emilmont 10:3bc89ef62ce7 167 SUB R0, R0, #0x00000040
emilmont 10:3bc89ef62ce7 168
emilmont 10:3bc89ef62ce7 169 ;
emilmont 10:3bc89ef62ce7 170 MSR CPSR_c, #0x10
emilmont 10:3bc89ef62ce7 171 MOV SP, R0
emilmont 10:3bc89ef62ce7 172
emilmont 10:3bc89ef62ce7 173 ;
emilmont 10:3bc89ef62ce7 174 LDR R0, =__mbed_init_realmonitor
emilmont 10:3bc89ef62ce7 175 MOV LR, PC
emilmont 10:3bc89ef62ce7 176 BX R0
emilmont 10:3bc89ef62ce7 177
emilmont 10:3bc89ef62ce7 178 ;
emilmont 10:3bc89ef62ce7 179 LDR R0, =__mbed_init
emilmont 10:3bc89ef62ce7 180 BX R0