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vendor/NXP/LPC1768/cmsis/core_cm3.c@10:3bc89ef62ce7, 2013-06-14 (annotated)
- Committer:
- emilmont
- Date:
- Fri Jun 14 17:49:17 2013 +0100
- Revision:
- 10:3bc89ef62ce7
Unify mbed library sources
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 10:3bc89ef62ce7 | 1 | /**************************************************************************//** |
emilmont | 10:3bc89ef62ce7 | 2 | * @file core_cm3.c |
emilmont | 10:3bc89ef62ce7 | 3 | * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File |
emilmont | 10:3bc89ef62ce7 | 4 | * @version V2.02 |
emilmont | 10:3bc89ef62ce7 | 5 | * @date 24. March 2011 |
emilmont | 10:3bc89ef62ce7 | 6 | * |
emilmont | 10:3bc89ef62ce7 | 7 | * @note |
emilmont | 10:3bc89ef62ce7 | 8 | * Copyright (C) 2009-2010 ARM Limited. All rights reserved. |
emilmont | 10:3bc89ef62ce7 | 9 | * |
emilmont | 10:3bc89ef62ce7 | 10 | * @par |
emilmont | 10:3bc89ef62ce7 | 11 | * ARM Limited (ARM) is supplying this software for use with Cortex-M |
emilmont | 10:3bc89ef62ce7 | 12 | * processor based microcontrollers. This file can be freely distributed |
emilmont | 10:3bc89ef62ce7 | 13 | * within development tools that are supporting such ARM based processors. |
emilmont | 10:3bc89ef62ce7 | 14 | * |
emilmont | 10:3bc89ef62ce7 | 15 | * @par |
emilmont | 10:3bc89ef62ce7 | 16 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
emilmont | 10:3bc89ef62ce7 | 17 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
emilmont | 10:3bc89ef62ce7 | 18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
emilmont | 10:3bc89ef62ce7 | 19 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
emilmont | 10:3bc89ef62ce7 | 20 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
emilmont | 10:3bc89ef62ce7 | 21 | * |
emilmont | 10:3bc89ef62ce7 | 22 | ******************************************************************************/ |
emilmont | 10:3bc89ef62ce7 | 23 | |
emilmont | 10:3bc89ef62ce7 | 24 | #include <stdint.h> |
emilmont | 10:3bc89ef62ce7 | 25 | |
emilmont | 10:3bc89ef62ce7 | 26 | /* define compiler specific symbols */ |
emilmont | 10:3bc89ef62ce7 | 27 | #if defined ( __CC_ARM ) |
emilmont | 10:3bc89ef62ce7 | 28 | #define __ASM __asm /*!< asm keyword for ARM Compiler */ |
emilmont | 10:3bc89ef62ce7 | 29 | #define __INLINE __inline /*!< inline keyword for ARM Compiler */ |
emilmont | 10:3bc89ef62ce7 | 30 | |
emilmont | 10:3bc89ef62ce7 | 31 | #elif defined ( __ICCARM__ ) |
emilmont | 10:3bc89ef62ce7 | 32 | #define __ASM __asm /*!< asm keyword for IAR Compiler */ |
emilmont | 10:3bc89ef62ce7 | 33 | #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ |
emilmont | 10:3bc89ef62ce7 | 34 | |
emilmont | 10:3bc89ef62ce7 | 35 | #elif defined ( __GNUC__ ) |
emilmont | 10:3bc89ef62ce7 | 36 | #define __ASM __asm /*!< asm keyword for GNU Compiler */ |
emilmont | 10:3bc89ef62ce7 | 37 | #define __INLINE inline /*!< inline keyword for GNU Compiler */ |
emilmont | 10:3bc89ef62ce7 | 38 | |
emilmont | 10:3bc89ef62ce7 | 39 | #elif defined ( __TASKING__ ) |
emilmont | 10:3bc89ef62ce7 | 40 | #define __ASM __asm /*!< asm keyword for TASKING Compiler */ |
emilmont | 10:3bc89ef62ce7 | 41 | #define __INLINE inline /*!< inline keyword for TASKING Compiler */ |
emilmont | 10:3bc89ef62ce7 | 42 | |
emilmont | 10:3bc89ef62ce7 | 43 | #endif |
emilmont | 10:3bc89ef62ce7 | 44 | |
emilmont | 10:3bc89ef62ce7 | 45 | |
emilmont | 10:3bc89ef62ce7 | 46 | /* ########################## Core Instruction Access ######################### */ |
emilmont | 10:3bc89ef62ce7 | 47 | |
emilmont | 10:3bc89ef62ce7 | 48 | #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ |
emilmont | 10:3bc89ef62ce7 | 49 | |
emilmont | 10:3bc89ef62ce7 | 50 | /** \brief Reverse byte order (16 bit) |
emilmont | 10:3bc89ef62ce7 | 51 | |
emilmont | 10:3bc89ef62ce7 | 52 | This function reverses the byte order in two unsigned short values. |
emilmont | 10:3bc89ef62ce7 | 53 | |
emilmont | 10:3bc89ef62ce7 | 54 | \param [in] value Value to reverse |
emilmont | 10:3bc89ef62ce7 | 55 | \return Reversed value |
emilmont | 10:3bc89ef62ce7 | 56 | */ |
emilmont | 10:3bc89ef62ce7 | 57 | #if (__ARMCC_VERSION < 400677) |
emilmont | 10:3bc89ef62ce7 | 58 | __ASM uint32_t __REV16(uint32_t value) |
emilmont | 10:3bc89ef62ce7 | 59 | { |
emilmont | 10:3bc89ef62ce7 | 60 | rev16 r0, r0 |
emilmont | 10:3bc89ef62ce7 | 61 | bx lr |
emilmont | 10:3bc89ef62ce7 | 62 | } |
emilmont | 10:3bc89ef62ce7 | 63 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 64 | |
emilmont | 10:3bc89ef62ce7 | 65 | |
emilmont | 10:3bc89ef62ce7 | 66 | /** \brief Reverse byte order in signed short value |
emilmont | 10:3bc89ef62ce7 | 67 | |
emilmont | 10:3bc89ef62ce7 | 68 | This function reverses the byte order in a signed short value with sign extension to integer. |
emilmont | 10:3bc89ef62ce7 | 69 | |
emilmont | 10:3bc89ef62ce7 | 70 | \param [in] value Value to reverse |
emilmont | 10:3bc89ef62ce7 | 71 | \return Reversed value |
emilmont | 10:3bc89ef62ce7 | 72 | */ |
emilmont | 10:3bc89ef62ce7 | 73 | #if (__ARMCC_VERSION < 400677) |
emilmont | 10:3bc89ef62ce7 | 74 | __ASM int32_t __REVSH(int32_t value) |
emilmont | 10:3bc89ef62ce7 | 75 | { |
emilmont | 10:3bc89ef62ce7 | 76 | revsh r0, r0 |
emilmont | 10:3bc89ef62ce7 | 77 | bx lr |
emilmont | 10:3bc89ef62ce7 | 78 | } |
emilmont | 10:3bc89ef62ce7 | 79 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 80 | |
emilmont | 10:3bc89ef62ce7 | 81 | |
emilmont | 10:3bc89ef62ce7 | 82 | /** \brief Remove the exclusive lock |
emilmont | 10:3bc89ef62ce7 | 83 | |
emilmont | 10:3bc89ef62ce7 | 84 | This function removes the exclusive lock which is created by LDREX. |
emilmont | 10:3bc89ef62ce7 | 85 | |
emilmont | 10:3bc89ef62ce7 | 86 | */ |
emilmont | 10:3bc89ef62ce7 | 87 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 88 | __ASM void __CLREX(void) |
emilmont | 10:3bc89ef62ce7 | 89 | { |
emilmont | 10:3bc89ef62ce7 | 90 | clrex |
emilmont | 10:3bc89ef62ce7 | 91 | } |
emilmont | 10:3bc89ef62ce7 | 92 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 93 | |
emilmont | 10:3bc89ef62ce7 | 94 | |
emilmont | 10:3bc89ef62ce7 | 95 | #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ |
emilmont | 10:3bc89ef62ce7 | 96 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 97 | #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ |
emilmont | 10:3bc89ef62ce7 | 98 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 99 | #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ |
emilmont | 10:3bc89ef62ce7 | 100 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 101 | #endif |
emilmont | 10:3bc89ef62ce7 | 102 | |
emilmont | 10:3bc89ef62ce7 | 103 | |
emilmont | 10:3bc89ef62ce7 | 104 | /* ########################### Core Function Access ########################### */ |
emilmont | 10:3bc89ef62ce7 | 105 | |
emilmont | 10:3bc89ef62ce7 | 106 | #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ |
emilmont | 10:3bc89ef62ce7 | 107 | |
emilmont | 10:3bc89ef62ce7 | 108 | /** \brief Get Control Register |
emilmont | 10:3bc89ef62ce7 | 109 | |
emilmont | 10:3bc89ef62ce7 | 110 | This function returns the content of the Control Register. |
emilmont | 10:3bc89ef62ce7 | 111 | |
emilmont | 10:3bc89ef62ce7 | 112 | \return Control Register value |
emilmont | 10:3bc89ef62ce7 | 113 | */ |
emilmont | 10:3bc89ef62ce7 | 114 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 115 | __ASM uint32_t __get_CONTROL(void) |
emilmont | 10:3bc89ef62ce7 | 116 | { |
emilmont | 10:3bc89ef62ce7 | 117 | mrs r0, control |
emilmont | 10:3bc89ef62ce7 | 118 | bx lr |
emilmont | 10:3bc89ef62ce7 | 119 | } |
emilmont | 10:3bc89ef62ce7 | 120 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 121 | |
emilmont | 10:3bc89ef62ce7 | 122 | |
emilmont | 10:3bc89ef62ce7 | 123 | /** \brief Set Control Register |
emilmont | 10:3bc89ef62ce7 | 124 | |
emilmont | 10:3bc89ef62ce7 | 125 | This function writes the given value to the Control Register. |
emilmont | 10:3bc89ef62ce7 | 126 | |
emilmont | 10:3bc89ef62ce7 | 127 | \param [in] control Control Register value to set |
emilmont | 10:3bc89ef62ce7 | 128 | */ |
emilmont | 10:3bc89ef62ce7 | 129 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 130 | __ASM void __set_CONTROL(uint32_t control) |
emilmont | 10:3bc89ef62ce7 | 131 | { |
emilmont | 10:3bc89ef62ce7 | 132 | msr control, r0 |
emilmont | 10:3bc89ef62ce7 | 133 | bx lr |
emilmont | 10:3bc89ef62ce7 | 134 | } |
emilmont | 10:3bc89ef62ce7 | 135 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 136 | |
emilmont | 10:3bc89ef62ce7 | 137 | |
emilmont | 10:3bc89ef62ce7 | 138 | /** \brief Get ISPR Register |
emilmont | 10:3bc89ef62ce7 | 139 | |
emilmont | 10:3bc89ef62ce7 | 140 | This function returns the content of the ISPR Register. |
emilmont | 10:3bc89ef62ce7 | 141 | |
emilmont | 10:3bc89ef62ce7 | 142 | \return ISPR Register value |
emilmont | 10:3bc89ef62ce7 | 143 | */ |
emilmont | 10:3bc89ef62ce7 | 144 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 145 | __ASM uint32_t __get_IPSR(void) |
emilmont | 10:3bc89ef62ce7 | 146 | { |
emilmont | 10:3bc89ef62ce7 | 147 | mrs r0, ipsr |
emilmont | 10:3bc89ef62ce7 | 148 | bx lr |
emilmont | 10:3bc89ef62ce7 | 149 | } |
emilmont | 10:3bc89ef62ce7 | 150 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 151 | |
emilmont | 10:3bc89ef62ce7 | 152 | |
emilmont | 10:3bc89ef62ce7 | 153 | /** \brief Get APSR Register |
emilmont | 10:3bc89ef62ce7 | 154 | |
emilmont | 10:3bc89ef62ce7 | 155 | This function returns the content of the APSR Register. |
emilmont | 10:3bc89ef62ce7 | 156 | |
emilmont | 10:3bc89ef62ce7 | 157 | \return APSR Register value |
emilmont | 10:3bc89ef62ce7 | 158 | */ |
emilmont | 10:3bc89ef62ce7 | 159 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 160 | __ASM uint32_t __get_APSR(void) |
emilmont | 10:3bc89ef62ce7 | 161 | { |
emilmont | 10:3bc89ef62ce7 | 162 | mrs r0, apsr |
emilmont | 10:3bc89ef62ce7 | 163 | bx lr |
emilmont | 10:3bc89ef62ce7 | 164 | } |
emilmont | 10:3bc89ef62ce7 | 165 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 166 | |
emilmont | 10:3bc89ef62ce7 | 167 | |
emilmont | 10:3bc89ef62ce7 | 168 | /** \brief Get xPSR Register |
emilmont | 10:3bc89ef62ce7 | 169 | |
emilmont | 10:3bc89ef62ce7 | 170 | This function returns the content of the xPSR Register. |
emilmont | 10:3bc89ef62ce7 | 171 | |
emilmont | 10:3bc89ef62ce7 | 172 | \return xPSR Register value |
emilmont | 10:3bc89ef62ce7 | 173 | */ |
emilmont | 10:3bc89ef62ce7 | 174 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 175 | __ASM uint32_t __get_xPSR(void) |
emilmont | 10:3bc89ef62ce7 | 176 | { |
emilmont | 10:3bc89ef62ce7 | 177 | mrs r0, xpsr |
emilmont | 10:3bc89ef62ce7 | 178 | bx lr |
emilmont | 10:3bc89ef62ce7 | 179 | } |
emilmont | 10:3bc89ef62ce7 | 180 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 181 | |
emilmont | 10:3bc89ef62ce7 | 182 | |
emilmont | 10:3bc89ef62ce7 | 183 | /** \brief Get Process Stack Pointer |
emilmont | 10:3bc89ef62ce7 | 184 | |
emilmont | 10:3bc89ef62ce7 | 185 | This function returns the current value of the Process Stack Pointer (PSP). |
emilmont | 10:3bc89ef62ce7 | 186 | |
emilmont | 10:3bc89ef62ce7 | 187 | \return PSP Register value |
emilmont | 10:3bc89ef62ce7 | 188 | */ |
emilmont | 10:3bc89ef62ce7 | 189 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 190 | __ASM uint32_t __get_PSP(void) |
emilmont | 10:3bc89ef62ce7 | 191 | { |
emilmont | 10:3bc89ef62ce7 | 192 | mrs r0, psp |
emilmont | 10:3bc89ef62ce7 | 193 | bx lr |
emilmont | 10:3bc89ef62ce7 | 194 | } |
emilmont | 10:3bc89ef62ce7 | 195 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 196 | |
emilmont | 10:3bc89ef62ce7 | 197 | |
emilmont | 10:3bc89ef62ce7 | 198 | /** \brief Set Process Stack Pointer |
emilmont | 10:3bc89ef62ce7 | 199 | |
emilmont | 10:3bc89ef62ce7 | 200 | This function assigns the given value to the Process Stack Pointer (PSP). |
emilmont | 10:3bc89ef62ce7 | 201 | |
emilmont | 10:3bc89ef62ce7 | 202 | \param [in] topOfProcStack Process Stack Pointer value to set |
emilmont | 10:3bc89ef62ce7 | 203 | */ |
emilmont | 10:3bc89ef62ce7 | 204 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 205 | __ASM void __set_PSP(uint32_t topOfProcStack) |
emilmont | 10:3bc89ef62ce7 | 206 | { |
emilmont | 10:3bc89ef62ce7 | 207 | msr psp, r0 |
emilmont | 10:3bc89ef62ce7 | 208 | bx lr |
emilmont | 10:3bc89ef62ce7 | 209 | } |
emilmont | 10:3bc89ef62ce7 | 210 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 211 | |
emilmont | 10:3bc89ef62ce7 | 212 | |
emilmont | 10:3bc89ef62ce7 | 213 | /** \brief Get Main Stack Pointer |
emilmont | 10:3bc89ef62ce7 | 214 | |
emilmont | 10:3bc89ef62ce7 | 215 | This function returns the current value of the Main Stack Pointer (MSP). |
emilmont | 10:3bc89ef62ce7 | 216 | |
emilmont | 10:3bc89ef62ce7 | 217 | \return MSP Register value |
emilmont | 10:3bc89ef62ce7 | 218 | */ |
emilmont | 10:3bc89ef62ce7 | 219 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 220 | __ASM uint32_t __get_MSP(void) |
emilmont | 10:3bc89ef62ce7 | 221 | { |
emilmont | 10:3bc89ef62ce7 | 222 | mrs r0, msp |
emilmont | 10:3bc89ef62ce7 | 223 | bx lr |
emilmont | 10:3bc89ef62ce7 | 224 | } |
emilmont | 10:3bc89ef62ce7 | 225 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 226 | |
emilmont | 10:3bc89ef62ce7 | 227 | |
emilmont | 10:3bc89ef62ce7 | 228 | /** \brief Set Main Stack Pointer |
emilmont | 10:3bc89ef62ce7 | 229 | |
emilmont | 10:3bc89ef62ce7 | 230 | This function assigns the given value to the Main Stack Pointer (MSP). |
emilmont | 10:3bc89ef62ce7 | 231 | |
emilmont | 10:3bc89ef62ce7 | 232 | \param [in] topOfMainStack Main Stack Pointer value to set |
emilmont | 10:3bc89ef62ce7 | 233 | */ |
emilmont | 10:3bc89ef62ce7 | 234 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 235 | __ASM void __set_MSP(uint32_t mainStackPointer) |
emilmont | 10:3bc89ef62ce7 | 236 | { |
emilmont | 10:3bc89ef62ce7 | 237 | msr msp, r0 |
emilmont | 10:3bc89ef62ce7 | 238 | bx lr |
emilmont | 10:3bc89ef62ce7 | 239 | } |
emilmont | 10:3bc89ef62ce7 | 240 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 241 | |
emilmont | 10:3bc89ef62ce7 | 242 | |
emilmont | 10:3bc89ef62ce7 | 243 | /** \brief Get Base Priority |
emilmont | 10:3bc89ef62ce7 | 244 | |
emilmont | 10:3bc89ef62ce7 | 245 | This function returns the current value of the Base Priority register. |
emilmont | 10:3bc89ef62ce7 | 246 | |
emilmont | 10:3bc89ef62ce7 | 247 | \return Base Priority register value |
emilmont | 10:3bc89ef62ce7 | 248 | */ |
emilmont | 10:3bc89ef62ce7 | 249 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 250 | __ASM uint32_t __get_BASEPRI(void) |
emilmont | 10:3bc89ef62ce7 | 251 | { |
emilmont | 10:3bc89ef62ce7 | 252 | mrs r0, basepri |
emilmont | 10:3bc89ef62ce7 | 253 | bx lr |
emilmont | 10:3bc89ef62ce7 | 254 | } |
emilmont | 10:3bc89ef62ce7 | 255 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 256 | |
emilmont | 10:3bc89ef62ce7 | 257 | |
emilmont | 10:3bc89ef62ce7 | 258 | /** \brief Set Base Priority |
emilmont | 10:3bc89ef62ce7 | 259 | |
emilmont | 10:3bc89ef62ce7 | 260 | This function assigns the given value to the Base Priority register. |
emilmont | 10:3bc89ef62ce7 | 261 | |
emilmont | 10:3bc89ef62ce7 | 262 | \param [in] basePri Base Priority value to set |
emilmont | 10:3bc89ef62ce7 | 263 | */ |
emilmont | 10:3bc89ef62ce7 | 264 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 265 | __ASM void __set_BASEPRI(uint32_t basePri) |
emilmont | 10:3bc89ef62ce7 | 266 | { |
emilmont | 10:3bc89ef62ce7 | 267 | msr basepri, r0 |
emilmont | 10:3bc89ef62ce7 | 268 | bx lr |
emilmont | 10:3bc89ef62ce7 | 269 | } |
emilmont | 10:3bc89ef62ce7 | 270 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 271 | |
emilmont | 10:3bc89ef62ce7 | 272 | /** \brief Get Priority Mask |
emilmont | 10:3bc89ef62ce7 | 273 | |
emilmont | 10:3bc89ef62ce7 | 274 | This function returns the current state of the priority mask bit from the Priority Mask Register. |
emilmont | 10:3bc89ef62ce7 | 275 | |
emilmont | 10:3bc89ef62ce7 | 276 | \return Priority Mask value |
emilmont | 10:3bc89ef62ce7 | 277 | */ |
emilmont | 10:3bc89ef62ce7 | 278 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 279 | __ASM uint32_t __get_PRIMASK(void) |
emilmont | 10:3bc89ef62ce7 | 280 | { |
emilmont | 10:3bc89ef62ce7 | 281 | mrs r0, primask |
emilmont | 10:3bc89ef62ce7 | 282 | bx lr |
emilmont | 10:3bc89ef62ce7 | 283 | } |
emilmont | 10:3bc89ef62ce7 | 284 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 285 | |
emilmont | 10:3bc89ef62ce7 | 286 | |
emilmont | 10:3bc89ef62ce7 | 287 | /** \brief Set Priority Mask |
emilmont | 10:3bc89ef62ce7 | 288 | |
emilmont | 10:3bc89ef62ce7 | 289 | This function assigns the given value to the Priority Mask Register. |
emilmont | 10:3bc89ef62ce7 | 290 | |
emilmont | 10:3bc89ef62ce7 | 291 | \param [in] priMask Priority Mask |
emilmont | 10:3bc89ef62ce7 | 292 | */ |
emilmont | 10:3bc89ef62ce7 | 293 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 294 | __ASM void __set_PRIMASK(uint32_t priMask) |
emilmont | 10:3bc89ef62ce7 | 295 | { |
emilmont | 10:3bc89ef62ce7 | 296 | msr primask, r0 |
emilmont | 10:3bc89ef62ce7 | 297 | bx lr |
emilmont | 10:3bc89ef62ce7 | 298 | } |
emilmont | 10:3bc89ef62ce7 | 299 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 300 | |
emilmont | 10:3bc89ef62ce7 | 301 | |
emilmont | 10:3bc89ef62ce7 | 302 | /** \brief Get Fault Mask |
emilmont | 10:3bc89ef62ce7 | 303 | |
emilmont | 10:3bc89ef62ce7 | 304 | This function returns the current value of the Fault Mask Register. |
emilmont | 10:3bc89ef62ce7 | 305 | |
emilmont | 10:3bc89ef62ce7 | 306 | \return Fault Mask value |
emilmont | 10:3bc89ef62ce7 | 307 | */ |
emilmont | 10:3bc89ef62ce7 | 308 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 309 | __ASM uint32_t __get_FAULTMASK(void) |
emilmont | 10:3bc89ef62ce7 | 310 | { |
emilmont | 10:3bc89ef62ce7 | 311 | mrs r0, faultmask |
emilmont | 10:3bc89ef62ce7 | 312 | bx lr |
emilmont | 10:3bc89ef62ce7 | 313 | } |
emilmont | 10:3bc89ef62ce7 | 314 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 315 | |
emilmont | 10:3bc89ef62ce7 | 316 | |
emilmont | 10:3bc89ef62ce7 | 317 | /** \brief Set the Fault Mask |
emilmont | 10:3bc89ef62ce7 | 318 | |
emilmont | 10:3bc89ef62ce7 | 319 | This function assigns the given value to the Fault Mask Register. |
emilmont | 10:3bc89ef62ce7 | 320 | |
emilmont | 10:3bc89ef62ce7 | 321 | \param [in] faultMask Fault Mask value value to set |
emilmont | 10:3bc89ef62ce7 | 322 | */ |
emilmont | 10:3bc89ef62ce7 | 323 | #if (__ARMCC_VERSION < 400000) |
emilmont | 10:3bc89ef62ce7 | 324 | __ASM void __set_FAULTMASK(uint32_t faultMask) |
emilmont | 10:3bc89ef62ce7 | 325 | { |
emilmont | 10:3bc89ef62ce7 | 326 | msr faultmask, r0 |
emilmont | 10:3bc89ef62ce7 | 327 | bx lr |
emilmont | 10:3bc89ef62ce7 | 328 | } |
emilmont | 10:3bc89ef62ce7 | 329 | #endif /* __ARMCC_VERSION */ |
emilmont | 10:3bc89ef62ce7 | 330 | |
emilmont | 10:3bc89ef62ce7 | 331 | |
emilmont | 10:3bc89ef62ce7 | 332 | |
emilmont | 10:3bc89ef62ce7 | 333 | #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ |
emilmont | 10:3bc89ef62ce7 | 334 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 335 | #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ |
emilmont | 10:3bc89ef62ce7 | 336 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 337 | #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ |
emilmont | 10:3bc89ef62ce7 | 338 | /* obsolete */ |
emilmont | 10:3bc89ef62ce7 | 339 | #endif |