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Last commit 20 Feb 2019 by mbed official

vendor/Freescale/KL25Z/hal/serial_api.c@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "serial_api.h"
emilmont 10:3bc89ef62ce7 17
emilmont 10:3bc89ef62ce7 18 // math.h required for floating point operations for baud rate calculation
emilmont 10:3bc89ef62ce7 19 #include <math.h>
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #include <string.h>
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 24 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 25 #include "error.h"
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 /******************************************************************************
emilmont 10:3bc89ef62ce7 28 * INITIALIZATION
emilmont 10:3bc89ef62ce7 29 ******************************************************************************/
emilmont 10:3bc89ef62ce7 30 static const PinMap PinMap_UART_TX[] = {
emilmont 10:3bc89ef62ce7 31 {PTC4, UART_1, 3},
emilmont 10:3bc89ef62ce7 32 {PTA2, UART_0, 2},
emilmont 10:3bc89ef62ce7 33 {PTD5, UART_2, 3},
emilmont 10:3bc89ef62ce7 34 {PTD3, UART_2, 3},
emilmont 10:3bc89ef62ce7 35 {NC , NC , 0}
emilmont 10:3bc89ef62ce7 36 };
emilmont 10:3bc89ef62ce7 37
emilmont 10:3bc89ef62ce7 38 static const PinMap PinMap_UART_RX[] = {
emilmont 10:3bc89ef62ce7 39 {PTC3, UART_1, 3},
emilmont 10:3bc89ef62ce7 40 {PTA1, UART_0, 2},
emilmont 10:3bc89ef62ce7 41 {PTD4, UART_2, 3},
emilmont 10:3bc89ef62ce7 42 {PTD2, UART_2, 3},
emilmont 10:3bc89ef62ce7 43 {NC , NC , 0}
emilmont 10:3bc89ef62ce7 44 };
emilmont 10:3bc89ef62ce7 45
emilmont 10:3bc89ef62ce7 46 #define UART_NUM 3
emilmont 10:3bc89ef62ce7 47 static uint32_t serial_irq_ids[UART_NUM] = {0};
emilmont 10:3bc89ef62ce7 48 static uart_irq_handler irq_handler;
emilmont 10:3bc89ef62ce7 49
emilmont 10:3bc89ef62ce7 50 int stdio_uart_inited = 0;
emilmont 10:3bc89ef62ce7 51 serial_t stdio_uart;
emilmont 10:3bc89ef62ce7 52
emilmont 10:3bc89ef62ce7 53 void serial_init(serial_t *obj, PinName tx, PinName rx) {
emilmont 10:3bc89ef62ce7 54 // determine the UART to use
emilmont 10:3bc89ef62ce7 55 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 56 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
emilmont 10:3bc89ef62ce7 57 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
emilmont 10:3bc89ef62ce7 58 if ((int)uart == NC) {
emilmont 10:3bc89ef62ce7 59 error("Serial pinout mapping failed");
emilmont 10:3bc89ef62ce7 60 }
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 obj->uart = (UARTLP_Type *)uart;
emilmont 10:3bc89ef62ce7 63 // enable clk
emilmont 10:3bc89ef62ce7 64 switch (uart) {
emilmont 10:3bc89ef62ce7 65 case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT2_UART0SRC_SHIFT);
emilmont 10:3bc89ef62ce7 66 SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
emilmont 10:3bc89ef62ce7 67 case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
emilmont 10:3bc89ef62ce7 68 case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
emilmont 10:3bc89ef62ce7 69 }
emilmont 10:3bc89ef62ce7 70 // Disable UART before changing registers
emilmont 10:3bc89ef62ce7 71 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
emilmont 10:3bc89ef62ce7 72
emilmont 10:3bc89ef62ce7 73 switch (uart) {
emilmont 10:3bc89ef62ce7 74 case UART_0: obj->index = 0; break;
emilmont 10:3bc89ef62ce7 75 case UART_1: obj->index = 1; break;
emilmont 10:3bc89ef62ce7 76 case UART_2: obj->index = 2; break;
emilmont 10:3bc89ef62ce7 77 }
emilmont 10:3bc89ef62ce7 78
emilmont 10:3bc89ef62ce7 79 // set default baud rate and format
emilmont 10:3bc89ef62ce7 80 serial_baud (obj, 9600);
emilmont 10:3bc89ef62ce7 81 serial_format(obj, 8, ParityNone, 1);
emilmont 10:3bc89ef62ce7 82
emilmont 10:3bc89ef62ce7 83 // pinout the chosen uart
emilmont 10:3bc89ef62ce7 84 pinmap_pinout(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 85 pinmap_pinout(rx, PinMap_UART_RX);
emilmont 10:3bc89ef62ce7 86
emilmont 10:3bc89ef62ce7 87 // set rx/tx pins in PullUp mode
emilmont 10:3bc89ef62ce7 88 pin_mode(tx, PullUp);
emilmont 10:3bc89ef62ce7 89 pin_mode(rx, PullUp);
emilmont 10:3bc89ef62ce7 90
emilmont 10:3bc89ef62ce7 91 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
emilmont 10:3bc89ef62ce7 92
emilmont 10:3bc89ef62ce7 93 if (uart == STDIO_UART) {
emilmont 10:3bc89ef62ce7 94 stdio_uart_inited = 1;
emilmont 10:3bc89ef62ce7 95 memcpy(&stdio_uart, obj, sizeof(serial_t));
emilmont 10:3bc89ef62ce7 96 }
emilmont 10:3bc89ef62ce7 97 }
emilmont 10:3bc89ef62ce7 98
emilmont 10:3bc89ef62ce7 99 void serial_free(serial_t *obj) {
emilmont 10:3bc89ef62ce7 100 serial_irq_ids[obj->index] = 0;
emilmont 10:3bc89ef62ce7 101 }
emilmont 10:3bc89ef62ce7 102
emilmont 10:3bc89ef62ce7 103 // serial_baud
emilmont 10:3bc89ef62ce7 104 //
emilmont 10:3bc89ef62ce7 105 // set the baud rate, taking in to account the current SystemFrequency
emilmont 10:3bc89ef62ce7 106 //
emilmont 10:3bc89ef62ce7 107 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
emilmont 10:3bc89ef62ce7 108 // baud rate. The formula is:
emilmont 10:3bc89ef62ce7 109 //
emilmont 10:3bc89ef62ce7 110 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
emilmont 10:3bc89ef62ce7 111 // where:
emilmont 10:3bc89ef62ce7 112 // 1 < MulVal <= 15
emilmont 10:3bc89ef62ce7 113 // 0 <= DivAddVal < 14
emilmont 10:3bc89ef62ce7 114 // DivAddVal < MulVal
emilmont 10:3bc89ef62ce7 115 //
emilmont 10:3bc89ef62ce7 116 void serial_baud(serial_t *obj, int baudrate) {
emilmont 10:3bc89ef62ce7 117
emilmont 10:3bc89ef62ce7 118 // save C2 state
emilmont 10:3bc89ef62ce7 119 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
emilmont 10:3bc89ef62ce7 120
emilmont 10:3bc89ef62ce7 121 // Disable UART before changing registers
emilmont 10:3bc89ef62ce7 122 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
emilmont 10:3bc89ef62ce7 123
emilmont 10:3bc89ef62ce7 124 // [TODO] not hardcode this value
emilmont 10:3bc89ef62ce7 125 uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u;
emilmont 10:3bc89ef62ce7 126
emilmont 10:3bc89ef62ce7 127 // First we check to see if the basic divide with no DivAddVal/MulVal
emilmont 10:3bc89ef62ce7 128 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
emilmont 10:3bc89ef62ce7 129 // MulVal = 1. Otherwise, we search the valid ratio value range to find
emilmont 10:3bc89ef62ce7 130 // the closest match. This could be more elegant, using search methods
emilmont 10:3bc89ef62ce7 131 // and/or lookup tables, but the brute force method is not that much
emilmont 10:3bc89ef62ce7 132 // slower, and is more maintainable.
emilmont 10:3bc89ef62ce7 133 uint16_t DL = PCLK / (16 * baudrate);
emilmont 10:3bc89ef62ce7 134
emilmont 10:3bc89ef62ce7 135 // set BDH and BDL
emilmont 10:3bc89ef62ce7 136 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
emilmont 10:3bc89ef62ce7 137 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
emilmont 10:3bc89ef62ce7 138
emilmont 10:3bc89ef62ce7 139 // restore C2 state
emilmont 10:3bc89ef62ce7 140 obj->uart->C2 |= c2_state;
emilmont 10:3bc89ef62ce7 141 }
emilmont 10:3bc89ef62ce7 142
emilmont 10:3bc89ef62ce7 143 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
emilmont 10:3bc89ef62ce7 144 uint8_t m10 = 0;
emilmont 10:3bc89ef62ce7 145
emilmont 10:3bc89ef62ce7 146 // save C2 state
emilmont 10:3bc89ef62ce7 147 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
emilmont 10:3bc89ef62ce7 148
emilmont 10:3bc89ef62ce7 149 // Disable UART before changing registers
emilmont 10:3bc89ef62ce7 150 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
emilmont 10:3bc89ef62ce7 151
emilmont 10:3bc89ef62ce7 152 // 8 data bits = 0 ... 9 data bits = 1
emilmont 10:3bc89ef62ce7 153 if ((data_bits < 8) || (data_bits > 9)) {
emilmont 10:3bc89ef62ce7 154 error("Invalid number of bits (%d) in serial format, should be 8..9\r\n", data_bits);
emilmont 10:3bc89ef62ce7 155 }
emilmont 10:3bc89ef62ce7 156 data_bits -= 8;
emilmont 10:3bc89ef62ce7 157
emilmont 10:3bc89ef62ce7 158 uint8_t parity_enable, parity_select;
emilmont 10:3bc89ef62ce7 159 switch (parity) {
emilmont 10:3bc89ef62ce7 160 case ParityNone: parity_enable = 0; parity_select = 0; break;
emilmont 10:3bc89ef62ce7 161 case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
emilmont 10:3bc89ef62ce7 162 case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
emilmont 10:3bc89ef62ce7 163 default:
emilmont 10:3bc89ef62ce7 164 error("Invalid serial parity setting\r\n");
emilmont 10:3bc89ef62ce7 165 return;
emilmont 10:3bc89ef62ce7 166 }
emilmont 10:3bc89ef62ce7 167
emilmont 10:3bc89ef62ce7 168 // 1 stop bits = 0, 2 stop bits = 1
emilmont 10:3bc89ef62ce7 169 if ((stop_bits != 1) && (stop_bits != 2)) {
emilmont 10:3bc89ef62ce7 170 error("Invalid stop bits specified\r\n");
emilmont 10:3bc89ef62ce7 171 }
emilmont 10:3bc89ef62ce7 172 stop_bits -= 1;
emilmont 10:3bc89ef62ce7 173
emilmont 10:3bc89ef62ce7 174 // 9 data bits + parity
emilmont 10:3bc89ef62ce7 175 if (data_bits == 2) {
emilmont 10:3bc89ef62ce7 176 // only uart0 supports 10 bit communication
emilmont 10:3bc89ef62ce7 177 if (obj->index != 0) {
emilmont 10:3bc89ef62ce7 178 error("Invalid number of bits (9) to be used with parity\r\n");
emilmont 10:3bc89ef62ce7 179 }
emilmont 10:3bc89ef62ce7 180 data_bits = 0;
emilmont 10:3bc89ef62ce7 181 m10 = 1;
emilmont 10:3bc89ef62ce7 182 }
emilmont 10:3bc89ef62ce7 183
emilmont 10:3bc89ef62ce7 184 // data bits, parity and parity mode
emilmont 10:3bc89ef62ce7 185 obj->uart->C1 = ((data_bits << 4)
emilmont 10:3bc89ef62ce7 186 | (parity_enable << 1)
emilmont 10:3bc89ef62ce7 187 | (parity_select << 0));
emilmont 10:3bc89ef62ce7 188
emilmont 10:3bc89ef62ce7 189 // enable 10bit mode if needed
emilmont 10:3bc89ef62ce7 190 if (obj->index == 0) {
emilmont 10:3bc89ef62ce7 191 obj->uart->C4 &= ~UARTLP_C4_M10_MASK;
emilmont 10:3bc89ef62ce7 192 obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT);
emilmont 10:3bc89ef62ce7 193 }
emilmont 10:3bc89ef62ce7 194
emilmont 10:3bc89ef62ce7 195 // stop bits
emilmont 10:3bc89ef62ce7 196 obj->uart->BDH &= ~UART_BDH_SBNS_MASK;
emilmont 10:3bc89ef62ce7 197 obj->uart->BDH |= (stop_bits << UART_BDH_SBNS_SHIFT);
emilmont 10:3bc89ef62ce7 198
emilmont 10:3bc89ef62ce7 199 // restore C2 state
emilmont 10:3bc89ef62ce7 200 obj->uart->C2 |= c2_state;
emilmont 10:3bc89ef62ce7 201 }
emilmont 10:3bc89ef62ce7 202
emilmont 10:3bc89ef62ce7 203 /******************************************************************************
emilmont 10:3bc89ef62ce7 204 * INTERRUPTS HANDLING
emilmont 10:3bc89ef62ce7 205 ******************************************************************************/
emilmont 10:3bc89ef62ce7 206 static inline void uart_irq(uint8_t status, uint32_t index) {
emilmont 10:3bc89ef62ce7 207 if (serial_irq_ids[index] != 0) {
emilmont 10:3bc89ef62ce7 208 if (status & UART_S1_TDRE_MASK)
emilmont 10:3bc89ef62ce7 209 irq_handler(serial_irq_ids[index], TxIrq);
emilmont 10:3bc89ef62ce7 210
emilmont 10:3bc89ef62ce7 211 if (status & UART_S1_RDRF_MASK)
emilmont 10:3bc89ef62ce7 212 irq_handler(serial_irq_ids[index], RxIrq);
emilmont 10:3bc89ef62ce7 213 }
emilmont 10:3bc89ef62ce7 214 }
emilmont 10:3bc89ef62ce7 215
emilmont 10:3bc89ef62ce7 216 void uart0_irq() {
emilmont 10:3bc89ef62ce7 217 uart_irq(UART0->S1, 0);
emilmont 10:3bc89ef62ce7 218 if (UART0->S1 & UART_S1_OR_MASK)
emilmont 10:3bc89ef62ce7 219 UART0->S1 |= UART_S1_OR_MASK;
emilmont 10:3bc89ef62ce7 220 }
emilmont 10:3bc89ef62ce7 221 void uart1_irq() {uart_irq(UART1->S1, 1);}
emilmont 10:3bc89ef62ce7 222 void uart2_irq() {uart_irq(UART2->S1, 2);}
emilmont 10:3bc89ef62ce7 223
emilmont 10:3bc89ef62ce7 224 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
emilmont 10:3bc89ef62ce7 225 irq_handler = handler;
emilmont 10:3bc89ef62ce7 226 serial_irq_ids[obj->index] = id;
emilmont 10:3bc89ef62ce7 227 }
emilmont 10:3bc89ef62ce7 228
emilmont 10:3bc89ef62ce7 229 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
emilmont 10:3bc89ef62ce7 230 IRQn_Type irq_n = (IRQn_Type)0;
emilmont 10:3bc89ef62ce7 231 uint32_t vector = 0;
emilmont 10:3bc89ef62ce7 232 switch ((int)obj->uart) {
emilmont 10:3bc89ef62ce7 233 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
emilmont 10:3bc89ef62ce7 234 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
emilmont 10:3bc89ef62ce7 235 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
emilmont 10:3bc89ef62ce7 236 }
emilmont 10:3bc89ef62ce7 237
emilmont 10:3bc89ef62ce7 238 if (enable) {
emilmont 10:3bc89ef62ce7 239 switch (irq) {
emilmont 10:3bc89ef62ce7 240 case RxIrq: obj->uart->C2 |= (UART_C2_RIE_MASK); break;
emilmont 10:3bc89ef62ce7 241 case TxIrq: obj->uart->C2 |= (UART_C2_TIE_MASK); break;
emilmont 10:3bc89ef62ce7 242 }
emilmont 10:3bc89ef62ce7 243 NVIC_SetVector(irq_n, vector);
emilmont 10:3bc89ef62ce7 244 NVIC_EnableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 245
emilmont 10:3bc89ef62ce7 246 } else { // disable
emilmont 10:3bc89ef62ce7 247 int all_disabled = 0;
emilmont 10:3bc89ef62ce7 248 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
emilmont 10:3bc89ef62ce7 249 switch (irq) {
emilmont 10:3bc89ef62ce7 250 case RxIrq: obj->uart->C2 &= ~(UART_C2_RIE_MASK); break;
emilmont 10:3bc89ef62ce7 251 case TxIrq: obj->uart->C2 &= ~(UART_C2_TIE_MASK); break;
emilmont 10:3bc89ef62ce7 252 }
emilmont 10:3bc89ef62ce7 253 switch (other_irq) {
emilmont 10:3bc89ef62ce7 254 case RxIrq: all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0; break;
emilmont 10:3bc89ef62ce7 255 case TxIrq: all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0; break;
emilmont 10:3bc89ef62ce7 256 }
emilmont 10:3bc89ef62ce7 257 if (all_disabled)
emilmont 10:3bc89ef62ce7 258 NVIC_DisableIRQ(irq_n);
emilmont 10:3bc89ef62ce7 259 }
emilmont 10:3bc89ef62ce7 260 }
emilmont 10:3bc89ef62ce7 261
emilmont 10:3bc89ef62ce7 262 /******************************************************************************
emilmont 10:3bc89ef62ce7 263 * READ/WRITE
emilmont 10:3bc89ef62ce7 264 ******************************************************************************/
emilmont 10:3bc89ef62ce7 265 int serial_getc(serial_t *obj) {
emilmont 10:3bc89ef62ce7 266 while (!serial_readable(obj));
emilmont 10:3bc89ef62ce7 267 return obj->uart->D;
emilmont 10:3bc89ef62ce7 268 }
emilmont 10:3bc89ef62ce7 269
emilmont 10:3bc89ef62ce7 270 void serial_putc(serial_t *obj, int c) {
emilmont 10:3bc89ef62ce7 271 while (!serial_writable(obj));
emilmont 10:3bc89ef62ce7 272 obj->uart->D = c;
emilmont 10:3bc89ef62ce7 273 }
emilmont 10:3bc89ef62ce7 274
emilmont 10:3bc89ef62ce7 275 int serial_readable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 276 // check overrun
emilmont 10:3bc89ef62ce7 277 if (obj->uart->S1 & UART_S1_OR_MASK) {
emilmont 10:3bc89ef62ce7 278 obj->uart->S1 |= UART_S1_OR_MASK;
emilmont 10:3bc89ef62ce7 279 }
emilmont 10:3bc89ef62ce7 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
emilmont 10:3bc89ef62ce7 281 }
emilmont 10:3bc89ef62ce7 282
emilmont 10:3bc89ef62ce7 283 int serial_writable(serial_t *obj) {
emilmont 10:3bc89ef62ce7 284 // check overrun
emilmont 10:3bc89ef62ce7 285 if (obj->uart->S1 & UART_S1_OR_MASK) {
emilmont 10:3bc89ef62ce7 286 obj->uart->S1 |= UART_S1_OR_MASK;
emilmont 10:3bc89ef62ce7 287 }
emilmont 10:3bc89ef62ce7 288 return (obj->uart->S1 & UART_S1_TDRE_MASK);
emilmont 10:3bc89ef62ce7 289 }
emilmont 10:3bc89ef62ce7 290
emilmont 10:3bc89ef62ce7 291 void serial_clear(serial_t *obj) {
emilmont 10:3bc89ef62ce7 292 }
emilmont 10:3bc89ef62ce7 293
emilmont 10:3bc89ef62ce7 294 void serial_pinout_tx(PinName tx) {
emilmont 10:3bc89ef62ce7 295 pinmap_pinout(tx, PinMap_UART_TX);
emilmont 10:3bc89ef62ce7 296 }