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Last commit 20 Feb 2019 by 
mbed official
targets/hal/TARGET_NXP/TARGET_LPC176X/us_ticker.c@58:3b55b7a41411, 2013-12-13 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Dec 13 09:30:05 2013 +0000
- Revision:
- 58:3b55b7a41411
- Parent:
- 13:0645d8841f51
- Child:
- 304:89b9c3a9a045
Synchronized with git revision da605b82a5ca02e18b987f366969d615bec94035
Full URL: https://github.com/mbedmicro/mbed/commit/da605b82a5ca02e18b987f366969d615bec94035/
[NUCLEO_F103RB] Update PWM IOs used + I2C cleanup
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 10:3bc89ef62ce7 | 1 | /* mbed Microcontroller Library |
| emilmont | 10:3bc89ef62ce7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
| emilmont | 10:3bc89ef62ce7 | 3 | * |
| emilmont | 10:3bc89ef62ce7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| emilmont | 10:3bc89ef62ce7 | 5 | * you may not use this file except in compliance with the License. |
| emilmont | 10:3bc89ef62ce7 | 6 | * You may obtain a copy of the License at |
| emilmont | 10:3bc89ef62ce7 | 7 | * |
| emilmont | 10:3bc89ef62ce7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| emilmont | 10:3bc89ef62ce7 | 9 | * |
| emilmont | 10:3bc89ef62ce7 | 10 | * Unless required by applicable law or agreed to in writing, software |
| emilmont | 10:3bc89ef62ce7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| emilmont | 10:3bc89ef62ce7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| emilmont | 10:3bc89ef62ce7 | 13 | * See the License for the specific language governing permissions and |
| emilmont | 10:3bc89ef62ce7 | 14 | * limitations under the License. |
| emilmont | 10:3bc89ef62ce7 | 15 | */ |
| emilmont | 10:3bc89ef62ce7 | 16 | #include <stddef.h> |
| emilmont | 10:3bc89ef62ce7 | 17 | #include "us_ticker_api.h" |
| emilmont | 10:3bc89ef62ce7 | 18 | #include "PeripheralNames.h" |
| emilmont | 10:3bc89ef62ce7 | 19 | |
| emilmont | 10:3bc89ef62ce7 | 20 | #define US_TICKER_TIMER ((LPC_TIM_TypeDef *)LPC_TIM3_BASE) |
| emilmont | 10:3bc89ef62ce7 | 21 | #define US_TICKER_TIMER_IRQn TIMER3_IRQn |
| emilmont | 10:3bc89ef62ce7 | 22 | |
| emilmont | 10:3bc89ef62ce7 | 23 | int us_ticker_inited = 0; |
| emilmont | 10:3bc89ef62ce7 | 24 | |
| emilmont | 10:3bc89ef62ce7 | 25 | void us_ticker_init(void) { |
| emilmont | 10:3bc89ef62ce7 | 26 | if (us_ticker_inited) return; |
| emilmont | 10:3bc89ef62ce7 | 27 | us_ticker_inited = 1; |
| emilmont | 10:3bc89ef62ce7 | 28 | |
| emilmont | 10:3bc89ef62ce7 | 29 | LPC_SC->PCONP |= 1 << 23; // Clock TIMER_3 |
| emilmont | 10:3bc89ef62ce7 | 30 | |
| emilmont | 10:3bc89ef62ce7 | 31 | US_TICKER_TIMER->CTCR = 0x0; // timer mode |
| emilmont | 10:3bc89ef62ce7 | 32 | uint32_t PCLK = SystemCoreClock / 4; |
| emilmont | 10:3bc89ef62ce7 | 33 | |
| emilmont | 10:3bc89ef62ce7 | 34 | US_TICKER_TIMER->TCR = 0x2; // reset |
| emilmont | 10:3bc89ef62ce7 | 35 | |
| emilmont | 10:3bc89ef62ce7 | 36 | uint32_t prescale = PCLK / 1000000; // default to 1MHz (1 us ticks) |
| emilmont | 10:3bc89ef62ce7 | 37 | US_TICKER_TIMER->PR = prescale - 1; |
| emilmont | 10:3bc89ef62ce7 | 38 | US_TICKER_TIMER->TCR = 1; // enable = 1, reset = 0 |
| emilmont | 10:3bc89ef62ce7 | 39 | |
| emilmont | 10:3bc89ef62ce7 | 40 | NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler); |
| emilmont | 10:3bc89ef62ce7 | 41 | NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); |
| emilmont | 10:3bc89ef62ce7 | 42 | } |
| emilmont | 10:3bc89ef62ce7 | 43 | |
| emilmont | 10:3bc89ef62ce7 | 44 | uint32_t us_ticker_read() { |
| emilmont | 10:3bc89ef62ce7 | 45 | if (!us_ticker_inited) |
| emilmont | 10:3bc89ef62ce7 | 46 | us_ticker_init(); |
| emilmont | 10:3bc89ef62ce7 | 47 | |
| emilmont | 10:3bc89ef62ce7 | 48 | return US_TICKER_TIMER->TC; |
| emilmont | 10:3bc89ef62ce7 | 49 | } |
| emilmont | 10:3bc89ef62ce7 | 50 | |
| emilmont | 10:3bc89ef62ce7 | 51 | void us_ticker_set_interrupt(unsigned int timestamp) { |
| emilmont | 10:3bc89ef62ce7 | 52 | // set match value |
| emilmont | 10:3bc89ef62ce7 | 53 | US_TICKER_TIMER->MR0 = timestamp; |
| emilmont | 10:3bc89ef62ce7 | 54 | // enable match interrupt |
| emilmont | 10:3bc89ef62ce7 | 55 | US_TICKER_TIMER->MCR |= 1; |
| emilmont | 10:3bc89ef62ce7 | 56 | } |
| emilmont | 10:3bc89ef62ce7 | 57 | |
| emilmont | 10:3bc89ef62ce7 | 58 | void us_ticker_disable_interrupt(void) { |
| emilmont | 10:3bc89ef62ce7 | 59 | US_TICKER_TIMER->MCR &= ~1; |
| emilmont | 10:3bc89ef62ce7 | 60 | } |
| emilmont | 10:3bc89ef62ce7 | 61 | |
| emilmont | 10:3bc89ef62ce7 | 62 | void us_ticker_clear_interrupt(void) { |
| emilmont | 10:3bc89ef62ce7 | 63 | US_TICKER_TIMER->IR = 1; |
| emilmont | 10:3bc89ef62ce7 | 64 | } |
