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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c@19:398f4c622e1b, 2013-08-19 (annotated)

Committer:
bogdanm
Date:
Mon Aug 19 18:17:02 2013 +0300
Revision:
19:398f4c622e1b
Parent:
17:151ab7482c89
Child:
72:248c61396e08
Sync with official mbed library release 66

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 17:151ab7482c89 1 /* mbed Microcontroller Library
emilmont 17:151ab7482c89 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 17:151ab7482c89 3 *
emilmont 17:151ab7482c89 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 17:151ab7482c89 5 * you may not use this file except in compliance with the License.
emilmont 17:151ab7482c89 6 * You may obtain a copy of the License at
emilmont 17:151ab7482c89 7 *
emilmont 17:151ab7482c89 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 17:151ab7482c89 9 *
emilmont 17:151ab7482c89 10 * Unless required by applicable law or agreed to in writing, software
emilmont 17:151ab7482c89 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 17:151ab7482c89 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 17:151ab7482c89 13 * See the License for the specific language governing permissions and
emilmont 17:151ab7482c89 14 * limitations under the License.
emilmont 17:151ab7482c89 15 */
emilmont 17:151ab7482c89 16 #include "analogin_api.h"
emilmont 17:151ab7482c89 17
emilmont 17:151ab7482c89 18 #include "cmsis.h"
emilmont 17:151ab7482c89 19 #include "pinmap.h"
emilmont 17:151ab7482c89 20 #include "error.h"
emilmont 17:151ab7482c89 21
emilmont 17:151ab7482c89 22 static const PinMap PinMap_ADC[] = {
emilmont 17:151ab7482c89 23 {PTE20, ADC0_SE0, 0},
emilmont 17:151ab7482c89 24 {PTE22, ADC0_SE3, 0},
emilmont 17:151ab7482c89 25 {PTE21, ADC0_SE4a, 0},
emilmont 17:151ab7482c89 26 {PTE29, ADC0_SE4b, 0},
emilmont 17:151ab7482c89 27 {PTE30, ADC0_SE23, 0},
emilmont 17:151ab7482c89 28 {PTE23, ADC0_SE7a, 0},
emilmont 17:151ab7482c89 29 {PTB0, ADC0_SE8, 0},
emilmont 17:151ab7482c89 30 {PTB1, ADC0_SE9, 0},
emilmont 17:151ab7482c89 31 {PTB2, ADC0_SE12, 0},
emilmont 17:151ab7482c89 32 {PTB3, ADC0_SE13, 0},
emilmont 17:151ab7482c89 33 {PTC0, ADC0_SE14, 0},
emilmont 17:151ab7482c89 34 {PTC1, ADC0_SE15, 0},
emilmont 17:151ab7482c89 35 {PTC2, ADC0_SE11, 0},
emilmont 17:151ab7482c89 36 {PTD1, ADC0_SE5b, 0},
emilmont 17:151ab7482c89 37 {PTD5, ADC0_SE6b, 0},
emilmont 17:151ab7482c89 38 {PTD6, ADC0_SE7b, 0},
emilmont 17:151ab7482c89 39 {NC, NC, 0}
emilmont 17:151ab7482c89 40 };
emilmont 17:151ab7482c89 41
emilmont 17:151ab7482c89 42 void analogin_init(analogin_t *obj, PinName pin) {
emilmont 17:151ab7482c89 43 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 19:398f4c622e1b 44 if (obj->adc == (ADCName)NC) {
emilmont 17:151ab7482c89 45 error("ADC pin mapping failed");
emilmont 17:151ab7482c89 46 }
emilmont 17:151ab7482c89 47
emilmont 17:151ab7482c89 48 SIM->SCGC6 |= SIM_SCGC6_ADC0_MASK;
emilmont 17:151ab7482c89 49
emilmont 17:151ab7482c89 50 uint32_t port = (uint32_t)pin >> PORT_SHIFT;
emilmont 17:151ab7482c89 51 SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
emilmont 17:151ab7482c89 52
emilmont 17:151ab7482c89 53 uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
emilmont 17:151ab7482c89 54 if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
emilmont 17:151ab7482c89 55 cfg2_muxsel = 0;
emilmont 17:151ab7482c89 56 }
emilmont 17:151ab7482c89 57
emilmont 17:151ab7482c89 58 ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
emilmont 17:151ab7482c89 59
emilmont 17:151ab7482c89 60 ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
emilmont 17:151ab7482c89 61 | ADC_CFG1_ADIV(3) // Clock Divide Select: (Input Clock)/8
emilmont 17:151ab7482c89 62 | ADC_CFG1_ADLSMP_MASK // Long Sample Time
emilmont 17:151ab7482c89 63 | ADC_CFG1_MODE(3) // (16)bits Resolution
emilmont 17:151ab7482c89 64 | ADC_CFG1_ADICLK(1); // Input Clock: (Bus Clock)/2
emilmont 17:151ab7482c89 65
emilmont 17:151ab7482c89 66 ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
emilmont 17:151ab7482c89 67 | ADC_CFG2_ADACKEN_MASK // Asynchronous Clock Output Enable
emilmont 17:151ab7482c89 68 | ADC_CFG2_ADHSC_MASK // High-Speed Configuration
emilmont 17:151ab7482c89 69 | ADC_CFG2_ADLSTS(0); // Long Sample Time Select
emilmont 17:151ab7482c89 70
emilmont 17:151ab7482c89 71 ADC0->SC2 = ADC_SC2_REFSEL(0); // Default Voltage Reference
emilmont 17:151ab7482c89 72
emilmont 17:151ab7482c89 73 ADC0->SC3 = ADC_SC3_AVGE_MASK // Hardware Average Enable
emilmont 17:151ab7482c89 74 | ADC_SC3_AVGS(0); // 4 Samples Averaged
emilmont 17:151ab7482c89 75
emilmont 17:151ab7482c89 76 pinmap_pinout(pin, PinMap_ADC);
emilmont 17:151ab7482c89 77 }
emilmont 17:151ab7482c89 78
emilmont 17:151ab7482c89 79 uint16_t analogin_read_u16(analogin_t *obj) {
emilmont 17:151ab7482c89 80 // start conversion
emilmont 17:151ab7482c89 81 ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
emilmont 17:151ab7482c89 82
emilmont 17:151ab7482c89 83 // Wait Conversion Complete
emilmont 17:151ab7482c89 84 while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
emilmont 17:151ab7482c89 85
emilmont 17:151ab7482c89 86 // Return value
emilmont 17:151ab7482c89 87 return (uint16_t)ADC0->R[0];
emilmont 17:151ab7482c89 88 }
emilmont 17:151ab7482c89 89
emilmont 17:151ab7482c89 90 float analogin_read(analogin_t *obj) {
emilmont 17:151ab7482c89 91 uint16_t value = analogin_read_u16(obj);
emilmont 17:151ab7482c89 92 return (float)value * (1.0f / (float)0xFFFF);
emilmont 17:151ab7482c89 93 }
emilmont 17:151ab7482c89 94