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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/gpio/fsl_gpio_features.h@149:1fb5f62b92bd, 2014-04-03 (annotated)

Committer:
mbed_official
Date:
Thu Apr 03 11:45:06 2014 +0100
Revision:
149:1fb5f62b92bd
Parent:
targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_KSDK_CODE/hal/gpio/fsl_gpio_features.h@146:f64d43ff0c18
Child:
324:406fd2029f23
Synchronized with git revision 220c0bb39ceee40016e1e86350c058963d01ed42



Full URL: https://github.com/mbedmicro/mbed/commit/220c0bb39ceee40016e1e86350c058963d01ed42/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30 #if !defined(__FSL_GPIO_FEATURES_H__)
mbed_official 146:f64d43ff0c18 31 #define __FSL_GPIO_FEATURES_H__
mbed_official 146:f64d43ff0c18 32
mbed_official 146:f64d43ff0c18 33 #if defined(CPU_MK20DX128VMP5) || defined(CPU_MK20DN128VMP5) || defined(CPU_MK20DX64VMP5) || defined(CPU_MK20DN64VMP5) || \
mbed_official 146:f64d43ff0c18 34 defined(CPU_MK20DX32VMP5) || defined(CPU_MK20DN32VMP5) || defined(CPU_MK20DX128VLH5) || defined(CPU_MK20DN128VLH5) || \
mbed_official 146:f64d43ff0c18 35 defined(CPU_MK20DX64VLH5) || defined(CPU_MK20DN64VLH5) || defined(CPU_MK20DX32VLH5) || defined(CPU_MK20DN32VLH5) || \
mbed_official 146:f64d43ff0c18 36 defined(CPU_MK20DX128VFM5) || defined(CPU_MK20DN128VFM5) || defined(CPU_MK20DX64VFM5) || defined(CPU_MK20DN64VFM5) || \
mbed_official 146:f64d43ff0c18 37 defined(CPU_MK20DX32VFM5) || defined(CPU_MK20DN32VFM5) || defined(CPU_MK20DX128VFT5) || defined(CPU_MK20DN128VFT5) || \
mbed_official 146:f64d43ff0c18 38 defined(CPU_MK20DX64VFT5) || defined(CPU_MK20DN64VFT5) || defined(CPU_MK20DX32VFT5) || defined(CPU_MK20DN32VFT5) || \
mbed_official 146:f64d43ff0c18 39 defined(CPU_MK20DX128VLF5) || defined(CPU_MK20DN128VLF5) || defined(CPU_MK20DX64VLF5) || defined(CPU_MK20DN64VLF5) || \
mbed_official 146:f64d43ff0c18 40 defined(CPU_MK20DX32VLF5) || defined(CPU_MK20DN32VLF5) || defined(CPU_MK22FN256VDC12) || defined(CPU_MK22FN256VLH12) || \
mbed_official 146:f64d43ff0c18 41 defined(CPU_MK22FN256VLL12) || defined(CPU_MK22FN256VMP12) || defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLH12) || \
mbed_official 146:f64d43ff0c18 42 defined(CPU_MK22FN512VLL12) || defined(CPU_MK24FN1M0VDC12) || defined(CPU_MK24FN1M0VLQ12) || defined(CPU_MK63FN1M0VLQ12) || \
mbed_official 146:f64d43ff0c18 43 defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK64FN1M0VDC12) || defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FN1M0VLQ12) || \
mbed_official 146:f64d43ff0c18 44 defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VMD12) || defined(CPU_MK64FX512VMD12) || defined(CPU_MK65FN2M0CAC18) || \
mbed_official 146:f64d43ff0c18 45 defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || defined(CPU_MK65FX1M0VMI18) || defined(CPU_MK66FN2M0VLQ18) || \
mbed_official 146:f64d43ff0c18 46 defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || defined(CPU_MK66FX1M0VMD18) || defined(CPU_MK70FN1M0VMF12) || \
mbed_official 146:f64d43ff0c18 47 defined(CPU_MK70FX512VMF12) || defined(CPU_MK70FN1M0VMF15) || defined(CPU_MK70FX512VMF15) || defined(CPU_MK70FN1M0VMJ12) || \
mbed_official 146:f64d43ff0c18 48 defined(CPU_MK70FX512VMJ12) || defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15) || defined(CPU_MKV31F256VLH12) || \
mbed_official 146:f64d43ff0c18 49 defined(CPU_MKV31F256VLL12) || defined(CPU_MKV31FN512VLH12) || defined(CPU_MKV31F512VLL12)
mbed_official 146:f64d43ff0c18 50 /* @brief Has fast (single cycle) access capability via a dedicated memory region.*/
mbed_official 146:f64d43ff0c18 51 #define FSL_FEATURE_GPIO_HAS_FAST_GPIO (0)
mbed_official 146:f64d43ff0c18 52 /* @brief Has port input disable register (PIDR).*/
mbed_official 146:f64d43ff0c18 53 #define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
mbed_official 146:f64d43ff0c18 54 /* @brief Has dedicated interrupt vector.*/
mbed_official 146:f64d43ff0c18 55 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR (1)
mbed_official 146:f64d43ff0c18 56 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTORn(x) \
mbed_official 146:f64d43ff0c18 57 ((x) == 0 ? (1) : \
mbed_official 146:f64d43ff0c18 58 ((x) == 1 ? (1) : \
mbed_official 146:f64d43ff0c18 59 ((x) == 2 ? (1) : \
mbed_official 146:f64d43ff0c18 60 ((x) == 3 ? (1) : \
mbed_official 146:f64d43ff0c18 61 ((x) == 4 ? (1) : \
mbed_official 146:f64d43ff0c18 62 ((x) == 5 ? (1) : (-1)))))))
mbed_official 146:f64d43ff0c18 63 #elif defined(CPU_MKL05Z8VFK4) || defined(CPU_MKL05Z16VFK4) || defined(CPU_MKL05Z32VFK4) || defined(CPU_MKL05Z8VLC4) || \
mbed_official 146:f64d43ff0c18 64 defined(CPU_MKL05Z16VLC4) || defined(CPU_MKL05Z32VLC4) || defined(CPU_MKL05Z8VFM4) || defined(CPU_MKL05Z16VFM4) || \
mbed_official 146:f64d43ff0c18 65 defined(CPU_MKL05Z32VFM4) || defined(CPU_MKL05Z16VLF4) || defined(CPU_MKL05Z32VLF4)
mbed_official 146:f64d43ff0c18 66 /* @brief Has fast (single cycle) access capability via a dedicated memory region.*/
mbed_official 146:f64d43ff0c18 67 #define FSL_FEATURE_GPIO_HAS_FAST_GPIO (1)
mbed_official 146:f64d43ff0c18 68 /* @brief Has port input disable register (PIDR).*/
mbed_official 146:f64d43ff0c18 69 #define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
mbed_official 146:f64d43ff0c18 70 /* @brief Has dedicated interrupt vector.*/
mbed_official 146:f64d43ff0c18 71 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR (1)
mbed_official 146:f64d43ff0c18 72 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTORn(x) \
mbed_official 146:f64d43ff0c18 73 ((x) == 0 ? (1) : \
mbed_official 146:f64d43ff0c18 74 ((x) == 1 ? (1) : (-1)))
mbed_official 146:f64d43ff0c18 75 #elif defined(CPU_MKL25Z32VFM4) || defined(CPU_MKL25Z64VFM4) || defined(CPU_MKL25Z128VFM4) || defined(CPU_MKL25Z32VFT4) || \
mbed_official 146:f64d43ff0c18 76 defined(CPU_MKL25Z64VFT4) || defined(CPU_MKL25Z128VFT4) || defined(CPU_MKL25Z32VLH4) || defined(CPU_MKL25Z64VLH4) || \
mbed_official 146:f64d43ff0c18 77 defined(CPU_MKL25Z128VLH4) || defined(CPU_MKL25Z32VLK4) || defined(CPU_MKL25Z64VLK4) || defined(CPU_MKL25Z128VLK4)
mbed_official 146:f64d43ff0c18 78 /* @brief Has fast (single cycle) access capability via a dedicated memory region.*/
mbed_official 146:f64d43ff0c18 79 #define FSL_FEATURE_GPIO_HAS_FAST_GPIO (1)
mbed_official 146:f64d43ff0c18 80 /* @brief Has port input disable register (PIDR).*/
mbed_official 146:f64d43ff0c18 81 #define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
mbed_official 146:f64d43ff0c18 82 /* @brief Has dedicated interrupt vector.*/
mbed_official 146:f64d43ff0c18 83 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR (1)
mbed_official 146:f64d43ff0c18 84 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTORn(x) \
mbed_official 146:f64d43ff0c18 85 ((x) == 0 ? (1) : \
mbed_official 146:f64d43ff0c18 86 ((x) == 1 ? (0) : \
mbed_official 146:f64d43ff0c18 87 ((x) == 2 ? (0) : \
mbed_official 146:f64d43ff0c18 88 ((x) == 3 ? (1) : \
mbed_official 146:f64d43ff0c18 89 ((x) == 4 ? (0) : (-1))))))
mbed_official 146:f64d43ff0c18 90 #elif defined(CPU_MKL46Z128VLH4) || defined(CPU_MKL46Z256VLH4) || defined(CPU_MKL46Z128VLL4) || defined(CPU_MKL46Z256VLL4) || \
mbed_official 146:f64d43ff0c18 91 defined(CPU_MKL46Z128VMC4) || defined(CPU_MKL46Z256VMC4)
mbed_official 146:f64d43ff0c18 92 /* @brief Has fast (single cycle) access capability via a dedicated memory region.*/
mbed_official 146:f64d43ff0c18 93 #define FSL_FEATURE_GPIO_HAS_FAST_GPIO (1)
mbed_official 146:f64d43ff0c18 94 /* @brief Has port input disable register (PIDR).*/
mbed_official 146:f64d43ff0c18 95 #define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
mbed_official 146:f64d43ff0c18 96 /* @brief Has dedicated interrupt vector.*/
mbed_official 146:f64d43ff0c18 97 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR (1)
mbed_official 146:f64d43ff0c18 98 #define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTORn(x) \
mbed_official 146:f64d43ff0c18 99 ((x) == 0 ? (1) : \
mbed_official 146:f64d43ff0c18 100 ((x) == 1 ? (0) : \
mbed_official 146:f64d43ff0c18 101 ((x) == 2 ? (1) : \
mbed_official 146:f64d43ff0c18 102 ((x) == 3 ? (1) : \
mbed_official 146:f64d43ff0c18 103 ((x) == 4 ? (0) : (-1))))))
mbed_official 146:f64d43ff0c18 104 #else
mbed_official 146:f64d43ff0c18 105 #error "No valid CPU defined!"
mbed_official 146:f64d43ff0c18 106 #endif
mbed_official 146:f64d43ff0c18 107
mbed_official 146:f64d43ff0c18 108 #endif /* __FSL_GPIO_FEATURES_H__*/
mbed_official 146:f64d43ff0c18 109 /*******************************************************************************
mbed_official 146:f64d43ff0c18 110 * EOF
mbed_official 146:f64d43ff0c18 111 ******************************************************************************/
mbed_official 146:f64d43ff0c18 112