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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Thu Apr 03 11:45:06 2014 +0100
Revision:
149:1fb5f62b92bd
Parent:
targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_KSDK_CODE/hal/edma/fsl_edma_hal.h@146:f64d43ff0c18
Child:
324:406fd2029f23
Synchronized with git revision 220c0bb39ceee40016e1e86350c058963d01ed42

Full URL: https://github.com/mbedmicro/mbed/commit/220c0bb39ceee40016e1e86350c058963d01ed42/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30 #ifndef __EDMA_HAL_H__
mbed_official 146:f64d43ff0c18 31 #define __EDMA_HAL_H__
mbed_official 146:f64d43ff0c18 32
mbed_official 146:f64d43ff0c18 33 #include <stdint.h>
mbed_official 146:f64d43ff0c18 34 #include <stdbool.h>
mbed_official 146:f64d43ff0c18 35 #include <assert.h>
mbed_official 146:f64d43ff0c18 36 #include "fsl_edma_features.h"
mbed_official 146:f64d43ff0c18 37 #include "fsl_device_registers.h"
mbed_official 146:f64d43ff0c18 38
mbed_official 146:f64d43ff0c18 39 /*!
mbed_official 146:f64d43ff0c18 40 * @addtogroup edma_hal
mbed_official 146:f64d43ff0c18 41 * @{
mbed_official 146:f64d43ff0c18 42 */
mbed_official 146:f64d43ff0c18 43
mbed_official 146:f64d43ff0c18 44 /*******************************************************************************
mbed_official 146:f64d43ff0c18 45 * Definitions
mbed_official 146:f64d43ff0c18 46 ******************************************************************************/
mbed_official 146:f64d43ff0c18 47 /*! @brief eDMA status */
mbed_official 146:f64d43ff0c18 48 typedef enum _edma_status
mbed_official 146:f64d43ff0c18 49 {
mbed_official 146:f64d43ff0c18 50 kStatus_EDMA_Success = 0U,
mbed_official 146:f64d43ff0c18 51 kStatus_EDMA_InvalidArgument = 1U, /*!< Parameter is not available for the current configuration.*/
mbed_official 146:f64d43ff0c18 52 kStatus_EDMA_Fail = 2U /*!< Function operation failed.*/
mbed_official 146:f64d43ff0c18 53 } edma_status_t;
mbed_official 146:f64d43ff0c18 54
mbed_official 146:f64d43ff0c18 55 /*! @brief eDMA TCD control configuration */
mbed_official 146:f64d43ff0c18 56 typedef union EdmaTCDControl {
mbed_official 146:f64d43ff0c18 57 struct {
mbed_official 146:f64d43ff0c18 58 uint16_t reserve1 : 1;
mbed_official 146:f64d43ff0c18 59 uint16_t majorInterrupt : 1; /*!< Interrupt after the major loop is complete. */
mbed_official 146:f64d43ff0c18 60 uint16_t halfInterrupt : 1; /*!< Interrupt after half of the major loop is complete. */
mbed_official 146:f64d43ff0c18 61 uint16_t disabledDmaRequest : 1; /*!< Disabled DMA request after the major loop is complete. */
mbed_official 146:f64d43ff0c18 62 uint16_t enabledScatterGather : 1; /*!< Enable scatter/gather processing. */
mbed_official 146:f64d43ff0c18 63 uint16_t enableMajorLink : 1; /*!< Enabled major link after the major loop is complete. */
mbed_official 146:f64d43ff0c18 64 uint16_t reserve2 : 1;
mbed_official 146:f64d43ff0c18 65 uint16_t reserve3 : 1;
mbed_official 146:f64d43ff0c18 66 uint16_t majorLinkChannel : 4; /*!< Major link channel number*/
mbed_official 146:f64d43ff0c18 67 uint16_t reserve4 : 2;
mbed_official 146:f64d43ff0c18 68 uint16_t bandwidthControl : 2; /*!< Bandwidth control configuration */
mbed_official 146:f64d43ff0c18 69 } U;
mbed_official 146:f64d43ff0c18 70 uint16_t B;
mbed_official 146:f64d43ff0c18 71 } edma_tcd_control_t;
mbed_official 146:f64d43ff0c18 72
mbed_official 146:f64d43ff0c18 73 /*! @brief eDMA TCD Minor loop mapping configuration */
mbed_official 146:f64d43ff0c18 74 typedef struct EdmaMinorLoopOffset {
mbed_official 146:f64d43ff0c18 75 bool isEnableSourceMinorloop;
mbed_official 146:f64d43ff0c18 76 bool isEnableDestMinorloop;
mbed_official 146:f64d43ff0c18 77 uint32_t offset;
mbed_official 146:f64d43ff0c18 78 } edma_minorloop_offset_config_t;
mbed_official 146:f64d43ff0c18 79
mbed_official 146:f64d43ff0c18 80 /*! @brief Priority limitation of the eDMA channel */
mbed_official 146:f64d43ff0c18 81 typedef enum _edma_channel_priority {
mbed_official 146:f64d43ff0c18 82 kEdmaChannelPriority = 16
mbed_official 146:f64d43ff0c18 83 } edma_channel_priority_t;
mbed_official 146:f64d43ff0c18 84
mbed_official 146:f64d43ff0c18 85 /*! @brief eDMA modulo configuration */
mbed_official 146:f64d43ff0c18 86 typedef enum _edma_modulo {
mbed_official 146:f64d43ff0c18 87 kEdmaModuloDisable = 0x0U,
mbed_official 146:f64d43ff0c18 88 kEdmaModulo2bytes = 0x1U,
mbed_official 146:f64d43ff0c18 89 kEdmaModulo4bytes = 0x2U,
mbed_official 146:f64d43ff0c18 90 kEdmaModulo8bytes = 0x3U,
mbed_official 146:f64d43ff0c18 91 kEdmaModulo16bytes = 0x4U,
mbed_official 146:f64d43ff0c18 92 kEdmaModulo32bytes = 0x5U,
mbed_official 146:f64d43ff0c18 93 kEdmaModulo64bytes = 0x6U,
mbed_official 146:f64d43ff0c18 94 kEdmaModulo128bytes = 0x7U,
mbed_official 146:f64d43ff0c18 95 kEdmaModulo256bytes = 0x8U,
mbed_official 146:f64d43ff0c18 96 kEdmaModulo512bytes = 0x9U,
mbed_official 146:f64d43ff0c18 97 kEdmaModulo1Kbytes = 0xaU,
mbed_official 146:f64d43ff0c18 98 kEdmaModulo2Kbytes = 0xbU,
mbed_official 146:f64d43ff0c18 99 kEdmaModulo4Kbytes = 0xcU,
mbed_official 146:f64d43ff0c18 100 kEdmaModulo8Kbytes = 0xdU,
mbed_official 146:f64d43ff0c18 101 kEdmaModulo16Kbytes = 0xeU,
mbed_official 146:f64d43ff0c18 102 kEdmaModulo32Kbytes = 0xfU,
mbed_official 146:f64d43ff0c18 103 kEdmaModulo64Kbytes = 0x10U,
mbed_official 146:f64d43ff0c18 104 kEdmaModulo128Kbytes = 0x11U,
mbed_official 146:f64d43ff0c18 105 kEdmaModulo256Kbytes = 0x12U,
mbed_official 146:f64d43ff0c18 106 kEdmaModulo512Kbytes = 0x13U,
mbed_official 146:f64d43ff0c18 107 kEdmaModulo1Mbytes = 0x14U,
mbed_official 146:f64d43ff0c18 108 kEdmaModulo2Mbytes = 0x15U,
mbed_official 146:f64d43ff0c18 109 kEdmaModulo4Mbytes = 0x16U,
mbed_official 146:f64d43ff0c18 110 kEdmaModulo8Mbytes = 0x17U,
mbed_official 146:f64d43ff0c18 111 kEdmaModulo16Mbytes = 0x18U,
mbed_official 146:f64d43ff0c18 112 kEdmaModulo32Mbytes = 0x19U,
mbed_official 146:f64d43ff0c18 113 kEdmaModulo64Mbytes = 0x1aU,
mbed_official 146:f64d43ff0c18 114 kEdmaModulo128Mbytes = 0x1bU,
mbed_official 146:f64d43ff0c18 115 kEdmaModulo256Mbytes = 0x1cU,
mbed_official 146:f64d43ff0c18 116 kEdmaModulo512Mbytes = 0x1dU,
mbed_official 146:f64d43ff0c18 117 kEdmaModulo1Gbytes = 0x1eU,
mbed_official 146:f64d43ff0c18 118 kEdmaModulo2Gbytes = 0x1fU
mbed_official 146:f64d43ff0c18 119 } edma_modulo_t;
mbed_official 146:f64d43ff0c18 120
mbed_official 146:f64d43ff0c18 121 /*! @brief eDMA transfer size configuration */
mbed_official 146:f64d43ff0c18 122 typedef enum _edma_transfer_size {
mbed_official 146:f64d43ff0c18 123 kEdmaTransferSize1bytes = 0x0U,
mbed_official 146:f64d43ff0c18 124 kEdmaTransferSize2bytes = 0x1U,
mbed_official 146:f64d43ff0c18 125 kEdmaTransferSize4bytes = 0x2U,
mbed_official 146:f64d43ff0c18 126 kEdmaTransferSize16bytes = 0x4U,
mbed_official 146:f64d43ff0c18 127 kEdmaTransferSize32bytes = 0x5U
mbed_official 146:f64d43ff0c18 128 } edma_transfer_size_t;
mbed_official 146:f64d43ff0c18 129
mbed_official 146:f64d43ff0c18 130 /*! @brief Error status of the eDMA module */
mbed_official 146:f64d43ff0c18 131 typedef union EdmaErrorStatusAll {
mbed_official 146:f64d43ff0c18 132 struct {
mbed_official 146:f64d43ff0c18 133 uint32_t destinationBusError : 1; /*!< Bus error on destination address */
mbed_official 146:f64d43ff0c18 134 uint32_t sourceBusError : 1; /*!< Bus error on the SRC address */
mbed_official 146:f64d43ff0c18 135 uint32_t scatterOrGatherConfigurationError : 1; /*!< Error on the Scatter/Gather address */
mbed_official 146:f64d43ff0c18 136 uint32_t nbyteOrCiterConfigurationError : 1; /*!< NBYTES/CITER configuration error */
mbed_official 146:f64d43ff0c18 137 uint32_t destinationOffsetError : 1; /*!< Destination offset error */
mbed_official 146:f64d43ff0c18 138 uint32_t destinationAddressError : 1; /*!< Destination address error */
mbed_official 146:f64d43ff0c18 139 uint32_t sourceOffsetError : 1; /*!< Source offset error */
mbed_official 146:f64d43ff0c18 140 uint32_t sourceAddressError : 1; /*!< Source address error */
mbed_official 146:f64d43ff0c18 141 uint32_t errorChannel : 5; /*!< Error channel number of the cancelled
mbed_official 146:f64d43ff0c18 142 channel number */
mbed_official 146:f64d43ff0c18 143 uint32_t _reserved1 : 1;
mbed_official 146:f64d43ff0c18 144 uint32_t channelPriorityError : 1; /*!< Channel priority error */
mbed_official 146:f64d43ff0c18 145 uint32_t groupPriorityError : 1; /*!< Group priority error */
mbed_official 146:f64d43ff0c18 146 uint32_t transferCancelledError : 1; /*!< Transfer cancelled */
mbed_official 146:f64d43ff0c18 147 uint32_t _reserved0 : 14;
mbed_official 146:f64d43ff0c18 148 uint32_t orOfAllError : 1; /*!< Logical OR all ERR status bits */
mbed_official 146:f64d43ff0c18 149 } U;
mbed_official 146:f64d43ff0c18 150 uint32_t B;
mbed_official 146:f64d43ff0c18 151 } edma_error_status_all_t;
mbed_official 146:f64d43ff0c18 152
mbed_official 146:f64d43ff0c18 153 /*! @brief Bandwidth control configuration */
mbed_official 146:f64d43ff0c18 154 typedef enum _edma_bandwidth_configuration {
mbed_official 146:f64d43ff0c18 155 kEdmaBandwidthStallNone = 0, /*!< No eDMA engine stalls. */
mbed_official 146:f64d43ff0c18 156 kEdmaBandwidthStall4Cycle = 2, /*!< eDMA engine stalls for 4 cycles after each read/write. */
mbed_official 146:f64d43ff0c18 157 kEdmaBandwidthStall8Cycle = 3 /*!< eDMA engine stalls for 4 cycles after each read/write. */
mbed_official 146:f64d43ff0c18 158 } edma_bandwidth_configuration_t;
mbed_official 146:f64d43ff0c18 159
mbed_official 146:f64d43ff0c18 160 /*! @brief eDMA TCD */
mbed_official 146:f64d43ff0c18 161 typedef struct EdmaSoftwareTcd {
mbed_official 146:f64d43ff0c18 162 uint32_t SADDR;
mbed_official 146:f64d43ff0c18 163 uint16_t SOFF;
mbed_official 146:f64d43ff0c18 164 uint16_t ATTR;
mbed_official 146:f64d43ff0c18 165 union {
mbed_official 146:f64d43ff0c18 166 uint32_t NBYTES_MLNO;
mbed_official 146:f64d43ff0c18 167 uint32_t NBYTES_MLOFFNO;
mbed_official 146:f64d43ff0c18 168 uint32_t NBYTES_MLOFFYES;
mbed_official 146:f64d43ff0c18 169 };
mbed_official 146:f64d43ff0c18 170 uint32_t SLAST;
mbed_official 146:f64d43ff0c18 171 uint32_t DADDR;
mbed_official 146:f64d43ff0c18 172 uint16_t DOFF;
mbed_official 146:f64d43ff0c18 173 union {
mbed_official 146:f64d43ff0c18 174 uint16_t CITER_ELINKNO;
mbed_official 146:f64d43ff0c18 175 uint16_t CITER_ELINKYES;
mbed_official 146:f64d43ff0c18 176 };
mbed_official 146:f64d43ff0c18 177 uint32_t DLAST_SGA;
mbed_official 146:f64d43ff0c18 178 uint16_t CSR;
mbed_official 146:f64d43ff0c18 179 union {
mbed_official 146:f64d43ff0c18 180 uint16_t BITER_ELINKNO;
mbed_official 146:f64d43ff0c18 181 uint16_t BITER_ELINKYES;
mbed_official 146:f64d43ff0c18 182 };
mbed_official 146:f64d43ff0c18 183 } edma_software_tcd_t;
mbed_official 146:f64d43ff0c18 184
mbed_official 146:f64d43ff0c18 185 /*! @brief eDMA group priority */
mbed_official 146:f64d43ff0c18 186 typedef enum _edma_group_priority {
mbed_official 146:f64d43ff0c18 187 kEdmaGroup0Priority0Group1Priority1,
mbed_official 146:f64d43ff0c18 188 kEdmaGroup0Priority1Group1Priority0
mbed_official 146:f64d43ff0c18 189 } edma_group_priority_t;
mbed_official 146:f64d43ff0c18 190
mbed_official 146:f64d43ff0c18 191 /*! @brief DMA configuration structure */
mbed_official 146:f64d43ff0c18 192 typedef struct EdmaConfiguration {
mbed_official 146:f64d43ff0c18 193 bool isEnableMinorLoopping; /*!< Enabled the minor loop mapping. */
mbed_official 146:f64d43ff0c18 194 bool isEnableContinuousMode; /*!< Enabled the continuous mode. */
mbed_official 146:f64d43ff0c18 195 bool isHaltOnError; /*!< Halt if error happens. */
mbed_official 146:f64d43ff0c18 196 bool isEnableRoundrobinArbitration; /*!< Enabled round robin or fixed priority arbitration. */
mbed_official 146:f64d43ff0c18 197 bool isEnableDebug; /*!< Enabled Debug mode. */
mbed_official 146:f64d43ff0c18 198 #if (FSL_FEATURE_DMA_CHANNEL_GROUP_COUNT > 0x1U)
mbed_official 146:f64d43ff0c18 199 edma_group_priority_t groupPriority;
mbed_official 146:f64d43ff0c18 200 bool isEnableGroupRoundrobinArbitration;
mbed_official 146:f64d43ff0c18 201 #endif
mbed_official 146:f64d43ff0c18 202 } edma_config_t;
mbed_official 146:f64d43ff0c18 203
mbed_official 146:f64d43ff0c18 204 /*******************************************************************************
mbed_official 146:f64d43ff0c18 205 * API
mbed_official 146:f64d43ff0c18 206 ******************************************************************************/
mbed_official 146:f64d43ff0c18 207
mbed_official 146:f64d43ff0c18 208 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 209 extern "C" {
mbed_official 146:f64d43ff0c18 210 #endif
mbed_official 146:f64d43ff0c18 211
mbed_official 146:f64d43ff0c18 212 /*!
mbed_official 146:f64d43ff0c18 213 * @name EDMA HAL common configuration
mbed_official 146:f64d43ff0c18 214 * @{
mbed_official 146:f64d43ff0c18 215 */
mbed_official 146:f64d43ff0c18 216
mbed_official 146:f64d43ff0c18 217 /*!
mbed_official 146:f64d43ff0c18 218 * @brief Initializes the eDMA module.
mbed_official 146:f64d43ff0c18 219 *
mbed_official 146:f64d43ff0c18 220 * The function configures the eDMA module with the corresponding global configuration. The
mbed_official 146:f64d43ff0c18 221 * configuration is for all channels in this module.
mbed_official 146:f64d43ff0c18 222 *
mbed_official 146:f64d43ff0c18 223 * @param module eDMA module
mbed_official 146:f64d43ff0c18 224 * @param init Init data structure
mbed_official 146:f64d43ff0c18 225 */
mbed_official 146:f64d43ff0c18 226 void edma_hal_init(uint32_t instance, const edma_config_t *init);
mbed_official 146:f64d43ff0c18 227
mbed_official 146:f64d43ff0c18 228 /*!
mbed_official 146:f64d43ff0c18 229 * @brief Cancels the remaining data transfer. Stops the executing channel and forces the minor loop
mbed_official 146:f64d43ff0c18 230 * to finish. The cancellation takes effect after the last write of the current read/write sequence.
mbed_official 146:f64d43ff0c18 231 * The CX clears itself after the cancel has been honored. This cancel retires the channel
mbed_official 146:f64d43ff0c18 232 * normally as if the minor loop had completed.
mbed_official 146:f64d43ff0c18 233 *
mbed_official 146:f64d43ff0c18 234 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 235 */
mbed_official 146:f64d43ff0c18 236 static inline void edma_hal_cancel_transfer(uint32_t instance)
mbed_official 146:f64d43ff0c18 237 {
mbed_official 146:f64d43ff0c18 238 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 239 BW_DMA_CR_CX(instance, 1U);
mbed_official 146:f64d43ff0c18 240 while (BR_DMA_CR_CX(instance))
mbed_official 146:f64d43ff0c18 241 {}
mbed_official 146:f64d43ff0c18 242 }
mbed_official 146:f64d43ff0c18 243
mbed_official 146:f64d43ff0c18 244 /*!
mbed_official 146:f64d43ff0c18 245 * @brief Cancels the remaining data transfer. Stops the executing channel and forces the minor loop to
mbed_official 146:f64d43ff0c18 246 * finish. The cancellation takes effect after the last write of the current read/write sequence. The
mbed_official 146:f64d43ff0c18 247 * ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX
mbed_official 146:f64d43ff0c18 248 * treats the cancel as an error condition.
mbed_official 146:f64d43ff0c18 249 *
mbed_official 146:f64d43ff0c18 250 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 251 */
mbed_official 146:f64d43ff0c18 252 static inline void edma_hal_error_cancel_transfer(uint32_t instance)
mbed_official 146:f64d43ff0c18 253 {
mbed_official 146:f64d43ff0c18 254 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 255 BW_DMA_CR_ECX(instance, 1U);
mbed_official 146:f64d43ff0c18 256 while(BR_DMA_CR_ECX(instance))
mbed_official 146:f64d43ff0c18 257 {}
mbed_official 146:f64d43ff0c18 258 }
mbed_official 146:f64d43ff0c18 259
mbed_official 146:f64d43ff0c18 260 /*!
mbed_official 146:f64d43ff0c18 261 * @brief Enables/Disables the minor loop mapping.
mbed_official 146:f64d43ff0c18 262 *
mbed_official 146:f64d43ff0c18 263 * If enabled, the NBYTES is redefined to include individual enable fields. And the NBYTES field. The
mbed_official 146:f64d43ff0c18 264 * individual enable fields allow the minor loop offset to be applied to the source address, the
mbed_official 146:f64d43ff0c18 265 * destination address, or both. The NBYTES field is reduced when either offset is enabled.
mbed_official 146:f64d43ff0c18 266 *
mbed_official 146:f64d43ff0c18 267 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 268 * @param isEnabled Enable or disable.
mbed_official 146:f64d43ff0c18 269 */
mbed_official 146:f64d43ff0c18 270 static inline void edma_hal_set_minor_loop_mapping(uint32_t instance, bool isEnabled)
mbed_official 146:f64d43ff0c18 271 {
mbed_official 146:f64d43ff0c18 272 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 273 BW_DMA_CR_EMLM(instance, isEnabled);
mbed_official 146:f64d43ff0c18 274 }
mbed_official 146:f64d43ff0c18 275
mbed_official 146:f64d43ff0c18 276
mbed_official 146:f64d43ff0c18 277 #if (FSL_FEATURE_DMA_CHANNEL_GROUP_COUNT > 0x1U)
mbed_official 146:f64d43ff0c18 278 /*!
mbed_official 146:f64d43ff0c18 279 * @brief Configures the group priority.
mbed_official 146:f64d43ff0c18 280 *
mbed_official 146:f64d43ff0c18 281 * @param module eDMA module
mbed_official 146:f64d43ff0c18 282 * @param isContinuous Whether the minor loop finish triggers itself.
mbed_official 146:f64d43ff0c18 283 */
mbed_official 146:f64d43ff0c18 284 static inline void edma_hal_set_group_priority(uint32_t instance, edma_group_priority_t groupPriority)
mbed_official 146:f64d43ff0c18 285 {
mbed_official 146:f64d43ff0c18 286 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 287
mbed_official 146:f64d43ff0c18 288 if (groupPriority == kEdmaGroup0Priority0Group1Priority1)
mbed_official 146:f64d43ff0c18 289 {
mbed_official 146:f64d43ff0c18 290 BW_DMA_CR_GRP0PRI(instance, 0U);
mbed_official 146:f64d43ff0c18 291 BW_DMA_CR_GRP1PRI(instance, 1U);
mbed_official 146:f64d43ff0c18 292 }
mbed_official 146:f64d43ff0c18 293 else
mbed_official 146:f64d43ff0c18 294 {
mbed_official 146:f64d43ff0c18 295 BW_DMA_CR_GRP0PRI(instance, 1U);
mbed_official 146:f64d43ff0c18 296 BW_DMA_CR_GRP1PRI(instance, 0U);
mbed_official 146:f64d43ff0c18 297
mbed_official 146:f64d43ff0c18 298 }
mbed_official 146:f64d43ff0c18 299 }
mbed_official 146:f64d43ff0c18 300
mbed_official 146:f64d43ff0c18 301 /*!
mbed_official 146:f64d43ff0c18 302 * @brief The fixed priority arbitration is used for the group selection.
mbed_official 146:f64d43ff0c18 303 *
mbed_official 146:f64d43ff0c18 304 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 305 */
mbed_official 146:f64d43ff0c18 306 static inline void edma_hal_set_fixed_priority_group_arbitration(uint32_t instance)
mbed_official 146:f64d43ff0c18 307 {
mbed_official 146:f64d43ff0c18 308 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 309 BW_DMA_CR_ERGA(instance, 0U);
mbed_official 146:f64d43ff0c18 310 }
mbed_official 146:f64d43ff0c18 311
mbed_official 146:f64d43ff0c18 312 /*!
mbed_official 146:f64d43ff0c18 313 * @brief The round robin arbitration is used for the group selection.
mbed_official 146:f64d43ff0c18 314 *
mbed_official 146:f64d43ff0c18 315 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 316 */
mbed_official 146:f64d43ff0c18 317 static inline void edma_hal_set_roundrobin_group_arbitration(uint32_t instance)
mbed_official 146:f64d43ff0c18 318 {
mbed_official 146:f64d43ff0c18 319 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 320 BW_DMA_CR_ERGA(instance, 1U);
mbed_official 146:f64d43ff0c18 321 }
mbed_official 146:f64d43ff0c18 322
mbed_official 146:f64d43ff0c18 323 #endif
mbed_official 146:f64d43ff0c18 324
mbed_official 146:f64d43ff0c18 325 /*!
mbed_official 146:f64d43ff0c18 326 * @brief Configures the continuous mode. If set, a minor loop channel link does not
mbed_official 146:f64d43ff0c18 327 * go through the channel arbitration before being activated again. Upon minor loop completion, the
mbed_official 146:f64d43ff0c18 328 * channel activates again if that channel has a minor loop channel link enabled and the link
mbed_official 146:f64d43ff0c18 329 * channel is itself.
mbed_official 146:f64d43ff0c18 330 *
mbed_official 146:f64d43ff0c18 331 * @param module eDMA module
mbed_official 146:f64d43ff0c18 332 * @param isContinuous Whether the minor loop finish triggers itself.
mbed_official 146:f64d43ff0c18 333 */
mbed_official 146:f64d43ff0c18 334 static inline void edma_hal_set_continuous_mode(uint32_t instance, bool isContinuous)
mbed_official 146:f64d43ff0c18 335 {
mbed_official 146:f64d43ff0c18 336 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 337 BW_DMA_CR_CLM(instance, isContinuous);
mbed_official 146:f64d43ff0c18 338 }
mbed_official 146:f64d43ff0c18 339
mbed_official 146:f64d43ff0c18 340 /*!
mbed_official 146:f64d43ff0c18 341 * @brief Halts the DMA Operations.
mbed_official 146:f64d43ff0c18 342 *
mbed_official 146:f64d43ff0c18 343 * Stalls the start of any new channels. Executing channels are allowed to complete.
mbed_official 146:f64d43ff0c18 344 *
mbed_official 146:f64d43ff0c18 345 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 346 */
mbed_official 146:f64d43ff0c18 347 static inline void edma_hal_halt(uint32_t instance)
mbed_official 146:f64d43ff0c18 348 {
mbed_official 146:f64d43ff0c18 349 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 350 BW_DMA_CR_HALT(instance, 1U);
mbed_official 146:f64d43ff0c18 351 }
mbed_official 146:f64d43ff0c18 352
mbed_official 146:f64d43ff0c18 353 /*!
mbed_official 146:f64d43ff0c18 354 * @brief Clears the halt bit.
mbed_official 146:f64d43ff0c18 355 *
mbed_official 146:f64d43ff0c18 356 * If a previous eDMA channel is halted, clear operation would resume it back to executing.
mbed_official 146:f64d43ff0c18 357 *
mbed_official 146:f64d43ff0c18 358 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 359 */
mbed_official 146:f64d43ff0c18 360 static inline void edma_hal_clear_halt(uint32_t instance)
mbed_official 146:f64d43ff0c18 361 {
mbed_official 146:f64d43ff0c18 362 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 363 BW_DMA_CR_HALT(instance, 0U);
mbed_official 146:f64d43ff0c18 364 }
mbed_official 146:f64d43ff0c18 365
mbed_official 146:f64d43ff0c18 366 /*!
mbed_official 146:f64d43ff0c18 367 * @brief Halts the eDMA module when an error occurs.
mbed_official 146:f64d43ff0c18 368 *
mbed_official 146:f64d43ff0c18 369 * An error causes the HALT bit to be set. Subsequently, all service requests are ignored until the
mbed_official 146:f64d43ff0c18 370 * HALT bit is cleared.
mbed_official 146:f64d43ff0c18 371 *
mbed_official 146:f64d43ff0c18 372 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 373 * @param isHaltOnError halts or does not halt when an error occurs.
mbed_official 146:f64d43ff0c18 374 */
mbed_official 146:f64d43ff0c18 375 static inline void edma_hal_set_halt_on_error(uint32_t instance, bool isHaltOnError)
mbed_official 146:f64d43ff0c18 376 {
mbed_official 146:f64d43ff0c18 377 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 378 BW_DMA_CR_HOE(instance, isHaltOnError);
mbed_official 146:f64d43ff0c18 379 }
mbed_official 146:f64d43ff0c18 380
mbed_official 146:f64d43ff0c18 381 /*!
mbed_official 146:f64d43ff0c18 382 * @brief The fixed priority arbitration is used for the channel selection.
mbed_official 146:f64d43ff0c18 383 *
mbed_official 146:f64d43ff0c18 384 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 385 */
mbed_official 146:f64d43ff0c18 386 static inline void edma_hal_set_fixed_priority_channel_arbitration(uint32_t instance)
mbed_official 146:f64d43ff0c18 387 {
mbed_official 146:f64d43ff0c18 388 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 389 BW_DMA_CR_ERCA(instance, 0U);
mbed_official 146:f64d43ff0c18 390 }
mbed_official 146:f64d43ff0c18 391
mbed_official 146:f64d43ff0c18 392 /*!
mbed_official 146:f64d43ff0c18 393 * @brief The round robin arbitration is used for the channel selection.
mbed_official 146:f64d43ff0c18 394 *
mbed_official 146:f64d43ff0c18 395 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 396 */
mbed_official 146:f64d43ff0c18 397 static inline void edma_hal_set_roundrobin_channel_arbitration(uint32_t instance)
mbed_official 146:f64d43ff0c18 398 {
mbed_official 146:f64d43ff0c18 399 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 400 BW_DMA_CR_ERCA(instance, 1U);
mbed_official 146:f64d43ff0c18 401 }
mbed_official 146:f64d43ff0c18 402
mbed_official 146:f64d43ff0c18 403 /*!
mbed_official 146:f64d43ff0c18 404 * @brief Enables/Disables the eDMA DEBUG mode.
mbed_official 146:f64d43ff0c18 405 *
mbed_official 146:f64d43ff0c18 406 * When in debug mode, the DMA stalls the start of a new
mbed_official 146:f64d43ff0c18 407 * channel. Executing channels are allowed to complete. Channel execution resumes
mbed_official 146:f64d43ff0c18 408 * either when the system exits debug mode or when the EDBG bit is cleared.
mbed_official 146:f64d43ff0c18 409 *
mbed_official 146:f64d43ff0c18 410 * @param instance eDMA module.
mbed_official 146:f64d43ff0c18 411 */
mbed_official 146:f64d43ff0c18 412 static inline void edma_hal_set_debug_mode(uint32_t instance, bool isEnabled)
mbed_official 146:f64d43ff0c18 413 {
mbed_official 146:f64d43ff0c18 414 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 415 BW_DMA_CR_EDBG(instance, isEnabled);
mbed_official 146:f64d43ff0c18 416 }
mbed_official 146:f64d43ff0c18 417
mbed_official 146:f64d43ff0c18 418 /*!
mbed_official 146:f64d43ff0c18 419 * @brief Gets the error status of the eDMA module. The detailed reason is listed along with the error
mbed_official 146:f64d43ff0c18 420 * channel.
mbed_official 146:f64d43ff0c18 421 *
mbed_official 146:f64d43ff0c18 422 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 423 * @return Detailed information of the error type in the eDMA module.
mbed_official 146:f64d43ff0c18 424 */
mbed_official 146:f64d43ff0c18 425 static inline uint32_t edma_hal_get_error_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 426 {
mbed_official 146:f64d43ff0c18 427 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 428 return HW_DMA_ES_RD(instance);
mbed_official 146:f64d43ff0c18 429 }
mbed_official 146:f64d43ff0c18 430
mbed_official 146:f64d43ff0c18 431 /*!
mbed_official 146:f64d43ff0c18 432 * @brief Disables the interrupt when an error happens on any of channel in the eDMA module.
mbed_official 146:f64d43ff0c18 433 *
mbed_official 146:f64d43ff0c18 434 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 435 */
mbed_official 146:f64d43ff0c18 436 static inline void edma_hal_disable_all_enabled_error_interrupt(uint32_t instance)
mbed_official 146:f64d43ff0c18 437 {
mbed_official 146:f64d43ff0c18 438 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 439 BW_DMA_CEEI_CAEE(instance, 1U);
mbed_official 146:f64d43ff0c18 440 }
mbed_official 146:f64d43ff0c18 441
mbed_official 146:f64d43ff0c18 442 /*!
mbed_official 146:f64d43ff0c18 443 * @brief Enables an interrupt when an error happens on any channel in the eDMA module.
mbed_official 146:f64d43ff0c18 444 *
mbed_official 146:f64d43ff0c18 445 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 446 */
mbed_official 146:f64d43ff0c18 447 static inline void edma_hal_enable_all_channel_error_interrupt(uint32_t instance)
mbed_official 146:f64d43ff0c18 448 {
mbed_official 146:f64d43ff0c18 449 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 450
mbed_official 146:f64d43ff0c18 451 BW_DMA_SEEI_SAEE(instance, 1U);
mbed_official 146:f64d43ff0c18 452 }
mbed_official 146:f64d43ff0c18 453
mbed_official 146:f64d43ff0c18 454 /*!
mbed_official 146:f64d43ff0c18 455 * @brief Disables the DMA request for all eDMA channels.
mbed_official 146:f64d43ff0c18 456 *
mbed_official 146:f64d43ff0c18 457 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 458 */
mbed_official 146:f64d43ff0c18 459 static inline void edma_hal_disable_all_channel_dma_request(uint32_t instance)
mbed_official 146:f64d43ff0c18 460 {
mbed_official 146:f64d43ff0c18 461 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 462 HW_DMA_CERQ_WR(instance, DMA_CERQ_CAER_MASK);
mbed_official 146:f64d43ff0c18 463 }
mbed_official 146:f64d43ff0c18 464
mbed_official 146:f64d43ff0c18 465 /*!
mbed_official 146:f64d43ff0c18 466 * @brief Enables the DMA request for all eDMA channels.
mbed_official 146:f64d43ff0c18 467 *
mbed_official 146:f64d43ff0c18 468 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 469 */
mbed_official 146:f64d43ff0c18 470 static inline void edma_hal_enable_all_channel_dma_request(uint32_t instance)
mbed_official 146:f64d43ff0c18 471 {
mbed_official 146:f64d43ff0c18 472 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 473 HW_DMA_SERQ_WR(instance, DMA_SERQ_SAER_MASK);
mbed_official 146:f64d43ff0c18 474 }
mbed_official 146:f64d43ff0c18 475
mbed_official 146:f64d43ff0c18 476 /*!
mbed_official 146:f64d43ff0c18 477 * @brief Clears the done status for all eDMA channels.
mbed_official 146:f64d43ff0c18 478 *
mbed_official 146:f64d43ff0c18 479 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 480 */
mbed_official 146:f64d43ff0c18 481 static inline void edma_hal_clear_all_channel_done_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 482 {
mbed_official 146:f64d43ff0c18 483 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 484 HW_DMA_CDNE_WR(instance, DMA_CDNE_CADN_MASK);
mbed_official 146:f64d43ff0c18 485 }
mbed_official 146:f64d43ff0c18 486
mbed_official 146:f64d43ff0c18 487 /*!
mbed_official 146:f64d43ff0c18 488 * @brief Triggers all channel start bits.
mbed_official 146:f64d43ff0c18 489 *
mbed_official 146:f64d43ff0c18 490 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 491 */
mbed_official 146:f64d43ff0c18 492 static inline void edma_hal_trigger_all_channel_start_bit(uint32_t instance)
mbed_official 146:f64d43ff0c18 493 {
mbed_official 146:f64d43ff0c18 494 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 495 HW_DMA_SSRT_WR(instance, DMA_SSRT_SAST_MASK);
mbed_official 146:f64d43ff0c18 496 }
mbed_official 146:f64d43ff0c18 497
mbed_official 146:f64d43ff0c18 498 /*!
mbed_official 146:f64d43ff0c18 499 * @brief Clears the error status for all eDMA channels.
mbed_official 146:f64d43ff0c18 500 *
mbed_official 146:f64d43ff0c18 501 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 502 */
mbed_official 146:f64d43ff0c18 503 static inline void edma_hal_clear_all_channel_error_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 504 {
mbed_official 146:f64d43ff0c18 505 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 506 HW_DMA_CERR_WR(instance, DMA_CERR_CAEI_MASK);
mbed_official 146:f64d43ff0c18 507 }
mbed_official 146:f64d43ff0c18 508
mbed_official 146:f64d43ff0c18 509 /*!
mbed_official 146:f64d43ff0c18 510 * @brief Clears an interrupt request for all eDMA channels.
mbed_official 146:f64d43ff0c18 511 *
mbed_official 146:f64d43ff0c18 512 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 513 */
mbed_official 146:f64d43ff0c18 514 static inline void edma_hal_clear_all_channel_interrupt_request(uint32_t instance)
mbed_official 146:f64d43ff0c18 515 {
mbed_official 146:f64d43ff0c18 516 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 517 HW_DMA_CINT_WR(instance, DMA_CINT_CAIR_MASK);
mbed_official 146:f64d43ff0c18 518 }
mbed_official 146:f64d43ff0c18 519
mbed_official 146:f64d43ff0c18 520 /*!
mbed_official 146:f64d43ff0c18 521 * @brief Gets the interrupt status for all eDMA channels.
mbed_official 146:f64d43ff0c18 522 *
mbed_official 146:f64d43ff0c18 523 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 524 * @return 32 bit data. Every bit stands for an eDMA channel. For example, bit 0 stands for channel 0 and so on.
mbed_official 146:f64d43ff0c18 525 */
mbed_official 146:f64d43ff0c18 526 static inline uint32_t edma_hal_get_all_channel_interrupt_request_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 527 {
mbed_official 146:f64d43ff0c18 528 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 529 return HW_DMA_INT_RD(instance);
mbed_official 146:f64d43ff0c18 530 }
mbed_official 146:f64d43ff0c18 531
mbed_official 146:f64d43ff0c18 532 /*!
mbed_official 146:f64d43ff0c18 533 * @brief Gets the channel error status for all eDMA channels.
mbed_official 146:f64d43ff0c18 534 *
mbed_official 146:f64d43ff0c18 535 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 536 * @return 32 bit data. Every bit stands for an eDMA channel. For example, bit 0 stands for channel 0 and so on.
mbed_official 146:f64d43ff0c18 537 */
mbed_official 146:f64d43ff0c18 538 static inline uint32_t edma_hal_get_all_channel_error_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 539 {
mbed_official 146:f64d43ff0c18 540 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 541 return HW_DMA_ERR_RD(instance);
mbed_official 146:f64d43ff0c18 542 }
mbed_official 146:f64d43ff0c18 543
mbed_official 146:f64d43ff0c18 544 /*!
mbed_official 146:f64d43ff0c18 545 * @brief Gets the status of the DMA request for all DMA channels.
mbed_official 146:f64d43ff0c18 546 *
mbed_official 146:f64d43ff0c18 547 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 548 * @return 32 bit data. Every bit stands for an eDMA channel. For example, bit 0 stands for channel 0 and so on.
mbed_official 146:f64d43ff0c18 549 */
mbed_official 146:f64d43ff0c18 550 static inline uint32_t edma_hal_get_all_channel_dma_request_status(uint32_t instance)
mbed_official 146:f64d43ff0c18 551 {
mbed_official 146:f64d43ff0c18 552 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 553 return HW_DMA_HRS_RD(instance);
mbed_official 146:f64d43ff0c18 554 }
mbed_official 146:f64d43ff0c18 555
mbed_official 146:f64d43ff0c18 556 /* @} */
mbed_official 146:f64d43ff0c18 557
mbed_official 146:f64d43ff0c18 558 /*!
mbed_official 146:f64d43ff0c18 559 * @name EDMA HAL channel configuration.
mbed_official 146:f64d43ff0c18 560 * @{
mbed_official 146:f64d43ff0c18 561 */
mbed_official 146:f64d43ff0c18 562
mbed_official 146:f64d43ff0c18 563 /*!
mbed_official 146:f64d43ff0c18 564 * @brief Check whether the channel DMA request is enabled.
mbed_official 146:f64d43ff0c18 565 *
mbed_official 146:f64d43ff0c18 566 * Check whether the DMA request of a specified channel is enabled.
mbed_official 146:f64d43ff0c18 567 *
mbed_official 146:f64d43ff0c18 568 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 569 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 570 *
mbed_official 146:f64d43ff0c18 571 * @return True stands for enabled. False stands for disabled.
mbed_official 146:f64d43ff0c18 572 */
mbed_official 146:f64d43ff0c18 573 static inline bool edma_hal_check_dma_request_enable_status(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 574 {
mbed_official 146:f64d43ff0c18 575 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 576 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 577
mbed_official 146:f64d43ff0c18 578 return ((HW_DMA_ERQ_RD(instance)>>channel) & 1U);
mbed_official 146:f64d43ff0c18 579 }
mbed_official 146:f64d43ff0c18 580
mbed_official 146:f64d43ff0c18 581 /*!
mbed_official 146:f64d43ff0c18 582 * @brief Disables an interrupt when an error happens in the eDMA channel.
mbed_official 146:f64d43ff0c18 583 *
mbed_official 146:f64d43ff0c18 584 * Disables an error interrupt for the eDMA module.
mbed_official 146:f64d43ff0c18 585 *
mbed_official 146:f64d43ff0c18 586 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 587 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 588 */
mbed_official 146:f64d43ff0c18 589 static inline void edma_hal_disable_error_interrupt(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 590 {
mbed_official 146:f64d43ff0c18 591 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 592 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 593 HW_DMA_CEEI_WR(instance, DMA_CEEI_CEEI(channel));
mbed_official 146:f64d43ff0c18 594 }
mbed_official 146:f64d43ff0c18 595
mbed_official 146:f64d43ff0c18 596 /*!
mbed_official 146:f64d43ff0c18 597 * @brief Enables an interrupt when an error happens in the eDMA channel.
mbed_official 146:f64d43ff0c18 598 *
mbed_official 146:f64d43ff0c18 599 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 600 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 601 */
mbed_official 146:f64d43ff0c18 602 static inline void edma_hal_enable_error_interrupt(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 603 {
mbed_official 146:f64d43ff0c18 604 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 605 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 606 HW_DMA_SEEI_WR(instance, DMA_SEEI_SEEI(channel));
mbed_official 146:f64d43ff0c18 607 }
mbed_official 146:f64d43ff0c18 608
mbed_official 146:f64d43ff0c18 609 /*!
mbed_official 146:f64d43ff0c18 610 * @brief Disables the DMA request for an eDMA channel.
mbed_official 146:f64d43ff0c18 611 *
mbed_official 146:f64d43ff0c18 612 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 613 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 614 */
mbed_official 146:f64d43ff0c18 615 static inline void edma_hal_disable_dma_request(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 616 {
mbed_official 146:f64d43ff0c18 617 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 618 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 619 HW_DMA_CERQ_WR(instance, DMA_CERQ_CERQ(channel));
mbed_official 146:f64d43ff0c18 620 }
mbed_official 146:f64d43ff0c18 621
mbed_official 146:f64d43ff0c18 622 /*!
mbed_official 146:f64d43ff0c18 623 * @brief Enables the DMA request for a specified eDMA channel.
mbed_official 146:f64d43ff0c18 624 *
mbed_official 146:f64d43ff0c18 625 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 626 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 627 */
mbed_official 146:f64d43ff0c18 628 static inline void edma_hal_enable_dma_request(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 629 {
mbed_official 146:f64d43ff0c18 630 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 631 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 632 HW_DMA_SERQ_WR(instance, DMA_SERQ_SERQ(channel));
mbed_official 146:f64d43ff0c18 633 }
mbed_official 146:f64d43ff0c18 634
mbed_official 146:f64d43ff0c18 635 /*!
mbed_official 146:f64d43ff0c18 636 * @brief Clears the done status for an eDMA channel.
mbed_official 146:f64d43ff0c18 637 *
mbed_official 146:f64d43ff0c18 638 * The DONE status of the DMA channel is cleared. If the scatter/gather state is
mbed_official 146:f64d43ff0c18 639 * enabled, the DONE status in CSR can be cleared but the global DONE statue is
mbed_official 146:f64d43ff0c18 640 * still set. This function is to clear the global done state.
mbed_official 146:f64d43ff0c18 641 *
mbed_official 146:f64d43ff0c18 642 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 643 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 644 */
mbed_official 146:f64d43ff0c18 645 static inline void edma_hal_clear_done_status(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 646 {
mbed_official 146:f64d43ff0c18 647 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 648 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 649 HW_DMA_CDNE_WR(instance, DMA_CDNE_CDNE(channel));
mbed_official 146:f64d43ff0c18 650 }
mbed_official 146:f64d43ff0c18 651
mbed_official 146:f64d43ff0c18 652 /*!
mbed_official 146:f64d43ff0c18 653 * @brief Starts an eDMA channel manually.
mbed_official 146:f64d43ff0c18 654 *
mbed_official 146:f64d43ff0c18 655 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 656 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 657 */
mbed_official 146:f64d43ff0c18 658 static inline void edma_hal_trigger_start_bit(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 659 {
mbed_official 146:f64d43ff0c18 660 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 661 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 662 HW_DMA_SSRT_WR(instance, DMA_SSRT_SSRT(channel));
mbed_official 146:f64d43ff0c18 663 }
mbed_official 146:f64d43ff0c18 664
mbed_official 146:f64d43ff0c18 665 /*! * @brief Clears an error status for the eDMA channel.
mbed_official 146:f64d43ff0c18 666 *
mbed_official 146:f64d43ff0c18 667 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 668 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 669 */
mbed_official 146:f64d43ff0c18 670 static inline void edma_hal_clear_error_status(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 671 {
mbed_official 146:f64d43ff0c18 672 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 673 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 674 HW_DMA_CERR_WR(instance, DMA_CERR_CERR(channel));
mbed_official 146:f64d43ff0c18 675 }
mbed_official 146:f64d43ff0c18 676
mbed_official 146:f64d43ff0c18 677 /*!
mbed_official 146:f64d43ff0c18 678 * @brief Clears an interrupt request for the eDMA channel.
mbed_official 146:f64d43ff0c18 679 *
mbed_official 146:f64d43ff0c18 680 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 681 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 682 */
mbed_official 146:f64d43ff0c18 683 static inline void edma_hal_clear_interrupt_request(uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 684 {
mbed_official 146:f64d43ff0c18 685 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 686 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 687 HW_DMA_CINT_WR(instance, DMA_CINT_CINT(channel));
mbed_official 146:f64d43ff0c18 688 }
mbed_official 146:f64d43ff0c18 689
mbed_official 146:f64d43ff0c18 690 #if (FSL_FEATURE_DMA_ASYNCHRO_REQUEST_CHANNEL_COUNT > 0x0U)
mbed_official 146:f64d43ff0c18 691 /*!
mbed_official 146:f64d43ff0c18 692 * @brief Enables/Disables an asynchronous request in stop mode.
mbed_official 146:f64d43ff0c18 693 *
mbed_official 146:f64d43ff0c18 694 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 695 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 696 */
mbed_official 146:f64d43ff0c18 697 static inline void edma_hal_set_asynchronous_request_in_stop_mode(
mbed_official 146:f64d43ff0c18 698 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 699 {
mbed_official 146:f64d43ff0c18 700 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 701 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 702 if(isEnabled)
mbed_official 146:f64d43ff0c18 703 {
mbed_official 146:f64d43ff0c18 704 HW_DMA_EARS_SET(instance, 1U << channel);
mbed_official 146:f64d43ff0c18 705 }
mbed_official 146:f64d43ff0c18 706 else
mbed_official 146:f64d43ff0c18 707 {
mbed_official 146:f64d43ff0c18 708 HW_DMA_EARS_CLR(instance, 1U << channel);
mbed_official 146:f64d43ff0c18 709 }
mbed_official 146:f64d43ff0c18 710 }
mbed_official 146:f64d43ff0c18 711 #endif
mbed_official 146:f64d43ff0c18 712
mbed_official 146:f64d43ff0c18 713 /*!
mbed_official 146:f64d43ff0c18 714 * @brief Configures the preempt feature for an eDMA channel.
mbed_official 146:f64d43ff0c18 715 *
mbed_official 146:f64d43ff0c18 716 * If it is disabled, the DMA channel can't suspend a lower priority channel.
mbed_official 146:f64d43ff0c18 717 *
mbed_official 146:f64d43ff0c18 718 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 719 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 720 * @param preempt configuration mode for preempt
mbed_official 146:f64d43ff0c18 721 */
mbed_official 146:f64d43ff0c18 722 static inline void edma_hal_set_channel_preemp_ability(
mbed_official 146:f64d43ff0c18 723 uint32_t instance, uint32_t channel, bool isDisabled)
mbed_official 146:f64d43ff0c18 724 {
mbed_official 146:f64d43ff0c18 725 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 726 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 727 BW_DMA_DCHPRIn_DPA(instance, HW_DMA_DCHPRIn_CHANNEL(channel), isDisabled);
mbed_official 146:f64d43ff0c18 728 }
mbed_official 146:f64d43ff0c18 729
mbed_official 146:f64d43ff0c18 730 /*!
mbed_official 146:f64d43ff0c18 731 * @brief Configures the preempt feature for the eDMA channel.
mbed_official 146:f64d43ff0c18 732 *
mbed_official 146:f64d43ff0c18 733 * If enabled, channel can be temporarily suspended by a higher priority channel.
mbed_official 146:f64d43ff0c18 734 *
mbed_official 146:f64d43ff0c18 735 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 736 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 737 * @param preempt configuration mode for preempt
mbed_official 146:f64d43ff0c18 738 */
mbed_official 146:f64d43ff0c18 739 static inline void edma_hal_set_channel_preemption_ability(uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 740 {
mbed_official 146:f64d43ff0c18 741 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 742 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 743 BW_DMA_DCHPRIn_ECP(instance, HW_DMA_DCHPRIn_CHANNEL(channel), isEnabled);
mbed_official 146:f64d43ff0c18 744 }
mbed_official 146:f64d43ff0c18 745
mbed_official 146:f64d43ff0c18 746 /*!
mbed_official 146:f64d43ff0c18 747 * @brief Configures the eDMA channel priority.
mbed_official 146:f64d43ff0c18 748 *
mbed_official 146:f64d43ff0c18 749 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 750 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 751 * @param priority Priority of the DMA channel. Different channels should have different priority inside a
mbed_official 146:f64d43ff0c18 752 * group.
mbed_official 146:f64d43ff0c18 753 */
mbed_official 146:f64d43ff0c18 754 static inline void edma_hal_set_channel_priority(
mbed_official 146:f64d43ff0c18 755 uint32_t instance, uint32_t channel, uint32_t priority)
mbed_official 146:f64d43ff0c18 756 {
mbed_official 146:f64d43ff0c18 757 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 758 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 759
mbed_official 146:f64d43ff0c18 760 BW_DMA_DCHPRIn_CHPRI(instance, HW_DMA_DCHPRIn_CHANNEL(channel), priority);
mbed_official 146:f64d43ff0c18 761 }
mbed_official 146:f64d43ff0c18 762
mbed_official 146:f64d43ff0c18 763 /* @} */
mbed_official 146:f64d43ff0c18 764
mbed_official 146:f64d43ff0c18 765 /*!
mbed_official 146:f64d43ff0c18 766 * @name eDMA HAL hardware TCD configuration
mbed_official 146:f64d43ff0c18 767 * @{
mbed_official 146:f64d43ff0c18 768 */
mbed_official 146:f64d43ff0c18 769
mbed_official 146:f64d43ff0c18 770 /*!
mbed_official 146:f64d43ff0c18 771 * @brief Configures the source address for the hardware TCD.
mbed_official 146:f64d43ff0c18 772 *
mbed_official 146:f64d43ff0c18 773 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 774 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 775 * @param address memory address pointing to the source data
mbed_official 146:f64d43ff0c18 776 */
mbed_official 146:f64d43ff0c18 777 static inline void edma_hal_htcd_configure_source_address(
mbed_official 146:f64d43ff0c18 778 uint32_t instance, uint32_t channel, uint32_t address)
mbed_official 146:f64d43ff0c18 779 {
mbed_official 146:f64d43ff0c18 780 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 781 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 782 BW_DMA_TCDn_SADDR_SADDR(instance, channel, address);
mbed_official 146:f64d43ff0c18 783 }
mbed_official 146:f64d43ff0c18 784
mbed_official 146:f64d43ff0c18 785 /*!
mbed_official 146:f64d43ff0c18 786 * @brief Configures the source address signed offset for the hardware TCD.
mbed_official 146:f64d43ff0c18 787 *
mbed_official 146:f64d43ff0c18 788 * Sign-extended offset applied to the current source address to form the next-state value as each
mbed_official 146:f64d43ff0c18 789 * source read is complete.
mbed_official 146:f64d43ff0c18 790 *
mbed_official 146:f64d43ff0c18 791 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 792 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 793 * @param offset signed-offset
mbed_official 146:f64d43ff0c18 794 */
mbed_official 146:f64d43ff0c18 795 static inline void edma_hal_htcd_configure_source_offset(
mbed_official 146:f64d43ff0c18 796 uint32_t instance, uint32_t channel, int16_t offset)
mbed_official 146:f64d43ff0c18 797 {
mbed_official 146:f64d43ff0c18 798 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 799 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 800 BW_DMA_TCDn_SOFF_SOFF(instance, channel, offset);
mbed_official 146:f64d43ff0c18 801 }
mbed_official 146:f64d43ff0c18 802
mbed_official 146:f64d43ff0c18 803 /*!
mbed_official 146:f64d43ff0c18 804 * @brief Configures the source modulo for the hardware TCD.
mbed_official 146:f64d43ff0c18 805 *
mbed_official 146:f64d43ff0c18 806 * The value defines a specific address range specified as the value after the SADDR + SOFF
mbed_official 146:f64d43ff0c18 807 * calculation is performed on the original register value. Setting this field provides the ability
mbed_official 146:f64d43ff0c18 808 * to implement a circular data. For data queues requiring power-of-2 size bytes, the
mbed_official 146:f64d43ff0c18 809 * queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate
mbed_official 146:f64d43ff0c18 810 * value for the queue, freezing the desired number of upper address bits. The value programmed into
mbed_official 146:f64d43ff0c18 811 * this field specifies the number of the lower address bits allowed to change. For a circular queue
mbed_official 146:f64d43ff0c18 812 * application, the SOFF is typically set to the transfer size to implement post-increment addressing
mbed_official 146:f64d43ff0c18 813 * with SMOD function restricting the addresses to a 0-modulo-size range.
mbed_official 146:f64d43ff0c18 814 *
mbed_official 146:f64d43ff0c18 815 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 816 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 817 * @param modulo enum type for an allowed modulo
mbed_official 146:f64d43ff0c18 818 */
mbed_official 146:f64d43ff0c18 819 static inline void edma_hal_htcd_configure_source_modulo(
mbed_official 146:f64d43ff0c18 820 uint32_t instance, uint32_t channel, edma_modulo_t modulo)
mbed_official 146:f64d43ff0c18 821 {
mbed_official 146:f64d43ff0c18 822 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 823 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 824 BW_DMA_TCDn_ATTR_SMOD(instance, channel, modulo);
mbed_official 146:f64d43ff0c18 825 }
mbed_official 146:f64d43ff0c18 826
mbed_official 146:f64d43ff0c18 827 /*!
mbed_official 146:f64d43ff0c18 828 * @brief Configures the source data transfersize for the hardware TCD.
mbed_official 146:f64d43ff0c18 829 *
mbed_official 146:f64d43ff0c18 830 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 831 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 832 * @param size enum type for transfer size
mbed_official 146:f64d43ff0c18 833 */
mbed_official 146:f64d43ff0c18 834 static inline void edma_hal_htcd_configure_source_transfersize(
mbed_official 146:f64d43ff0c18 835 uint32_t instance, uint32_t channel, edma_transfer_size_t size)
mbed_official 146:f64d43ff0c18 836 {
mbed_official 146:f64d43ff0c18 837 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 838 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 839 BW_DMA_TCDn_ATTR_SSIZE(instance, channel, size);
mbed_official 146:f64d43ff0c18 840 }
mbed_official 146:f64d43ff0c18 841
mbed_official 146:f64d43ff0c18 842 /*!
mbed_official 146:f64d43ff0c18 843 * @brief Configures the destination modulo for the hardware TCD.
mbed_official 146:f64d43ff0c18 844 *
mbed_official 146:f64d43ff0c18 845 * The value defines a specific address range as the value after the DADDR + DOFF
mbed_official 146:f64d43ff0c18 846 * calculation is performed on the original register value. Setting this field provides the ability
mbed_official 146:f64d43ff0c18 847 * to implement a circular data. For data queues requiring power-of-2 size bytes, the
mbed_official 146:f64d43ff0c18 848 * queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate
mbed_official 146:f64d43ff0c18 849 * value for the queue, freezing the desired number of upper address bits. The value programmed into
mbed_official 146:f64d43ff0c18 850 * this field specifies the number of lower address bits allowed to change. For a circular queue
mbed_official 146:f64d43ff0c18 851 * application, the SOFF is typically set to the transfer size to implement post-increment addressing
mbed_official 146:f64d43ff0c18 852 * with DMOD function restricting the addresses to a 0-modulo-size range.
mbed_official 146:f64d43ff0c18 853 *
mbed_official 146:f64d43ff0c18 854 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 855 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 856 * @param modulo enum type for an allowed modulo
mbed_official 146:f64d43ff0c18 857 */
mbed_official 146:f64d43ff0c18 858 static inline void edma_hal_htcd_configure_dest_modulo(
mbed_official 146:f64d43ff0c18 859 uint32_t instance, uint32_t channel, edma_modulo_t modulo)
mbed_official 146:f64d43ff0c18 860 {
mbed_official 146:f64d43ff0c18 861 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 862 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 863 BW_DMA_TCDn_ATTR_DMOD(instance, channel, modulo);
mbed_official 146:f64d43ff0c18 864 }
mbed_official 146:f64d43ff0c18 865
mbed_official 146:f64d43ff0c18 866 /*!
mbed_official 146:f64d43ff0c18 867 * @brief Configures the destination data transfersize for the hardware TCD.
mbed_official 146:f64d43ff0c18 868 *
mbed_official 146:f64d43ff0c18 869 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 870 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 871 * @param size enum type for the transfer size
mbed_official 146:f64d43ff0c18 872 */
mbed_official 146:f64d43ff0c18 873 static inline void edma_hal_htcd_configure_dest_transfersize(
mbed_official 146:f64d43ff0c18 874 uint32_t instance, uint32_t channel, edma_transfer_size_t size)
mbed_official 146:f64d43ff0c18 875 {
mbed_official 146:f64d43ff0c18 876 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 877 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 878 BW_DMA_TCDn_ATTR_DSIZE(instance, channel, size);
mbed_official 146:f64d43ff0c18 879 }
mbed_official 146:f64d43ff0c18 880
mbed_official 146:f64d43ff0c18 881 /*!
mbed_official 146:f64d43ff0c18 882 * @brief Configures the nbytes if minor loop mapping is disabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 883 *
mbed_official 146:f64d43ff0c18 884 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 885 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 886 * @param nbytes Number of bytes to be transferred in each service request of the channel
mbed_official 146:f64d43ff0c18 887 */
mbed_official 146:f64d43ff0c18 888 static inline void edma_hal_htcd_configure_nbytes_minorloop_disabled(
mbed_official 146:f64d43ff0c18 889 uint32_t instance, uint32_t channel, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 890 {
mbed_official 146:f64d43ff0c18 891 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 892 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 893 BW_DMA_TCDn_NBYTES_MLNO_NBYTES(instance, channel, nbytes);
mbed_official 146:f64d43ff0c18 894 }
mbed_official 146:f64d43ff0c18 895
mbed_official 146:f64d43ff0c18 896 /*!
mbed_official 146:f64d43ff0c18 897 * @brief Configures the nbytes if the minor loop mapping is enabled and offset is disabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 898 *
mbed_official 146:f64d43ff0c18 899 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 900 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 901 * @param nbytes Number of bytes to be transferred in each service request of the channel
mbed_official 146:f64d43ff0c18 902 */
mbed_official 146:f64d43ff0c18 903 static inline void edma_hal_htcd_configure_nbytes_minorloop_enabled_offset_disabled(
mbed_official 146:f64d43ff0c18 904 uint32_t instance, uint32_t channel, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 905 {
mbed_official 146:f64d43ff0c18 906 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 907 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 908 BW_DMA_TCDn_NBYTES_MLOFFNO_NBYTES(instance, channel, nbytes);
mbed_official 146:f64d43ff0c18 909 }
mbed_official 146:f64d43ff0c18 910
mbed_official 146:f64d43ff0c18 911 /*!
mbed_official 146:f64d43ff0c18 912 * @brief Configures the nbytes if the minor loop mapping is enabled and offset is enabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 913 *
mbed_official 146:f64d43ff0c18 914 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 915 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 916 * @param nbytes Number of bytes to be transferred in each service request of the channel
mbed_official 146:f64d43ff0c18 917 */
mbed_official 146:f64d43ff0c18 918 static inline void edma_hal_htcd_configure_nbytes_minorloop_enabled_offset_enabled(
mbed_official 146:f64d43ff0c18 919 uint32_t instance, uint32_t channel, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 920 {
mbed_official 146:f64d43ff0c18 921 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 922 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 923 BW_DMA_TCDn_NBYTES_MLOFFYES_NBYTES(instance, channel, nbytes);
mbed_official 146:f64d43ff0c18 924 }
mbed_official 146:f64d43ff0c18 925
mbed_official 146:f64d43ff0c18 926 /*!
mbed_official 146:f64d43ff0c18 927 * @brief Gets the nbytes configuration data.
mbed_official 146:f64d43ff0c18 928 *
mbed_official 146:f64d43ff0c18 929 * This function decides whether the minor loop mapping is enabled or whether the source/dest
mbed_official 146:f64d43ff0c18 930 * minor loop mapping is enabled. Then, the nbytes are returned accordingly.
mbed_official 146:f64d43ff0c18 931 *
mbed_official 146:f64d43ff0c18 932 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 933 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 934 * @return nbytes configuration
mbed_official 146:f64d43ff0c18 935 */
mbed_official 146:f64d43ff0c18 936 uint32_t edma_hal_htcd_get_nbytes_configuration(uint32_t instance, uint32_t channel);
mbed_official 146:f64d43ff0c18 937
mbed_official 146:f64d43ff0c18 938
mbed_official 146:f64d43ff0c18 939 /*!
mbed_official 146:f64d43ff0c18 940 * @brief Configures the minorloop offset for the hardware TCD.
mbed_official 146:f64d43ff0c18 941 *
mbed_official 146:f64d43ff0c18 942 * Configures both the enable bits and the offset value. If neither source nor dest offset is enabled,
mbed_official 146:f64d43ff0c18 943 * offset is not configured.
mbed_official 146:f64d43ff0c18 944 *
mbed_official 146:f64d43ff0c18 945 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 946 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 947 * @param config Configuration data structure for the minorloop offset
mbed_official 146:f64d43ff0c18 948 */
mbed_official 146:f64d43ff0c18 949 static inline void edma_hal_htcd_configure_minorloop_offset(
mbed_official 146:f64d43ff0c18 950 uint32_t instance, uint32_t channel, edma_minorloop_offset_config_t config)
mbed_official 146:f64d43ff0c18 951 {
mbed_official 146:f64d43ff0c18 952 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 953 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 954 BW_DMA_TCDn_NBYTES_MLOFFYES_SMLOE(instance, channel, config.isEnableSourceMinorloop);
mbed_official 146:f64d43ff0c18 955 BW_DMA_TCDn_NBYTES_MLOFFYES_DMLOE(instance, channel, config.isEnableDestMinorloop);
mbed_official 146:f64d43ff0c18 956 if ((config.isEnableSourceMinorloop == true) || (config.isEnableDestMinorloop == true))
mbed_official 146:f64d43ff0c18 957 {
mbed_official 146:f64d43ff0c18 958 BW_DMA_TCDn_NBYTES_MLOFFYES_MLOFF(instance, channel, config.offset);
mbed_official 146:f64d43ff0c18 959 }
mbed_official 146:f64d43ff0c18 960 }
mbed_official 146:f64d43ff0c18 961
mbed_official 146:f64d43ff0c18 962 /*!
mbed_official 146:f64d43ff0c18 963 * @brief Configures the last source address adjustment for the hardware TCD.
mbed_official 146:f64d43ff0c18 964 *
mbed_official 146:f64d43ff0c18 965 * Adjustment value added to the source address at the completion of the major iteration count. This
mbed_official 146:f64d43ff0c18 966 * value can be applied to restore the source address to the initial value, or adjust the address to
mbed_official 146:f64d43ff0c18 967 * reference the next data structure.
mbed_official 146:f64d43ff0c18 968 *
mbed_official 146:f64d43ff0c18 969 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 970 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 971 * @param size adjustment value
mbed_official 146:f64d43ff0c18 972 */
mbed_official 146:f64d43ff0c18 973 static inline void edma_hal_htcd_configure_source_last_adjustment(
mbed_official 146:f64d43ff0c18 974 uint32_t instance, uint32_t channel, int32_t size)
mbed_official 146:f64d43ff0c18 975 {
mbed_official 146:f64d43ff0c18 976 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 977 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 978 BW_DMA_TCDn_SLAST_SLAST(instance, channel, size);
mbed_official 146:f64d43ff0c18 979 }
mbed_official 146:f64d43ff0c18 980
mbed_official 146:f64d43ff0c18 981 /*!
mbed_official 146:f64d43ff0c18 982 * @brief Configures the destination address for the hardware TCD.
mbed_official 146:f64d43ff0c18 983 *
mbed_official 146:f64d43ff0c18 984 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 985 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 986 * @param address memory address pointing to destination data
mbed_official 146:f64d43ff0c18 987 */
mbed_official 146:f64d43ff0c18 988 static inline void edma_hal_htcd_configure_dest_address(
mbed_official 146:f64d43ff0c18 989 uint32_t instance, uint32_t channel, uint32_t address)
mbed_official 146:f64d43ff0c18 990 {
mbed_official 146:f64d43ff0c18 991 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 992 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 993 BW_DMA_TCDn_DADDR_DADDR(instance, channel, address);
mbed_official 146:f64d43ff0c18 994 }
mbed_official 146:f64d43ff0c18 995
mbed_official 146:f64d43ff0c18 996 /*!
mbed_official 146:f64d43ff0c18 997 * @brief Configures the destination address signed offset for the hardware TCD.
mbed_official 146:f64d43ff0c18 998 *
mbed_official 146:f64d43ff0c18 999 * Sign-extended offset applied to the current source address to form the next-state value as each
mbed_official 146:f64d43ff0c18 1000 * destination write is complete.
mbed_official 146:f64d43ff0c18 1001 *
mbed_official 146:f64d43ff0c18 1002 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1003 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1004 * @param offset signed-offset
mbed_official 146:f64d43ff0c18 1005 */
mbed_official 146:f64d43ff0c18 1006 static inline void edma_hal_htcd_configure_dest_offset(
mbed_official 146:f64d43ff0c18 1007 uint32_t instance, uint32_t channel, int16_t offset)
mbed_official 146:f64d43ff0c18 1008 {
mbed_official 146:f64d43ff0c18 1009 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1010 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1011 BW_DMA_TCDn_DOFF_DOFF(instance, channel, offset);
mbed_official 146:f64d43ff0c18 1012 }
mbed_official 146:f64d43ff0c18 1013
mbed_official 146:f64d43ff0c18 1014 /*!
mbed_official 146:f64d43ff0c18 1015 * @brief Configures the last source address adjustment or the memory address for the next transfer
mbed_official 146:f64d43ff0c18 1016 * control for the hardware TCD.
mbed_official 146:f64d43ff0c18 1017 *
mbed_official 146:f64d43ff0c18 1018 * If a scatter/gather feature is enabled (edma_hal_htcd_set_scatter_gather_process()):
mbed_official 146:f64d43ff0c18 1019 *
mbed_official 146:f64d43ff0c18 1020 * This address points to the beginning of a 0-modulo-32 byte region containing the next transfer
mbed_official 146:f64d43ff0c18 1021 * control descriptor to be loaded into this channel. The channel reload is performed as the major
mbed_official 146:f64d43ff0c18 1022 * iteration count completes. The scatter/gather address must be 0-modulo-32-byte. Otherwise, a
mbed_official 146:f64d43ff0c18 1023 * configuration error is reported.
mbed_official 146:f64d43ff0c18 1024 *
mbed_official 146:f64d43ff0c18 1025 * else:
mbed_official 146:f64d43ff0c18 1026 *
mbed_official 146:f64d43ff0c18 1027 * An adjustment value added to the source address at the completion of the major iteration count. This
mbed_official 146:f64d43ff0c18 1028 * value can be applied to restore the source address to the initial value, or adjust the address to
mbed_official 146:f64d43ff0c18 1029 * reference the next data structure.
mbed_official 146:f64d43ff0c18 1030 *
mbed_official 146:f64d43ff0c18 1031 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1032 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1033 * @param size adjustment value
mbed_official 146:f64d43ff0c18 1034 */
mbed_official 146:f64d43ff0c18 1035 static inline void edma_hal_htcd_configure_dest_last_adjustment_or_scatter_address(
mbed_official 146:f64d43ff0c18 1036 uint32_t instance, uint32_t channel, uint32_t address)
mbed_official 146:f64d43ff0c18 1037 {
mbed_official 146:f64d43ff0c18 1038 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1039 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1040 BW_DMA_TCDn_DLASTSGA_DLASTSGA(instance, channel, address);
mbed_official 146:f64d43ff0c18 1041 }
mbed_official 146:f64d43ff0c18 1042
mbed_official 146:f64d43ff0c18 1043 /*!
mbed_official 146:f64d43ff0c18 1044 * @brief Configures the bandwidth for the hardware TCD.
mbed_official 146:f64d43ff0c18 1045 *
mbed_official 146:f64d43ff0c18 1046 * Throttles the amount of bus bandwidth consumed by the eDMA. In general, as the eDMA processes the
mbed_official 146:f64d43ff0c18 1047 * minor loop, it continuously generates read/write sequences until the minor count is exhausted.
mbed_official 146:f64d43ff0c18 1048 * This field forces the eDMA to stall after the completion of each read/write access to control the
mbed_official 146:f64d43ff0c18 1049 * bus request bandwidth seen by the crossbar switch.
mbed_official 146:f64d43ff0c18 1050 *
mbed_official 146:f64d43ff0c18 1051 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1052 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1053 * @param bandwidth enum type for bandwidth control
mbed_official 146:f64d43ff0c18 1054 */
mbed_official 146:f64d43ff0c18 1055 static inline void edma_hal_htcd_configure_bandwidth(
mbed_official 146:f64d43ff0c18 1056 uint32_t instance, uint32_t channel, edma_bandwidth_configuration_t bandwidth)
mbed_official 146:f64d43ff0c18 1057 {
mbed_official 146:f64d43ff0c18 1058 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1059 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1060 BW_DMA_TCDn_CSR_BWC(instance, channel, bandwidth);
mbed_official 146:f64d43ff0c18 1061 }
mbed_official 146:f64d43ff0c18 1062
mbed_official 146:f64d43ff0c18 1063 /*!
mbed_official 146:f64d43ff0c18 1064 * @brief Configures the major link channel number for the hardware TCD.
mbed_official 146:f64d43ff0c18 1065 *
mbed_official 146:f64d43ff0c18 1066 * If the majorlink is enabled, after the major loop counter is exhausted, the eDMA engine initiates a
mbed_official 146:f64d43ff0c18 1067 * channel service request at the channel defined by these six bits by setting that channel start
mbed_official 146:f64d43ff0c18 1068 * bits.
mbed_official 146:f64d43ff0c18 1069 *
mbed_official 146:f64d43ff0c18 1070 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1071 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1072 * @param majorchannel channel number for major link
mbed_official 146:f64d43ff0c18 1073 */
mbed_official 146:f64d43ff0c18 1074 static inline void edma_hal_htcd_configure_majorlink_channel(
mbed_official 146:f64d43ff0c18 1075 uint32_t instance, uint32_t channel, uint32_t majorchannel)
mbed_official 146:f64d43ff0c18 1076 {
mbed_official 146:f64d43ff0c18 1077 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1078 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1079 BW_DMA_TCDn_CSR_MAJORLINKCH(instance, channel, majorchannel);
mbed_official 146:f64d43ff0c18 1080 }
mbed_official 146:f64d43ff0c18 1081
mbed_official 146:f64d43ff0c18 1082 /*!
mbed_official 146:f64d43ff0c18 1083 * @brief Gets the major link channel for the hardware TCD.
mbed_official 146:f64d43ff0c18 1084 *
mbed_official 146:f64d43ff0c18 1085 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1086 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1087 * @return major link channel number
mbed_official 146:f64d43ff0c18 1088 */
mbed_official 146:f64d43ff0c18 1089 static inline uint32_t edma_hal_htcd_get_majorlink_channel(
mbed_official 146:f64d43ff0c18 1090 uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 1091 {
mbed_official 146:f64d43ff0c18 1092 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1093 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1094 return BR_DMA_TCDn_CSR_MAJORLINKCH(instance, channel);
mbed_official 146:f64d43ff0c18 1095 }
mbed_official 146:f64d43ff0c18 1096
mbed_official 146:f64d43ff0c18 1097 /*!
mbed_official 146:f64d43ff0c18 1098 * @brief Enables/Disables the major link channel feature for the hardware TCD.
mbed_official 146:f64d43ff0c18 1099 *
mbed_official 146:f64d43ff0c18 1100 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1101 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1102 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1103 */
mbed_official 146:f64d43ff0c18 1104 static inline void edma_hal_htcd_set_majorlink(uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1105 {
mbed_official 146:f64d43ff0c18 1106 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1107 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1108 BW_DMA_TCDn_CSR_MAJORELINK(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1109 }
mbed_official 146:f64d43ff0c18 1110
mbed_official 146:f64d43ff0c18 1111 /*!
mbed_official 146:f64d43ff0c18 1112 * @brief Enables/Disables the scatter/gather feature for the hardware TCD.
mbed_official 146:f64d43ff0c18 1113 *
mbed_official 146:f64d43ff0c18 1114 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1115 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1116 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1117 */
mbed_official 146:f64d43ff0c18 1118 static inline void edma_hal_htcd_set_scatter_gather_process(
mbed_official 146:f64d43ff0c18 1119 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1120 {
mbed_official 146:f64d43ff0c18 1121 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1122 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1123 BW_DMA_TCDn_CSR_ESG(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1124 }
mbed_official 146:f64d43ff0c18 1125
mbed_official 146:f64d43ff0c18 1126 /*!
mbed_official 146:f64d43ff0c18 1127 * @brief Checks whether the scatter/gather feature is enabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 1128 *
mbed_official 146:f64d43ff0c18 1129 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1130 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1131 * @return True stand for enabled. False stands for disabled.
mbed_official 146:f64d43ff0c18 1132 */
mbed_official 146:f64d43ff0c18 1133 static inline bool edma_hal_htcd_is_gather_scatter_enabled(
mbed_official 146:f64d43ff0c18 1134 uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 1135 {
mbed_official 146:f64d43ff0c18 1136 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1137 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1138 return BR_DMA_TCDn_CSR_ESG(instance, channel);
mbed_official 146:f64d43ff0c18 1139
mbed_official 146:f64d43ff0c18 1140 }
mbed_official 146:f64d43ff0c18 1141
mbed_official 146:f64d43ff0c18 1142 /*!
mbed_official 146:f64d43ff0c18 1143 * @brief Disables/Enables the DMA request after the major loop completes for the hardware TCD.
mbed_official 146:f64d43ff0c18 1144 *
mbed_official 146:f64d43ff0c18 1145 * If disabled, the eDMA hardware automatically clears the corresponding DMA request when the
mbed_official 146:f64d43ff0c18 1146 * current major iteration count reaches zero.
mbed_official 146:f64d43ff0c18 1147 *
mbed_official 146:f64d43ff0c18 1148 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1149 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1150 * @param isDisabled Disable/Enable.
mbed_official 146:f64d43ff0c18 1151 */
mbed_official 146:f64d43ff0c18 1152 static inline void edma_hal_htcd_set_disable_dma_request_after_tcd_done(
mbed_official 146:f64d43ff0c18 1153 uint32_t instance, uint32_t channel, bool isDisabled)
mbed_official 146:f64d43ff0c18 1154 {
mbed_official 146:f64d43ff0c18 1155 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1156 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1157 BW_DMA_TCDn_CSR_DREQ(instance, channel, isDisabled);
mbed_official 146:f64d43ff0c18 1158 }
mbed_official 146:f64d43ff0c18 1159
mbed_official 146:f64d43ff0c18 1160 /*!
mbed_official 146:f64d43ff0c18 1161 * @brief Enables/Disables the half complete interrupt for the hardware TCD.
mbed_official 146:f64d43ff0c18 1162 *
mbed_official 146:f64d43ff0c18 1163 * If set, the channel generates an interrupt request by setting the appropriate bit in the
mbed_official 146:f64d43ff0c18 1164 * interrupt register when the current major iteration count reaches the halfway point. Specifically,
mbed_official 146:f64d43ff0c18 1165 * the comparison performed by the eDMA engine is (CITER == (BITER >> 1)). This half-way point
mbed_official 146:f64d43ff0c18 1166 * interrupt request is provided to support the double-buffered schemes or other types of data movement
mbed_official 146:f64d43ff0c18 1167 * where the processor needs an early indication of the transfer's process.
mbed_official 146:f64d43ff0c18 1168 *
mbed_official 146:f64d43ff0c18 1169 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1170 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1171 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1172 */
mbed_official 146:f64d43ff0c18 1173 static inline void edma_hal_htcd_set_half_complete_interrupt(
mbed_official 146:f64d43ff0c18 1174 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1175 {
mbed_official 146:f64d43ff0c18 1176 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1177 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1178 BW_DMA_TCDn_CSR_INTHALF(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1179 }
mbed_official 146:f64d43ff0c18 1180
mbed_official 146:f64d43ff0c18 1181 /*!
mbed_official 146:f64d43ff0c18 1182 * @brief Enables/Disables the interrupt after the major loop completes for the hardware TCD.
mbed_official 146:f64d43ff0c18 1183 *
mbed_official 146:f64d43ff0c18 1184 * If enabled, the channel generates an interrupt request by setting the appropriate bit in the
mbed_official 146:f64d43ff0c18 1185 * interrupt register when the current major iteration count reaches zero.
mbed_official 146:f64d43ff0c18 1186 *
mbed_official 146:f64d43ff0c18 1187 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1188 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1189 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1190 */
mbed_official 146:f64d43ff0c18 1191 static inline void edma_hal_htcd_set_complete_interrupt(
mbed_official 146:f64d43ff0c18 1192 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1193 {
mbed_official 146:f64d43ff0c18 1194 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1195 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1196 BW_DMA_TCDn_CSR_INTMAJOR(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1197 }
mbed_official 146:f64d43ff0c18 1198
mbed_official 146:f64d43ff0c18 1199 /*!
mbed_official 146:f64d43ff0c18 1200 * @brief Triggers the start bits for the hardware TCD.
mbed_official 146:f64d43ff0c18 1201 *
mbed_official 146:f64d43ff0c18 1202 * The eDMA hardware automatically clears this flag after the channel begins execution.
mbed_official 146:f64d43ff0c18 1203 *
mbed_official 146:f64d43ff0c18 1204 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1205 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1206 */
mbed_official 146:f64d43ff0c18 1207 static inline void edma_hal_htcd_trigger_channel_start(
mbed_official 146:f64d43ff0c18 1208 uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 1209 {
mbed_official 146:f64d43ff0c18 1210 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1211 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1212 BW_DMA_TCDn_CSR_START(instance, channel, 1);
mbed_official 146:f64d43ff0c18 1213 }
mbed_official 146:f64d43ff0c18 1214
mbed_official 146:f64d43ff0c18 1215 /*!
mbed_official 146:f64d43ff0c18 1216 * @brief Checks whether the channel is running for the hardware TCD.
mbed_official 146:f64d43ff0c18 1217 *
mbed_official 146:f64d43ff0c18 1218 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1219 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1220 * @return True stands for running. False stands for not.
mbed_official 146:f64d43ff0c18 1221 */
mbed_official 146:f64d43ff0c18 1222 static inline bool edma_hal_htcd_is_channel_active(
mbed_official 146:f64d43ff0c18 1223 uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 1224 {
mbed_official 146:f64d43ff0c18 1225 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1226 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1227 return BR_DMA_TCDn_CSR_ACTIVE(instance, channel);
mbed_official 146:f64d43ff0c18 1228 }
mbed_official 146:f64d43ff0c18 1229
mbed_official 146:f64d43ff0c18 1230 /*!
mbed_official 146:f64d43ff0c18 1231 * @brief Checks whether the major loop is exhausted for the hardware TCD.
mbed_official 146:f64d43ff0c18 1232 *
mbed_official 146:f64d43ff0c18 1233 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1234 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1235 * @return True stands for running. False stands for not.
mbed_official 146:f64d43ff0c18 1236 */
mbed_official 146:f64d43ff0c18 1237 static inline bool edma_hal_htcd_is_channel_done(
mbed_official 146:f64d43ff0c18 1238 uint32_t instance, uint32_t channel)
mbed_official 146:f64d43ff0c18 1239 {
mbed_official 146:f64d43ff0c18 1240 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1241 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1242 return BR_DMA_TCDn_CSR_DONE(instance, channel);
mbed_official 146:f64d43ff0c18 1243 }
mbed_official 146:f64d43ff0c18 1244
mbed_official 146:f64d43ff0c18 1245 /*!
mbed_official 146:f64d43ff0c18 1246 * @brief Enables/Disables the channel link after the minor loop for the hardware TCD.
mbed_official 146:f64d43ff0c18 1247 *
mbed_official 146:f64d43ff0c18 1248 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1249 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1250 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1251 */
mbed_official 146:f64d43ff0c18 1252 static inline void edma_hal_htcd_set_minor_link(
mbed_official 146:f64d43ff0c18 1253 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1254 {
mbed_official 146:f64d43ff0c18 1255 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1256 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1257 BW_DMA_TCDn_BITER_ELINKYES_ELINK(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1258 }
mbed_official 146:f64d43ff0c18 1259
mbed_official 146:f64d43ff0c18 1260 /*!
mbed_official 146:f64d43ff0c18 1261 * @brief Enables/Disables the channel link after the minor loop in the current register for the hardware TCD.
mbed_official 146:f64d43ff0c18 1262 *
mbed_official 146:f64d43ff0c18 1263 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1264 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1265 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1266 */
mbed_official 146:f64d43ff0c18 1267 static inline void edma_hal_htcd_set_current_minor_link(
mbed_official 146:f64d43ff0c18 1268 uint32_t instance, uint32_t channel, bool isEnabled)
mbed_official 146:f64d43ff0c18 1269 {
mbed_official 146:f64d43ff0c18 1270 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1271 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1272 BW_DMA_TCDn_CITER_ELINKYES_ELINK(instance, channel, isEnabled);
mbed_official 146:f64d43ff0c18 1273 }
mbed_official 146:f64d43ff0c18 1274
mbed_official 146:f64d43ff0c18 1275 /*!
mbed_official 146:f64d43ff0c18 1276 * @brief Configures the minor loop link channel for the hardware TCD.
mbed_official 146:f64d43ff0c18 1277 *
mbed_official 146:f64d43ff0c18 1278 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1279 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1280 * @param minorchannel minor loop link channel
mbed_official 146:f64d43ff0c18 1281 */
mbed_official 146:f64d43ff0c18 1282 static inline void edma_hal_htcd_configure_minor_link_channel(
mbed_official 146:f64d43ff0c18 1283 uint32_t instance, uint32_t channel, uint32_t minorchannel)
mbed_official 146:f64d43ff0c18 1284 {
mbed_official 146:f64d43ff0c18 1285 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1286 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1287 BW_DMA_TCDn_BITER_ELINKYES_LINKCH(instance, channel, minorchannel);
mbed_official 146:f64d43ff0c18 1288 }
mbed_official 146:f64d43ff0c18 1289
mbed_official 146:f64d43ff0c18 1290 /*!
mbed_official 146:f64d43ff0c18 1291 * @brief Configures the minor loop link channel in the current register for the hardware TCD.
mbed_official 146:f64d43ff0c18 1292 *
mbed_official 146:f64d43ff0c18 1293 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1294 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1295 * @param minorchannel minor loop link channel
mbed_official 146:f64d43ff0c18 1296 */
mbed_official 146:f64d43ff0c18 1297 static inline void edma_hal_htcd_configure_current_minor_link_channel(
mbed_official 146:f64d43ff0c18 1298 uint32_t instance, uint32_t channel, uint32_t minorchannel)
mbed_official 146:f64d43ff0c18 1299 {
mbed_official 146:f64d43ff0c18 1300 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1301 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1302 BW_DMA_TCDn_CITER_ELINKYES_LINKCH(instance, channel, minorchannel);
mbed_official 146:f64d43ff0c18 1303 }
mbed_official 146:f64d43ff0c18 1304
mbed_official 146:f64d43ff0c18 1305 /*!
mbed_official 146:f64d43ff0c18 1306 * @brief Configures the major count if the minor loop channel link is disabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 1307 *
mbed_official 146:f64d43ff0c18 1308 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1309 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1310 * @param count major loop count
mbed_official 146:f64d43ff0c18 1311 */
mbed_official 146:f64d43ff0c18 1312 static inline void edma_hal_htcd_configure_majorcount_minorlink_disabled(
mbed_official 146:f64d43ff0c18 1313 uint32_t instance, uint32_t channel, uint32_t count)
mbed_official 146:f64d43ff0c18 1314 {
mbed_official 146:f64d43ff0c18 1315 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1316 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1317 BW_DMA_TCDn_BITER_ELINKNO_BITER(instance, channel, count);
mbed_official 146:f64d43ff0c18 1318 }
mbed_official 146:f64d43ff0c18 1319
mbed_official 146:f64d43ff0c18 1320 /*!
mbed_official 146:f64d43ff0c18 1321 * @brief Configures the current major count if the minor loop channel link is disabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 1322 *
mbed_official 146:f64d43ff0c18 1323 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1324 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1325 * @param count major loop count
mbed_official 146:f64d43ff0c18 1326 */
mbed_official 146:f64d43ff0c18 1327 static inline void edma_hal_htcd_configure_current_majorcount_minorlink_disabled(
mbed_official 146:f64d43ff0c18 1328 uint32_t instance, uint32_t channel, uint32_t count)
mbed_official 146:f64d43ff0c18 1329 {
mbed_official 146:f64d43ff0c18 1330 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1331 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1332 BW_DMA_TCDn_CITER_ELINKNO_CITER(instance, channel, count);
mbed_official 146:f64d43ff0c18 1333 }
mbed_official 146:f64d43ff0c18 1334
mbed_official 146:f64d43ff0c18 1335 /*!
mbed_official 146:f64d43ff0c18 1336 * @brief Configures the major count if the minor loop channel link is enabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 1337 *
mbed_official 146:f64d43ff0c18 1338 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1339 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1340 * @param count major loop count
mbed_official 146:f64d43ff0c18 1341 */
mbed_official 146:f64d43ff0c18 1342 static inline void edma_hal_htcd_configure_majorcount_minorlink_enabled(
mbed_official 146:f64d43ff0c18 1343 uint32_t instance, uint32_t channel, uint32_t count)
mbed_official 146:f64d43ff0c18 1344 {
mbed_official 146:f64d43ff0c18 1345 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1346 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1347 BW_DMA_TCDn_BITER_ELINKYES_BITER(instance, channel, count);
mbed_official 146:f64d43ff0c18 1348 }
mbed_official 146:f64d43ff0c18 1349
mbed_official 146:f64d43ff0c18 1350 /*!
mbed_official 146:f64d43ff0c18 1351 * @brief Configures the current major count if the minor loop channel link is enabled for the hardware TCD.
mbed_official 146:f64d43ff0c18 1352 *
mbed_official 146:f64d43ff0c18 1353 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1354 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1355 * @param count major loop count
mbed_official 146:f64d43ff0c18 1356 */
mbed_official 146:f64d43ff0c18 1357 static inline void edma_hal_htcd_configure_current_majorcount_minorlink_enabled(
mbed_official 146:f64d43ff0c18 1358 uint32_t instance, uint32_t channel, uint32_t count)
mbed_official 146:f64d43ff0c18 1359 {
mbed_official 146:f64d43ff0c18 1360 assert(instance < HW_DMA_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 1361 assert(channel < FSL_FEATURE_DMA_MODULE_CHANNEL);
mbed_official 146:f64d43ff0c18 1362 BW_DMA_TCDn_CITER_ELINKYES_CITER(instance, channel, count);
mbed_official 146:f64d43ff0c18 1363 }
mbed_official 146:f64d43ff0c18 1364
mbed_official 146:f64d43ff0c18 1365 /*!
mbed_official 146:f64d43ff0c18 1366 * @brief Gets the current major loop count.
mbed_official 146:f64d43ff0c18 1367 *
mbed_official 146:f64d43ff0c18 1368 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1369 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1370 * @return current major loop count
mbed_official 146:f64d43ff0c18 1371 */
mbed_official 146:f64d43ff0c18 1372 uint32_t edma_hal_htcd_get_current_major_count(uint32_t instance, uint32_t channel);
mbed_official 146:f64d43ff0c18 1373
mbed_official 146:f64d43ff0c18 1374 /*!
mbed_official 146:f64d43ff0c18 1375 * @brief Gets the beginning major loop count.
mbed_official 146:f64d43ff0c18 1376 *
mbed_official 146:f64d43ff0c18 1377 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1378 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1379 * @return begin major loop count
mbed_official 146:f64d43ff0c18 1380 */
mbed_official 146:f64d43ff0c18 1381 uint32_t edma_hal_htcd_get_begin_major_count(uint32_t instance, uint32_t channel);
mbed_official 146:f64d43ff0c18 1382
mbed_official 146:f64d43ff0c18 1383 /*!
mbed_official 146:f64d43ff0c18 1384 * @brief Gets the bytes number not to be transferred for the hardware TCD.
mbed_official 146:f64d43ff0c18 1385 *
mbed_official 146:f64d43ff0c18 1386 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1387 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1388 * @return data bytes to be transferred
mbed_official 146:f64d43ff0c18 1389 */
mbed_official 146:f64d43ff0c18 1390 uint32_t edma_hal_htcd_get_unfinished_bytes(uint32_t instance, uint32_t channel);
mbed_official 146:f64d43ff0c18 1391
mbed_official 146:f64d43ff0c18 1392 /*!
mbed_official 146:f64d43ff0c18 1393 * @brief Gets the number of already transferred bytes for the hardware TCD.
mbed_official 146:f64d43ff0c18 1394 *
mbed_official 146:f64d43ff0c18 1395 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1396 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1397 * @return data bytes to be transferred
mbed_official 146:f64d43ff0c18 1398 */
mbed_official 146:f64d43ff0c18 1399 uint32_t edma_hal_htcd_get_finished_bytes(uint32_t instance, uint32_t channel);
mbed_official 146:f64d43ff0c18 1400 /* @} */
mbed_official 146:f64d43ff0c18 1401
mbed_official 146:f64d43ff0c18 1402 /*!
mbed_official 146:f64d43ff0c18 1403 * @name eDMA HAL software TCD configuration
mbed_official 146:f64d43ff0c18 1404 * @{
mbed_official 146:f64d43ff0c18 1405 */
mbed_official 146:f64d43ff0c18 1406
mbed_official 146:f64d43ff0c18 1407 /*!
mbed_official 146:f64d43ff0c18 1408 * @brief Configures the source address for the software TCD.
mbed_official 146:f64d43ff0c18 1409 *
mbed_official 146:f64d43ff0c18 1410 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1411 * @param address memory address pointing to the source data
mbed_official 146:f64d43ff0c18 1412 */
mbed_official 146:f64d43ff0c18 1413 static inline void edma_hal_stcd_configure_source_address(
mbed_official 146:f64d43ff0c18 1414 edma_software_tcd_t *stcd, uint32_t address)
mbed_official 146:f64d43ff0c18 1415 {
mbed_official 146:f64d43ff0c18 1416 assert(stcd);
mbed_official 146:f64d43ff0c18 1417 stcd->SADDR = DMA_SADDR_SADDR(address);
mbed_official 146:f64d43ff0c18 1418 }
mbed_official 146:f64d43ff0c18 1419
mbed_official 146:f64d43ff0c18 1420 /*!
mbed_official 146:f64d43ff0c18 1421 * @brief Configures the source address for the software TCD.
mbed_official 146:f64d43ff0c18 1422 *
mbed_official 146:f64d43ff0c18 1423 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1424 * @param address memory address pointing to the source data
mbed_official 146:f64d43ff0c18 1425 */
mbed_official 146:f64d43ff0c18 1426 static inline void edma_hal_stcd_configure_source_offset(
mbed_official 146:f64d43ff0c18 1427 edma_software_tcd_t *stcd, uint32_t offset)
mbed_official 146:f64d43ff0c18 1428 {
mbed_official 146:f64d43ff0c18 1429 assert(stcd);
mbed_official 146:f64d43ff0c18 1430 stcd->SOFF = DMA_SOFF_SOFF(offset);
mbed_official 146:f64d43ff0c18 1431 }
mbed_official 146:f64d43ff0c18 1432
mbed_official 146:f64d43ff0c18 1433 /*!
mbed_official 146:f64d43ff0c18 1434 * @brief Configures the source modulo for the software TCD.
mbed_official 146:f64d43ff0c18 1435 *
mbed_official 146:f64d43ff0c18 1436 * The value defines a specific address range as the value after the SADDR + SOFF
mbed_official 146:f64d43ff0c18 1437 * calculation is performed on the original register value. Setting this field provides the ability
mbed_official 146:f64d43ff0c18 1438 * to implement a circular data queue. For data queues requiring power-of-2 size bytes, the
mbed_official 146:f64d43ff0c18 1439 * queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate
mbed_official 146:f64d43ff0c18 1440 * value for the queue, freezing the desired number of upper address bits. The value programmed into
mbed_official 146:f64d43ff0c18 1441 * this field specifies the number of lower address bits allowed to change. For a circular queue
mbed_official 146:f64d43ff0c18 1442 * application, the SOFF is typically set to the transfer size to implement post-increment addressing
mbed_official 146:f64d43ff0c18 1443 * with SMOD function restricting the addresses to a 0-modulo-size range.
mbed_official 146:f64d43ff0c18 1444 *
mbed_official 146:f64d43ff0c18 1445 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1446 * @param modulo enum type for the allowed modulo
mbed_official 146:f64d43ff0c18 1447 */
mbed_official 146:f64d43ff0c18 1448 static inline void edma_hal_stcd_configure_source_modulo(
mbed_official 146:f64d43ff0c18 1449 edma_software_tcd_t *stcd, edma_modulo_t modulo)
mbed_official 146:f64d43ff0c18 1450 {
mbed_official 146:f64d43ff0c18 1451 assert(stcd);
mbed_official 146:f64d43ff0c18 1452 stcd->ATTR = (stcd->ATTR & ~DMA_ATTR_SMOD_MASK) | DMA_ATTR_SMOD(modulo);
mbed_official 146:f64d43ff0c18 1453 }
mbed_official 146:f64d43ff0c18 1454
mbed_official 146:f64d43ff0c18 1455 /*!
mbed_official 146:f64d43ff0c18 1456 * @brief Configures the source data transfersize for the software TCD.
mbed_official 146:f64d43ff0c18 1457 *
mbed_official 146:f64d43ff0c18 1458 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1459 * @param size enum type for transfer size
mbed_official 146:f64d43ff0c18 1460 */
mbed_official 146:f64d43ff0c18 1461 static inline void edma_hal_stcd_configure_source_transfersize(
mbed_official 146:f64d43ff0c18 1462 edma_software_tcd_t *stcd, edma_transfer_size_t size)
mbed_official 146:f64d43ff0c18 1463 {
mbed_official 146:f64d43ff0c18 1464 assert(stcd);
mbed_official 146:f64d43ff0c18 1465 stcd->ATTR = (stcd->ATTR & ~DMA_ATTR_SSIZE_MASK) | DMA_ATTR_SSIZE(size);
mbed_official 146:f64d43ff0c18 1466 }
mbed_official 146:f64d43ff0c18 1467
mbed_official 146:f64d43ff0c18 1468 /*!
mbed_official 146:f64d43ff0c18 1469 * @brief Configures the destination modulo for the software TCD.
mbed_official 146:f64d43ff0c18 1470 *
mbed_official 146:f64d43ff0c18 1471 * The value defines a specific address range as the value after the DADDR + DOFF
mbed_official 146:f64d43ff0c18 1472 * calculation is performed on the original register value. Setting this field provides the ability
mbed_official 146:f64d43ff0c18 1473 * to implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the
mbed_official 146:f64d43ff0c18 1474 * queue should start at a 0-modulo-size address and the SMOD field should be set to the appropriate
mbed_official 146:f64d43ff0c18 1475 * value for the queue, freezing the desired number of upper address bits. The value programmed into
mbed_official 146:f64d43ff0c18 1476 * this field specifies the number of lower address bits allowed to change. For a circular queue
mbed_official 146:f64d43ff0c18 1477 * application, the SOFF is typically set to the transfer size to implement post-increment addressing
mbed_official 146:f64d43ff0c18 1478 * with DMOD function restricting the addresses to a 0-modulo-size range.
mbed_official 146:f64d43ff0c18 1479 *
mbed_official 146:f64d43ff0c18 1480 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1481 * @param modulo enum type for allowed modulo
mbed_official 146:f64d43ff0c18 1482 */
mbed_official 146:f64d43ff0c18 1483 static inline void edma_hal_stcd_configure_dest_modulo(
mbed_official 146:f64d43ff0c18 1484 edma_software_tcd_t *stcd, edma_modulo_t modulo)
mbed_official 146:f64d43ff0c18 1485 {
mbed_official 146:f64d43ff0c18 1486 assert(stcd);
mbed_official 146:f64d43ff0c18 1487 stcd->ATTR = (stcd->ATTR & ~DMA_ATTR_DMOD_MASK) | DMA_ATTR_DMOD(modulo);
mbed_official 146:f64d43ff0c18 1488 }
mbed_official 146:f64d43ff0c18 1489
mbed_official 146:f64d43ff0c18 1490 /*!
mbed_official 146:f64d43ff0c18 1491 * @brief Configures the destination data transfersize for the software TCD.
mbed_official 146:f64d43ff0c18 1492 *
mbed_official 146:f64d43ff0c18 1493 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1494 * @param size enum type for transfer size
mbed_official 146:f64d43ff0c18 1495 */
mbed_official 146:f64d43ff0c18 1496 static inline void edma_hal_stcd_configure_dest_transfersize(
mbed_official 146:f64d43ff0c18 1497 edma_software_tcd_t *stcd, edma_transfer_size_t size)
mbed_official 146:f64d43ff0c18 1498 {
mbed_official 146:f64d43ff0c18 1499 assert(stcd);
mbed_official 146:f64d43ff0c18 1500 stcd->ATTR = (stcd->ATTR & ~DMA_ATTR_DSIZE_MASK) | DMA_ATTR_DSIZE(size);
mbed_official 146:f64d43ff0c18 1501 }
mbed_official 146:f64d43ff0c18 1502
mbed_official 146:f64d43ff0c18 1503 /*!
mbed_official 146:f64d43ff0c18 1504 * @brief Configures the nbytes if minor loop mapping is disabled the for software TCD.
mbed_official 146:f64d43ff0c18 1505 *
mbed_official 146:f64d43ff0c18 1506 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1507 * @param nbytes Number of bytes to be transferred in each service request of the channel
mbed_official 146:f64d43ff0c18 1508 */
mbed_official 146:f64d43ff0c18 1509 static inline void edma_hal_stcd_configure_nbytes_minorloop_disabled(
mbed_official 146:f64d43ff0c18 1510 edma_software_tcd_t *stcd, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 1511 {
mbed_official 146:f64d43ff0c18 1512 assert(stcd);
mbed_official 146:f64d43ff0c18 1513 stcd->NBYTES_MLNO =
mbed_official 146:f64d43ff0c18 1514 (stcd->NBYTES_MLNO & ~DMA_NBYTES_MLNO_NBYTES_MASK) | DMA_NBYTES_MLNO_NBYTES(nbytes);
mbed_official 146:f64d43ff0c18 1515 }
mbed_official 146:f64d43ff0c18 1516
mbed_official 146:f64d43ff0c18 1517 /*!
mbed_official 146:f64d43ff0c18 1518 * @brief Configures the nbytes if the minor loop mapping is enabled and offset is disabled for the software TCD.
mbed_official 146:f64d43ff0c18 1519 *
mbed_official 146:f64d43ff0c18 1520 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1521 * @param nbytes Number of bytes to be transferred in each service request of the channel
mbed_official 146:f64d43ff0c18 1522 */
mbed_official 146:f64d43ff0c18 1523 static inline void edma_hal_stcd_configure_nbytes_minorloop_enabled_offset_disabled(
mbed_official 146:f64d43ff0c18 1524 edma_software_tcd_t *stcd, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 1525 {
mbed_official 146:f64d43ff0c18 1526 assert(stcd);
mbed_official 146:f64d43ff0c18 1527 stcd->NBYTES_MLOFFNO =
mbed_official 146:f64d43ff0c18 1528 (stcd->NBYTES_MLOFFNO & ~DMA_NBYTES_MLOFFNO_NBYTES_MASK) | DMA_NBYTES_MLOFFNO_NBYTES(nbytes);
mbed_official 146:f64d43ff0c18 1529 }
mbed_official 146:f64d43ff0c18 1530
mbed_official 146:f64d43ff0c18 1531 /*!
mbed_official 146:f64d43ff0c18 1532 * @brief Configures the nbytes if minor loop mapping is enabled and offset is enabled for the software TCD.
mbed_official 146:f64d43ff0c18 1533 *
mbed_official 146:f64d43ff0c18 1534 * @param STCD memory pointing to the eDMA software TCD.
mbed_official 146:f64d43ff0c18 1535 * @param nbytes Number of bytes to be transferred in each service request of the channel.
mbed_official 146:f64d43ff0c18 1536 */
mbed_official 146:f64d43ff0c18 1537 static inline void edma_hal_stcd_configure_nbytes_minorloop_enabled_offset_enabled(
mbed_official 146:f64d43ff0c18 1538 edma_software_tcd_t *stcd, uint32_t nbytes)
mbed_official 146:f64d43ff0c18 1539 {
mbed_official 146:f64d43ff0c18 1540 assert(stcd);
mbed_official 146:f64d43ff0c18 1541 stcd->NBYTES_MLOFFYES =
mbed_official 146:f64d43ff0c18 1542 (stcd->NBYTES_MLOFFYES & ~DMA_NBYTES_MLOFFYES_NBYTES_MASK) | DMA_NBYTES_MLOFFYES_NBYTES(nbytes);
mbed_official 146:f64d43ff0c18 1543 }
mbed_official 146:f64d43ff0c18 1544
mbed_official 146:f64d43ff0c18 1545 /*!
mbed_official 146:f64d43ff0c18 1546 * @brief Configures the minorloop offset for the software TCD.
mbed_official 146:f64d43ff0c18 1547 *
mbed_official 146:f64d43ff0c18 1548 * Configures both the enable bits and the offset value. If neither source nor destination offset is enabled,
mbed_official 146:f64d43ff0c18 1549 * offset can't be configured.
mbed_official 146:f64d43ff0c18 1550 *
mbed_official 146:f64d43ff0c18 1551 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1552 * @param config Configuration data structure for the minorloop offset
mbed_official 146:f64d43ff0c18 1553 */
mbed_official 146:f64d43ff0c18 1554 static inline void edma_hal_stcd_configure_minorloop_offset(
mbed_official 146:f64d43ff0c18 1555 edma_software_tcd_t *stcd, edma_minorloop_offset_config_t *config)
mbed_official 146:f64d43ff0c18 1556 {
mbed_official 146:f64d43ff0c18 1557 assert(stcd);
mbed_official 146:f64d43ff0c18 1558 stcd->NBYTES_MLOFFYES =
mbed_official 146:f64d43ff0c18 1559 (stcd->NBYTES_MLOFFYES & ~(DMA_NBYTES_MLOFFYES_SMLOE_MASK | DMA_NBYTES_MLOFFYES_DMLOE_MASK)) |
mbed_official 146:f64d43ff0c18 1560 (((uint32_t)config->isEnableSourceMinorloop << DMA_NBYTES_MLOFFYES_SMLOE_SHIFT) |
mbed_official 146:f64d43ff0c18 1561 ((uint32_t)config->isEnableDestMinorloop << DMA_NBYTES_MLOFFYES_DMLOE_SHIFT));
mbed_official 146:f64d43ff0c18 1562
mbed_official 146:f64d43ff0c18 1563 if ((config->isEnableSourceMinorloop == true) || (config->isEnableDestMinorloop == true))
mbed_official 146:f64d43ff0c18 1564 {
mbed_official 146:f64d43ff0c18 1565 stcd->NBYTES_MLOFFYES =
mbed_official 146:f64d43ff0c18 1566 (stcd->NBYTES_MLOFFYES & ~DMA_NBYTES_MLOFFYES_MLOFF_MASK) |
mbed_official 146:f64d43ff0c18 1567 DMA_NBYTES_MLOFFYES_MLOFF(config->offset);
mbed_official 146:f64d43ff0c18 1568 }
mbed_official 146:f64d43ff0c18 1569 }
mbed_official 146:f64d43ff0c18 1570
mbed_official 146:f64d43ff0c18 1571 /*!
mbed_official 146:f64d43ff0c18 1572 * @brief Configures the last source address adjustment for the software TCD.
mbed_official 146:f64d43ff0c18 1573 *
mbed_official 146:f64d43ff0c18 1574 * Adjustment value added to the source address at the completion of the major iteration count. This
mbed_official 146:f64d43ff0c18 1575 * value can be applied to restore the source address to the initial value, or adjust the address to
mbed_official 146:f64d43ff0c18 1576 * reference the next data structure.
mbed_official 146:f64d43ff0c18 1577 *
mbed_official 146:f64d43ff0c18 1578 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1579 * @param size adjustment value
mbed_official 146:f64d43ff0c18 1580 */
mbed_official 146:f64d43ff0c18 1581 static inline void edma_hal_stcd_configure_source_last_adjustment(
mbed_official 146:f64d43ff0c18 1582 edma_software_tcd_t *stcd, int32_t size)
mbed_official 146:f64d43ff0c18 1583 {
mbed_official 146:f64d43ff0c18 1584 assert(stcd);
mbed_official 146:f64d43ff0c18 1585 stcd->SLAST = (stcd->SLAST & ~DMA_SLAST_SLAST_MASK) | DMA_SLAST_SLAST(size);
mbed_official 146:f64d43ff0c18 1586 }
mbed_official 146:f64d43ff0c18 1587
mbed_official 146:f64d43ff0c18 1588 /*!
mbed_official 146:f64d43ff0c18 1589 * @brief Configures the destination address for the software TCD.
mbed_official 146:f64d43ff0c18 1590 *
mbed_official 146:f64d43ff0c18 1591 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1592 * @param address memory address pointing to destination data
mbed_official 146:f64d43ff0c18 1593 */
mbed_official 146:f64d43ff0c18 1594 static inline void edma_hal_stcd_configure_dest_address(
mbed_official 146:f64d43ff0c18 1595 edma_software_tcd_t *stcd, uint32_t address)
mbed_official 146:f64d43ff0c18 1596 {
mbed_official 146:f64d43ff0c18 1597 assert(stcd);
mbed_official 146:f64d43ff0c18 1598 stcd->DADDR = DMA_DADDR_DADDR(address);
mbed_official 146:f64d43ff0c18 1599 }
mbed_official 146:f64d43ff0c18 1600
mbed_official 146:f64d43ff0c18 1601 /*!
mbed_official 146:f64d43ff0c18 1602 * @brief Configures the destination address signed offset for the software TCD.
mbed_official 146:f64d43ff0c18 1603 *
mbed_official 146:f64d43ff0c18 1604 * Sign-extended offset applied to the current source address to form the next-state value as each
mbed_official 146:f64d43ff0c18 1605 * destination write is complete.
mbed_official 146:f64d43ff0c18 1606 *
mbed_official 146:f64d43ff0c18 1607 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1608 * @param offset signed-offset
mbed_official 146:f64d43ff0c18 1609 */
mbed_official 146:f64d43ff0c18 1610 static inline void edma_hal_stcd_configure_dest_offset(
mbed_official 146:f64d43ff0c18 1611 edma_software_tcd_t *stcd, uint32_t offset)
mbed_official 146:f64d43ff0c18 1612 {
mbed_official 146:f64d43ff0c18 1613 assert(stcd);
mbed_official 146:f64d43ff0c18 1614 stcd->DOFF = DMA_DOFF_DOFF(offset);
mbed_official 146:f64d43ff0c18 1615 }
mbed_official 146:f64d43ff0c18 1616
mbed_official 146:f64d43ff0c18 1617 /*!
mbed_official 146:f64d43ff0c18 1618 * @brief Configures the last source address adjustment or the memory address for the next transfer
mbed_official 146:f64d43ff0c18 1619 * control for the software TCD.
mbed_official 146:f64d43ff0c18 1620 *
mbed_official 146:f64d43ff0c18 1621 * If the scatter/gather feature is enabled(edma_hal_htcd_set_scatter_gather_process()):
mbed_official 146:f64d43ff0c18 1622 *
mbed_official 146:f64d43ff0c18 1623 * This address points to the beginning of a 0-modulo-32 byte region containing the next transfer
mbed_official 146:f64d43ff0c18 1624 * control descriptor to be loaded into this channel. The channel reload is performed as the major
mbed_official 146:f64d43ff0c18 1625 * iteration count completes. The scatter/gather address must be 0-modulo-32-byte. Otherwise, a
mbed_official 146:f64d43ff0c18 1626 * configuration error is reported.
mbed_official 146:f64d43ff0c18 1627 *
mbed_official 146:f64d43ff0c18 1628 * else:
mbed_official 146:f64d43ff0c18 1629 *
mbed_official 146:f64d43ff0c18 1630 * Adjustment value added to the source address at the completion of the major iteration count. This
mbed_official 146:f64d43ff0c18 1631 * value can be applied to restore the source address to the initial value, or adjust the address to
mbed_official 146:f64d43ff0c18 1632 * reference the next data structure.
mbed_official 146:f64d43ff0c18 1633 *
mbed_official 146:f64d43ff0c18 1634 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1635 * @param size adjustment value
mbed_official 146:f64d43ff0c18 1636 */
mbed_official 146:f64d43ff0c18 1637 static inline void edma_hal_stcd_configure_dest_last_adjustment_or_scatter_address(
mbed_official 146:f64d43ff0c18 1638 edma_software_tcd_t *stcd, uint32_t address)
mbed_official 146:f64d43ff0c18 1639 {
mbed_official 146:f64d43ff0c18 1640 assert(stcd);
mbed_official 146:f64d43ff0c18 1641 stcd->DLAST_SGA = DMA_DLAST_SGA_DLASTSGA(address);
mbed_official 146:f64d43ff0c18 1642 }
mbed_official 146:f64d43ff0c18 1643
mbed_official 146:f64d43ff0c18 1644 /*!
mbed_official 146:f64d43ff0c18 1645 * @brief Configures the bandwidth for the software TCD.
mbed_official 146:f64d43ff0c18 1646 *
mbed_official 146:f64d43ff0c18 1647 * Throttles the amount of bus bandwidth consumed by the eDMA. As the eDMA processes the
mbed_official 146:f64d43ff0c18 1648 * minor loop, it continuously generates read/write sequences until the minor count is exhausted.
mbed_official 146:f64d43ff0c18 1649 * This field forces the eDMA to stall after the completion of each read/write access to control the
mbed_official 146:f64d43ff0c18 1650 * bus request bandwidth seen by the crossbar switch.
mbed_official 146:f64d43ff0c18 1651 *
mbed_official 146:f64d43ff0c18 1652 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1653 * @param bandwidth enum type for bandwidth control
mbed_official 146:f64d43ff0c18 1654 */
mbed_official 146:f64d43ff0c18 1655 static inline void edma_hal_stcd_configure_bandwidth(
mbed_official 146:f64d43ff0c18 1656 edma_software_tcd_t *stcd, edma_bandwidth_configuration_t bandwidth)
mbed_official 146:f64d43ff0c18 1657 {
mbed_official 146:f64d43ff0c18 1658 assert(stcd);
mbed_official 146:f64d43ff0c18 1659 stcd->CSR = (stcd->CSR & ~DMA_CSR_BWC_MASK) | DMA_CSR_BWC(bandwidth);
mbed_official 146:f64d43ff0c18 1660 }
mbed_official 146:f64d43ff0c18 1661
mbed_official 146:f64d43ff0c18 1662 /*!
mbed_official 146:f64d43ff0c18 1663 * @brief Configures the major link channel number for the software TCD.
mbed_official 146:f64d43ff0c18 1664 *
mbed_official 146:f64d43ff0c18 1665 * If majorlink is enabled, after the major loop counter is exhausted, the eDMA engine initiates a
mbed_official 146:f64d43ff0c18 1666 * channel service request at the channel defined by these six bits by setting that channel start
mbed_official 146:f64d43ff0c18 1667 * bits.
mbed_official 146:f64d43ff0c18 1668 *
mbed_official 146:f64d43ff0c18 1669 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1670 * @param majorchannel channel number for major link
mbed_official 146:f64d43ff0c18 1671 */
mbed_official 146:f64d43ff0c18 1672 static inline void edma_hal_stcd_configure_majorlink_channel(
mbed_official 146:f64d43ff0c18 1673 edma_software_tcd_t *stcd, uint32_t majorchannel)
mbed_official 146:f64d43ff0c18 1674 {
mbed_official 146:f64d43ff0c18 1675 assert(stcd);
mbed_official 146:f64d43ff0c18 1676 stcd->CSR = (stcd->CSR & ~DMA_CSR_MAJORLINKCH_MASK) | DMA_CSR_MAJORLINKCH(majorchannel);
mbed_official 146:f64d43ff0c18 1677 }
mbed_official 146:f64d43ff0c18 1678
mbed_official 146:f64d43ff0c18 1679 /*!
mbed_official 146:f64d43ff0c18 1680 * @brief Enables/Disables the major link channel feature for the software TCD.
mbed_official 146:f64d43ff0c18 1681 *
mbed_official 146:f64d43ff0c18 1682 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1683 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1684 */
mbed_official 146:f64d43ff0c18 1685 static inline void edma_hal_stcd_set_majorlink(edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1686 {
mbed_official 146:f64d43ff0c18 1687 assert(stcd);
mbed_official 146:f64d43ff0c18 1688 stcd->CSR = (stcd->CSR & ~DMA_CSR_MAJORELINK_MASK) |
mbed_official 146:f64d43ff0c18 1689 ((uint32_t)isEnabled << DMA_CSR_MAJORELINK_SHIFT);
mbed_official 146:f64d43ff0c18 1690 }
mbed_official 146:f64d43ff0c18 1691
mbed_official 146:f64d43ff0c18 1692 /*!
mbed_official 146:f64d43ff0c18 1693 * @brief Enables/Disables the scatter/gather feature for the software TCD.
mbed_official 146:f64d43ff0c18 1694 *
mbed_official 146:f64d43ff0c18 1695 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1696 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1697 */
mbed_official 146:f64d43ff0c18 1698 static inline void edma_hal_stcd_set_scatter_gather_process(
mbed_official 146:f64d43ff0c18 1699 edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1700 {
mbed_official 146:f64d43ff0c18 1701 assert(stcd);
mbed_official 146:f64d43ff0c18 1702 stcd->CSR = (stcd->CSR & ~DMA_CSR_ESG_MASK) | ((uint32_t)isEnabled << DMA_CSR_ESG_SHIFT);
mbed_official 146:f64d43ff0c18 1703 }
mbed_official 146:f64d43ff0c18 1704
mbed_official 146:f64d43ff0c18 1705 /*!
mbed_official 146:f64d43ff0c18 1706 * @brief Disables/Enables the DMA request after the major loop completes for the software TCD.
mbed_official 146:f64d43ff0c18 1707 *
mbed_official 146:f64d43ff0c18 1708 * If disabled, the eDMA hardware automatically clears the corresponding DMA request when the
mbed_official 146:f64d43ff0c18 1709 * current major iteration count reaches zero.
mbed_official 146:f64d43ff0c18 1710 *
mbed_official 146:f64d43ff0c18 1711 * @param STCD memory pointing to the eDMA software TCD.
mbed_official 146:f64d43ff0c18 1712 * @param isDisabled Disable/Enable
mbed_official 146:f64d43ff0c18 1713 */
mbed_official 146:f64d43ff0c18 1714 static inline void edma_hal_stcd_set_disable_dma_request_after_tcd_done(
mbed_official 146:f64d43ff0c18 1715 edma_software_tcd_t *stcd, bool isDisabled)
mbed_official 146:f64d43ff0c18 1716 {
mbed_official 146:f64d43ff0c18 1717 assert(stcd);
mbed_official 146:f64d43ff0c18 1718 stcd->CSR = (stcd->CSR & ~DMA_CSR_DREQ_MASK) | ((uint32_t)isDisabled << DMA_CSR_DREQ_SHIFT);
mbed_official 146:f64d43ff0c18 1719 }
mbed_official 146:f64d43ff0c18 1720
mbed_official 146:f64d43ff0c18 1721 /*!
mbed_official 146:f64d43ff0c18 1722 * @brief Enables/Disables the half complete interrupt for the software TCD.
mbed_official 146:f64d43ff0c18 1723 *
mbed_official 146:f64d43ff0c18 1724 * If set, the channel generates an interrupt request by setting the appropriate bit in the
mbed_official 146:f64d43ff0c18 1725 * interrupt register when the current major iteration count reaches the halfway point. Specifically,
mbed_official 146:f64d43ff0c18 1726 * the comparison performed by the eDMA engine is (CITER == (BITER >> 1)). This half way point
mbed_official 146:f64d43ff0c18 1727 * interrupt request is provided to support the double-buffered schemes or other types of data movement
mbed_official 146:f64d43ff0c18 1728 * where the processor needs an early indication of the transfer process.
mbed_official 146:f64d43ff0c18 1729 *
mbed_official 146:f64d43ff0c18 1730 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1731 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1732 */
mbed_official 146:f64d43ff0c18 1733 static inline void edma_hal_stcd_set_half_complete_interrupt(
mbed_official 146:f64d43ff0c18 1734 edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1735 {
mbed_official 146:f64d43ff0c18 1736 assert(stcd);
mbed_official 146:f64d43ff0c18 1737 stcd->CSR = (stcd->CSR & ~DMA_CSR_INTHALF_MASK) | ((uint32_t)isEnabled << DMA_CSR_INTHALF_SHIFT);
mbed_official 146:f64d43ff0c18 1738 }
mbed_official 146:f64d43ff0c18 1739
mbed_official 146:f64d43ff0c18 1740 /*!
mbed_official 146:f64d43ff0c18 1741 * @brief Enables/Disables the interrupt after major loop complete for the software TCD.
mbed_official 146:f64d43ff0c18 1742 *
mbed_official 146:f64d43ff0c18 1743 * If enabled, the channel generates an interrupt request by setting the appropriate bit in the
mbed_official 146:f64d43ff0c18 1744 * interrupt register when the current major iteration count reaches zero.
mbed_official 146:f64d43ff0c18 1745 *
mbed_official 146:f64d43ff0c18 1746 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1747 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1748 */
mbed_official 146:f64d43ff0c18 1749 static inline void edma_hal_stcd_set_complete_interrupt(
mbed_official 146:f64d43ff0c18 1750 edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1751 {
mbed_official 146:f64d43ff0c18 1752 assert(stcd);
mbed_official 146:f64d43ff0c18 1753 stcd->CSR = (stcd->CSR & ~DMA_CSR_INTMAJOR_MASK) | ((uint32_t)isEnabled << DMA_CSR_INTMAJOR_SHIFT);
mbed_official 146:f64d43ff0c18 1754 }
mbed_official 146:f64d43ff0c18 1755
mbed_official 146:f64d43ff0c18 1756 /*!
mbed_official 146:f64d43ff0c18 1757 * @brief Sets the trigger start bits for the software TCD.
mbed_official 146:f64d43ff0c18 1758 *
mbed_official 146:f64d43ff0c18 1759 */
mbed_official 146:f64d43ff0c18 1760 static inline void edma_hal_stcd_trigger_channel_start(
mbed_official 146:f64d43ff0c18 1761 edma_software_tcd_t *stcd)
mbed_official 146:f64d43ff0c18 1762 {
mbed_official 146:f64d43ff0c18 1763 assert(stcd);
mbed_official 146:f64d43ff0c18 1764 stcd->CSR |= DMA_CSR_START_MASK;
mbed_official 146:f64d43ff0c18 1765 }
mbed_official 146:f64d43ff0c18 1766
mbed_official 146:f64d43ff0c18 1767 /*!
mbed_official 146:f64d43ff0c18 1768 * @brief Enables/Disables the channel link after the minor loop for the software TCD.
mbed_official 146:f64d43ff0c18 1769 *
mbed_official 146:f64d43ff0c18 1770 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1771 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1772 */
mbed_official 146:f64d43ff0c18 1773 static inline void edma_hal_stcd_set_minor_link(
mbed_official 146:f64d43ff0c18 1774 edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1775 {
mbed_official 146:f64d43ff0c18 1776 assert(stcd);
mbed_official 146:f64d43ff0c18 1777 stcd->BITER_ELINKYES = (stcd->BITER_ELINKYES & ~DMA_BITER_ELINKYES_ELINK_MASK) |
mbed_official 146:f64d43ff0c18 1778 ((uint32_t)isEnabled << DMA_BITER_ELINKYES_ELINK_SHIFT);
mbed_official 146:f64d43ff0c18 1779 }
mbed_official 146:f64d43ff0c18 1780
mbed_official 146:f64d43ff0c18 1781 /*!
mbed_official 146:f64d43ff0c18 1782 * @brief Enables/Disables the current channel link after the minor loop for the software TCD.
mbed_official 146:f64d43ff0c18 1783 *
mbed_official 146:f64d43ff0c18 1784 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1785 * @param isEnabled Enable/Disable
mbed_official 146:f64d43ff0c18 1786 */
mbed_official 146:f64d43ff0c18 1787 static inline void edma_hal_stcd_set_current_minor_link(
mbed_official 146:f64d43ff0c18 1788 edma_software_tcd_t *stcd, bool isEnabled)
mbed_official 146:f64d43ff0c18 1789 {
mbed_official 146:f64d43ff0c18 1790 assert(stcd);
mbed_official 146:f64d43ff0c18 1791 stcd->CITER_ELINKYES = (stcd->CITER_ELINKYES & ~DMA_CITER_ELINKYES_ELINK_MASK) |
mbed_official 146:f64d43ff0c18 1792 ((uint32_t)isEnabled << DMA_CITER_ELINKYES_ELINK_SHIFT);
mbed_official 146:f64d43ff0c18 1793 }
mbed_official 146:f64d43ff0c18 1794
mbed_official 146:f64d43ff0c18 1795 /*!
mbed_official 146:f64d43ff0c18 1796 * @brief Configures the minor loop link channel for the software TCD.
mbed_official 146:f64d43ff0c18 1797 *
mbed_official 146:f64d43ff0c18 1798 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1799 * @param minorchannel minor loop link channel
mbed_official 146:f64d43ff0c18 1800 */
mbed_official 146:f64d43ff0c18 1801 static inline void edma_hal_stcd_configure_minor_link_channel(
mbed_official 146:f64d43ff0c18 1802 edma_software_tcd_t *stcd, uint32_t minorchannel)
mbed_official 146:f64d43ff0c18 1803 {
mbed_official 146:f64d43ff0c18 1804 assert(stcd);
mbed_official 146:f64d43ff0c18 1805 stcd->BITER_ELINKYES = (stcd->BITER_ELINKYES & ~DMA_BITER_ELINKYES_LINKCH_MASK) |
mbed_official 146:f64d43ff0c18 1806 DMA_BITER_ELINKYES_LINKCH(minorchannel);
mbed_official 146:f64d43ff0c18 1807 }
mbed_official 146:f64d43ff0c18 1808
mbed_official 146:f64d43ff0c18 1809 /*!
mbed_official 146:f64d43ff0c18 1810 * @brief Configures the minor loop link channel for the software TCD.
mbed_official 146:f64d43ff0c18 1811 *
mbed_official 146:f64d43ff0c18 1812 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1813 * @param minorchannel minor loop link channel.
mbed_official 146:f64d43ff0c18 1814 */
mbed_official 146:f64d43ff0c18 1815 static inline void edma_hal_stcd_configure_current_minor_link_channel(
mbed_official 146:f64d43ff0c18 1816 edma_software_tcd_t *stcd, uint32_t minorchannel)
mbed_official 146:f64d43ff0c18 1817 {
mbed_official 146:f64d43ff0c18 1818 assert(stcd);
mbed_official 146:f64d43ff0c18 1819 stcd->CITER_ELINKYES = (stcd->CITER_ELINKYES & ~DMA_CITER_ELINKYES_LINKCH_MASK) |
mbed_official 146:f64d43ff0c18 1820 DMA_CITER_ELINKYES_LINKCH(minorchannel);
mbed_official 146:f64d43ff0c18 1821 }
mbed_official 146:f64d43ff0c18 1822
mbed_official 146:f64d43ff0c18 1823 /*!
mbed_official 146:f64d43ff0c18 1824 * @brief Configures the major count if the minor loop channel link is disabled for the software TCD.
mbed_official 146:f64d43ff0c18 1825 *
mbed_official 146:f64d43ff0c18 1826 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1827 * @param count major loop count
mbed_official 146:f64d43ff0c18 1828 */
mbed_official 146:f64d43ff0c18 1829 static inline void edma_hal_stcd_configure_majorcount_minorlink_disabled(
mbed_official 146:f64d43ff0c18 1830 edma_software_tcd_t *stcd, uint32_t count)
mbed_official 146:f64d43ff0c18 1831 {
mbed_official 146:f64d43ff0c18 1832 assert(stcd);
mbed_official 146:f64d43ff0c18 1833 stcd->BITER_ELINKNO = (stcd->BITER_ELINKNO & ~DMA_BITER_ELINKNO_BITER_MASK) |
mbed_official 146:f64d43ff0c18 1834 DMA_BITER_ELINKNO_BITER(count);
mbed_official 146:f64d43ff0c18 1835 }
mbed_official 146:f64d43ff0c18 1836
mbed_official 146:f64d43ff0c18 1837 /*!
mbed_official 146:f64d43ff0c18 1838 * @brief Configure current major count if minor loop channel link is disabled for software TCD.
mbed_official 146:f64d43ff0c18 1839 *
mbed_official 146:f64d43ff0c18 1840 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1841 * @param count major loop count
mbed_official 146:f64d43ff0c18 1842 */
mbed_official 146:f64d43ff0c18 1843 static inline void edma_hal_stcd_configure_current_majorcount_minorlink_disabled(
mbed_official 146:f64d43ff0c18 1844 edma_software_tcd_t *stcd, uint32_t count)
mbed_official 146:f64d43ff0c18 1845 {
mbed_official 146:f64d43ff0c18 1846 assert(stcd);
mbed_official 146:f64d43ff0c18 1847 stcd->CITER_ELINKNO = (stcd->CITER_ELINKNO & ~DMA_CITER_ELINKNO_CITER_MASK) |
mbed_official 146:f64d43ff0c18 1848 DMA_CITER_ELINKNO_CITER(count);
mbed_official 146:f64d43ff0c18 1849 }
mbed_official 146:f64d43ff0c18 1850
mbed_official 146:f64d43ff0c18 1851 /*!
mbed_official 146:f64d43ff0c18 1852 * @brief Configures the major count if the minor loop channel link is enabled for the software TCD.
mbed_official 146:f64d43ff0c18 1853 *
mbed_official 146:f64d43ff0c18 1854 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1855 * @param count major loop count
mbed_official 146:f64d43ff0c18 1856 */
mbed_official 146:f64d43ff0c18 1857 static inline void edma_hal_stcd_configure_majorcount_minorlink_enabled(
mbed_official 146:f64d43ff0c18 1858 edma_software_tcd_t *stcd, uint32_t count)
mbed_official 146:f64d43ff0c18 1859 {
mbed_official 146:f64d43ff0c18 1860 assert(stcd);
mbed_official 146:f64d43ff0c18 1861 stcd->BITER_ELINKYES = (stcd->BITER_ELINKYES & ~DMA_BITER_ELINKYES_BITER_MASK) |
mbed_official 146:f64d43ff0c18 1862 DMA_BITER_ELINKYES_BITER(count);
mbed_official 146:f64d43ff0c18 1863 }
mbed_official 146:f64d43ff0c18 1864
mbed_official 146:f64d43ff0c18 1865 /*!
mbed_official 146:f64d43ff0c18 1866 * @brief Configures the current major count if the minor loop channel link is enabled for the software TCD.
mbed_official 146:f64d43ff0c18 1867 *
mbed_official 146:f64d43ff0c18 1868 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1869 * @param count major loop count
mbed_official 146:f64d43ff0c18 1870 */
mbed_official 146:f64d43ff0c18 1871 static inline void edma_hal_stcd_configure_current_majorcount_minorlink_enabled(
mbed_official 146:f64d43ff0c18 1872 edma_software_tcd_t *stcd, uint32_t count)
mbed_official 146:f64d43ff0c18 1873 {
mbed_official 146:f64d43ff0c18 1874 assert(stcd);
mbed_official 146:f64d43ff0c18 1875 stcd->CITER_ELINKYES = (stcd->CITER_ELINKYES & ~DMA_CITER_ELINKYES_CITER_MASK) |
mbed_official 146:f64d43ff0c18 1876 DMA_CITER_ELINKYES_CITER(count);
mbed_official 146:f64d43ff0c18 1877 }
mbed_official 146:f64d43ff0c18 1878
mbed_official 146:f64d43ff0c18 1879 /*!
mbed_official 146:f64d43ff0c18 1880 * @brief Copy the software TCD configuration to the hardware TCD.
mbed_official 146:f64d43ff0c18 1881 *
mbed_official 146:f64d43ff0c18 1882 * @param STCD memory pointing to the eDMA software TCD
mbed_official 146:f64d43ff0c18 1883 * @param instance eDMA module
mbed_official 146:f64d43ff0c18 1884 * @param channel eDMA channel
mbed_official 146:f64d43ff0c18 1885 * @param STCD memory pointing to the software TCD
mbed_official 146:f64d43ff0c18 1886 */
mbed_official 146:f64d43ff0c18 1887 void edma_hal_stcd_push_to_htcd(uint32_t instance, uint32_t channel, edma_software_tcd_t *stcd);
mbed_official 146:f64d43ff0c18 1888
mbed_official 146:f64d43ff0c18 1889 /* @} */
mbed_official 146:f64d43ff0c18 1890
mbed_official 146:f64d43ff0c18 1891 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 1892 }
mbed_official 146:f64d43ff0c18 1893 #endif
mbed_official 146:f64d43ff0c18 1894
mbed_official 146:f64d43ff0c18 1895 /*! @} */
mbed_official 146:f64d43ff0c18 1896
mbed_official 146:f64d43ff0c18 1897 #endif /* __EDMA_HAL_H__ */
mbed_official 146:f64d43ff0c18 1898
mbed_official 146:f64d43ff0c18 1899 /*******************************************************************************
mbed_official 146:f64d43ff0c18 1900 * EOF
mbed_official 146:f64d43ff0c18 1901 ******************************************************************************/
mbed_official 146:f64d43ff0c18 1902