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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Wed Jul 01 08:15:11 2015 +0100
Revision:
577:15494b56c2f3
Parent:
targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL43Z/TOOLCHAIN_ARM_STD/startup_MKL43Z4.s@363:12a245e5c745
Synchronized with git revision 7766e75dd858812cd79aedb3080349715f55dd56

Full URL: https://github.com/mbedmicro/mbed/commit/7766e75dd858812cd79aedb3080349715f55dd56/

GCC asm updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 363:12a245e5c745 1 ; * ---------------------------------------------------------------------------------------
mbed_official 363:12a245e5c745 2 ; * @file: startup_MKL43Z4.s
mbed_official 363:12a245e5c745 3 ; * @purpose: CMSIS Cortex-M0P Core Device Startup File
mbed_official 363:12a245e5c745 4 ; * MKL43Z4
mbed_official 363:12a245e5c745 5 ; * @version: 1.3
mbed_official 363:12a245e5c745 6 ; * @date: 2014-8-21
mbed_official 363:12a245e5c745 7 ; * @build: b140821
mbed_official 363:12a245e5c745 8 ; * ---------------------------------------------------------------------------------------
mbed_official 363:12a245e5c745 9 ; *
mbed_official 363:12a245e5c745 10 ; * Copyright (c) 1997 - 2014 , Freescale Semiconductor, Inc.
mbed_official 363:12a245e5c745 11 ; * All rights reserved.
mbed_official 363:12a245e5c745 12 ; *
mbed_official 363:12a245e5c745 13 ; * Redistribution and use in source and binary forms, with or without modification,
mbed_official 363:12a245e5c745 14 ; * are permitted provided that the following conditions are met:
mbed_official 363:12a245e5c745 15 ; *
mbed_official 363:12a245e5c745 16 ; * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 363:12a245e5c745 17 ; * of conditions and the following disclaimer.
mbed_official 363:12a245e5c745 18 ; *
mbed_official 363:12a245e5c745 19 ; * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 363:12a245e5c745 20 ; * list of conditions and the following disclaimer in the documentation and/or
mbed_official 363:12a245e5c745 21 ; * other materials provided with the distribution.
mbed_official 363:12a245e5c745 22 ; *
mbed_official 363:12a245e5c745 23 ; * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 363:12a245e5c745 24 ; * contributors may be used to endorse or promote products derived from this
mbed_official 363:12a245e5c745 25 ; * software without specific prior written permission.
mbed_official 363:12a245e5c745 26 ; *
mbed_official 363:12a245e5c745 27 ; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 363:12a245e5c745 28 ; * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 363:12a245e5c745 29 ; * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 363:12a245e5c745 30 ; * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 363:12a245e5c745 31 ; * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 363:12a245e5c745 32 ; * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 363:12a245e5c745 33 ; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 363:12a245e5c745 34 ; * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 363:12a245e5c745 35 ; * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 363:12a245e5c745 36 ; * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 363:12a245e5c745 37 ; *
mbed_official 363:12a245e5c745 38 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
mbed_official 363:12a245e5c745 39 ; *
mbed_official 363:12a245e5c745 40 ; *****************************************************************************/
mbed_official 363:12a245e5c745 41
mbed_official 363:12a245e5c745 42
mbed_official 363:12a245e5c745 43 __initial_sp EQU 0x20006000 ; Top of RAM
mbed_official 363:12a245e5c745 44
mbed_official 363:12a245e5c745 45 PRESERVE8
mbed_official 363:12a245e5c745 46 THUMB
mbed_official 363:12a245e5c745 47
mbed_official 363:12a245e5c745 48
mbed_official 363:12a245e5c745 49 ; Vector Table Mapped to Address 0 at Reset
mbed_official 363:12a245e5c745 50
mbed_official 363:12a245e5c745 51 AREA RESET, DATA, READONLY
mbed_official 363:12a245e5c745 52 EXPORT __Vectors
mbed_official 363:12a245e5c745 53 EXPORT __Vectors_End
mbed_official 363:12a245e5c745 54 EXPORT __Vectors_Size
mbed_official 363:12a245e5c745 55
mbed_official 363:12a245e5c745 56 __Vectors DCD __initial_sp ; Top of Stack
mbed_official 363:12a245e5c745 57 DCD Reset_Handler ; Reset Handler
mbed_official 363:12a245e5c745 58 DCD NMI_Handler ;NMI Handler
mbed_official 363:12a245e5c745 59 DCD HardFault_Handler ;Hard Fault Handler
mbed_official 363:12a245e5c745 60 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 61 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 62 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 63 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 64 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 65 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 66 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 67 DCD SVC_Handler ;SVCall Handler
mbed_official 363:12a245e5c745 68 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 69 DCD 0 ;Reserved
mbed_official 363:12a245e5c745 70 DCD PendSV_Handler ;PendSV Handler
mbed_official 363:12a245e5c745 71 DCD SysTick_Handler ;SysTick Handler
mbed_official 363:12a245e5c745 72
mbed_official 363:12a245e5c745 73 ;External Interrupts
mbed_official 363:12a245e5c745 74 DCD DMA0_IRQHandler ;DMA channel 0 transfer complete
mbed_official 363:12a245e5c745 75 DCD DMA1_IRQHandler ;DMA channel 1 transfer complete
mbed_official 363:12a245e5c745 76 DCD DMA2_IRQHandler ;DMA channel 2 transfer complete
mbed_official 363:12a245e5c745 77 DCD DMA3_IRQHandler ;DMA channel 3 transfer complete
mbed_official 363:12a245e5c745 78 DCD Reserved20_IRQHandler ;Reserved interrupt
mbed_official 363:12a245e5c745 79 DCD FTFA_IRQHandler ;Command complete and read collision
mbed_official 363:12a245e5c745 80 DCD PMC_IRQHandler ;Low-voltage detect, low-voltage warning
mbed_official 363:12a245e5c745 81 DCD LLWU_IRQHandler ;Low leakage wakeup
mbed_official 363:12a245e5c745 82 DCD I2C0_IRQHandler ;I2C0 interrupt
mbed_official 363:12a245e5c745 83 DCD I2C1_IRQHandler ;I2C1 interrupt
mbed_official 363:12a245e5c745 84 DCD SPI0_IRQHandler ;SPI0 single interrupt vector for all sources
mbed_official 363:12a245e5c745 85 DCD SPI1_IRQHandler ;SPI1 single interrupt vector for all sources
mbed_official 363:12a245e5c745 86 DCD LPUART0_IRQHandler ;LPUART0 status and error
mbed_official 363:12a245e5c745 87 DCD LPUART1_IRQHandler ;LPUART1 status and error
mbed_official 363:12a245e5c745 88 DCD UART2_FLEXIO_IRQHandler ;UART2 or FLEXIO
mbed_official 363:12a245e5c745 89 DCD ADC0_IRQHandler ;ADC0 interrupt
mbed_official 363:12a245e5c745 90 DCD CMP0_IRQHandler ;CMP0 interrupt
mbed_official 363:12a245e5c745 91 DCD TPM0_IRQHandler ;TPM0 single interrupt vector for all sources
mbed_official 363:12a245e5c745 92 DCD TPM1_IRQHandler ;TPM1 single interrupt vector for all sources
mbed_official 363:12a245e5c745 93 DCD TPM2_IRQHandler ;TPM2 single interrupt vector for all sources
mbed_official 363:12a245e5c745 94 DCD RTC_IRQHandler ;RTC alarm
mbed_official 363:12a245e5c745 95 DCD RTC_Seconds_IRQHandler ;RTC seconds
mbed_official 363:12a245e5c745 96 DCD PIT_IRQHandler ;PIT interrupt
mbed_official 363:12a245e5c745 97 DCD I2S0_IRQHandler ;I2S0 interrupt
mbed_official 363:12a245e5c745 98 DCD USB0_IRQHandler ;USB0 interrupt
mbed_official 363:12a245e5c745 99 DCD DAC0_IRQHandler ;DAC0 interrupt
mbed_official 363:12a245e5c745 100 DCD Reserved42_IRQHandler ;Reserved interrupt
mbed_official 363:12a245e5c745 101 DCD Reserved43_IRQHandler ;Reserved interrupt
mbed_official 363:12a245e5c745 102 DCD LPTMR0_IRQHandler ;LPTMR0 interrupt
mbed_official 363:12a245e5c745 103 DCD LCD_IRQHandler ;LCD interrupt
mbed_official 363:12a245e5c745 104 DCD PORTA_IRQHandler ;PORTA Pin detect
mbed_official 363:12a245e5c745 105 DCD PORTCD_IRQHandler ;Single interrupt vector for PORTC; PORTD Pin detect
mbed_official 363:12a245e5c745 106 __Vectors_End
mbed_official 363:12a245e5c745 107
mbed_official 363:12a245e5c745 108 __Vectors_Size EQU __Vectors_End - __Vectors
mbed_official 363:12a245e5c745 109
mbed_official 363:12a245e5c745 110 ; <h> Flash Configuration
mbed_official 363:12a245e5c745 111 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
mbed_official 363:12a245e5c745 112 ; <i> and security information that allows the MCU to restrict access to the FTFL module.
mbed_official 363:12a245e5c745 113 ; <h> Backdoor Comparison Key
mbed_official 363:12a245e5c745 114 ; <o0> Backdoor Comparison Key 0. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 115 ; <o1> Backdoor Comparison Key 1. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 116 ; <o2> Backdoor Comparison Key 2. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 117 ; <o3> Backdoor Comparison Key 3. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 118 ; <o4> Backdoor Comparison Key 4. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 119 ; <o5> Backdoor Comparison Key 5. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 120 ; <o6> Backdoor Comparison Key 6. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 121 ; <o7> Backdoor Comparison Key 7. <0x0-0xFF:2>
mbed_official 363:12a245e5c745 122 BackDoorK0 EQU 0xFF
mbed_official 363:12a245e5c745 123 BackDoorK1 EQU 0xFF
mbed_official 363:12a245e5c745 124 BackDoorK2 EQU 0xFF
mbed_official 363:12a245e5c745 125 BackDoorK3 EQU 0xFF
mbed_official 363:12a245e5c745 126 BackDoorK4 EQU 0xFF
mbed_official 363:12a245e5c745 127 BackDoorK5 EQU 0xFF
mbed_official 363:12a245e5c745 128 BackDoorK6 EQU 0xFF
mbed_official 363:12a245e5c745 129 BackDoorK7 EQU 0xFF
mbed_official 363:12a245e5c745 130 ; </h>
mbed_official 363:12a245e5c745 131 ; <h> Program flash protection bytes (FPROT)
mbed_official 363:12a245e5c745 132 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
mbed_official 363:12a245e5c745 133 ; <i> Each bit protects a 1/32 region of the program flash memory.
mbed_official 363:12a245e5c745 134 ; <h> FPROT0
mbed_official 363:12a245e5c745 135 ; <i> Program Flash Region Protect Register 0
mbed_official 363:12a245e5c745 136 ; <i> 1/32 - 8/32 region
mbed_official 363:12a245e5c745 137 ; <o.0> FPROT0.0
mbed_official 363:12a245e5c745 138 ; <o.1> FPROT0.1
mbed_official 363:12a245e5c745 139 ; <o.2> FPROT0.2
mbed_official 363:12a245e5c745 140 ; <o.3> FPROT0.3
mbed_official 363:12a245e5c745 141 ; <o.4> FPROT0.4
mbed_official 363:12a245e5c745 142 ; <o.5> FPROT0.5
mbed_official 363:12a245e5c745 143 ; <o.6> FPROT0.6
mbed_official 363:12a245e5c745 144 ; <o.7> FPROT0.7
mbed_official 363:12a245e5c745 145 nFPROT0 EQU 0x00
mbed_official 363:12a245e5c745 146 FPROT0 EQU nFPROT0:EOR:0xFF
mbed_official 363:12a245e5c745 147 ; </h>
mbed_official 363:12a245e5c745 148 ; <h> FPROT1
mbed_official 363:12a245e5c745 149 ; <i> Program Flash Region Protect Register 1
mbed_official 363:12a245e5c745 150 ; <i> 9/32 - 16/32 region
mbed_official 363:12a245e5c745 151 ; <o.0> FPROT1.0
mbed_official 363:12a245e5c745 152 ; <o.1> FPROT1.1
mbed_official 363:12a245e5c745 153 ; <o.2> FPROT1.2
mbed_official 363:12a245e5c745 154 ; <o.3> FPROT1.3
mbed_official 363:12a245e5c745 155 ; <o.4> FPROT1.4
mbed_official 363:12a245e5c745 156 ; <o.5> FPROT1.5
mbed_official 363:12a245e5c745 157 ; <o.6> FPROT1.6
mbed_official 363:12a245e5c745 158 ; <o.7> FPROT1.7
mbed_official 363:12a245e5c745 159 nFPROT1 EQU 0x00
mbed_official 363:12a245e5c745 160 FPROT1 EQU nFPROT1:EOR:0xFF
mbed_official 363:12a245e5c745 161 ; </h>
mbed_official 363:12a245e5c745 162 ; <h> FPROT2
mbed_official 363:12a245e5c745 163 ; <i> Program Flash Region Protect Register 2
mbed_official 363:12a245e5c745 164 ; <i> 17/32 - 24/32 region
mbed_official 363:12a245e5c745 165 ; <o.0> FPROT2.0
mbed_official 363:12a245e5c745 166 ; <o.1> FPROT2.1
mbed_official 363:12a245e5c745 167 ; <o.2> FPROT2.2
mbed_official 363:12a245e5c745 168 ; <o.3> FPROT2.3
mbed_official 363:12a245e5c745 169 ; <o.4> FPROT2.4
mbed_official 363:12a245e5c745 170 ; <o.5> FPROT2.5
mbed_official 363:12a245e5c745 171 ; <o.6> FPROT2.6
mbed_official 363:12a245e5c745 172 ; <o.7> FPROT2.7
mbed_official 363:12a245e5c745 173 nFPROT2 EQU 0x00
mbed_official 363:12a245e5c745 174 FPROT2 EQU nFPROT2:EOR:0xFF
mbed_official 363:12a245e5c745 175 ; </h>
mbed_official 363:12a245e5c745 176 ; <h> FPROT3
mbed_official 363:12a245e5c745 177 ; <i> Program Flash Region Protect Register 3
mbed_official 363:12a245e5c745 178 ; <i> 25/32 - 32/32 region
mbed_official 363:12a245e5c745 179 ; <o.0> FPROT3.0
mbed_official 363:12a245e5c745 180 ; <o.1> FPROT3.1
mbed_official 363:12a245e5c745 181 ; <o.2> FPROT3.2
mbed_official 363:12a245e5c745 182 ; <o.3> FPROT3.3
mbed_official 363:12a245e5c745 183 ; <o.4> FPROT3.4
mbed_official 363:12a245e5c745 184 ; <o.5> FPROT3.5
mbed_official 363:12a245e5c745 185 ; <o.6> FPROT3.6
mbed_official 363:12a245e5c745 186 ; <o.7> FPROT3.7
mbed_official 363:12a245e5c745 187 nFPROT3 EQU 0x00
mbed_official 363:12a245e5c745 188 FPROT3 EQU nFPROT3:EOR:0xFF
mbed_official 363:12a245e5c745 189 ; </h>
mbed_official 363:12a245e5c745 190 ; </h>
mbed_official 363:12a245e5c745 191 ; <h> Flash nonvolatile option byte (FOPT)
mbed_official 363:12a245e5c745 192 ; <i> Allows the user to customize the operation of the MCU at boot time.
mbed_official 363:12a245e5c745 193 ; <o.0> LPBOOT0
mbed_official 363:12a245e5c745 194 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) when LPBOOT1=0 or 0x1 (divide by 2) when LPBOOT1=1.
mbed_official 363:12a245e5c745 195 ; <1=> Core and system clock divider (OUTDIV1) is 0x3 (divide by 4) when LPBOOT1=0 or 0x0 (divide by 1) when LPBOOT1=1.
mbed_official 363:12a245e5c745 196 ; <o.1> BOOTPIN_OPT
mbed_official 363:12a245e5c745 197 ; <0=> Force Boot from ROM if BOOTCFG0 asserted, where BOOTCFG0 is the boot config function which is muxed with NMI pin
mbed_official 363:12a245e5c745 198 ; <1=> Boot source configured by FOPT (BOOTSRC_SEL) bits
mbed_official 363:12a245e5c745 199 ; <o.2> NMI_DIS
mbed_official 363:12a245e5c745 200 ; <0=> NMI interrupts are always blocked
mbed_official 363:12a245e5c745 201 ; <1=> NMI_b pin/interrupts reset default to enabled
mbed_official 363:12a245e5c745 202 ; <o.3> RESET_PIN_CFG
mbed_official 363:12a245e5c745 203 ; <0=> RESET pin is disabled following a POR and cannot be enabled as reset function
mbed_official 363:12a245e5c745 204 ; <1=> RESET_b pin is dedicated
mbed_official 363:12a245e5c745 205 ; <o.4> LPBOOT1
mbed_official 363:12a245e5c745 206 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) when LPBOOT0=0 or 0x3 (divide by 4) when LPBOOT0=1.
mbed_official 363:12a245e5c745 207 ; <1=> Core and system clock divider (OUTDIV1) is 0x1 (divide by 2) when LPBOOT0=0 or 0x0 (divide by 1) when LPBOOT0=1.
mbed_official 363:12a245e5c745 208 ; <o.5> FAST_INIT
mbed_official 363:12a245e5c745 209 ; <0=> Slower initialization
mbed_official 363:12a245e5c745 210 ; <1=> Fast Initialization
mbed_official 363:12a245e5c745 211 ; <o.6..7> BOOTSRC_SEL
mbed_official 363:12a245e5c745 212 ; <0=> Boot from Flash
mbed_official 363:12a245e5c745 213 ; <2=> Boot from ROM
mbed_official 363:12a245e5c745 214 ; <3=> Boot from ROM
mbed_official 363:12a245e5c745 215 ; <i> Boot source selection
mbed_official 363:12a245e5c745 216 FOPT EQU 0x3F
mbed_official 363:12a245e5c745 217 ; </h>
mbed_official 363:12a245e5c745 218 ; <h> Flash security byte (FSEC)
mbed_official 363:12a245e5c745 219 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
mbed_official 363:12a245e5c745 220 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
mbed_official 363:12a245e5c745 221 ; <o.0..1> SEC
mbed_official 363:12a245e5c745 222 ; <2=> MCU security status is unsecure
mbed_official 363:12a245e5c745 223 ; <3=> MCU security status is secure
mbed_official 363:12a245e5c745 224 ; <i> Flash Security
mbed_official 363:12a245e5c745 225 ; <o.2..3> FSLACC
mbed_official 363:12a245e5c745 226 ; <2=> Freescale factory access denied
mbed_official 363:12a245e5c745 227 ; <3=> Freescale factory access granted
mbed_official 363:12a245e5c745 228 ; <i> Freescale Failure Analysis Access Code
mbed_official 363:12a245e5c745 229 ; <o.4..5> MEEN
mbed_official 363:12a245e5c745 230 ; <2=> Mass erase is disabled
mbed_official 363:12a245e5c745 231 ; <3=> Mass erase is enabled
mbed_official 363:12a245e5c745 232 ; <o.6..7> KEYEN
mbed_official 363:12a245e5c745 233 ; <2=> Backdoor key access enabled
mbed_official 363:12a245e5c745 234 ; <3=> Backdoor key access disabled
mbed_official 363:12a245e5c745 235 ; <i> Backdoor Key Security Enable
mbed_official 363:12a245e5c745 236 FSEC EQU 0xFE
mbed_official 363:12a245e5c745 237 ; </h>
mbed_official 363:12a245e5c745 238 ; </h>
mbed_official 363:12a245e5c745 239 IF :LNOT::DEF:RAM_TARGET
mbed_official 363:12a245e5c745 240 AREA |.ARM.__at_0x400|, DATA, READONLY
mbed_official 363:12a245e5c745 241 __FlashConfig
mbed_official 363:12a245e5c745 242 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
mbed_official 363:12a245e5c745 243 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
mbed_official 363:12a245e5c745 244 DCB FPROT0 , FPROT1 , FPROT2 , FPROT3
mbed_official 363:12a245e5c745 245 DCB FSEC , FOPT , 0xFF , 0xFF
mbed_official 363:12a245e5c745 246 ENDIF
mbed_official 363:12a245e5c745 247
mbed_official 363:12a245e5c745 248 AREA |.text|, CODE, READONLY
mbed_official 363:12a245e5c745 249
mbed_official 363:12a245e5c745 250 ; Reset Handler
mbed_official 363:12a245e5c745 251
mbed_official 363:12a245e5c745 252 Reset_Handler PROC
mbed_official 363:12a245e5c745 253 EXPORT Reset_Handler [WEAK]
mbed_official 363:12a245e5c745 254 IMPORT SystemInit
mbed_official 363:12a245e5c745 255 IMPORT __main
mbed_official 363:12a245e5c745 256 LDR R0, =SystemInit
mbed_official 363:12a245e5c745 257 BLX R0
mbed_official 363:12a245e5c745 258 LDR R0, =__main
mbed_official 363:12a245e5c745 259 BX R0
mbed_official 363:12a245e5c745 260 ENDP
mbed_official 363:12a245e5c745 261
mbed_official 363:12a245e5c745 262
mbed_official 363:12a245e5c745 263 ; Dummy Exception Handlers (infinite loops which can be modified)
mbed_official 363:12a245e5c745 264 NMI_Handler\
mbed_official 363:12a245e5c745 265 PROC
mbed_official 363:12a245e5c745 266 EXPORT NMI_Handler [WEAK]
mbed_official 363:12a245e5c745 267 B .
mbed_official 363:12a245e5c745 268 ENDP
mbed_official 363:12a245e5c745 269 HardFault_Handler\
mbed_official 363:12a245e5c745 270 PROC
mbed_official 363:12a245e5c745 271 EXPORT HardFault_Handler [WEAK]
mbed_official 363:12a245e5c745 272 B .
mbed_official 363:12a245e5c745 273 ENDP
mbed_official 363:12a245e5c745 274 SVC_Handler\
mbed_official 363:12a245e5c745 275 PROC
mbed_official 363:12a245e5c745 276 EXPORT SVC_Handler [WEAK]
mbed_official 363:12a245e5c745 277 B .
mbed_official 363:12a245e5c745 278 ENDP
mbed_official 363:12a245e5c745 279 PendSV_Handler\
mbed_official 363:12a245e5c745 280 PROC
mbed_official 363:12a245e5c745 281 EXPORT PendSV_Handler [WEAK]
mbed_official 363:12a245e5c745 282 B .
mbed_official 363:12a245e5c745 283 ENDP
mbed_official 363:12a245e5c745 284 SysTick_Handler\
mbed_official 363:12a245e5c745 285 PROC
mbed_official 363:12a245e5c745 286 EXPORT SysTick_Handler [WEAK]
mbed_official 363:12a245e5c745 287 B .
mbed_official 363:12a245e5c745 288 ENDP
mbed_official 363:12a245e5c745 289 Default_Handler\
mbed_official 363:12a245e5c745 290 PROC
mbed_official 363:12a245e5c745 291 EXPORT DMA0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 292 EXPORT DMA1_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 293 EXPORT DMA2_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 294 EXPORT DMA3_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 295 EXPORT Reserved20_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 296 EXPORT FTFA_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 297 EXPORT PMC_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 298 EXPORT LLWU_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 299 EXPORT I2C0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 300 EXPORT I2C1_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 301 EXPORT SPI0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 302 EXPORT SPI1_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 303 EXPORT LPUART0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 304 EXPORT LPUART1_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 305 EXPORT UART2_FLEXIO_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 306 EXPORT ADC0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 307 EXPORT CMP0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 308 EXPORT TPM0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 309 EXPORT TPM1_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 310 EXPORT TPM2_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 311 EXPORT RTC_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 312 EXPORT RTC_Seconds_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 313 EXPORT PIT_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 314 EXPORT I2S0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 315 EXPORT USB0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 316 EXPORT DAC0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 317 EXPORT Reserved42_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 318 EXPORT Reserved43_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 319 EXPORT LPTMR0_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 320 EXPORT LCD_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 321 EXPORT PORTA_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 322 EXPORT PORTCD_IRQHandler [WEAK]
mbed_official 363:12a245e5c745 323 EXPORT DefaultISR [WEAK]
mbed_official 363:12a245e5c745 324 DMA0_IRQHandler
mbed_official 363:12a245e5c745 325 DMA1_IRQHandler
mbed_official 363:12a245e5c745 326 DMA2_IRQHandler
mbed_official 363:12a245e5c745 327 DMA3_IRQHandler
mbed_official 363:12a245e5c745 328 Reserved20_IRQHandler
mbed_official 363:12a245e5c745 329 FTFA_IRQHandler
mbed_official 363:12a245e5c745 330 PMC_IRQHandler
mbed_official 363:12a245e5c745 331 LLWU_IRQHandler
mbed_official 363:12a245e5c745 332 I2C0_IRQHandler
mbed_official 363:12a245e5c745 333 I2C1_IRQHandler
mbed_official 363:12a245e5c745 334 SPI0_IRQHandler
mbed_official 363:12a245e5c745 335 SPI1_IRQHandler
mbed_official 363:12a245e5c745 336 LPUART0_IRQHandler
mbed_official 363:12a245e5c745 337 LPUART1_IRQHandler
mbed_official 363:12a245e5c745 338 UART2_FLEXIO_IRQHandler
mbed_official 363:12a245e5c745 339 ADC0_IRQHandler
mbed_official 363:12a245e5c745 340 CMP0_IRQHandler
mbed_official 363:12a245e5c745 341 TPM0_IRQHandler
mbed_official 363:12a245e5c745 342 TPM1_IRQHandler
mbed_official 363:12a245e5c745 343 TPM2_IRQHandler
mbed_official 363:12a245e5c745 344 RTC_IRQHandler
mbed_official 363:12a245e5c745 345 RTC_Seconds_IRQHandler
mbed_official 363:12a245e5c745 346 PIT_IRQHandler
mbed_official 363:12a245e5c745 347 I2S0_IRQHandler
mbed_official 363:12a245e5c745 348 USB0_IRQHandler
mbed_official 363:12a245e5c745 349 DAC0_IRQHandler
mbed_official 363:12a245e5c745 350 Reserved42_IRQHandler
mbed_official 363:12a245e5c745 351 Reserved43_IRQHandler
mbed_official 363:12a245e5c745 352 LPTMR0_IRQHandler
mbed_official 363:12a245e5c745 353 LCD_IRQHandler
mbed_official 363:12a245e5c745 354 PORTA_IRQHandler
mbed_official 363:12a245e5c745 355 PORTCD_IRQHandler
mbed_official 363:12a245e5c745 356 DefaultISR
mbed_official 363:12a245e5c745 357 B .
mbed_official 363:12a245e5c745 358 ENDP
mbed_official 363:12a245e5c745 359 ALIGN
mbed_official 363:12a245e5c745 360
mbed_official 363:12a245e5c745 361
mbed_official 363:12a245e5c745 362 END