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mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.S@577:15494b56c2f3, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 08:15:11 2015 +0100
Revision:
577:15494b56c2f3
Parent:
targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.s@93:80910ff1aebe 
Synchronized with git revision 7766e75dd858812cd79aedb3080349715f55dd56



Full URL: https://github.com/mbedmicro/mbed/commit/7766e75dd858812cd79aedb3080349715f55dd56/



GCC asm updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 93:80910ff1aebe 1 ;/*****************************************************************************
mbed_official 93:80910ff1aebe 2 ; * @file: startup_MKL25Z4.s
mbed_official 93:80910ff1aebe 3 ; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the
mbed_official 93:80910ff1aebe 4 ; * MKL05Z4
mbed_official 93:80910ff1aebe 5 ; * @version: 1.1
mbed_official 93:80910ff1aebe 6 ; * @date: 2012-6-21
mbed_official 93:80910ff1aebe 7 ; *
mbed_official 93:80910ff1aebe 8 ; * Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
mbed_official 93:80910ff1aebe 9 ;*
mbed_official 93:80910ff1aebe 10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
mbed_official 93:80910ff1aebe 11 ; *
mbed_official 93:80910ff1aebe 12 ; *****************************************************************************/
mbed_official 93:80910ff1aebe 13
mbed_official 93:80910ff1aebe 14 Stack_Size EQU 0x00000400
mbed_official 93:80910ff1aebe 15
mbed_official 93:80910ff1aebe 16 AREA STACK, NOINIT, READWRITE, ALIGN=3
mbed_official 93:80910ff1aebe 17 EXPORT __initial_sp
mbed_official 93:80910ff1aebe 18
mbed_official 93:80910ff1aebe 19 Stack_Mem SPACE Stack_Size
mbed_official 93:80910ff1aebe 20 __initial_sp EQU 0x20000C00 ; Top of RAM
mbed_official 93:80910ff1aebe 21
mbed_official 93:80910ff1aebe 22
mbed_official 93:80910ff1aebe 23 Heap_Size EQU 0x00000000
mbed_official 93:80910ff1aebe 24
mbed_official 93:80910ff1aebe 25 AREA HEAP, NOINIT, READWRITE, ALIGN=3
mbed_official 93:80910ff1aebe 26 EXPORT __heap_base
mbed_official 93:80910ff1aebe 27 EXPORT __heap_limit
mbed_official 93:80910ff1aebe 28
mbed_official 93:80910ff1aebe 29 __heap_base
mbed_official 93:80910ff1aebe 30 Heap_Mem SPACE Heap_Size
mbed_official 93:80910ff1aebe 31 __heap_limit
mbed_official 93:80910ff1aebe 32
mbed_official 93:80910ff1aebe 33 PRESERVE8
mbed_official 93:80910ff1aebe 34 THUMB
mbed_official 93:80910ff1aebe 35
mbed_official 93:80910ff1aebe 36
mbed_official 93:80910ff1aebe 37 ; Vector Table Mapped to Address 0 at Reset
mbed_official 93:80910ff1aebe 38
mbed_official 93:80910ff1aebe 39 AREA RESET, DATA, READONLY
mbed_official 93:80910ff1aebe 40 EXPORT __Vectors
mbed_official 93:80910ff1aebe 41 EXPORT __Vectors_End
mbed_official 93:80910ff1aebe 42 EXPORT __Vectors_Size
mbed_official 93:80910ff1aebe 43
mbed_official 93:80910ff1aebe 44 __Vectors DCD __initial_sp ; Top of Stack
mbed_official 93:80910ff1aebe 45 DCD Reset_Handler ; Reset Handler
mbed_official 93:80910ff1aebe 46 DCD NMI_Handler ; NMI Handler
mbed_official 93:80910ff1aebe 47 DCD HardFault_Handler ; Hard Fault Handler
mbed_official 93:80910ff1aebe 48 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 49 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 50 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 51 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 52 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 53 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 54 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 55 DCD SVC_Handler ; SVCall Handler
mbed_official 93:80910ff1aebe 56 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 57 DCD 0 ; Reserved
mbed_official 93:80910ff1aebe 58 DCD PendSV_Handler ; PendSV Handler
mbed_official 93:80910ff1aebe 59 DCD SysTick_Handler ; SysTick Handler
mbed_official 93:80910ff1aebe 60
mbed_official 93:80910ff1aebe 61 ; External Interrupts
mbed_official 93:80910ff1aebe 62 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete/error interrupt
mbed_official 93:80910ff1aebe 63 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete/error interrupt
mbed_official 93:80910ff1aebe 64 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete/error interrupt
mbed_official 93:80910ff1aebe 65 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete/error interrupt
mbed_official 93:80910ff1aebe 66 DCD Reserved20_IRQHandler ; Reserved interrupt 20
mbed_official 93:80910ff1aebe 67 DCD FTFA_IRQHandler ; FTFA command complete/read collision interrupt
mbed_official 93:80910ff1aebe 68 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
mbed_official 93:80910ff1aebe 69 DCD LLW_IRQHandler ; Low Leakage Wakeup
mbed_official 93:80910ff1aebe 70 DCD I2C0_IRQHandler ; I2C0 interrupt
mbed_official 93:80910ff1aebe 71 DCD Reserved_25_IRQHandler ; Reserved interrupt 25
mbed_official 93:80910ff1aebe 72 DCD SPI0_IRQHandler ; SPI0 interrupt
mbed_official 93:80910ff1aebe 73 DCD Reserved_27_IRQHandler ; Reserved interrupt 27
mbed_official 93:80910ff1aebe 74 DCD UART0_IRQHandler ; UART0 status and error interrupt
mbed_official 93:80910ff1aebe 75 DCD Reserved_29_IRQHandler ; Reserved interrupt 29
mbed_official 93:80910ff1aebe 76 DCD Reserved_30_IRQHandler ; Reserved interrupt 30
mbed_official 93:80910ff1aebe 77 DCD ADC0_IRQHandler ; ADC0 interrupt
mbed_official 93:80910ff1aebe 78 DCD CMP0_IRQHandler ; CMP0 interrupt
mbed_official 93:80910ff1aebe 79 DCD TPM0_IRQHandler ; TPM0 fault, overflow and channels interrupt
mbed_official 93:80910ff1aebe 80 DCD TPM1_IRQHandler ; TPM1 fault, overflow and channels interrupt
mbed_official 93:80910ff1aebe 81 DCD Reserved_35_IRQHandler ; Reserved interrupt 35
mbed_official 93:80910ff1aebe 82 DCD RTC_IRQHandler ; RTC interrupt
mbed_official 93:80910ff1aebe 83 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
mbed_official 93:80910ff1aebe 84 DCD PIT_IRQHandler ; PIT timer channel 0 interrupt
mbed_official 93:80910ff1aebe 85 DCD Reserved_39_IRQHandler ; Reserved interrupt 39
mbed_official 93:80910ff1aebe 86 DCD Reserved_40_IRQHandler ; Reserved interrupt 40
mbed_official 93:80910ff1aebe 87 DCD DAC0_IRQHandler ; DAC0 interrupt
mbed_official 93:80910ff1aebe 88 DCD TSI0_IRQHandler ; TSI0 interrupt
mbed_official 93:80910ff1aebe 89 DCD MCG_IRQHandler ; MCG interrupt
mbed_official 93:80910ff1aebe 90 DCD LPTimer_IRQHandler ; LPTimer interrupt
mbed_official 93:80910ff1aebe 91 DCD Reserved_45_IRQHandler ; Reserved interrupt 45
mbed_official 93:80910ff1aebe 92 DCD PORTA_IRQHandler ; Port A interrupt
mbed_official 93:80910ff1aebe 93 DCD PORTB_IRQHandler ; Port B interrupt
mbed_official 93:80910ff1aebe 94 __Vectors_End
mbed_official 93:80910ff1aebe 95
mbed_official 93:80910ff1aebe 96 __Vectors_Size EQU __Vectors_End - __Vectors
mbed_official 93:80910ff1aebe 97
mbed_official 93:80910ff1aebe 98 ; <h> Flash Configuration
mbed_official 93:80910ff1aebe 99 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
mbed_official 93:80910ff1aebe 100 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
mbed_official 93:80910ff1aebe 101 ; <h> Backdoor Comparison Key
mbed_official 93:80910ff1aebe 102 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 103 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 104 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 105 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 106 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 107 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 108 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 109 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
mbed_official 93:80910ff1aebe 110 BackDoorK0 EQU 0xFF
mbed_official 93:80910ff1aebe 111 BackDoorK1 EQU 0xFF
mbed_official 93:80910ff1aebe 112 BackDoorK2 EQU 0xFF
mbed_official 93:80910ff1aebe 113 BackDoorK3 EQU 0xFF
mbed_official 93:80910ff1aebe 114 BackDoorK4 EQU 0xFF
mbed_official 93:80910ff1aebe 115 BackDoorK5 EQU 0xFF
mbed_official 93:80910ff1aebe 116 BackDoorK6 EQU 0xFF
mbed_official 93:80910ff1aebe 117 BackDoorK7 EQU 0xFF
mbed_official 93:80910ff1aebe 118 ; </h>
mbed_official 93:80910ff1aebe 119 ; <h> Program flash protection bytes (FPROT)
mbed_official 93:80910ff1aebe 120 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
mbed_official 93:80910ff1aebe 121 ; <i> Each bit protects a 1/32 region of the program flash memory.
mbed_official 93:80910ff1aebe 122 ; <h> FPROT0
mbed_official 93:80910ff1aebe 123 ; <i> Program flash protection bytes
mbed_official 93:80910ff1aebe 124 ; <i> 1/32 - 8/32 region
mbed_official 93:80910ff1aebe 125 ; <o.0> FPROT0.0
mbed_official 93:80910ff1aebe 126 ; <o.1> FPROT0.1
mbed_official 93:80910ff1aebe 127 ; <o.2> FPROT0.2
mbed_official 93:80910ff1aebe 128 ; <o.3> FPROT0.3
mbed_official 93:80910ff1aebe 129 ; <o.4> FPROT0.4
mbed_official 93:80910ff1aebe 130 ; <o.5> FPROT0.5
mbed_official 93:80910ff1aebe 131 ; <o.6> FPROT0.6
mbed_official 93:80910ff1aebe 132 ; <o.7> FPROT0.7
mbed_official 93:80910ff1aebe 133 nFPROT0 EQU 0x00
mbed_official 93:80910ff1aebe 134 FPROT0 EQU nFPROT0:EOR:0xFF
mbed_official 93:80910ff1aebe 135 ; </h>
mbed_official 93:80910ff1aebe 136 ; <h> FPROT1
mbed_official 93:80910ff1aebe 137 ; <i> Program Flash Region Protect Register 1
mbed_official 93:80910ff1aebe 138 ; <i> 9/32 - 16/32 region
mbed_official 93:80910ff1aebe 139 ; <o.0> FPROT1.0
mbed_official 93:80910ff1aebe 140 ; <o.1> FPROT1.1
mbed_official 93:80910ff1aebe 141 ; <o.2> FPROT1.2
mbed_official 93:80910ff1aebe 142 ; <o.3> FPROT1.3
mbed_official 93:80910ff1aebe 143 ; <o.4> FPROT1.4
mbed_official 93:80910ff1aebe 144 ; <o.5> FPROT1.5
mbed_official 93:80910ff1aebe 145 ; <o.6> FPROT1.6
mbed_official 93:80910ff1aebe 146 ; <o.7> FPROT1.7
mbed_official 93:80910ff1aebe 147 nFPROT1 EQU 0x00
mbed_official 93:80910ff1aebe 148 FPROT1 EQU nFPROT1:EOR:0xFF
mbed_official 93:80910ff1aebe 149 ; </h>
mbed_official 93:80910ff1aebe 150 ; <h> FPROT2
mbed_official 93:80910ff1aebe 151 ; <i> Program Flash Region Protect Register 2
mbed_official 93:80910ff1aebe 152 ; <i> 17/32 - 24/32 region
mbed_official 93:80910ff1aebe 153 ; <o.0> FPROT2.0
mbed_official 93:80910ff1aebe 154 ; <o.1> FPROT2.1
mbed_official 93:80910ff1aebe 155 ; <o.2> FPROT2.2
mbed_official 93:80910ff1aebe 156 ; <o.3> FPROT2.3
mbed_official 93:80910ff1aebe 157 ; <o.4> FPROT2.4
mbed_official 93:80910ff1aebe 158 ; <o.5> FPROT2.5
mbed_official 93:80910ff1aebe 159 ; <o.6> FPROT2.6
mbed_official 93:80910ff1aebe 160 ; <o.7> FPROT2.7
mbed_official 93:80910ff1aebe 161 nFPROT2 EQU 0x00
mbed_official 93:80910ff1aebe 162 FPROT2 EQU nFPROT2:EOR:0xFF
mbed_official 93:80910ff1aebe 163 ; </h>
mbed_official 93:80910ff1aebe 164 ; <h> FPROT3
mbed_official 93:80910ff1aebe 165 ; <i> Program Flash Region Protect Register 3
mbed_official 93:80910ff1aebe 166 ; <i> 25/32 - 32/32 region
mbed_official 93:80910ff1aebe 167 ; <o.0> FPROT3.0
mbed_official 93:80910ff1aebe 168 ; <o.1> FPROT3.1
mbed_official 93:80910ff1aebe 169 ; <o.2> FPROT3.2
mbed_official 93:80910ff1aebe 170 ; <o.3> FPROT3.3
mbed_official 93:80910ff1aebe 171 ; <o.4> FPROT3.4
mbed_official 93:80910ff1aebe 172 ; <o.5> FPROT3.5
mbed_official 93:80910ff1aebe 173 ; <o.6> FPROT3.6
mbed_official 93:80910ff1aebe 174 ; <o.7> FPROT3.7
mbed_official 93:80910ff1aebe 175 nFPROT3 EQU 0x00
mbed_official 93:80910ff1aebe 176 FPROT3 EQU nFPROT3:EOR:0xFF
mbed_official 93:80910ff1aebe 177 ; </h>
mbed_official 93:80910ff1aebe 178 ; </h>
mbed_official 93:80910ff1aebe 179 ; </h>
mbed_official 93:80910ff1aebe 180 ; <h> Flash nonvolatile option byte (FOPT)
mbed_official 93:80910ff1aebe 181 ; <i> Allows the user to customize the operation of the MCU at boot time.
mbed_official 93:80910ff1aebe 182 ; <o.0> LPBOOT0
mbed_official 93:80910ff1aebe 183 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x3 (divide by 4)
mbed_official 93:80910ff1aebe 184 ; <1=> Core and system clock divider (OUTDIV1) is 0x1 (divide by 2) or 0x0 (divide by 1)
mbed_official 93:80910ff1aebe 185 ; <o.4> LPBOOT1
mbed_official 93:80910ff1aebe 186 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x1 (divide by 2)
mbed_official 93:80910ff1aebe 187 ; <1=> Core and system clock divider (OUTDIV1) is 0x3 (divide by 4) or 0x0 (divide by 1)
mbed_official 93:80910ff1aebe 188 ; <o.2> NMI_DIS
mbed_official 93:80910ff1aebe 189 ; <0=> NMI interrupts are always blocked
mbed_official 93:80910ff1aebe 190 ; <1=> NMI pin/interrupts reset default to enabled
mbed_official 93:80910ff1aebe 191 ; <o.3> RESET_PIN_CFG
mbed_official 93:80910ff1aebe 192 ; <0=> RESET pin is disabled following a POR and cannot be enabled as RESET function
mbed_official 93:80910ff1aebe 193 ; <1=> RESET pin is dedicated
mbed_official 93:80910ff1aebe 194 ; <o.3> FAST_INIT
mbed_official 93:80910ff1aebe 195 ; <0=> Slower initialization
mbed_official 93:80910ff1aebe 196 ; <1=> Fast Initialization
mbed_official 93:80910ff1aebe 197 FOPT EQU 0xFF
mbed_official 93:80910ff1aebe 198 ; </h>
mbed_official 93:80910ff1aebe 199 ; <h> Flash security byte (FSEC)
mbed_official 93:80910ff1aebe 200 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
mbed_official 93:80910ff1aebe 201 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
mbed_official 93:80910ff1aebe 202 ; <o.0..1> SEC
mbed_official 93:80910ff1aebe 203 ; <2=> MCU security status is unsecure
mbed_official 93:80910ff1aebe 204 ; <3=> MCU security status is secure
mbed_official 93:80910ff1aebe 205 ; <i> Flash Security
mbed_official 93:80910ff1aebe 206 ; <i> This bits define the security state of the MCU.
mbed_official 93:80910ff1aebe 207 ; <o.2..3> FSLACC
mbed_official 93:80910ff1aebe 208 ; <2=> Freescale factory access denied
mbed_official 93:80910ff1aebe 209 ; <3=> Freescale factory access granted
mbed_official 93:80910ff1aebe 210 ; <i> Freescale Failure Analysis Access Code
mbed_official 93:80910ff1aebe 211 ; <i> This bits define the security state of the MCU.
mbed_official 93:80910ff1aebe 212 ; <o.4..5> MEEN
mbed_official 93:80910ff1aebe 213 ; <2=> Mass erase is disabled
mbed_official 93:80910ff1aebe 214 ; <3=> Mass erase is enabled
mbed_official 93:80910ff1aebe 215 ; <i> Mass Erase Enable Bits
mbed_official 93:80910ff1aebe 216 ; <i> Enables and disables mass erase capability of the FTFL module
mbed_official 93:80910ff1aebe 217 ; <o.6..7> KEYEN
mbed_official 93:80910ff1aebe 218 ; <2=> Backdoor key access enabled
mbed_official 93:80910ff1aebe 219 ; <3=> Backdoor key access disabled
mbed_official 93:80910ff1aebe 220 ; <i> Backdoor key Security Enable
mbed_official 93:80910ff1aebe 221 ; <i> These bits enable and disable backdoor key access to the FTFL module.
mbed_official 93:80910ff1aebe 222 FSEC EQU 0xFE
mbed_official 93:80910ff1aebe 223 ; </h>
mbed_official 93:80910ff1aebe 224
mbed_official 93:80910ff1aebe 225 IF :LNOT::DEF:RAM_TARGET
mbed_official 93:80910ff1aebe 226 AREA |.ARM.__at_0x400|, CODE, READONLY
mbed_official 93:80910ff1aebe 227 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
mbed_official 93:80910ff1aebe 228 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
mbed_official 93:80910ff1aebe 229 DCB FPROT0, FPROT1, FPROT2, FPROT3
mbed_official 93:80910ff1aebe 230 DCB FSEC, FOPT, 0xFF, 0xFF
mbed_official 93:80910ff1aebe 231 ENDIF
mbed_official 93:80910ff1aebe 232
mbed_official 93:80910ff1aebe 233 AREA |.text|, CODE, READONLY
mbed_official 93:80910ff1aebe 234
mbed_official 93:80910ff1aebe 235
mbed_official 93:80910ff1aebe 236 ; Reset Handler
mbed_official 93:80910ff1aebe 237
mbed_official 93:80910ff1aebe 238 Reset_Handler PROC
mbed_official 93:80910ff1aebe 239 EXPORT Reset_Handler [WEAK]
mbed_official 93:80910ff1aebe 240 IMPORT SystemInit
mbed_official 93:80910ff1aebe 241 IMPORT __main
mbed_official 93:80910ff1aebe 242 LDR R0, =SystemInit
mbed_official 93:80910ff1aebe 243 BLX R0
mbed_official 93:80910ff1aebe 244 LDR R0, =__main
mbed_official 93:80910ff1aebe 245 BX R0
mbed_official 93:80910ff1aebe 246 ENDP
mbed_official 93:80910ff1aebe 247
mbed_official 93:80910ff1aebe 248
mbed_official 93:80910ff1aebe 249 ; Dummy Exception Handlers (infinite loops which can be modified)
mbed_official 93:80910ff1aebe 250
mbed_official 93:80910ff1aebe 251 NMI_Handler PROC
mbed_official 93:80910ff1aebe 252 EXPORT NMI_Handler [WEAK]
mbed_official 93:80910ff1aebe 253 B .
mbed_official 93:80910ff1aebe 254 ENDP
mbed_official 93:80910ff1aebe 255 HardFault_Handler\
mbed_official 93:80910ff1aebe 256 PROC
mbed_official 93:80910ff1aebe 257 EXPORT HardFault_Handler [WEAK]
mbed_official 93:80910ff1aebe 258 B .
mbed_official 93:80910ff1aebe 259 ENDP
mbed_official 93:80910ff1aebe 260 SVC_Handler PROC
mbed_official 93:80910ff1aebe 261 EXPORT SVC_Handler [WEAK]
mbed_official 93:80910ff1aebe 262 B .
mbed_official 93:80910ff1aebe 263 ENDP
mbed_official 93:80910ff1aebe 264 PendSV_Handler PROC
mbed_official 93:80910ff1aebe 265 EXPORT PendSV_Handler [WEAK]
mbed_official 93:80910ff1aebe 266 B .
mbed_official 93:80910ff1aebe 267 ENDP
mbed_official 93:80910ff1aebe 268 SysTick_Handler PROC
mbed_official 93:80910ff1aebe 269 EXPORT SysTick_Handler [WEAK]
mbed_official 93:80910ff1aebe 270 B .
mbed_official 93:80910ff1aebe 271 ENDP
mbed_official 93:80910ff1aebe 272
mbed_official 93:80910ff1aebe 273 Default_Handler PROC
mbed_official 93:80910ff1aebe 274 EXPORT DMA0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 275 EXPORT DMA1_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 276 EXPORT DMA2_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 277 EXPORT DMA3_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 278 EXPORT Reserved20_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 279 EXPORT FTFA_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 280 EXPORT LVD_LVW_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 281 EXPORT LLW_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 282 EXPORT I2C0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 283 EXPORT Reserved_25_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 284 EXPORT SPI0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 285 EXPORT Reserved_27_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 286 EXPORT UART0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 287 EXPORT Reserved_29_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 288 EXPORT Reserved_30_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 289 EXPORT ADC0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 290 EXPORT CMP0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 291 EXPORT TPM0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 292 EXPORT TPM1_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 293 EXPORT Reserved_35_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 294 EXPORT RTC_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 295 EXPORT RTC_Seconds_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 296 EXPORT PIT_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 297 EXPORT Reserved_39_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 298 EXPORT Reserved_40_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 299 EXPORT DAC0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 300 EXPORT TSI0_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 301 EXPORT MCG_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 302 EXPORT LPTimer_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 303 EXPORT Reserved_45_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 304 EXPORT PORTA_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 305 EXPORT PORTB_IRQHandler [WEAK]
mbed_official 93:80910ff1aebe 306 EXPORT DefaultISR [WEAK]
mbed_official 93:80910ff1aebe 307
mbed_official 93:80910ff1aebe 308 DMA0_IRQHandler
mbed_official 93:80910ff1aebe 309 DMA1_IRQHandler
mbed_official 93:80910ff1aebe 310 DMA2_IRQHandler
mbed_official 93:80910ff1aebe 311 DMA3_IRQHandler
mbed_official 93:80910ff1aebe 312 Reserved20_IRQHandler
mbed_official 93:80910ff1aebe 313 FTFA_IRQHandler
mbed_official 93:80910ff1aebe 314 LVD_LVW_IRQHandler
mbed_official 93:80910ff1aebe 315 LLW_IRQHandler
mbed_official 93:80910ff1aebe 316 I2C0_IRQHandler
mbed_official 93:80910ff1aebe 317 Reserved_25_IRQHandler
mbed_official 93:80910ff1aebe 318 SPI0_IRQHandler
mbed_official 93:80910ff1aebe 319 Reserved_27_IRQHandler
mbed_official 93:80910ff1aebe 320 UART0_IRQHandler
mbed_official 93:80910ff1aebe 321 Reserved_29_IRQHandler
mbed_official 93:80910ff1aebe 322 Reserved_30_IRQHandler
mbed_official 93:80910ff1aebe 323 ADC0_IRQHandler
mbed_official 93:80910ff1aebe 324 CMP0_IRQHandler
mbed_official 93:80910ff1aebe 325 TPM0_IRQHandler
mbed_official 93:80910ff1aebe 326 TPM1_IRQHandler
mbed_official 93:80910ff1aebe 327 Reserved_35_IRQHandler
mbed_official 93:80910ff1aebe 328 RTC_IRQHandler
mbed_official 93:80910ff1aebe 329 RTC_Seconds_IRQHandler
mbed_official 93:80910ff1aebe 330 PIT_IRQHandler
mbed_official 93:80910ff1aebe 331 Reserved_39_IRQHandler
mbed_official 93:80910ff1aebe 332 Reserved_40_IRQHandler
mbed_official 93:80910ff1aebe 333 DAC0_IRQHandler
mbed_official 93:80910ff1aebe 334 TSI0_IRQHandler
mbed_official 93:80910ff1aebe 335 MCG_IRQHandler
mbed_official 93:80910ff1aebe 336 LPTimer_IRQHandler
mbed_official 93:80910ff1aebe 337 Reserved_45_IRQHandler
mbed_official 93:80910ff1aebe 338 PORTA_IRQHandler
mbed_official 93:80910ff1aebe 339 PORTB_IRQHandler
mbed_official 93:80910ff1aebe 340 DefaultISR
mbed_official 93:80910ff1aebe 341
mbed_official 93:80910ff1aebe 342 B .
mbed_official 93:80910ff1aebe 343
mbed_official 93:80910ff1aebe 344 ENDP
mbed_official 93:80910ff1aebe 345
mbed_official 93:80910ff1aebe 346
mbed_official 93:80910ff1aebe 347 ALIGN
mbed_official 93:80910ff1aebe 348 END