mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_dma2d.c@87:085cde657901, 2014-02-08 (annotated)

Committer:
mbed_official
Date:
Sat Feb 08 19:45:06 2014 +0000
Revision:
87:085cde657901
Child:
106:ced8cbb51063
Synchronized with git revision 9272cdeb45ec7e6077641536509413da8fd2ebc2



Full URL: https://github.com/mbedmicro/mbed/commit/9272cdeb45ec7e6077641536509413da8fd2ebc2/



Add NUCLEO_F401RE, improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_dma2d.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 87:085cde657901 5 * @version V1.0.0RC2
mbed_official 87:085cde657901 6 * @date 04-February-2014
mbed_official 87:085cde657901 7 * @brief DMA2D HAL module driver.
mbed_official 87:085cde657901 8 * This file provides firmware functions to manage the following
mbed_official 87:085cde657901 9 * functionalities of the DMA2D peripheral:
mbed_official 87:085cde657901 10 * + Initialization and de-initialization functions
mbed_official 87:085cde657901 11 * + IO operation functions
mbed_official 87:085cde657901 12 * + Peripheral Control functions
mbed_official 87:085cde657901 13 * + Peripheral State and Errors functions
mbed_official 87:085cde657901 14 *
mbed_official 87:085cde657901 15 @verbatim
mbed_official 87:085cde657901 16 ==============================================================================
mbed_official 87:085cde657901 17 ##### How to use this driver #####
mbed_official 87:085cde657901 18 ==============================================================================
mbed_official 87:085cde657901 19 [..]
mbed_official 87:085cde657901 20 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 21 the Transfer Mode, the output color mode and the output offset using
mbed_official 87:085cde657901 22 HAL_DMA2D_Init() function.
mbed_official 87:085cde657901 23
mbed_official 87:085cde657901 24 (#) Program the required configuration through following parameters:
mbed_official 87:085cde657901 25 the input color mode, the input color, input alpha value, alpha mode
mbed_official 87:085cde657901 26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
mbed_official 87:085cde657901 27 or/and background layer.
mbed_official 87:085cde657901 28
mbed_official 87:085cde657901 29 *** Polling mode IO operation ***
mbed_official 87:085cde657901 30 =================================
mbed_official 87:085cde657901 31 [..]
mbed_official 87:085cde657901 32 (+) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 33 the transfer using HAL_DMA2D_Start()
mbed_official 87:085cde657901 34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
mbed_official 87:085cde657901 35 user can specify the value of timeout according to his end application.
mbed_official 87:085cde657901 36
mbed_official 87:085cde657901 37 *** Interrupt mode IO operation ***
mbed_official 87:085cde657901 38 ===================================
mbed_official 87:085cde657901 39 [..]
mbed_official 87:085cde657901 40 (#) Configure the pdata, Destination and data length and Enable
mbed_official 87:085cde657901 41 the transfer using HAL_DMA2D_Start_IT()
mbed_official 87:085cde657901 42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
mbed_official 87:085cde657901 43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
mbed_official 87:085cde657901 44 add his own function by customization of function pointer XferCpltCallback and
mbed_official 87:085cde657901 45 XferErrorCallback (i.e a member of DMA2D handle structure).
mbed_official 87:085cde657901 46
mbed_official 87:085cde657901 47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
mbed_official 87:085cde657901 48 color, in Memory-to-memory or memory-to-memory with pixel format
mbed_official 87:085cde657901 49 conversion the pdata is the source address and it is the color value
mbed_official 87:085cde657901 50 for the A4 or A8 mode.
mbed_official 87:085cde657901 51
mbed_official 87:085cde657901 52 -@- Configure the foreground source address, the background source address,
mbed_official 87:085cde657901 53 the Destination and data length and Enable the transfer using
mbed_official 87:085cde657901 54 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
mbed_official 87:085cde657901 55 in interrupt mode.
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
mbed_official 87:085cde657901 58 are used if the memory to memory with blending transfer mode is selected.
mbed_official 87:085cde657901 59
mbed_official 87:085cde657901 60 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
mbed_official 87:085cde657901 61 HAL_DMA2D_EnableCLUT() functions.
mbed_official 87:085cde657901 62
mbed_official 87:085cde657901 63 (#) Optionally, configure and enable LineInterrupt using the following function:
mbed_official 87:085cde657901 64 HAL_DMA2D_ProgramLineEvent().
mbed_official 87:085cde657901 65
mbed_official 87:085cde657901 66 (#) The transfer can be suspended, continued and aborted using the following
mbed_official 87:085cde657901 67 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
mbed_official 87:085cde657901 68
mbed_official 87:085cde657901 69 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
mbed_official 87:085cde657901 70
mbed_official 87:085cde657901 71 *** DMA2D HAL driver macros list ***
mbed_official 87:085cde657901 72 =============================================
mbed_official 87:085cde657901 73 [..]
mbed_official 87:085cde657901 74 Below the list of most used macros in DMA2D HAL driver.
mbed_official 87:085cde657901 75
mbed_official 87:085cde657901 76 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
mbed_official 87:085cde657901 77 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
mbed_official 87:085cde657901 78 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
mbed_official 87:085cde657901 79 (+) __HAL_DMA2D_CLEAR_FLAG: Clears the DMA2D pending flags.
mbed_official 87:085cde657901 80 (+) __HAL_DMA2D_ENABLE_IT: Enables the specified DMA2D interrupts.
mbed_official 87:085cde657901 81 (+) __HAL_DMA2D_DISABLE_IT: Disables the specified DMA2D interrupts.
mbed_official 87:085cde657901 82 (+) __HAL_DMA2D_IT_STATUS: Checks whether the specified DMA2D interrupt has occurred or not.
mbed_official 87:085cde657901 83
mbed_official 87:085cde657901 84 [..]
mbed_official 87:085cde657901 85 (@) You can refer to the DMA2D HAL driver header file for more useful macros
mbed_official 87:085cde657901 86
mbed_official 87:085cde657901 87 @endverbatim
mbed_official 87:085cde657901 88 ******************************************************************************
mbed_official 87:085cde657901 89 * @attention
mbed_official 87:085cde657901 90 *
mbed_official 87:085cde657901 91 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 92 *
mbed_official 87:085cde657901 93 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 94 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 95 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 96 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 97 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 98 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 99 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 100 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 101 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 102 * without specific prior written permission.
mbed_official 87:085cde657901 103 *
mbed_official 87:085cde657901 104 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 105 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 106 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 107 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 108 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 109 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 110 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 111 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 112 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 113 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 114 *
mbed_official 87:085cde657901 115 ******************************************************************************
mbed_official 87:085cde657901 116 */
mbed_official 87:085cde657901 117
mbed_official 87:085cde657901 118 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 119 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 120
mbed_official 87:085cde657901 121 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 122 * @{
mbed_official 87:085cde657901 123 */
mbed_official 87:085cde657901 124 /** @defgroup DMA2D
mbed_official 87:085cde657901 125 * @brief DMA2D HAL module driver
mbed_official 87:085cde657901 126 * @{
mbed_official 87:085cde657901 127 */
mbed_official 87:085cde657901 128
mbed_official 87:085cde657901 129 #ifdef HAL_DMA2D_MODULE_ENABLED
mbed_official 87:085cde657901 130
mbed_official 87:085cde657901 131 #if defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 87:085cde657901 132
mbed_official 87:085cde657901 133 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 134 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 135 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
mbed_official 87:085cde657901 136 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
mbed_official 87:085cde657901 137 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 138 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 139 /* Private function prototypes -----------------------------------------------*/
mbed_official 87:085cde657901 140 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh);
mbed_official 87:085cde657901 141
mbed_official 87:085cde657901 142 /* Private functions ---------------------------------------------------------*/
mbed_official 87:085cde657901 143
mbed_official 87:085cde657901 144 /** @defgroup DMA2D_Private_Functions
mbed_official 87:085cde657901 145 * @{
mbed_official 87:085cde657901 146 */
mbed_official 87:085cde657901 147
mbed_official 87:085cde657901 148 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
mbed_official 87:085cde657901 149 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 150 *
mbed_official 87:085cde657901 151 @verbatim
mbed_official 87:085cde657901 152 ===============================================================================
mbed_official 87:085cde657901 153 ##### Initialization and Configuration functions #####
mbed_official 87:085cde657901 154 ===============================================================================
mbed_official 87:085cde657901 155 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 156 (+) Initialize and configure the DMA2D
mbed_official 87:085cde657901 157 (+) De-initialize the DMA2D
mbed_official 87:085cde657901 158
mbed_official 87:085cde657901 159 @endverbatim
mbed_official 87:085cde657901 160 * @{
mbed_official 87:085cde657901 161 */
mbed_official 87:085cde657901 162
mbed_official 87:085cde657901 163 /**
mbed_official 87:085cde657901 164 * @brief Initializes the DMA2D according to the specified
mbed_official 87:085cde657901 165 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 87:085cde657901 166 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 167 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 168 * @retval HAL status
mbed_official 87:085cde657901 169 */
mbed_official 87:085cde657901 170 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 171 {
mbed_official 87:085cde657901 172 uint32_t tmp = 0;
mbed_official 87:085cde657901 173
mbed_official 87:085cde657901 174 /* Check the DMA2D peripheral state */
mbed_official 87:085cde657901 175 if(hdma2d == NULL)
mbed_official 87:085cde657901 176 {
mbed_official 87:085cde657901 177 return HAL_ERROR;
mbed_official 87:085cde657901 178 }
mbed_official 87:085cde657901 179
mbed_official 87:085cde657901 180 /* Check the parameters */
mbed_official 87:085cde657901 181 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
mbed_official 87:085cde657901 182 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
mbed_official 87:085cde657901 183 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
mbed_official 87:085cde657901 184 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
mbed_official 87:085cde657901 185
mbed_official 87:085cde657901 186 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
mbed_official 87:085cde657901 187 {
mbed_official 87:085cde657901 188 /* Init the low level hardware */
mbed_official 87:085cde657901 189 HAL_DMA2D_MspInit(hdma2d);
mbed_official 87:085cde657901 190 }
mbed_official 87:085cde657901 191
mbed_official 87:085cde657901 192 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 193 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 194
mbed_official 87:085cde657901 195 /* DMA2D CR register configuration -------------------------------------------*/
mbed_official 87:085cde657901 196 /* Get the CR register value */
mbed_official 87:085cde657901 197 tmp = hdma2d->Instance->CR;
mbed_official 87:085cde657901 198
mbed_official 87:085cde657901 199 /* Clear Mode bits */
mbed_official 87:085cde657901 200 tmp &= (uint32_t)~DMA2D_CR_MODE;
mbed_official 87:085cde657901 201
mbed_official 87:085cde657901 202 /* Prepare the value to be wrote to the CR register */
mbed_official 87:085cde657901 203 tmp |= hdma2d->Init.Mode;
mbed_official 87:085cde657901 204
mbed_official 87:085cde657901 205 /* Write to DMA2D CR register */
mbed_official 87:085cde657901 206 hdma2d->Instance->CR = tmp;
mbed_official 87:085cde657901 207
mbed_official 87:085cde657901 208 /* DMA2D OPFCCR register configuration ---------------------------------------*/
mbed_official 87:085cde657901 209 /* Get the OPFCCR register value */
mbed_official 87:085cde657901 210 tmp = hdma2d->Instance->OPFCCR;
mbed_official 87:085cde657901 211
mbed_official 87:085cde657901 212 /* Clear Color Mode bits */
mbed_official 87:085cde657901 213 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
mbed_official 87:085cde657901 214
mbed_official 87:085cde657901 215 /* Prepare the value to be wrote to the OPFCCR register */
mbed_official 87:085cde657901 216 tmp |= hdma2d->Init.ColorMode;
mbed_official 87:085cde657901 217
mbed_official 87:085cde657901 218 /* Write to DMA2D OPFCCR register */
mbed_official 87:085cde657901 219 hdma2d->Instance->OPFCCR = tmp;
mbed_official 87:085cde657901 220
mbed_official 87:085cde657901 221 /* DMA2D OOR register configuration ------------------------------------------*/
mbed_official 87:085cde657901 222 /* Get the OOR register value */
mbed_official 87:085cde657901 223 tmp = hdma2d->Instance->OOR;
mbed_official 87:085cde657901 224
mbed_official 87:085cde657901 225 /* Clear Offset bits */
mbed_official 87:085cde657901 226 tmp &= (uint32_t)~DMA2D_OOR_LO;
mbed_official 87:085cde657901 227
mbed_official 87:085cde657901 228 /* Prepare the value to be wrote to the OOR register */
mbed_official 87:085cde657901 229 tmp |= hdma2d->Init.OutputOffset;
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 /* Write to DMA2D OOR register */
mbed_official 87:085cde657901 232 hdma2d->Instance->OOR = tmp;
mbed_official 87:085cde657901 233
mbed_official 87:085cde657901 234 /* Update error code */
mbed_official 87:085cde657901 235 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 236
mbed_official 87:085cde657901 237 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 238 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 239
mbed_official 87:085cde657901 240 return HAL_OK;
mbed_official 87:085cde657901 241 }
mbed_official 87:085cde657901 242
mbed_official 87:085cde657901 243 /**
mbed_official 87:085cde657901 244 * @brief Deinitializes the DMA2D peripheral registers to their default reset
mbed_official 87:085cde657901 245 * values.
mbed_official 87:085cde657901 246 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 247 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 248 * @retval None
mbed_official 87:085cde657901 249 */
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 252 {
mbed_official 87:085cde657901 253 /* Check the DMA2D peripheral state */
mbed_official 87:085cde657901 254 if(hdma2d == NULL)
mbed_official 87:085cde657901 255 {
mbed_official 87:085cde657901 256 return HAL_ERROR;
mbed_official 87:085cde657901 257 }
mbed_official 87:085cde657901 258
mbed_official 87:085cde657901 259 /* DeInit the low level hardware */
mbed_official 87:085cde657901 260 HAL_DMA2D_MspDeInit(hdma2d);
mbed_official 87:085cde657901 261
mbed_official 87:085cde657901 262 /* Update error code */
mbed_official 87:085cde657901 263 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 264
mbed_official 87:085cde657901 265 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 266 hdma2d->State = HAL_DMA2D_STATE_RESET;
mbed_official 87:085cde657901 267
mbed_official 87:085cde657901 268 return HAL_OK;
mbed_official 87:085cde657901 269 }
mbed_official 87:085cde657901 270
mbed_official 87:085cde657901 271 /**
mbed_official 87:085cde657901 272 * @brief Initializes the DMA2D MSP.
mbed_official 87:085cde657901 273 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 274 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 275 * @retval None
mbed_official 87:085cde657901 276 */
mbed_official 87:085cde657901 277 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 278 {
mbed_official 87:085cde657901 279 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 280 the HAL_DMA2D_MspInit could be implemented in the user file
mbed_official 87:085cde657901 281 */
mbed_official 87:085cde657901 282 }
mbed_official 87:085cde657901 283
mbed_official 87:085cde657901 284 /**
mbed_official 87:085cde657901 285 * @brief DeInitializes the DMA2D MSP.
mbed_official 87:085cde657901 286 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 287 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 288 * @retval None
mbed_official 87:085cde657901 289 */
mbed_official 87:085cde657901 290 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
mbed_official 87:085cde657901 291 {
mbed_official 87:085cde657901 292 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 293 the HAL_DMA2D_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 294 */
mbed_official 87:085cde657901 295 }
mbed_official 87:085cde657901 296
mbed_official 87:085cde657901 297 /**
mbed_official 87:085cde657901 298 * @}
mbed_official 87:085cde657901 299 */
mbed_official 87:085cde657901 300
mbed_official 87:085cde657901 301 /** @defgroup DMA2D_Group2 IO operation functions
mbed_official 87:085cde657901 302 * @brief IO operation functions
mbed_official 87:085cde657901 303 *
mbed_official 87:085cde657901 304 @verbatim
mbed_official 87:085cde657901 305 ===============================================================================
mbed_official 87:085cde657901 306 ##### IO operation functions #####
mbed_official 87:085cde657901 307 ===============================================================================
mbed_official 87:085cde657901 308 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 309 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 310 Start DMA2D transfer.
mbed_official 87:085cde657901 311 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 312 and data size and Start MultiBuffer DMA2D transfer.
mbed_official 87:085cde657901 313 (+) Configure the pdata, destination address and data size and
mbed_official 87:085cde657901 314 Start DMA2D transfer with interrupt.
mbed_official 87:085cde657901 315 (+) Configure the source for foreground and background, destination address
mbed_official 87:085cde657901 316 and data size and Start MultiBuffer DMA2D transfer with interrupt.
mbed_official 87:085cde657901 317 (+) Abort DMA2D transfer.
mbed_official 87:085cde657901 318 (+) Suspend DMA2D transfer.
mbed_official 87:085cde657901 319 (+) Continue DMA2D transfer.
mbed_official 87:085cde657901 320 (+) polling for transfer complete.
mbed_official 87:085cde657901 321 (+) handles DMA2D interrupt request.
mbed_official 87:085cde657901 322
mbed_official 87:085cde657901 323 @endverbatim
mbed_official 87:085cde657901 324 * @{
mbed_official 87:085cde657901 325 */
mbed_official 87:085cde657901 326
mbed_official 87:085cde657901 327 /**
mbed_official 87:085cde657901 328 * @brief Start the DMA2D Transfer.
mbed_official 87:085cde657901 329 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 330 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 331 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 332 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 333 * conversion DMA2D mode is selected, and configure
mbed_official 87:085cde657901 334 * the color value if register to memory DMA2D mode is selected
mbed_official 87:085cde657901 335 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 336 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 337 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 338 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 339 * @retval HAL status
mbed_official 87:085cde657901 340 */
mbed_official 87:085cde657901 341 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 342 {
mbed_official 87:085cde657901 343 /* Process locked */
mbed_official 87:085cde657901 344 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 345
mbed_official 87:085cde657901 346 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 347 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 348
mbed_official 87:085cde657901 349 /* Check the parameters */
mbed_official 87:085cde657901 350 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 351 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 352
mbed_official 87:085cde657901 353 /* Disable the Peripheral */
mbed_official 87:085cde657901 354 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 355
mbed_official 87:085cde657901 356 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 357 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 358
mbed_official 87:085cde657901 359 /* Enable the Peripheral */
mbed_official 87:085cde657901 360 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 361
mbed_official 87:085cde657901 362 return HAL_OK;
mbed_official 87:085cde657901 363 }
mbed_official 87:085cde657901 364
mbed_official 87:085cde657901 365 /**
mbed_official 87:085cde657901 366 * @brief Start the DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 367 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 368 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 369 * @param pdata: Configure the source memory Buffer address if
mbed_official 87:085cde657901 370 * the memory to memory or memory to memory with pixel format
mbed_official 87:085cde657901 371 * conversion DMA2D mode is selected, and configure
mbed_official 87:085cde657901 372 * the color value if register to memory DMA2D mode is selected
mbed_official 87:085cde657901 373 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 374 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 375 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 376 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 377 * @retval HAL status
mbed_official 87:085cde657901 378 */
mbed_official 87:085cde657901 379 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 380 {
mbed_official 87:085cde657901 381 /* Process locked */
mbed_official 87:085cde657901 382 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 383
mbed_official 87:085cde657901 384 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 385 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 386
mbed_official 87:085cde657901 387 /* Check the parameters */
mbed_official 87:085cde657901 388 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 389 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 390
mbed_official 87:085cde657901 391 /* Disable the Peripheral */
mbed_official 87:085cde657901 392 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 393
mbed_official 87:085cde657901 394 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 395 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 396
mbed_official 87:085cde657901 397 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 398 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 399
mbed_official 87:085cde657901 400 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 401 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 402
mbed_official 87:085cde657901 403 /* Enable the Peripheral */
mbed_official 87:085cde657901 404 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 405
mbed_official 87:085cde657901 406 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 407 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 408
mbed_official 87:085cde657901 409 return HAL_OK;
mbed_official 87:085cde657901 410 }
mbed_official 87:085cde657901 411
mbed_official 87:085cde657901 412 /**
mbed_official 87:085cde657901 413 * @brief Start the multi-source DMA2D Transfer.
mbed_official 87:085cde657901 414 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 415 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 416 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 87:085cde657901 417 * @param SrcAddress2: The source memory Buffer address of the background layer
mbed_official 87:085cde657901 418 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 419 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 420 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 421 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 422 * @retval HAL status
mbed_official 87:085cde657901 423 */
mbed_official 87:085cde657901 424 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 425 {
mbed_official 87:085cde657901 426 /* Process locked */
mbed_official 87:085cde657901 427 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 428
mbed_official 87:085cde657901 429 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 430 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 431
mbed_official 87:085cde657901 432 /* Check the parameters */
mbed_official 87:085cde657901 433 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 434 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 435
mbed_official 87:085cde657901 436 /* Disable the Peripheral */
mbed_official 87:085cde657901 437 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 438
mbed_official 87:085cde657901 439 if((hdma2d->LayerCfg[0].InputColorMode == CM_A4) || (hdma2d->LayerCfg[0].InputColorMode == CM_A8))
mbed_official 87:085cde657901 440 {
mbed_official 87:085cde657901 441 hdma2d->Instance->BGCOLR = SrcAddress2;
mbed_official 87:085cde657901 442 }
mbed_official 87:085cde657901 443 else
mbed_official 87:085cde657901 444 {
mbed_official 87:085cde657901 445 /* Configure DMA2D Stream source2 address */
mbed_official 87:085cde657901 446 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 447 }
mbed_official 87:085cde657901 448
mbed_official 87:085cde657901 449 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 450 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 451
mbed_official 87:085cde657901 452 /* Enable the Peripheral */
mbed_official 87:085cde657901 453 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 454
mbed_official 87:085cde657901 455 return HAL_OK;
mbed_official 87:085cde657901 456 }
mbed_official 87:085cde657901 457
mbed_official 87:085cde657901 458 /**
mbed_official 87:085cde657901 459 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
mbed_official 87:085cde657901 460 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 461 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 462 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
mbed_official 87:085cde657901 463 * @param SrcAddress2: The source memory Buffer address of the background layer
mbed_official 87:085cde657901 464 * or the color value for the A4 or A8 mode.
mbed_official 87:085cde657901 465 * @param DstAddress: The destination memory Buffer address.
mbed_official 87:085cde657901 466 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 467 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 468 * @retval HAL status
mbed_official 87:085cde657901 469 */
mbed_official 87:085cde657901 470 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 471 {
mbed_official 87:085cde657901 472 /* Process locked */
mbed_official 87:085cde657901 473 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 474
mbed_official 87:085cde657901 475 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 476 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 477
mbed_official 87:085cde657901 478 /* Check the parameters */
mbed_official 87:085cde657901 479 assert_param(IS_DMA2D_LINE(Heigh));
mbed_official 87:085cde657901 480 assert_param(IS_DMA2D_PIXEL(Width));
mbed_official 87:085cde657901 481
mbed_official 87:085cde657901 482 /* Disable the Peripheral */
mbed_official 87:085cde657901 483 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 484
mbed_official 87:085cde657901 485 if ((hdma2d->LayerCfg[0].InputColorMode == CM_A4) || (hdma2d->LayerCfg[0].InputColorMode == CM_A8))
mbed_official 87:085cde657901 486 {
mbed_official 87:085cde657901 487 hdma2d->Instance->BGCOLR = SrcAddress2;
mbed_official 87:085cde657901 488 }
mbed_official 87:085cde657901 489 else
mbed_official 87:085cde657901 490 {
mbed_official 87:085cde657901 491 /* Configure DMA2D Stream source2 address */
mbed_official 87:085cde657901 492 hdma2d->Instance->BGMAR = SrcAddress2;
mbed_official 87:085cde657901 493 }
mbed_official 87:085cde657901 494
mbed_official 87:085cde657901 495 /* Configure the source, destination address and the data size */
mbed_official 87:085cde657901 496 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Heigh);
mbed_official 87:085cde657901 497
mbed_official 87:085cde657901 498 /* Enable the configuration error interrupt */
mbed_official 87:085cde657901 499 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 500
mbed_official 87:085cde657901 501 /* Enable the transfer complete interrupt */
mbed_official 87:085cde657901 502 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 503
mbed_official 87:085cde657901 504 /* Enable the transfer Error interrupt */
mbed_official 87:085cde657901 505 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 506
mbed_official 87:085cde657901 507 /* Enable the Peripheral */
mbed_official 87:085cde657901 508 __HAL_DMA2D_ENABLE(hdma2d);
mbed_official 87:085cde657901 509
mbed_official 87:085cde657901 510 return HAL_OK;
mbed_official 87:085cde657901 511 }
mbed_official 87:085cde657901 512
mbed_official 87:085cde657901 513 /**
mbed_official 87:085cde657901 514 * @brief Abort the DMA2D Transfer.
mbed_official 87:085cde657901 515 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 516 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 517 * @retval HAL status
mbed_official 87:085cde657901 518 */
mbed_official 87:085cde657901 519 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 520 {
mbed_official 87:085cde657901 521 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 522
mbed_official 87:085cde657901 523 /* Disable the DMA2D */
mbed_official 87:085cde657901 524 __HAL_DMA2D_DISABLE(hdma2d);
mbed_official 87:085cde657901 525
mbed_official 87:085cde657901 526 /* Get timeout */
mbed_official 87:085cde657901 527 timeout = HAL_GetTick() + HAL_TIMEOUT_DMA2D_ABORT;
mbed_official 87:085cde657901 528
mbed_official 87:085cde657901 529 /* Check if the DMA2D is effectively disabled */
mbed_official 87:085cde657901 530 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 531 {
mbed_official 87:085cde657901 532 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 533 {
mbed_official 87:085cde657901 534 /* Update error code */
mbed_official 87:085cde657901 535 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 536
mbed_official 87:085cde657901 537 /* Change the DMA2D state */
mbed_official 87:085cde657901 538 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 539
mbed_official 87:085cde657901 540 /* Process Unlocked */
mbed_official 87:085cde657901 541 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 542
mbed_official 87:085cde657901 543 return HAL_TIMEOUT;
mbed_official 87:085cde657901 544 }
mbed_official 87:085cde657901 545 }
mbed_official 87:085cde657901 546 /* Process Unlocked */
mbed_official 87:085cde657901 547 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 548
mbed_official 87:085cde657901 549 /* Change the DMA2D state*/
mbed_official 87:085cde657901 550 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 551
mbed_official 87:085cde657901 552 return HAL_OK;
mbed_official 87:085cde657901 553 }
mbed_official 87:085cde657901 554
mbed_official 87:085cde657901 555 /**
mbed_official 87:085cde657901 556 * @brief Suspend the DMA2D Transfer.
mbed_official 87:085cde657901 557 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 558 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 559 * @retval HAL status
mbed_official 87:085cde657901 560 */
mbed_official 87:085cde657901 561 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 562 {
mbed_official 87:085cde657901 563 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 564
mbed_official 87:085cde657901 565 /* Suspend the DMA2D transfer */
mbed_official 87:085cde657901 566 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
mbed_official 87:085cde657901 567
mbed_official 87:085cde657901 568 /* Get timeout */
mbed_official 87:085cde657901 569 timeout = HAL_GetTick() + HAL_TIMEOUT_DMA2D_SUSPEND;
mbed_official 87:085cde657901 570
mbed_official 87:085cde657901 571 /* Check if the DMA2D is effectively suspended */
mbed_official 87:085cde657901 572 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
mbed_official 87:085cde657901 573 {
mbed_official 87:085cde657901 574 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 575 {
mbed_official 87:085cde657901 576 /* Update error code */
mbed_official 87:085cde657901 577 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 578
mbed_official 87:085cde657901 579 /* Change the DMA2D state */
mbed_official 87:085cde657901 580 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 581
mbed_official 87:085cde657901 582 return HAL_TIMEOUT;
mbed_official 87:085cde657901 583 }
mbed_official 87:085cde657901 584 }
mbed_official 87:085cde657901 585 /* Change the DMA2D state*/
mbed_official 87:085cde657901 586 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
mbed_official 87:085cde657901 587
mbed_official 87:085cde657901 588 return HAL_OK;
mbed_official 87:085cde657901 589 }
mbed_official 87:085cde657901 590
mbed_official 87:085cde657901 591 /**
mbed_official 87:085cde657901 592 * @brief Resume the DMA2D Transfer.
mbed_official 87:085cde657901 593 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 594 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 595 * @retval HAL status
mbed_official 87:085cde657901 596 */
mbed_official 87:085cde657901 597 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 598 {
mbed_official 87:085cde657901 599 /* Resume the DMA2D transfer */
mbed_official 87:085cde657901 600 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 /* Change the DMA2D state*/
mbed_official 87:085cde657901 603 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 604
mbed_official 87:085cde657901 605 return HAL_OK;
mbed_official 87:085cde657901 606 }
mbed_official 87:085cde657901 607
mbed_official 87:085cde657901 608 /**
mbed_official 87:085cde657901 609 * @brief Polling for transfer complete or CLUT loading.
mbed_official 87:085cde657901 610 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 611 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 612 * @param Timeout: Timeout duration
mbed_official 87:085cde657901 613 * @retval HAL status
mbed_official 87:085cde657901 614 */
mbed_official 87:085cde657901 615 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
mbed_official 87:085cde657901 616 {
mbed_official 87:085cde657901 617 uint32_t tmp, tmp1;
mbed_official 87:085cde657901 618 uint32_t timeout = 0x00;
mbed_official 87:085cde657901 619
mbed_official 87:085cde657901 620 /* Polling for DMA2D transfer */
mbed_official 87:085cde657901 621 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
mbed_official 87:085cde657901 622 {
mbed_official 87:085cde657901 623 /* Get timeout */
mbed_official 87:085cde657901 624 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 625
mbed_official 87:085cde657901 626 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
mbed_official 87:085cde657901 627 {
mbed_official 87:085cde657901 628 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 629 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 630
mbed_official 87:085cde657901 631 if((tmp != RESET) || (tmp1 != RESET))
mbed_official 87:085cde657901 632 {
mbed_official 87:085cde657901 633 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 634 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 635 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 636
mbed_official 87:085cde657901 637 /* Change DMA2D state */
mbed_official 87:085cde657901 638 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 639
mbed_official 87:085cde657901 640 /* Process unlocked */
mbed_official 87:085cde657901 641 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 642
mbed_official 87:085cde657901 643 return HAL_ERROR;
mbed_official 87:085cde657901 644 }
mbed_official 87:085cde657901 645 /* Check for the Timeout */
mbed_official 87:085cde657901 646 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 647 {
mbed_official 87:085cde657901 648 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 649 {
mbed_official 87:085cde657901 650 /* Process unlocked */
mbed_official 87:085cde657901 651 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 652
mbed_official 87:085cde657901 653 /* Update error code */
mbed_official 87:085cde657901 654 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 655
mbed_official 87:085cde657901 656 /* Change the DMA2D state */
mbed_official 87:085cde657901 657 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 658
mbed_official 87:085cde657901 659 return HAL_TIMEOUT;
mbed_official 87:085cde657901 660 }
mbed_official 87:085cde657901 661 }
mbed_official 87:085cde657901 662 }
mbed_official 87:085cde657901 663 }
mbed_official 87:085cde657901 664 /* Polling for CLUT loading */
mbed_official 87:085cde657901 665 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
mbed_official 87:085cde657901 666 {
mbed_official 87:085cde657901 667 /* Get timeout */
mbed_official 87:085cde657901 668 timeout = HAL_GetTick() + Timeout;
mbed_official 87:085cde657901 669
mbed_official 87:085cde657901 670 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
mbed_official 87:085cde657901 671 {
mbed_official 87:085cde657901 672 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
mbed_official 87:085cde657901 673 {
mbed_official 87:085cde657901 674 /* Clear the transfer and configuration error flags */
mbed_official 87:085cde657901 675 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
mbed_official 87:085cde657901 676
mbed_official 87:085cde657901 677 /* Change DMA2D state */
mbed_official 87:085cde657901 678 hdma2d->State= HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 679
mbed_official 87:085cde657901 680 return HAL_ERROR;
mbed_official 87:085cde657901 681 }
mbed_official 87:085cde657901 682 /* Check for the Timeout */
mbed_official 87:085cde657901 683 if(Timeout != HAL_MAX_DELAY)
mbed_official 87:085cde657901 684 {
mbed_official 87:085cde657901 685 if(HAL_GetTick() >= timeout)
mbed_official 87:085cde657901 686 {
mbed_official 87:085cde657901 687 /* Update error code */
mbed_official 87:085cde657901 688 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
mbed_official 87:085cde657901 689
mbed_official 87:085cde657901 690 /* Change the DMA2D state */
mbed_official 87:085cde657901 691 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
mbed_official 87:085cde657901 692
mbed_official 87:085cde657901 693 return HAL_TIMEOUT;
mbed_official 87:085cde657901 694 }
mbed_official 87:085cde657901 695 }
mbed_official 87:085cde657901 696 }
mbed_official 87:085cde657901 697 }
mbed_official 87:085cde657901 698 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 699 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 700
mbed_official 87:085cde657901 701 /* Clear the CLUT loading flag */
mbed_official 87:085cde657901 702 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
mbed_official 87:085cde657901 703
mbed_official 87:085cde657901 704 /* Change DMA2D state */
mbed_official 87:085cde657901 705 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 706
mbed_official 87:085cde657901 707 /* Process unlocked */
mbed_official 87:085cde657901 708 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 709
mbed_official 87:085cde657901 710 return HAL_OK;
mbed_official 87:085cde657901 711 }
mbed_official 87:085cde657901 712 /**
mbed_official 87:085cde657901 713 * @brief Handles DMA2D interrupt request.
mbed_official 87:085cde657901 714 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 715 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 716 * @retval HAL status
mbed_official 87:085cde657901 717 */
mbed_official 87:085cde657901 718 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 719 {
mbed_official 87:085cde657901 720 /* Transfer Error Interrupt management ***************************************/
mbed_official 87:085cde657901 721 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
mbed_official 87:085cde657901 722 {
mbed_official 87:085cde657901 723 if(__HAL_DMA2D_IT_STATUS(hdma2d, DMA2D_IT_TE) != RESET)
mbed_official 87:085cde657901 724 {
mbed_official 87:085cde657901 725 /* Disable the transfer Error interrupt */
mbed_official 87:085cde657901 726 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
mbed_official 87:085cde657901 727
mbed_official 87:085cde657901 728 /* Update error code */
mbed_official 87:085cde657901 729 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
mbed_official 87:085cde657901 730
mbed_official 87:085cde657901 731 /* Clear the transfer error flag */
mbed_official 87:085cde657901 732 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
mbed_official 87:085cde657901 733
mbed_official 87:085cde657901 734 /* Change DMA2D state */
mbed_official 87:085cde657901 735 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 736
mbed_official 87:085cde657901 737 /* Process Unlocked */
mbed_official 87:085cde657901 738 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 739
mbed_official 87:085cde657901 740 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 741 {
mbed_official 87:085cde657901 742 /* Transfer error Callback */
mbed_official 87:085cde657901 743 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 744 }
mbed_official 87:085cde657901 745 }
mbed_official 87:085cde657901 746 }
mbed_official 87:085cde657901 747 /* Configuration Error Interrupt management **********************************/
mbed_official 87:085cde657901 748 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
mbed_official 87:085cde657901 749 {
mbed_official 87:085cde657901 750 if(__HAL_DMA2D_IT_STATUS(hdma2d, DMA2D_IT_CE) != RESET)
mbed_official 87:085cde657901 751 {
mbed_official 87:085cde657901 752 /* Disable the Configuration Error interrupt */
mbed_official 87:085cde657901 753 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
mbed_official 87:085cde657901 754
mbed_official 87:085cde657901 755 /* Clear the Configuration error flag */
mbed_official 87:085cde657901 756 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
mbed_official 87:085cde657901 757
mbed_official 87:085cde657901 758 /* Update error code */
mbed_official 87:085cde657901 759 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
mbed_official 87:085cde657901 760
mbed_official 87:085cde657901 761 /* Change DMA2D state */
mbed_official 87:085cde657901 762 hdma2d->State = HAL_DMA2D_STATE_ERROR;
mbed_official 87:085cde657901 763
mbed_official 87:085cde657901 764 /* Process Unlocked */
mbed_official 87:085cde657901 765 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 766
mbed_official 87:085cde657901 767 if(hdma2d->XferErrorCallback != NULL)
mbed_official 87:085cde657901 768 {
mbed_official 87:085cde657901 769 /* Transfer error Callback */
mbed_official 87:085cde657901 770 hdma2d->XferErrorCallback(hdma2d);
mbed_official 87:085cde657901 771 }
mbed_official 87:085cde657901 772 }
mbed_official 87:085cde657901 773 }
mbed_official 87:085cde657901 774 /* Transfer Complete Interrupt management ************************************/
mbed_official 87:085cde657901 775 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
mbed_official 87:085cde657901 776 {
mbed_official 87:085cde657901 777 if(__HAL_DMA2D_IT_STATUS(hdma2d, DMA2D_IT_TC) != RESET)
mbed_official 87:085cde657901 778 {
mbed_official 87:085cde657901 779 /* Disable the transfer complete interrupt */
mbed_official 87:085cde657901 780 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
mbed_official 87:085cde657901 781
mbed_official 87:085cde657901 782 /* Clear the transfer complete flag */
mbed_official 87:085cde657901 783 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
mbed_official 87:085cde657901 784
mbed_official 87:085cde657901 785 /* Update error code */
mbed_official 87:085cde657901 786 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
mbed_official 87:085cde657901 787
mbed_official 87:085cde657901 788 /* Change DMA2D state */
mbed_official 87:085cde657901 789 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 790
mbed_official 87:085cde657901 791 /* Process Unlocked */
mbed_official 87:085cde657901 792 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 793
mbed_official 87:085cde657901 794 if(hdma2d->XferCpltCallback != NULL)
mbed_official 87:085cde657901 795 {
mbed_official 87:085cde657901 796 /* Transfer complete Callback */
mbed_official 87:085cde657901 797 hdma2d->XferCpltCallback(hdma2d);
mbed_official 87:085cde657901 798 }
mbed_official 87:085cde657901 799 }
mbed_official 87:085cde657901 800 }
mbed_official 87:085cde657901 801 }
mbed_official 87:085cde657901 802
mbed_official 87:085cde657901 803 /**
mbed_official 87:085cde657901 804 * @}
mbed_official 87:085cde657901 805 */
mbed_official 87:085cde657901 806
mbed_official 87:085cde657901 807 /** @defgroup DMA2D_Group3 Peripheral Control functions
mbed_official 87:085cde657901 808 * @brief Peripheral Control functions
mbed_official 87:085cde657901 809 *
mbed_official 87:085cde657901 810 @verbatim
mbed_official 87:085cde657901 811 ===============================================================================
mbed_official 87:085cde657901 812 ##### Peripheral Control functions #####
mbed_official 87:085cde657901 813 ===============================================================================
mbed_official 87:085cde657901 814 [..] This section provides functions allowing to:
mbed_official 87:085cde657901 815 (+) Configure the DMA2D foreground or/and background parameters.
mbed_official 87:085cde657901 816 (+) Configure the DMA2D CLUT transfer.
mbed_official 87:085cde657901 817 (+) Enable DMA2D CLUT.
mbed_official 87:085cde657901 818 (+) Disable DMA2D CLUT.
mbed_official 87:085cde657901 819 (+) Configure the line watermark
mbed_official 87:085cde657901 820
mbed_official 87:085cde657901 821 @endverbatim
mbed_official 87:085cde657901 822 * @{
mbed_official 87:085cde657901 823 */
mbed_official 87:085cde657901 824 /**
mbed_official 87:085cde657901 825 * @brief Configure the DMA2D Layer according to the specified
mbed_official 87:085cde657901 826 * parameters in the DMA2D_InitTypeDef and create the associated handle.
mbed_official 87:085cde657901 827 * @param hdma2d: DMA2D handle
mbed_official 87:085cde657901 828 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 829 * This parameter can be one of the following values:
mbed_official 87:085cde657901 830 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 831 * @retval HAL status
mbed_official 87:085cde657901 832 */
mbed_official 87:085cde657901 833 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 834 {
mbed_official 87:085cde657901 835 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
mbed_official 87:085cde657901 836
mbed_official 87:085cde657901 837 uint32_t tmp = 0;
mbed_official 87:085cde657901 838
mbed_official 87:085cde657901 839 /* Process locked */
mbed_official 87:085cde657901 840 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 841
mbed_official 87:085cde657901 842 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 843 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 844
mbed_official 87:085cde657901 845 /* Check the parameters */
mbed_official 87:085cde657901 846 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 847 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
mbed_official 87:085cde657901 848 if(hdma2d->Init.Mode != DMA2D_R2M)
mbed_official 87:085cde657901 849 {
mbed_official 87:085cde657901 850 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
mbed_official 87:085cde657901 851 if(hdma2d->Init.Mode != DMA2D_M2M)
mbed_official 87:085cde657901 852 {
mbed_official 87:085cde657901 853 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
mbed_official 87:085cde657901 854 assert_param(IS_DMA2D_ALPHA_VALUE(pLayerCfg->InputAlpha));
mbed_official 87:085cde657901 855 }
mbed_official 87:085cde657901 856 }
mbed_official 87:085cde657901 857
mbed_official 87:085cde657901 858 /* Configure the background DMA2D layer */
mbed_official 87:085cde657901 859 if(LayerIdx == 0)
mbed_official 87:085cde657901 860 {
mbed_official 87:085cde657901 861 /* DMA2D BGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 862 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 863 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 864
mbed_official 87:085cde657901 865 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 866 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
mbed_official 87:085cde657901 867
mbed_official 87:085cde657901 868 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 87:085cde657901 869 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 87:085cde657901 870
mbed_official 87:085cde657901 871 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 872 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 873
mbed_official 87:085cde657901 874 /* DMA2D BGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 875 /* Get the BGOR register value */
mbed_official 87:085cde657901 876 tmp = hdma2d->Instance->BGOR;
mbed_official 87:085cde657901 877
mbed_official 87:085cde657901 878 /* Clear colors bits */
mbed_official 87:085cde657901 879 tmp &= (uint32_t)~DMA2D_BGOR_LO;
mbed_official 87:085cde657901 880
mbed_official 87:085cde657901 881 /* Prepare the value to be wrote to the BGOR register */
mbed_official 87:085cde657901 882 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 883
mbed_official 87:085cde657901 884 /* Write to DMA2D BGOR register */
mbed_official 87:085cde657901 885 hdma2d->Instance->BGOR = tmp;
mbed_official 87:085cde657901 886 }
mbed_official 87:085cde657901 887 /* Configure the foreground DMA2D layer */
mbed_official 87:085cde657901 888 else
mbed_official 87:085cde657901 889 {
mbed_official 87:085cde657901 890 /* DMA2D FGPFCR register configuration -----------------------------------*/
mbed_official 87:085cde657901 891 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 892 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 893
mbed_official 87:085cde657901 894 /* Clear Input color mode, alpha value and alpha mode bits */
mbed_official 87:085cde657901 895 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
mbed_official 87:085cde657901 896
mbed_official 87:085cde657901 897 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 87:085cde657901 898 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
mbed_official 87:085cde657901 899
mbed_official 87:085cde657901 900 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 901 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 902
mbed_official 87:085cde657901 903 /* DMA2D FGOR register configuration -------------------------------------*/
mbed_official 87:085cde657901 904 /* Get the FGOR register value */
mbed_official 87:085cde657901 905 tmp = hdma2d->Instance->FGOR;
mbed_official 87:085cde657901 906
mbed_official 87:085cde657901 907 /* Clear colors bits */
mbed_official 87:085cde657901 908 tmp &= (uint32_t)~DMA2D_FGOR_LO;
mbed_official 87:085cde657901 909
mbed_official 87:085cde657901 910 /* Prepare the value to be wrote to the FGOR register */
mbed_official 87:085cde657901 911 tmp |= pLayerCfg->InputOffset;
mbed_official 87:085cde657901 912
mbed_official 87:085cde657901 913 /* Write to DMA2D FGOR register */
mbed_official 87:085cde657901 914 hdma2d->Instance->FGOR = tmp;
mbed_official 87:085cde657901 915 }
mbed_official 87:085cde657901 916 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 917 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 918
mbed_official 87:085cde657901 919 /* Process unlocked */
mbed_official 87:085cde657901 920 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 921
mbed_official 87:085cde657901 922 return HAL_OK;
mbed_official 87:085cde657901 923 }
mbed_official 87:085cde657901 924
mbed_official 87:085cde657901 925 /**
mbed_official 87:085cde657901 926 * @brief Configure the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 927 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 928 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 929 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
mbed_official 87:085cde657901 930 * the configuration information for the color look up table.
mbed_official 87:085cde657901 931 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 932 * This parameter can be one of the following values:
mbed_official 87:085cde657901 933 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 934 * @retval HAL status
mbed_official 87:085cde657901 935 */
mbed_official 87:085cde657901 936 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
mbed_official 87:085cde657901 937 {
mbed_official 87:085cde657901 938 uint32_t tmp = 0, tmp1 = 0;
mbed_official 87:085cde657901 939
mbed_official 87:085cde657901 940 /* Check the parameters */
mbed_official 87:085cde657901 941 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 942 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
mbed_official 87:085cde657901 943 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
mbed_official 87:085cde657901 944
mbed_official 87:085cde657901 945 /* Configure the CLUT of the background DMA2D layer */
mbed_official 87:085cde657901 946 if(LayerIdx == 0)
mbed_official 87:085cde657901 947 {
mbed_official 87:085cde657901 948 /* Get the BGCMAR register value */
mbed_official 87:085cde657901 949 tmp = hdma2d->Instance->BGCMAR;
mbed_official 87:085cde657901 950
mbed_official 87:085cde657901 951 /* Clear CLUT address bits */
mbed_official 87:085cde657901 952 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
mbed_official 87:085cde657901 953
mbed_official 87:085cde657901 954 /* Prepare the value to be wrote to the BGCMAR register */
mbed_official 87:085cde657901 955 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 956
mbed_official 87:085cde657901 957 /* Write to DMA2D BGCMAR register */
mbed_official 87:085cde657901 958 hdma2d->Instance->BGCMAR = tmp;
mbed_official 87:085cde657901 959
mbed_official 87:085cde657901 960 /* Get the BGPFCCR register value */
mbed_official 87:085cde657901 961 tmp = hdma2d->Instance->BGPFCCR;
mbed_official 87:085cde657901 962
mbed_official 87:085cde657901 963 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 964 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
mbed_official 87:085cde657901 965
mbed_official 87:085cde657901 966 /* Get the CLUT size */
mbed_official 87:085cde657901 967 tmp1 = CLUTCfg.Size << 16;
mbed_official 87:085cde657901 968
mbed_official 87:085cde657901 969 /* Prepare the value to be wrote to the BGPFCCR register */
mbed_official 87:085cde657901 970 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 971
mbed_official 87:085cde657901 972 /* Write to DMA2D BGPFCCR register */
mbed_official 87:085cde657901 973 hdma2d->Instance->BGPFCCR = tmp;
mbed_official 87:085cde657901 974 }
mbed_official 87:085cde657901 975 /* Configure the CLUT of the foreground DMA2D layer */
mbed_official 87:085cde657901 976 else
mbed_official 87:085cde657901 977 {
mbed_official 87:085cde657901 978 /* Get the FGCMAR register value */
mbed_official 87:085cde657901 979 tmp = hdma2d->Instance->FGCMAR;
mbed_official 87:085cde657901 980
mbed_official 87:085cde657901 981 /* Clear CLUT address bits */
mbed_official 87:085cde657901 982 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
mbed_official 87:085cde657901 983
mbed_official 87:085cde657901 984 /* Prepare the value to be wrote to the FGCMAR register */
mbed_official 87:085cde657901 985 tmp |= (uint32_t)CLUTCfg.pCLUT;
mbed_official 87:085cde657901 986
mbed_official 87:085cde657901 987 /* Write to DMA2D FGCMAR register */
mbed_official 87:085cde657901 988 hdma2d->Instance->FGCMAR = tmp;
mbed_official 87:085cde657901 989
mbed_official 87:085cde657901 990 /* Get the FGPFCCR register value */
mbed_official 87:085cde657901 991 tmp = hdma2d->Instance->FGPFCCR;
mbed_official 87:085cde657901 992
mbed_official 87:085cde657901 993 /* Clear CLUT size and CLUT address bits */
mbed_official 87:085cde657901 994 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
mbed_official 87:085cde657901 995
mbed_official 87:085cde657901 996 /* Get the CLUT size */
mbed_official 87:085cde657901 997 tmp1 = CLUTCfg.Size << 8;
mbed_official 87:085cde657901 998
mbed_official 87:085cde657901 999 /* Prepare the value to be wrote to the FGPFCCR register */
mbed_official 87:085cde657901 1000 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
mbed_official 87:085cde657901 1001
mbed_official 87:085cde657901 1002 /* Write to DMA2D FGPFCCR register */
mbed_official 87:085cde657901 1003 hdma2d->Instance->FGPFCCR = tmp;
mbed_official 87:085cde657901 1004 }
mbed_official 87:085cde657901 1005
mbed_official 87:085cde657901 1006 return HAL_OK;
mbed_official 87:085cde657901 1007 }
mbed_official 87:085cde657901 1008
mbed_official 87:085cde657901 1009 /**
mbed_official 87:085cde657901 1010 * @brief Enable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1011 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1012 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1013 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 1014 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1015 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1016 * @retval HAL status
mbed_official 87:085cde657901 1017 */
mbed_official 87:085cde657901 1018 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1019 {
mbed_official 87:085cde657901 1020 /* Check the parameters */
mbed_official 87:085cde657901 1021 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1022
mbed_official 87:085cde657901 1023 if(LayerIdx == 0)
mbed_official 87:085cde657901 1024 {
mbed_official 87:085cde657901 1025 /* Enable the CLUT loading for the background */
mbed_official 87:085cde657901 1026 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1027 }
mbed_official 87:085cde657901 1028 else
mbed_official 87:085cde657901 1029 {
mbed_official 87:085cde657901 1030 /* Enable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1031 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1032 }
mbed_official 87:085cde657901 1033
mbed_official 87:085cde657901 1034 return HAL_OK;
mbed_official 87:085cde657901 1035 }
mbed_official 87:085cde657901 1036
mbed_official 87:085cde657901 1037 /**
mbed_official 87:085cde657901 1038 * @brief Disable the DMA2D CLUT Transfer.
mbed_official 87:085cde657901 1039 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1040 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1041 * @param LayerIdx: DMA2D Layer index
mbed_official 87:085cde657901 1042 * This parameter can be one of the following values:
mbed_official 87:085cde657901 1043 * 0(background) / 1(foreground)
mbed_official 87:085cde657901 1044 * @retval HAL status
mbed_official 87:085cde657901 1045 */
mbed_official 87:085cde657901 1046 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
mbed_official 87:085cde657901 1047 {
mbed_official 87:085cde657901 1048 /* Check the parameters */
mbed_official 87:085cde657901 1049 assert_param(IS_DMA2D_LAYER(LayerIdx));
mbed_official 87:085cde657901 1050
mbed_official 87:085cde657901 1051 if(LayerIdx == 0)
mbed_official 87:085cde657901 1052 {
mbed_official 87:085cde657901 1053 /* Disable the CLUT loading for the background */
mbed_official 87:085cde657901 1054 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
mbed_official 87:085cde657901 1055 }
mbed_official 87:085cde657901 1056 else
mbed_official 87:085cde657901 1057 {
mbed_official 87:085cde657901 1058 /* Disable the CLUT loading for the foreground */
mbed_official 87:085cde657901 1059 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
mbed_official 87:085cde657901 1060 }
mbed_official 87:085cde657901 1061
mbed_official 87:085cde657901 1062 return HAL_OK;
mbed_official 87:085cde657901 1063 }
mbed_official 87:085cde657901 1064
mbed_official 87:085cde657901 1065 /**
mbed_official 87:085cde657901 1066 * @brief Define the configuration of the line watermark .
mbed_official 87:085cde657901 1067 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1068 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1069 * @param Line: Line Watermark configuration.
mbed_official 87:085cde657901 1070 * @retval None
mbed_official 87:085cde657901 1071 */
mbed_official 87:085cde657901 1072
mbed_official 87:085cde657901 1073 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
mbed_official 87:085cde657901 1074 {
mbed_official 87:085cde657901 1075 /* Process locked */
mbed_official 87:085cde657901 1076 __HAL_LOCK(hdma2d);
mbed_official 87:085cde657901 1077
mbed_official 87:085cde657901 1078 /* Change DMA2D peripheral state */
mbed_official 87:085cde657901 1079 hdma2d->State = HAL_DMA2D_STATE_BUSY;
mbed_official 87:085cde657901 1080
mbed_official 87:085cde657901 1081 /* Check the parameters */
mbed_official 87:085cde657901 1082 assert_param(IS_DMA2D_LineWatermark(Line));
mbed_official 87:085cde657901 1083
mbed_official 87:085cde657901 1084 /* Sets the Line watermark configuration */
mbed_official 87:085cde657901 1085 DMA2D->LWR = (uint32_t)Line;
mbed_official 87:085cde657901 1086
mbed_official 87:085cde657901 1087 /* Initialize the DMA2D state*/
mbed_official 87:085cde657901 1088 hdma2d->State = HAL_DMA2D_STATE_READY;
mbed_official 87:085cde657901 1089
mbed_official 87:085cde657901 1090 /* Process unlocked */
mbed_official 87:085cde657901 1091 __HAL_UNLOCK(hdma2d);
mbed_official 87:085cde657901 1092
mbed_official 87:085cde657901 1093 return HAL_OK;
mbed_official 87:085cde657901 1094 }
mbed_official 87:085cde657901 1095
mbed_official 87:085cde657901 1096 /**
mbed_official 87:085cde657901 1097 * @}
mbed_official 87:085cde657901 1098 */
mbed_official 87:085cde657901 1099
mbed_official 87:085cde657901 1100 /** @defgroup DMA2D_Group4 Peripheral State functions
mbed_official 87:085cde657901 1101 * @brief Peripheral State functions
mbed_official 87:085cde657901 1102 *
mbed_official 87:085cde657901 1103 @verbatim
mbed_official 87:085cde657901 1104 ===============================================================================
mbed_official 87:085cde657901 1105 ##### Peripheral State and Errors functions #####
mbed_official 87:085cde657901 1106 ===============================================================================
mbed_official 87:085cde657901 1107 [..]
mbed_official 87:085cde657901 1108 This subsection provides functions allowing to
mbed_official 87:085cde657901 1109 (+) Check the DMA2D state
mbed_official 87:085cde657901 1110 (+) Get error code
mbed_official 87:085cde657901 1111
mbed_official 87:085cde657901 1112 @endverbatim
mbed_official 87:085cde657901 1113 * @{
mbed_official 87:085cde657901 1114 */
mbed_official 87:085cde657901 1115
mbed_official 87:085cde657901 1116 /**
mbed_official 87:085cde657901 1117 * @brief Return the DMA2D state
mbed_official 87:085cde657901 1118 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1119 * the configuration information for the DMA2D.
mbed_official 87:085cde657901 1120 * @retval HAL state
mbed_official 87:085cde657901 1121 */
mbed_official 87:085cde657901 1122 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1123 {
mbed_official 87:085cde657901 1124 return hdma2d->State;
mbed_official 87:085cde657901 1125 }
mbed_official 87:085cde657901 1126
mbed_official 87:085cde657901 1127 /**
mbed_official 87:085cde657901 1128 * @brief Return the DMA2D error code
mbed_official 87:085cde657901 1129 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1130 * the configuration information for DMA2D.
mbed_official 87:085cde657901 1131 * @retval DMA2D Error Code
mbed_official 87:085cde657901 1132 */
mbed_official 87:085cde657901 1133 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
mbed_official 87:085cde657901 1134 {
mbed_official 87:085cde657901 1135 return hdma2d->ErrorCode;
mbed_official 87:085cde657901 1136 }
mbed_official 87:085cde657901 1137
mbed_official 87:085cde657901 1138 /**
mbed_official 87:085cde657901 1139 * @}
mbed_official 87:085cde657901 1140 */
mbed_official 87:085cde657901 1141
mbed_official 87:085cde657901 1142
mbed_official 87:085cde657901 1143 /**
mbed_official 87:085cde657901 1144 * @brief Set the DMA2D Transfer parameter.
mbed_official 87:085cde657901 1145 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
mbed_official 87:085cde657901 1146 * the configuration information for the specified DMA2D.
mbed_official 87:085cde657901 1147 * @param pdata: The source memory Buffer address
mbed_official 87:085cde657901 1148 * @param DstAddress: The destination memory Buffer address
mbed_official 87:085cde657901 1149 * @param Width: The width of data to be transferred from source to destination.
mbed_official 87:085cde657901 1150 * @param Heigh: The heigh of data to be transferred from source to destination.
mbed_official 87:085cde657901 1151 * @retval HAL status
mbed_official 87:085cde657901 1152 */
mbed_official 87:085cde657901 1153 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Heigh)
mbed_official 87:085cde657901 1154 {
mbed_official 87:085cde657901 1155 uint32_t tmp = 0;
mbed_official 87:085cde657901 1156 uint32_t tmp1 = 0;
mbed_official 87:085cde657901 1157 uint32_t tmp2 = 0;
mbed_official 87:085cde657901 1158 uint32_t tmp3 = 0;
mbed_official 87:085cde657901 1159 uint32_t tmp4 = 0;
mbed_official 87:085cde657901 1160
mbed_official 87:085cde657901 1161 tmp = Width << 16;
mbed_official 87:085cde657901 1162
mbed_official 87:085cde657901 1163 /* Configure DMA2D data size */
mbed_official 87:085cde657901 1164 hdma2d->Instance->NLR = (Heigh | tmp);
mbed_official 87:085cde657901 1165
mbed_official 87:085cde657901 1166 /* Configure DMA2D destination address */
mbed_official 87:085cde657901 1167 hdma2d->Instance->OMAR = DstAddress;
mbed_official 87:085cde657901 1168
mbed_official 87:085cde657901 1169 /* Register to memory DMA2D mode selected */
mbed_official 87:085cde657901 1170 if (hdma2d->Init.Mode == DMA2D_R2M)
mbed_official 87:085cde657901 1171 {
mbed_official 87:085cde657901 1172 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
mbed_official 87:085cde657901 1173 tmp2 = pdata & DMA2D_OCOLR_RED_1;
mbed_official 87:085cde657901 1174 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
mbed_official 87:085cde657901 1175 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
mbed_official 87:085cde657901 1176
mbed_official 87:085cde657901 1177 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
mbed_official 87:085cde657901 1178 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
mbed_official 87:085cde657901 1179 {
mbed_official 87:085cde657901 1180 tmp = (tmp3 | tmp2 | tmp1| tmp4);
mbed_official 87:085cde657901 1181 }
mbed_official 87:085cde657901 1182 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
mbed_official 87:085cde657901 1183 {
mbed_official 87:085cde657901 1184 tmp = (tmp3 | tmp2 | tmp4);
mbed_official 87:085cde657901 1185 }
mbed_official 87:085cde657901 1186 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
mbed_official 87:085cde657901 1187 {
mbed_official 87:085cde657901 1188 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1189 tmp3 = (tmp3 >> 10);
mbed_official 87:085cde657901 1190 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1191 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
mbed_official 87:085cde657901 1192 }
mbed_official 87:085cde657901 1193 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
mbed_official 87:085cde657901 1194 {
mbed_official 87:085cde657901 1195 tmp1 = (tmp1 >> 31);
mbed_official 87:085cde657901 1196 tmp2 = (tmp2 >> 19);
mbed_official 87:085cde657901 1197 tmp3 = (tmp3 >> 11);
mbed_official 87:085cde657901 1198 tmp4 = (tmp4 >> 3 );
mbed_official 87:085cde657901 1199 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
mbed_official 87:085cde657901 1200 }
mbed_official 87:085cde657901 1201 else /* DMA2D_CMode = DMA2D_ARGB4444 */
mbed_official 87:085cde657901 1202 {
mbed_official 87:085cde657901 1203 tmp1 = (tmp1 >> 28);
mbed_official 87:085cde657901 1204 tmp2 = (tmp2 >> 20);
mbed_official 87:085cde657901 1205 tmp3 = (tmp3 >> 12);
mbed_official 87:085cde657901 1206 tmp4 = (tmp4 >> 4 );
mbed_official 87:085cde657901 1207 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
mbed_official 87:085cde657901 1208 }
mbed_official 87:085cde657901 1209 /* Write to DMA2D OCOLR register */
mbed_official 87:085cde657901 1210 hdma2d->Instance->OCOLR = tmp;
mbed_official 87:085cde657901 1211 }
mbed_official 87:085cde657901 1212 else if ((hdma2d->LayerCfg[1].InputColorMode == CM_A4) || (hdma2d->LayerCfg[1].InputColorMode == CM_A8))
mbed_official 87:085cde657901 1213 {
mbed_official 87:085cde657901 1214 hdma2d->Instance->FGCOLR = pdata;
mbed_official 87:085cde657901 1215 }
mbed_official 87:085cde657901 1216 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
mbed_official 87:085cde657901 1217 {
mbed_official 87:085cde657901 1218 /* Configure DMA2D source address */
mbed_official 87:085cde657901 1219 hdma2d->Instance->FGMAR = pdata;
mbed_official 87:085cde657901 1220 }
mbed_official 87:085cde657901 1221 }
mbed_official 87:085cde657901 1222
mbed_official 87:085cde657901 1223 /**
mbed_official 87:085cde657901 1224 * @}
mbed_official 87:085cde657901 1225 */
mbed_official 87:085cde657901 1226 #endif /* STM32F429xx || STM32F439xx */
mbed_official 87:085cde657901 1227 #endif /* HAL_DMA2D_MODULE_ENABLED */
mbed_official 87:085cde657901 1228 /**
mbed_official 87:085cde657901 1229 * @}
mbed_official 87:085cde657901 1230 */
mbed_official 87:085cde657901 1231
mbed_official 87:085cde657901 1232 /**
mbed_official 87:085cde657901 1233 * @}
mbed_official 87:085cde657901 1234 */
mbed_official 87:085cde657901 1235
mbed_official 87:085cde657901 1236 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/