Diff: targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct

Revision:

163:74e0ce7f98e8

Parent:

160:d5399cc887bb

Child:

188:bcfe06ba3d64

--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct	Wed Apr 12 16:21:43 2017 +0100
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct	Fri Apr 28 14:04:18 2017 +0100
@@ -1,6 +1,15 @@
+#! armcc -E
 
-LR_IROM1 0x00000000 {
-  ER_IROM1 0x00000000 {  ; load address = execution address
+#if !defined(MBED_APP_START)
+  #define MBED_APP_START 0x00000000
+#endif
+
+#if !defined(MBED_APP_SIZE)
+  #define MBED_APP_SIZE 0x00080000
+#endif
+
+LR_IROM1 MBED_APP_START {
+  ER_IROM1 MBED_APP_START {  ; load address = execution address
    *(RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
@@ -31,7 +40,7 @@
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000)    ; 512 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 512 KB APROM
 ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000)   ; 64 KB SRAM (internal)
 ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000)   ; 1 MB SRAM (external)