mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303ZE/TOOLCHAIN_ARM_STD/startup_stm32f303xe.S@148:21d94c44109e, 2016-09-30 (annotated)

Committer:
<>
Date:
Fri Sep 30 18:07:01 2016 +0100
Revision:
148:21d94c44109e
Parent:
147:30b64687e01f 
This updates the lib to the mbed lib v127

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 147:30b64687e01f 1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
<> 147:30b64687e01f 2 ;* File Name : startup_stm32f303xe.s
<> 147:30b64687e01f 3 ;* Author : MCD Application Team
<> 147:30b64687e01f 4 ;* Version : V2.1.0
<> 147:30b64687e01f 5 ;* Date : 12-Sept-2014
<> 147:30b64687e01f 6 ;* Description : STM32F303xE devices vector table for MDK-ARM_STD toolchain.
<> 147:30b64687e01f 7 ;* This module performs:
<> 147:30b64687e01f 8 ;* - Set the initial SP
<> 147:30b64687e01f 9 ;* - Set the initial PC == Reset_Handler
<> 147:30b64687e01f 10 ;* - Set the vector table entries with the exceptions ISR address
<> 147:30b64687e01f 11 ;* - Branches to __main in the C library (which eventually
<> 147:30b64687e01f 12 ;* calls main()).
<> 147:30b64687e01f 13 ;* After Reset the CortexM4 processor is in Thread mode,
<> 147:30b64687e01f 14 ;* priority is Privileged, and the Stack is set to Main.
<> 147:30b64687e01f 15 ;* <<< Use Configuration Wizard in Context Menu >>>
<> 147:30b64687e01f 16 ;*******************************************************************************
<> 147:30b64687e01f 17 ;
<> 147:30b64687e01f 18 ;* Redistribution and use in source and binary forms, with or without modification,
<> 147:30b64687e01f 19 ;* are permitted provided that the following conditions are met:
<> 147:30b64687e01f 20 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 147:30b64687e01f 21 ;* this list of conditions and the following disclaimer.
<> 147:30b64687e01f 22 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 147:30b64687e01f 23 ;* this list of conditions and the following disclaimer in the documentation
<> 147:30b64687e01f 24 ;* and/or other materials provided with the distribution.
<> 147:30b64687e01f 25 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 147:30b64687e01f 26 ;* may be used to endorse or promote products derived from this software
<> 147:30b64687e01f 27 ;* without specific prior written permission.
<> 147:30b64687e01f 28 ;*
<> 147:30b64687e01f 29 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 147:30b64687e01f 30 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 147:30b64687e01f 31 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 147:30b64687e01f 32 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 147:30b64687e01f 33 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 147:30b64687e01f 34 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 147:30b64687e01f 35 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 147:30b64687e01f 36 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 147:30b64687e01f 37 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 147:30b64687e01f 38 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 147:30b64687e01f 39 ;
<> 147:30b64687e01f 40 ;*******************************************************************************
<> 147:30b64687e01f 41
<> 148:21d94c44109e 42 __initial_sp EQU 0x20010000 ; Top of RAM
<> 147:30b64687e01f 43
<> 147:30b64687e01f 44 PRESERVE8
<> 147:30b64687e01f 45 THUMB
<> 147:30b64687e01f 46
<> 147:30b64687e01f 47
<> 147:30b64687e01f 48 ; Vector Table Mapped to Address 0 at Reset
<> 147:30b64687e01f 49 AREA RESET, DATA, READONLY
<> 147:30b64687e01f 50 EXPORT __Vectors
<> 147:30b64687e01f 51 EXPORT __Vectors_End
<> 147:30b64687e01f 52 EXPORT __Vectors_Size
<> 147:30b64687e01f 53
<> 147:30b64687e01f 54 __Vectors DCD __initial_sp ; Top of Stack
<> 147:30b64687e01f 55 DCD Reset_Handler ; Reset Handler
<> 147:30b64687e01f 56 DCD NMI_Handler ; NMI Handler
<> 147:30b64687e01f 57 DCD HardFault_Handler ; Hard Fault Handler
<> 147:30b64687e01f 58 DCD MemManage_Handler ; MPU Fault Handler
<> 147:30b64687e01f 59 DCD BusFault_Handler ; Bus Fault Handler
<> 147:30b64687e01f 60 DCD UsageFault_Handler ; Usage Fault Handler
<> 147:30b64687e01f 61 DCD 0 ; Reserved
<> 147:30b64687e01f 62 DCD 0 ; Reserved
<> 147:30b64687e01f 63 DCD 0 ; Reserved
<> 147:30b64687e01f 64 DCD 0 ; Reserved
<> 147:30b64687e01f 65 DCD SVC_Handler ; SVCall Handler
<> 147:30b64687e01f 66 DCD DebugMon_Handler ; Debug Monitor Handler
<> 147:30b64687e01f 67 DCD 0 ; Reserved
<> 147:30b64687e01f 68 DCD PendSV_Handler ; PendSV Handler
<> 147:30b64687e01f 69 DCD SysTick_Handler ; SysTick Handler
<> 147:30b64687e01f 70
<> 147:30b64687e01f 71 ; External Interrupts
<> 147:30b64687e01f 72 DCD WWDG_IRQHandler ; Window WatchDog
<> 147:30b64687e01f 73 DCD PVD_IRQHandler ; PVD through EXTI Line detection
<> 147:30b64687e01f 74 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
<> 147:30b64687e01f 75 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
<> 147:30b64687e01f 76 DCD FLASH_IRQHandler ; FLASH
<> 147:30b64687e01f 77 DCD RCC_IRQHandler ; RCC
<> 147:30b64687e01f 78 DCD EXTI0_IRQHandler ; EXTI Line0
<> 147:30b64687e01f 79 DCD EXTI1_IRQHandler ; EXTI Line1
<> 147:30b64687e01f 80 DCD EXTI2_TSC_IRQHandler ; EXTI Line2 and Touch Sense controller
<> 147:30b64687e01f 81 DCD EXTI3_IRQHandler ; EXTI Line3
<> 147:30b64687e01f 82 DCD EXTI4_IRQHandler ; EXTI Line4
<> 147:30b64687e01f 83 DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
<> 147:30b64687e01f 84 DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
<> 147:30b64687e01f 85 DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
<> 147:30b64687e01f 86 DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
<> 147:30b64687e01f 87 DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
<> 147:30b64687e01f 88 DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
<> 147:30b64687e01f 89 DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
<> 147:30b64687e01f 90 DCD ADC1_2_IRQHandler ; ADC1 and ADC2
<> 147:30b64687e01f 91 DCD USB_HP_CAN_TX_IRQHandler ; USB Device High Priority or CAN TX
<> 147:30b64687e01f 92 DCD USB_LP_CAN_RX0_IRQHandler ; USB Device Low Priority or CAN RX0
<> 147:30b64687e01f 93 DCD CAN_RX1_IRQHandler ; CAN RX1
<> 147:30b64687e01f 94 DCD CAN_SCE_IRQHandler ; CAN SCE
<> 147:30b64687e01f 95 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
<> 147:30b64687e01f 96 DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
<> 147:30b64687e01f 97 DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
<> 147:30b64687e01f 98 DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
<> 147:30b64687e01f 99 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 147:30b64687e01f 100 DCD TIM2_IRQHandler ; TIM2
<> 147:30b64687e01f 101 DCD TIM3_IRQHandler ; TIM3
<> 147:30b64687e01f 102 DCD TIM4_IRQHandler ; TIM4
<> 147:30b64687e01f 103 DCD I2C1_EV_IRQHandler ; I2C1 Event
<> 147:30b64687e01f 104 DCD I2C1_ER_IRQHandler ; I2C1 Error
<> 147:30b64687e01f 105 DCD I2C2_EV_IRQHandler ; I2C2 Event
<> 147:30b64687e01f 106 DCD I2C2_ER_IRQHandler ; I2C2 Error
<> 147:30b64687e01f 107 DCD SPI1_IRQHandler ; SPI1
<> 147:30b64687e01f 108 DCD SPI2_IRQHandler ; SPI2
<> 147:30b64687e01f 109 DCD USART1_IRQHandler ; USART1
<> 147:30b64687e01f 110 DCD USART2_IRQHandler ; USART2
<> 147:30b64687e01f 111 DCD USART3_IRQHandler ; USART3
<> 147:30b64687e01f 112 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
<> 147:30b64687e01f 113 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
<> 147:30b64687e01f 114 DCD USBWakeUp_IRQHandler ; USB Wakeup through EXTI line
<> 147:30b64687e01f 115 DCD TIM8_BRK_IRQHandler ; TIM8 Break
<> 147:30b64687e01f 116 DCD TIM8_UP_IRQHandler ; TIM8 Update
<> 147:30b64687e01f 117 DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
<> 147:30b64687e01f 118 DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
<> 147:30b64687e01f 119 DCD ADC3_IRQHandler ; ADC3
<> 147:30b64687e01f 120 DCD FMC_IRQHandler ; FMC
<> 147:30b64687e01f 121 DCD 0 ; Reserved
<> 147:30b64687e01f 122 DCD 0 ; Reserved
<> 147:30b64687e01f 123 DCD SPI3_IRQHandler ; SPI3
<> 147:30b64687e01f 124 DCD UART4_IRQHandler ; UART4
<> 147:30b64687e01f 125 DCD UART5_IRQHandler ; UART5
<> 147:30b64687e01f 126 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
<> 147:30b64687e01f 127 DCD TIM7_IRQHandler ; TIM7
<> 147:30b64687e01f 128 DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
<> 147:30b64687e01f 129 DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
<> 147:30b64687e01f 130 DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
<> 147:30b64687e01f 131 DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
<> 147:30b64687e01f 132 DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
<> 147:30b64687e01f 133 DCD ADC4_IRQHandler ; ADC4
<> 147:30b64687e01f 134 DCD 0 ; Reserved
<> 147:30b64687e01f 135 DCD 0 ; Reserved
<> 147:30b64687e01f 136 DCD COMP1_2_3_IRQHandler ; COMP1, COMP2 and COMP3
<> 147:30b64687e01f 137 DCD COMP4_5_6_IRQHandler ; COMP4, COMP5 and COMP6
<> 147:30b64687e01f 138 DCD COMP7_IRQHandler ; COMP7
<> 147:30b64687e01f 139 DCD 0 ; Reserved
<> 147:30b64687e01f 140 DCD 0 ; Reserved
<> 147:30b64687e01f 141 DCD 0 ; Reserved
<> 147:30b64687e01f 142 DCD 0 ; Reserved
<> 147:30b64687e01f 143 DCD 0 ; Reserved
<> 147:30b64687e01f 144 DCD I2C3_EV_IRQHandler ; I2C3 Event
<> 147:30b64687e01f 145 DCD I2C3_ER_IRQHandler ; I2C3 Error
<> 147:30b64687e01f 146 DCD USB_HP_IRQHandler ; USB High Priority remap
<> 147:30b64687e01f 147 DCD USB_LP_IRQHandler ; USB Low Priority remap
<> 147:30b64687e01f 148 DCD USBWakeUp_RMP_IRQHandler ; USB Wakeup remap through EXTI
<> 147:30b64687e01f 149 DCD TIM20_BRK_IRQHandler ; TIM20 Break
<> 147:30b64687e01f 150 DCD TIM20_UP_IRQHandler ; TIM20 Update
<> 147:30b64687e01f 151 DCD TIM20_TRG_COM_IRQHandler ; TIM20 Trigger and Commutation
<> 147:30b64687e01f 152 DCD TIM20_CC_IRQHandler ; TIM20 Capture Compare
<> 147:30b64687e01f 153 DCD FPU_IRQHandler ; FPU
<> 147:30b64687e01f 154 DCD 0 ; Reserved
<> 147:30b64687e01f 155 DCD 0 ; Reserved
<> 147:30b64687e01f 156 DCD SPI4_IRQHandler ; SPI4
<> 147:30b64687e01f 157
<> 147:30b64687e01f 158 __Vectors_End
<> 147:30b64687e01f 159
<> 147:30b64687e01f 160 __Vectors_Size EQU __Vectors_End - __Vectors
<> 147:30b64687e01f 161
<> 147:30b64687e01f 162 AREA |.text|, CODE, READONLY
<> 147:30b64687e01f 163
<> 147:30b64687e01f 164 ; Reset handler
<> 147:30b64687e01f 165 Reset_Handler PROC
<> 147:30b64687e01f 166 EXPORT Reset_Handler [WEAK]
<> 147:30b64687e01f 167 IMPORT SystemInit
<> 147:30b64687e01f 168 IMPORT __main
<> 147:30b64687e01f 169
<> 147:30b64687e01f 170 LDR R0, =SystemInit
<> 147:30b64687e01f 171 BLX R0
<> 147:30b64687e01f 172 LDR R0, =__main
<> 147:30b64687e01f 173 BX R0
<> 147:30b64687e01f 174 ENDP
<> 147:30b64687e01f 175
<> 147:30b64687e01f 176 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 147:30b64687e01f 177
<> 147:30b64687e01f 178 NMI_Handler PROC
<> 147:30b64687e01f 179 EXPORT NMI_Handler [WEAK]
<> 147:30b64687e01f 180 B .
<> 147:30b64687e01f 181 ENDP
<> 147:30b64687e01f 182 HardFault_Handler\
<> 147:30b64687e01f 183 PROC
<> 147:30b64687e01f 184 EXPORT HardFault_Handler [WEAK]
<> 147:30b64687e01f 185 B .
<> 147:30b64687e01f 186 ENDP
<> 147:30b64687e01f 187 MemManage_Handler\
<> 147:30b64687e01f 188 PROC
<> 147:30b64687e01f 189 EXPORT MemManage_Handler [WEAK]
<> 147:30b64687e01f 190 B .
<> 147:30b64687e01f 191 ENDP
<> 147:30b64687e01f 192 BusFault_Handler\
<> 147:30b64687e01f 193 PROC
<> 147:30b64687e01f 194 EXPORT BusFault_Handler [WEAK]
<> 147:30b64687e01f 195 B .
<> 147:30b64687e01f 196 ENDP
<> 147:30b64687e01f 197 UsageFault_Handler\
<> 147:30b64687e01f 198 PROC
<> 147:30b64687e01f 199 EXPORT UsageFault_Handler [WEAK]
<> 147:30b64687e01f 200 B .
<> 147:30b64687e01f 201 ENDP
<> 147:30b64687e01f 202 SVC_Handler PROC
<> 147:30b64687e01f 203 EXPORT SVC_Handler [WEAK]
<> 147:30b64687e01f 204 B .
<> 147:30b64687e01f 205 ENDP
<> 147:30b64687e01f 206 DebugMon_Handler\
<> 147:30b64687e01f 207 PROC
<> 147:30b64687e01f 208 EXPORT DebugMon_Handler [WEAK]
<> 147:30b64687e01f 209 B .
<> 147:30b64687e01f 210 ENDP
<> 147:30b64687e01f 211 PendSV_Handler PROC
<> 147:30b64687e01f 212 EXPORT PendSV_Handler [WEAK]
<> 147:30b64687e01f 213 B .
<> 147:30b64687e01f 214 ENDP
<> 147:30b64687e01f 215 SysTick_Handler PROC
<> 147:30b64687e01f 216 EXPORT SysTick_Handler [WEAK]
<> 147:30b64687e01f 217 B .
<> 147:30b64687e01f 218 ENDP
<> 147:30b64687e01f 219
<> 147:30b64687e01f 220 Default_Handler PROC
<> 147:30b64687e01f 221
<> 147:30b64687e01f 222 EXPORT WWDG_IRQHandler [WEAK]
<> 147:30b64687e01f 223 EXPORT PVD_IRQHandler [WEAK]
<> 147:30b64687e01f 224 EXPORT TAMP_STAMP_IRQHandler [WEAK]
<> 147:30b64687e01f 225 EXPORT RTC_WKUP_IRQHandler [WEAK]
<> 147:30b64687e01f 226 EXPORT FLASH_IRQHandler [WEAK]
<> 147:30b64687e01f 227 EXPORT RCC_IRQHandler [WEAK]
<> 147:30b64687e01f 228 EXPORT EXTI0_IRQHandler [WEAK]
<> 147:30b64687e01f 229 EXPORT EXTI1_IRQHandler [WEAK]
<> 147:30b64687e01f 230 EXPORT EXTI2_TSC_IRQHandler [WEAK]
<> 147:30b64687e01f 231 EXPORT EXTI3_IRQHandler [WEAK]
<> 147:30b64687e01f 232 EXPORT EXTI4_IRQHandler [WEAK]
<> 147:30b64687e01f 233 EXPORT DMA1_Channel1_IRQHandler [WEAK]
<> 147:30b64687e01f 234 EXPORT DMA1_Channel2_IRQHandler [WEAK]
<> 147:30b64687e01f 235 EXPORT DMA1_Channel3_IRQHandler [WEAK]
<> 147:30b64687e01f 236 EXPORT DMA1_Channel4_IRQHandler [WEAK]
<> 147:30b64687e01f 237 EXPORT DMA1_Channel5_IRQHandler [WEAK]
<> 147:30b64687e01f 238 EXPORT DMA1_Channel6_IRQHandler [WEAK]
<> 147:30b64687e01f 239 EXPORT DMA1_Channel7_IRQHandler [WEAK]
<> 147:30b64687e01f 240 EXPORT ADC1_2_IRQHandler [WEAK]
<> 147:30b64687e01f 241 EXPORT USB_HP_CAN_TX_IRQHandler [WEAK]
<> 147:30b64687e01f 242 EXPORT USB_LP_CAN_RX0_IRQHandler [WEAK]
<> 147:30b64687e01f 243 EXPORT CAN_RX1_IRQHandler [WEAK]
<> 147:30b64687e01f 244 EXPORT CAN_SCE_IRQHandler [WEAK]
<> 147:30b64687e01f 245 EXPORT EXTI9_5_IRQHandler [WEAK]
<> 147:30b64687e01f 246 EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
<> 147:30b64687e01f 247 EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
<> 147:30b64687e01f 248 EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
<> 147:30b64687e01f 249 EXPORT TIM1_CC_IRQHandler [WEAK]
<> 147:30b64687e01f 250 EXPORT TIM2_IRQHandler [WEAK]
<> 147:30b64687e01f 251 EXPORT TIM3_IRQHandler [WEAK]
<> 147:30b64687e01f 252 EXPORT TIM4_IRQHandler [WEAK]
<> 147:30b64687e01f 253 EXPORT I2C1_EV_IRQHandler [WEAK]
<> 147:30b64687e01f 254 EXPORT I2C1_ER_IRQHandler [WEAK]
<> 147:30b64687e01f 255 EXPORT I2C2_EV_IRQHandler [WEAK]
<> 147:30b64687e01f 256 EXPORT I2C2_ER_IRQHandler [WEAK]
<> 147:30b64687e01f 257 EXPORT SPI1_IRQHandler [WEAK]
<> 147:30b64687e01f 258 EXPORT SPI2_IRQHandler [WEAK]
<> 147:30b64687e01f 259 EXPORT USART1_IRQHandler [WEAK]
<> 147:30b64687e01f 260 EXPORT USART2_IRQHandler [WEAK]
<> 147:30b64687e01f 261 EXPORT USART3_IRQHandler [WEAK]
<> 147:30b64687e01f 262 EXPORT EXTI15_10_IRQHandler [WEAK]
<> 147:30b64687e01f 263 EXPORT RTC_Alarm_IRQHandler [WEAK]
<> 147:30b64687e01f 264 EXPORT USBWakeUp_IRQHandler [WEAK]
<> 147:30b64687e01f 265 EXPORT TIM8_BRK_IRQHandler [WEAK]
<> 147:30b64687e01f 266 EXPORT TIM8_UP_IRQHandler [WEAK]
<> 147:30b64687e01f 267 EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
<> 147:30b64687e01f 268 EXPORT TIM8_CC_IRQHandler [WEAK]
<> 147:30b64687e01f 269 EXPORT ADC3_IRQHandler [WEAK]
<> 147:30b64687e01f 270 EXPORT FMC_IRQHandler [WEAK]
<> 147:30b64687e01f 271 EXPORT SPI3_IRQHandler [WEAK]
<> 147:30b64687e01f 272 EXPORT UART4_IRQHandler [WEAK]
<> 147:30b64687e01f 273 EXPORT UART5_IRQHandler [WEAK]
<> 147:30b64687e01f 274 EXPORT TIM6_DAC_IRQHandler [WEAK]
<> 147:30b64687e01f 275 EXPORT TIM7_IRQHandler [WEAK]
<> 147:30b64687e01f 276 EXPORT DMA2_Channel1_IRQHandler [WEAK]
<> 147:30b64687e01f 277 EXPORT DMA2_Channel2_IRQHandler [WEAK]
<> 147:30b64687e01f 278 EXPORT DMA2_Channel3_IRQHandler [WEAK]
<> 147:30b64687e01f 279 EXPORT DMA2_Channel4_IRQHandler [WEAK]
<> 147:30b64687e01f 280 EXPORT DMA2_Channel5_IRQHandler [WEAK]
<> 147:30b64687e01f 281 EXPORT ADC4_IRQHandler [WEAK]
<> 147:30b64687e01f 282 EXPORT COMP1_2_3_IRQHandler [WEAK]
<> 147:30b64687e01f 283 EXPORT COMP4_5_6_IRQHandler [WEAK]
<> 147:30b64687e01f 284 EXPORT COMP7_IRQHandler [WEAK]
<> 147:30b64687e01f 285 EXPORT I2C3_EV_IRQHandler [WEAK]
<> 147:30b64687e01f 286 EXPORT I2C3_ER_IRQHandler [WEAK]
<> 147:30b64687e01f 287 EXPORT USB_HP_IRQHandler [WEAK]
<> 147:30b64687e01f 288 EXPORT USB_LP_IRQHandler [WEAK]
<> 147:30b64687e01f 289 EXPORT USBWakeUp_RMP_IRQHandler [WEAK]
<> 147:30b64687e01f 290 EXPORT TIM20_BRK_IRQHandler [WEAK]
<> 147:30b64687e01f 291 EXPORT TIM20_UP_IRQHandler [WEAK]
<> 147:30b64687e01f 292 EXPORT TIM20_TRG_COM_IRQHandler [WEAK]
<> 147:30b64687e01f 293 EXPORT TIM20_CC_IRQHandler [WEAK]
<> 147:30b64687e01f 294 EXPORT FPU_IRQHandler [WEAK]
<> 147:30b64687e01f 295 EXPORT SPI4_IRQHandler [WEAK]
<> 147:30b64687e01f 296
<> 147:30b64687e01f 297 WWDG_IRQHandler
<> 147:30b64687e01f 298 PVD_IRQHandler
<> 147:30b64687e01f 299 TAMP_STAMP_IRQHandler
<> 147:30b64687e01f 300 RTC_WKUP_IRQHandler
<> 147:30b64687e01f 301 FLASH_IRQHandler
<> 147:30b64687e01f 302 RCC_IRQHandler
<> 147:30b64687e01f 303 EXTI0_IRQHandler
<> 147:30b64687e01f 304 EXTI1_IRQHandler
<> 147:30b64687e01f 305 EXTI2_TSC_IRQHandler
<> 147:30b64687e01f 306 EXTI3_IRQHandler
<> 147:30b64687e01f 307 EXTI4_IRQHandler
<> 147:30b64687e01f 308 DMA1_Channel1_IRQHandler
<> 147:30b64687e01f 309 DMA1_Channel2_IRQHandler
<> 147:30b64687e01f 310 DMA1_Channel3_IRQHandler
<> 147:30b64687e01f 311 DMA1_Channel4_IRQHandler
<> 147:30b64687e01f 312 DMA1_Channel5_IRQHandler
<> 147:30b64687e01f 313 DMA1_Channel6_IRQHandler
<> 147:30b64687e01f 314 DMA1_Channel7_IRQHandler
<> 147:30b64687e01f 315 ADC1_2_IRQHandler
<> 147:30b64687e01f 316 USB_HP_CAN_TX_IRQHandler
<> 147:30b64687e01f 317 USB_LP_CAN_RX0_IRQHandler
<> 147:30b64687e01f 318 CAN_RX1_IRQHandler
<> 147:30b64687e01f 319 CAN_SCE_IRQHandler
<> 147:30b64687e01f 320 EXTI9_5_IRQHandler
<> 147:30b64687e01f 321 TIM1_BRK_TIM15_IRQHandler
<> 147:30b64687e01f 322 TIM1_UP_TIM16_IRQHandler
<> 147:30b64687e01f 323 TIM1_TRG_COM_TIM17_IRQHandler
<> 147:30b64687e01f 324 TIM1_CC_IRQHandler
<> 147:30b64687e01f 325 TIM2_IRQHandler
<> 147:30b64687e01f 326 TIM3_IRQHandler
<> 147:30b64687e01f 327 TIM4_IRQHandler
<> 147:30b64687e01f 328 I2C1_EV_IRQHandler
<> 147:30b64687e01f 329 I2C1_ER_IRQHandler
<> 147:30b64687e01f 330 I2C2_EV_IRQHandler
<> 147:30b64687e01f 331 I2C2_ER_IRQHandler
<> 147:30b64687e01f 332 SPI1_IRQHandler
<> 147:30b64687e01f 333 SPI2_IRQHandler
<> 147:30b64687e01f 334 USART1_IRQHandler
<> 147:30b64687e01f 335 USART2_IRQHandler
<> 147:30b64687e01f 336 USART3_IRQHandler
<> 147:30b64687e01f 337 EXTI15_10_IRQHandler
<> 147:30b64687e01f 338 RTC_Alarm_IRQHandler
<> 147:30b64687e01f 339 USBWakeUp_IRQHandler
<> 147:30b64687e01f 340 TIM8_BRK_IRQHandler
<> 147:30b64687e01f 341 TIM8_UP_IRQHandler
<> 147:30b64687e01f 342 TIM8_TRG_COM_IRQHandler
<> 147:30b64687e01f 343 TIM8_CC_IRQHandler
<> 147:30b64687e01f 344 ADC3_IRQHandler
<> 147:30b64687e01f 345 FMC_IRQHandler
<> 147:30b64687e01f 346 SPI3_IRQHandler
<> 147:30b64687e01f 347 UART4_IRQHandler
<> 147:30b64687e01f 348 UART5_IRQHandler
<> 147:30b64687e01f 349 TIM6_DAC_IRQHandler
<> 147:30b64687e01f 350 TIM7_IRQHandler
<> 147:30b64687e01f 351 DMA2_Channel1_IRQHandler
<> 147:30b64687e01f 352 DMA2_Channel2_IRQHandler
<> 147:30b64687e01f 353 DMA2_Channel3_IRQHandler
<> 147:30b64687e01f 354 DMA2_Channel4_IRQHandler
<> 147:30b64687e01f 355 DMA2_Channel5_IRQHandler
<> 147:30b64687e01f 356 ADC4_IRQHandler
<> 147:30b64687e01f 357 COMP1_2_3_IRQHandler
<> 147:30b64687e01f 358 COMP4_5_6_IRQHandler
<> 147:30b64687e01f 359 COMP7_IRQHandler
<> 147:30b64687e01f 360 I2C3_EV_IRQHandler
<> 147:30b64687e01f 361 I2C3_ER_IRQHandler
<> 147:30b64687e01f 362 USB_HP_IRQHandler
<> 147:30b64687e01f 363 USB_LP_IRQHandler
<> 147:30b64687e01f 364 USBWakeUp_RMP_IRQHandler
<> 147:30b64687e01f 365 TIM20_BRK_IRQHandler
<> 147:30b64687e01f 366 TIM20_UP_IRQHandler
<> 147:30b64687e01f 367 TIM20_TRG_COM_IRQHandler
<> 147:30b64687e01f 368 TIM20_CC_IRQHandler
<> 147:30b64687e01f 369 FPU_IRQHandler
<> 147:30b64687e01f 370 SPI4_IRQHandler
<> 147:30b64687e01f 371
<> 147:30b64687e01f 372 B .
<> 147:30b64687e01f 373
<> 147:30b64687e01f 374 ENDP
<> 147:30b64687e01f 375
<> 147:30b64687e01f 376 ALIGN
<> 147:30b64687e01f 377
<> 147:30b64687e01f 378 END
<> 147:30b64687e01f 379
<> 147:30b64687e01f 380 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****