mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_Freescale/TARGET_KL43Z/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct@148:21d94c44109e, 2016-09-30 (annotated)

Committer:
<>
Date:
Fri Sep 30 18:07:01 2016 +0100
Revision:
148:21d94c44109e
Parent:
144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v127

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 #! armcc -E
<> 144:ef7eb2e8f9f7 2 /*
<> 144:ef7eb2e8f9f7 3 ** ###################################################################
<> 144:ef7eb2e8f9f7 4 ** Processors: MKL43Z256VLH4
<> 144:ef7eb2e8f9f7 5 ** MKL43Z256VMP4
<> 144:ef7eb2e8f9f7 6 **
<> 144:ef7eb2e8f9f7 7 ** Compiler: Keil ARM C/C++ Compiler
<> 144:ef7eb2e8f9f7 8 ** Reference manual: KL43P64M48SF6RM, Rev.3, Aug 2014
<> 144:ef7eb2e8f9f7 9 ** Version: rev. 1.6, 2015-07-29
<> 144:ef7eb2e8f9f7 10 ** Build: b160406
<> 144:ef7eb2e8f9f7 11 **
<> 144:ef7eb2e8f9f7 12 ** Abstract:
<> 144:ef7eb2e8f9f7 13 ** Linker file for the Keil ARM C/C++ Compiler
<> 144:ef7eb2e8f9f7 14 **
<> 144:ef7eb2e8f9f7 15 ** Copyright (c) 2016 Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 16 ** All rights reserved.
<> 144:ef7eb2e8f9f7 17 **
<> 144:ef7eb2e8f9f7 18 ** Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 19 ** are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 20 **
<> 144:ef7eb2e8f9f7 21 ** o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 22 ** of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 23 **
<> 144:ef7eb2e8f9f7 24 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 25 ** list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 26 ** other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 27 **
<> 144:ef7eb2e8f9f7 28 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 29 ** contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 30 ** software without specific prior written permission.
<> 144:ef7eb2e8f9f7 31 **
<> 144:ef7eb2e8f9f7 32 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 33 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 34 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 35 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 36 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 37 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 38 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 39 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 41 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 42 **
<> 144:ef7eb2e8f9f7 43 ** http: www.freescale.com
<> 144:ef7eb2e8f9f7 44 ** mail: support@freescale.com
<> 144:ef7eb2e8f9f7 45 **
<> 144:ef7eb2e8f9f7 46 ** ###################################################################
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48 #define __ram_vector_table__ 1
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /* Heap 1/4 of ram and stack 1/8 */
<> 144:ef7eb2e8f9f7 51 #define __stack_size__ 0x1000
<> 144:ef7eb2e8f9f7 52 #define __heap_size__ 0x2800
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 #if (defined(__ram_vector_table__))
<> 144:ef7eb2e8f9f7 55 #define __ram_vector_table_size__ 0x00000200
<> 144:ef7eb2e8f9f7 56 #else
<> 144:ef7eb2e8f9f7 57 #define __ram_vector_table_size__ 0x00000000
<> 144:ef7eb2e8f9f7 58 #endif
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 #define m_interrupts_start 0x00000000
<> 144:ef7eb2e8f9f7 61 #define m_interrupts_size 0x00000200
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 #define m_flash_config_start 0x00000400
<> 144:ef7eb2e8f9f7 64 #define m_flash_config_size 0x00000010
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #define m_text_start 0x00000410
<> 144:ef7eb2e8f9f7 67 #define m_text_size 0x0003FBF0
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 #define m_interrupts_ram_start 0x1FFFE000
<> 144:ef7eb2e8f9f7 70 #define m_interrupts_ram_size __ram_vector_table_size__
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
<> 144:ef7eb2e8f9f7 73 #define m_data_size (0x00008000 - m_interrupts_ram_size)
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /* Sizes */
<> 144:ef7eb2e8f9f7 76 #if (defined(__stack_size__))
<> 144:ef7eb2e8f9f7 77 #define Stack_Size __stack_size__
<> 144:ef7eb2e8f9f7 78 #else
<> 144:ef7eb2e8f9f7 79 #define Stack_Size 0x0400
<> 144:ef7eb2e8f9f7 80 #endif
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 #if (defined(__heap_size__))
<> 144:ef7eb2e8f9f7 83 #define Heap_Size __heap_size__
<> 144:ef7eb2e8f9f7 84 #else
<> 144:ef7eb2e8f9f7 85 #define Heap_Size 0x0400
<> 144:ef7eb2e8f9f7 86 #endif
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
<> 144:ef7eb2e8f9f7 89 VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
<> 144:ef7eb2e8f9f7 90 * (RESET,+FIRST)
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92 ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
<> 144:ef7eb2e8f9f7 93 * (FlashConfig)
<> 144:ef7eb2e8f9f7 94 }
<> 144:ef7eb2e8f9f7 95 ER_m_text m_text_start m_text_size { ; load address = execution address
<> 144:ef7eb2e8f9f7 96 * (InRoot$$Sections)
<> 144:ef7eb2e8f9f7 97 .ANY (+RO)
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 #if (defined(__ram_vector_table__))
<> 144:ef7eb2e8f9f7 101 VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
<> 144:ef7eb2e8f9f7 102 }
<> 144:ef7eb2e8f9f7 103 #else
<> 144:ef7eb2e8f9f7 104 VECTOR_RAM m_interrupts_start EMPTY 0 {
<> 144:ef7eb2e8f9f7 105 }
<> 144:ef7eb2e8f9f7 106 #endif
<> 144:ef7eb2e8f9f7 107 RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
<> 144:ef7eb2e8f9f7 108 .ANY (+RW +ZI)
<> 144:ef7eb2e8f9f7 109 }
<> 148:21d94c44109e 110 RW_IRAM1 +0 { ; Heap region growing up
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113