mbed official / USBHost

USBHost library. NOTE: This library is only officially supported on the LPC1768 platform. For more information, please see the handbook page.

Dependencies:   FATFileSystem mbed-rtos

Dependents:   BTstack WallbotWii SD to Flash Data Transfer USBHost-MSD_HelloWorld ... more

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This is an mbed 2 library. To learn more about mbed OS 5, visit the docs.

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targets/TARGET_NUVOTON/TARGET_M451/USBHALHost_M451.cpp@39:d96aa62afc5b, 2017-07-27 (annotated)

Committer:
Kojto
Date:
Thu Jul 27 12:24:30 2017 +0100
Revision:
39:d96aa62afc5b
Update USBHost - add targets directory



This corresponds to mbed-os/master commit 9207365

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 39:d96aa62afc5b 1 /* mbed Microcontroller Library
Kojto 39:d96aa62afc5b 2 * Copyright (c) 2015-2016 Nuvoton
Kojto 39:d96aa62afc5b 3 *
Kojto 39:d96aa62afc5b 4 * Licensed under the Apache License, Version 2.0 (the "License");
Kojto 39:d96aa62afc5b 5 * you may not use this file except in compliance with the License.
Kojto 39:d96aa62afc5b 6 * You may obtain a copy of the License at
Kojto 39:d96aa62afc5b 7 *
Kojto 39:d96aa62afc5b 8 * http://www.apache.org/licenses/LICENSE-2.0
Kojto 39:d96aa62afc5b 9 *
Kojto 39:d96aa62afc5b 10 * Unless required by applicable law or agreed to in writing, software
Kojto 39:d96aa62afc5b 11 * distributed under the License is distributed on an "AS IS" BASIS,
Kojto 39:d96aa62afc5b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Kojto 39:d96aa62afc5b 13 * See the License for the specific language governing permissions and
Kojto 39:d96aa62afc5b 14 * limitations under the License.
Kojto 39:d96aa62afc5b 15 */
Kojto 39:d96aa62afc5b 16
Kojto 39:d96aa62afc5b 17 #if defined(TARGET_M451)
Kojto 39:d96aa62afc5b 18
Kojto 39:d96aa62afc5b 19 #include "mbed.h"
Kojto 39:d96aa62afc5b 20 #include "USBHALHost.h"
Kojto 39:d96aa62afc5b 21 #include "dbg.h"
Kojto 39:d96aa62afc5b 22 #include "pinmap.h"
Kojto 39:d96aa62afc5b 23
Kojto 39:d96aa62afc5b 24 #define HCCA_SIZE sizeof(HCCA)
Kojto 39:d96aa62afc5b 25 #define ED_SIZE sizeof(HCED)
Kojto 39:d96aa62afc5b 26 #define TD_SIZE sizeof(HCTD)
Kojto 39:d96aa62afc5b 27
Kojto 39:d96aa62afc5b 28 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
Kojto 39:d96aa62afc5b 29
Kojto 39:d96aa62afc5b 30 #ifndef USBH_HcRhDescriptorA_POTPGT_Pos
Kojto 39:d96aa62afc5b 31 #define USBH_HcRhDescriptorA_POTPGT_Pos (24)
Kojto 39:d96aa62afc5b 32 #endif
Kojto 39:d96aa62afc5b 33 #ifndef USBH_HcRhDescriptorA_POTPGT_Msk
Kojto 39:d96aa62afc5b 34 #define USBH_HcRhDescriptorA_POTPGT_Msk (0xfful << USBH_HcRhDescriptorA_POTPGT_Pos)
Kojto 39:d96aa62afc5b 35 #endif
Kojto 39:d96aa62afc5b 36
Kojto 39:d96aa62afc5b 37 static volatile MBED_ALIGN(256) uint8_t usb_buf[TOTAL_SIZE]; // 256 bytes aligned!
Kojto 39:d96aa62afc5b 38
Kojto 39:d96aa62afc5b 39 USBHALHost * USBHALHost::instHost;
Kojto 39:d96aa62afc5b 40
Kojto 39:d96aa62afc5b 41 USBHALHost::USBHALHost()
Kojto 39:d96aa62afc5b 42 {
Kojto 39:d96aa62afc5b 43 instHost = this;
Kojto 39:d96aa62afc5b 44 memInit();
Kojto 39:d96aa62afc5b 45 memset((void*)usb_hcca, 0, HCCA_SIZE);
Kojto 39:d96aa62afc5b 46 for (int i = 0; i < MAX_ENDPOINT; i++) {
Kojto 39:d96aa62afc5b 47 edBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 48 }
Kojto 39:d96aa62afc5b 49 for (int i = 0; i < MAX_TD; i++) {
Kojto 39:d96aa62afc5b 50 tdBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 51 }
Kojto 39:d96aa62afc5b 52 }
Kojto 39:d96aa62afc5b 53
Kojto 39:d96aa62afc5b 54 void USBHALHost::init()
Kojto 39:d96aa62afc5b 55 {
Kojto 39:d96aa62afc5b 56 // Unlock protected registers
Kojto 39:d96aa62afc5b 57 SYS_UnlockReg();
Kojto 39:d96aa62afc5b 58
Kojto 39:d96aa62afc5b 59 // Enable USBH clock
Kojto 39:d96aa62afc5b 60 CLK_EnableModuleClock(USBH_MODULE);
Kojto 39:d96aa62afc5b 61 // Set USBH clock source/divider
Kojto 39:d96aa62afc5b 62 CLK_SetModuleClock(USBH_MODULE, 0, CLK_CLKDIV0_USB(3));
Kojto 39:d96aa62afc5b 63
Kojto 39:d96aa62afc5b 64 // Configure OTG function as Host-Only
Kojto 39:d96aa62afc5b 65 SYS->USBPHY = SYS_USBPHY_LDO33EN_Msk | SYS_USBPHY_USBROLE_STD_USBH;
Kojto 39:d96aa62afc5b 66
Kojto 39:d96aa62afc5b 67 /* Below settings is use power switch IC to enable/disable USB Host power.
Kojto 39:d96aa62afc5b 68 Set PA.2 is VBUS_EN function pin and PA.3 VBUS_ST function pin */
Kojto 39:d96aa62afc5b 69 pin_function(PA_3, SYS_GPA_MFPL_PA3MFP_USB_VBUS_ST);
Kojto 39:d96aa62afc5b 70 pin_function(PA_2, SYS_GPA_MFPL_PA2MFP_USB_VBUS_EN);
Kojto 39:d96aa62afc5b 71
Kojto 39:d96aa62afc5b 72 // Enable OTG clock
Kojto 39:d96aa62afc5b 73 CLK_EnableModuleClock(OTG_MODULE);
Kojto 39:d96aa62afc5b 74
Kojto 39:d96aa62afc5b 75 // Lock protected registers
Kojto 39:d96aa62afc5b 76 SYS_LockReg();
Kojto 39:d96aa62afc5b 77
Kojto 39:d96aa62afc5b 78 // Overcurrent flag is low active
Kojto 39:d96aa62afc5b 79 USBH->HcMiscControl |= USBH_HcMiscControl_OCAL_Msk;
Kojto 39:d96aa62afc5b 80
Kojto 39:d96aa62afc5b 81 // Disable HC interrupts
Kojto 39:d96aa62afc5b 82 USBH->HcInterruptDisable = OR_INTR_ENABLE_MIE;
Kojto 39:d96aa62afc5b 83
Kojto 39:d96aa62afc5b 84 // Needed by some controllers
Kojto 39:d96aa62afc5b 85 USBH->HcControl = 0;
Kojto 39:d96aa62afc5b 86
Kojto 39:d96aa62afc5b 87 // Software reset
Kojto 39:d96aa62afc5b 88 USBH->HcCommandStatus = OR_CMD_STATUS_HCR;
Kojto 39:d96aa62afc5b 89 while (USBH->HcCommandStatus & OR_CMD_STATUS_HCR);
Kojto 39:d96aa62afc5b 90
Kojto 39:d96aa62afc5b 91 // Put HC in reset state
Kojto 39:d96aa62afc5b 92 USBH->HcControl = (USBH->HcControl & ~OR_CONTROL_HCFS) | OR_CONTROL_HC_RSET;
Kojto 39:d96aa62afc5b 93 // HCD must wait 10ms for HC reset complete
Kojto 39:d96aa62afc5b 94 wait_ms(100);
Kojto 39:d96aa62afc5b 95
Kojto 39:d96aa62afc5b 96 USBH->HcControlHeadED = 0; // Initialize Control ED list head to 0
Kojto 39:d96aa62afc5b 97 USBH->HcBulkHeadED = 0; // Initialize Bulk ED list head to 0
Kojto 39:d96aa62afc5b 98 USBH->HcHCCA = (uint32_t) usb_hcca;
Kojto 39:d96aa62afc5b 99
Kojto 39:d96aa62afc5b 100 USBH->HcFmInterval = DEFAULT_FMINTERVAL; // Frame interval = 12000 - 1
Kojto 39:d96aa62afc5b 101 // MPS = 10,104
Kojto 39:d96aa62afc5b 102 USBH->HcPeriodicStart = FI * 90 / 100; // 90% of frame interval
Kojto 39:d96aa62afc5b 103 USBH->HcLSThreshold = 0x628; // Low speed threshold
Kojto 39:d96aa62afc5b 104
Kojto 39:d96aa62afc5b 105 // Put HC in operational state
Kojto 39:d96aa62afc5b 106 USBH->HcControl = (USBH->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
Kojto 39:d96aa62afc5b 107
Kojto 39:d96aa62afc5b 108 // FIXME
Kojto 39:d96aa62afc5b 109 USBH->HcRhDescriptorA = USBH->HcRhDescriptorA & ~(USBH_HcRhDescriptorA_NOCP_Msk | USBH_HcRhDescriptorA_OCPM_Msk | USBH_HcRhDescriptorA_PSM_Msk);
Kojto 39:d96aa62afc5b 110 // Issue SetGlobalPower command
Kojto 39:d96aa62afc5b 111 USBH->HcRhStatus = USBH_HcRhStatus_LPSC_Msk;
Kojto 39:d96aa62afc5b 112 // Power On To Power Good Time, in 2 ms units
Kojto 39:d96aa62afc5b 113 wait_ms(((USBH->HcRhDescriptorA & USBH_HcRhDescriptorA_POTPGT_Msk) >> USBH_HcRhDescriptorA_POTPGT_Pos) * 2);
Kojto 39:d96aa62afc5b 114
Kojto 39:d96aa62afc5b 115 // Clear Interrrupt Status
Kojto 39:d96aa62afc5b 116 USBH->HcInterruptStatus |= USBH->HcInterruptStatus;
Kojto 39:d96aa62afc5b 117 // Enable interrupts we care about
Kojto 39:d96aa62afc5b 118 USBH->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
Kojto 39:d96aa62afc5b 119
Kojto 39:d96aa62afc5b 120 NVIC_SetVector(USBH_IRQn, (uint32_t)(_usbisr));
Kojto 39:d96aa62afc5b 121 NVIC_EnableIRQ(USBH_IRQn);
Kojto 39:d96aa62afc5b 122
Kojto 39:d96aa62afc5b 123 // Check for any connected devices
Kojto 39:d96aa62afc5b 124 if (USBH->HcRhPortStatus[0] & OR_RH_PORT_CCS) {
Kojto 39:d96aa62afc5b 125 // Device connected
Kojto 39:d96aa62afc5b 126 wait_ms(150);
Kojto 39:d96aa62afc5b 127 deviceConnected(0, 1, USBH->HcRhPortStatus[0] & OR_RH_PORT_LSDA);
Kojto 39:d96aa62afc5b 128 }
Kojto 39:d96aa62afc5b 129 }
Kojto 39:d96aa62afc5b 130
Kojto 39:d96aa62afc5b 131 uint32_t USBHALHost::controlHeadED()
Kojto 39:d96aa62afc5b 132 {
Kojto 39:d96aa62afc5b 133 return USBH->HcControlHeadED;
Kojto 39:d96aa62afc5b 134 }
Kojto 39:d96aa62afc5b 135
Kojto 39:d96aa62afc5b 136 uint32_t USBHALHost::bulkHeadED()
Kojto 39:d96aa62afc5b 137 {
Kojto 39:d96aa62afc5b 138 return USBH->HcBulkHeadED;
Kojto 39:d96aa62afc5b 139 }
Kojto 39:d96aa62afc5b 140
Kojto 39:d96aa62afc5b 141 uint32_t USBHALHost::interruptHeadED()
Kojto 39:d96aa62afc5b 142 {
Kojto 39:d96aa62afc5b 143 // FIXME: Only support one INT ED?
Kojto 39:d96aa62afc5b 144 return usb_hcca->IntTable[0];
Kojto 39:d96aa62afc5b 145 }
Kojto 39:d96aa62afc5b 146
Kojto 39:d96aa62afc5b 147 void USBHALHost::updateBulkHeadED(uint32_t addr)
Kojto 39:d96aa62afc5b 148 {
Kojto 39:d96aa62afc5b 149 USBH->HcBulkHeadED = addr;
Kojto 39:d96aa62afc5b 150 }
Kojto 39:d96aa62afc5b 151
Kojto 39:d96aa62afc5b 152
Kojto 39:d96aa62afc5b 153 void USBHALHost::updateControlHeadED(uint32_t addr)
Kojto 39:d96aa62afc5b 154 {
Kojto 39:d96aa62afc5b 155 USBH->HcControlHeadED = addr;
Kojto 39:d96aa62afc5b 156 }
Kojto 39:d96aa62afc5b 157
Kojto 39:d96aa62afc5b 158 void USBHALHost::updateInterruptHeadED(uint32_t addr)
Kojto 39:d96aa62afc5b 159 {
Kojto 39:d96aa62afc5b 160 // FIXME: Only support one INT ED?
Kojto 39:d96aa62afc5b 161 usb_hcca->IntTable[0] = addr;
Kojto 39:d96aa62afc5b 162 }
Kojto 39:d96aa62afc5b 163
Kojto 39:d96aa62afc5b 164
Kojto 39:d96aa62afc5b 165 void USBHALHost::enableList(ENDPOINT_TYPE type)
Kojto 39:d96aa62afc5b 166 {
Kojto 39:d96aa62afc5b 167 switch(type) {
Kojto 39:d96aa62afc5b 168 case CONTROL_ENDPOINT:
Kojto 39:d96aa62afc5b 169 USBH->HcCommandStatus = OR_CMD_STATUS_CLF;
Kojto 39:d96aa62afc5b 170 USBH->HcControl |= OR_CONTROL_CLE;
Kojto 39:d96aa62afc5b 171 break;
Kojto 39:d96aa62afc5b 172 case ISOCHRONOUS_ENDPOINT:
Kojto 39:d96aa62afc5b 173 // FIXME
Kojto 39:d96aa62afc5b 174 break;
Kojto 39:d96aa62afc5b 175 case BULK_ENDPOINT:
Kojto 39:d96aa62afc5b 176 USBH->HcCommandStatus = OR_CMD_STATUS_BLF;
Kojto 39:d96aa62afc5b 177 USBH->HcControl |= OR_CONTROL_BLE;
Kojto 39:d96aa62afc5b 178 break;
Kojto 39:d96aa62afc5b 179 case INTERRUPT_ENDPOINT:
Kojto 39:d96aa62afc5b 180 USBH->HcControl |= OR_CONTROL_PLE;
Kojto 39:d96aa62afc5b 181 break;
Kojto 39:d96aa62afc5b 182 }
Kojto 39:d96aa62afc5b 183 }
Kojto 39:d96aa62afc5b 184
Kojto 39:d96aa62afc5b 185
Kojto 39:d96aa62afc5b 186 bool USBHALHost::disableList(ENDPOINT_TYPE type)
Kojto 39:d96aa62afc5b 187 {
Kojto 39:d96aa62afc5b 188 switch(type) {
Kojto 39:d96aa62afc5b 189 case CONTROL_ENDPOINT:
Kojto 39:d96aa62afc5b 190 if(USBH->HcControl & OR_CONTROL_CLE) {
Kojto 39:d96aa62afc5b 191 USBH->HcControl &= ~OR_CONTROL_CLE;
Kojto 39:d96aa62afc5b 192 return true;
Kojto 39:d96aa62afc5b 193 }
Kojto 39:d96aa62afc5b 194 return false;
Kojto 39:d96aa62afc5b 195 case ISOCHRONOUS_ENDPOINT:
Kojto 39:d96aa62afc5b 196 // FIXME
Kojto 39:d96aa62afc5b 197 return false;
Kojto 39:d96aa62afc5b 198 case BULK_ENDPOINT:
Kojto 39:d96aa62afc5b 199 if(USBH->HcControl & OR_CONTROL_BLE){
Kojto 39:d96aa62afc5b 200 USBH->HcControl &= ~OR_CONTROL_BLE;
Kojto 39:d96aa62afc5b 201 return true;
Kojto 39:d96aa62afc5b 202 }
Kojto 39:d96aa62afc5b 203 return false;
Kojto 39:d96aa62afc5b 204 case INTERRUPT_ENDPOINT:
Kojto 39:d96aa62afc5b 205 if(USBH->HcControl & OR_CONTROL_PLE) {
Kojto 39:d96aa62afc5b 206 USBH->HcControl &= ~OR_CONTROL_PLE;
Kojto 39:d96aa62afc5b 207 return true;
Kojto 39:d96aa62afc5b 208 }
Kojto 39:d96aa62afc5b 209 return false;
Kojto 39:d96aa62afc5b 210 }
Kojto 39:d96aa62afc5b 211 return false;
Kojto 39:d96aa62afc5b 212 }
Kojto 39:d96aa62afc5b 213
Kojto 39:d96aa62afc5b 214
Kojto 39:d96aa62afc5b 215 void USBHALHost::memInit()
Kojto 39:d96aa62afc5b 216 {
Kojto 39:d96aa62afc5b 217 usb_hcca = (volatile HCCA *)usb_buf;
Kojto 39:d96aa62afc5b 218 usb_edBuf = usb_buf + HCCA_SIZE;
Kojto 39:d96aa62afc5b 219 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
Kojto 39:d96aa62afc5b 220 }
Kojto 39:d96aa62afc5b 221
Kojto 39:d96aa62afc5b 222 volatile uint8_t * USBHALHost::getED()
Kojto 39:d96aa62afc5b 223 {
Kojto 39:d96aa62afc5b 224 for (int i = 0; i < MAX_ENDPOINT; i++) {
Kojto 39:d96aa62afc5b 225 if ( !edBufAlloc[i] ) {
Kojto 39:d96aa62afc5b 226 edBufAlloc[i] = true;
Kojto 39:d96aa62afc5b 227 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
Kojto 39:d96aa62afc5b 228 }
Kojto 39:d96aa62afc5b 229 }
Kojto 39:d96aa62afc5b 230 perror("Could not allocate ED\r\n");
Kojto 39:d96aa62afc5b 231 return NULL; //Could not alloc ED
Kojto 39:d96aa62afc5b 232 }
Kojto 39:d96aa62afc5b 233
Kojto 39:d96aa62afc5b 234 volatile uint8_t * USBHALHost::getTD()
Kojto 39:d96aa62afc5b 235 {
Kojto 39:d96aa62afc5b 236 int i;
Kojto 39:d96aa62afc5b 237 for (i = 0; i < MAX_TD; i++) {
Kojto 39:d96aa62afc5b 238 if ( !tdBufAlloc[i] ) {
Kojto 39:d96aa62afc5b 239 tdBufAlloc[i] = true;
Kojto 39:d96aa62afc5b 240 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
Kojto 39:d96aa62afc5b 241 }
Kojto 39:d96aa62afc5b 242 }
Kojto 39:d96aa62afc5b 243 perror("Could not allocate TD\r\n");
Kojto 39:d96aa62afc5b 244 return NULL; //Could not alloc TD
Kojto 39:d96aa62afc5b 245 }
Kojto 39:d96aa62afc5b 246
Kojto 39:d96aa62afc5b 247
Kojto 39:d96aa62afc5b 248 void USBHALHost::freeED(volatile uint8_t * ed)
Kojto 39:d96aa62afc5b 249 {
Kojto 39:d96aa62afc5b 250 int i;
Kojto 39:d96aa62afc5b 251 i = (ed - usb_edBuf) / ED_SIZE;
Kojto 39:d96aa62afc5b 252 edBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 253 }
Kojto 39:d96aa62afc5b 254
Kojto 39:d96aa62afc5b 255 void USBHALHost::freeTD(volatile uint8_t * td)
Kojto 39:d96aa62afc5b 256 {
Kojto 39:d96aa62afc5b 257 int i;
Kojto 39:d96aa62afc5b 258 i = (td - usb_tdBuf) / TD_SIZE;
Kojto 39:d96aa62afc5b 259 tdBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 260 }
Kojto 39:d96aa62afc5b 261
Kojto 39:d96aa62afc5b 262
Kojto 39:d96aa62afc5b 263 void USBHALHost::resetRootHub()
Kojto 39:d96aa62afc5b 264 {
Kojto 39:d96aa62afc5b 265 // Reset port1
Kojto 39:d96aa62afc5b 266 USBH->HcRhPortStatus[0] = OR_RH_PORT_PRS;
Kojto 39:d96aa62afc5b 267 while (USBH->HcRhPortStatus[0] & OR_RH_PORT_PRS);
Kojto 39:d96aa62afc5b 268 USBH->HcRhPortStatus[0] = OR_RH_PORT_PRSC;
Kojto 39:d96aa62afc5b 269 }
Kojto 39:d96aa62afc5b 270
Kojto 39:d96aa62afc5b 271
Kojto 39:d96aa62afc5b 272 void USBHALHost::_usbisr(void)
Kojto 39:d96aa62afc5b 273 {
Kojto 39:d96aa62afc5b 274 if (instHost) {
Kojto 39:d96aa62afc5b 275 instHost->UsbIrqhandler();
Kojto 39:d96aa62afc5b 276 }
Kojto 39:d96aa62afc5b 277 }
Kojto 39:d96aa62afc5b 278
Kojto 39:d96aa62afc5b 279 void USBHALHost::UsbIrqhandler()
Kojto 39:d96aa62afc5b 280 {
Kojto 39:d96aa62afc5b 281 uint32_t ints = USBH->HcInterruptStatus;
Kojto 39:d96aa62afc5b 282
Kojto 39:d96aa62afc5b 283 // Root hub status change interrupt
Kojto 39:d96aa62afc5b 284 if (ints & OR_INTR_STATUS_RHSC) {
Kojto 39:d96aa62afc5b 285 uint32_t ints_roothub = USBH->HcRhStatus;
Kojto 39:d96aa62afc5b 286 uint32_t ints_port1 = USBH->HcRhPortStatus[0];
Kojto 39:d96aa62afc5b 287 uint32_t ints_port2 = USBH->HcRhPortStatus[1];
Kojto 39:d96aa62afc5b 288
Kojto 39:d96aa62afc5b 289 // Port1: ConnectStatusChange
Kojto 39:d96aa62afc5b 290 if (ints_port1 & OR_RH_PORT_CSC) {
Kojto 39:d96aa62afc5b 291 if (ints_roothub & OR_RH_STATUS_DRWE) {
Kojto 39:d96aa62afc5b 292 // When DRWE is on, Connect Status Change means a remote wakeup event.
Kojto 39:d96aa62afc5b 293 } else {
Kojto 39:d96aa62afc5b 294 if (ints_port1 & OR_RH_PORT_CCS) {
Kojto 39:d96aa62afc5b 295 // Root device connected
Kojto 39:d96aa62afc5b 296
Kojto 39:d96aa62afc5b 297 // wait 150ms to avoid bounce
Kojto 39:d96aa62afc5b 298 wait_ms(150);
Kojto 39:d96aa62afc5b 299
Kojto 39:d96aa62afc5b 300 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
Kojto 39:d96aa62afc5b 301 deviceConnected(0, 1, ints_port1 & OR_RH_PORT_LSDA);
Kojto 39:d96aa62afc5b 302 } else {
Kojto 39:d96aa62afc5b 303 // Root device disconnected
Kojto 39:d96aa62afc5b 304
Kojto 39:d96aa62afc5b 305 if (!(ints & OR_INTR_STATUS_WDH)) {
Kojto 39:d96aa62afc5b 306 usb_hcca->DoneHead = 0;
Kojto 39:d96aa62afc5b 307 }
Kojto 39:d96aa62afc5b 308
Kojto 39:d96aa62afc5b 309 // wait 200ms to avoid bounce
Kojto 39:d96aa62afc5b 310 wait_ms(200);
Kojto 39:d96aa62afc5b 311
Kojto 39:d96aa62afc5b 312 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
Kojto 39:d96aa62afc5b 313
Kojto 39:d96aa62afc5b 314 if (ints & OR_INTR_STATUS_WDH) {
Kojto 39:d96aa62afc5b 315 usb_hcca->DoneHead = 0;
Kojto 39:d96aa62afc5b 316 USBH->HcInterruptStatus = OR_INTR_STATUS_WDH;
Kojto 39:d96aa62afc5b 317 }
Kojto 39:d96aa62afc5b 318 }
Kojto 39:d96aa62afc5b 319 }
Kojto 39:d96aa62afc5b 320 USBH->HcRhPortStatus[0] = OR_RH_PORT_CSC;
Kojto 39:d96aa62afc5b 321 }
Kojto 39:d96aa62afc5b 322 // Port1: Reset completed
Kojto 39:d96aa62afc5b 323 if (ints_port1 & OR_RH_PORT_PRSC) {
Kojto 39:d96aa62afc5b 324 USBH->HcRhPortStatus[0] = OR_RH_PORT_PRSC;
Kojto 39:d96aa62afc5b 325 }
Kojto 39:d96aa62afc5b 326 // Port1: PortEnableStatusChange
Kojto 39:d96aa62afc5b 327 if (ints_port1 & OR_RH_PORT_PESC) {
Kojto 39:d96aa62afc5b 328 USBH->HcRhPortStatus[0] = OR_RH_PORT_PESC;
Kojto 39:d96aa62afc5b 329 }
Kojto 39:d96aa62afc5b 330
Kojto 39:d96aa62afc5b 331 // Port2: PortOverCurrentIndicatorChange
Kojto 39:d96aa62afc5b 332 if (ints_port2 & OR_RH_PORT_OCIC) {
Kojto 39:d96aa62afc5b 333 USBH->HcRhPortStatus[1] = OR_RH_PORT_OCIC;
Kojto 39:d96aa62afc5b 334 }
Kojto 39:d96aa62afc5b 335
Kojto 39:d96aa62afc5b 336 USBH->HcInterruptStatus = OR_INTR_STATUS_RHSC;
Kojto 39:d96aa62afc5b 337 }
Kojto 39:d96aa62afc5b 338
Kojto 39:d96aa62afc5b 339 // Writeback Done Head interrupt
Kojto 39:d96aa62afc5b 340 if (ints & OR_INTR_STATUS_WDH) {
Kojto 39:d96aa62afc5b 341 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
Kojto 39:d96aa62afc5b 342 USBH->HcInterruptStatus = OR_INTR_STATUS_WDH;
Kojto 39:d96aa62afc5b 343 }
Kojto 39:d96aa62afc5b 344
Kojto 39:d96aa62afc5b 345
Kojto 39:d96aa62afc5b 346 }
Kojto 39:d96aa62afc5b 347 #endif