Luis Linares / MAX1120x

Simple driver for the 20-bit ADC MAX1120x from Maxim

MAX1120x.cpp@3:9bf082d65d25, 2012-10-23 (annotated)

Committer:
macgyveremir
Date:
Tue Oct 23 19:09:00 2012 +0000
Revision:
3:9bf082d65d25
Parent:
2:26afdc979a54 
Working implementation. Can easily be extended to include higher-level functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
macgyveremir 0:af630aa9a00d 1 #include "MAX1120x.h"
macgyveremir 0:af630aa9a00d 2
macgyveremir 0:af630aa9a00d 3 MAX1120x::MAX1120x (SPI *spi_itf, DigitalIn *miso, DigitalOut *cs_pin)
macgyveremir 0:af630aa9a00d 4 {
macgyveremir 0:af630aa9a00d 5 spi = spi_itf;
macgyveremir 0:af630aa9a00d 6 cs = cs_pin;
macgyveremir 0:af630aa9a00d 7 rdy_dout = miso;
macgyveremir 0:af630aa9a00d 8
macgyveremir 0:af630aa9a00d 9 *cs = 1; // Assert CS high
macgyveremir 0:af630aa9a00d 10 }
macgyveremir 0:af630aa9a00d 11
macgyveremir 0:af630aa9a00d 12 void MAX1120x::do_self_calibration ()
macgyveremir 0:af630aa9a00d 13 {
macgyveremir 2:26afdc979a54 14 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 15 wait_us (5);
macgyveremir 3:9bf082d65d25 16
macgyveremir 0:af630aa9a00d 17 *cs = 0;
macgyveremir 2:26afdc979a54 18 spi->write (mode_action(ACT_SELF_CAL));
macgyveremir 0:af630aa9a00d 19 *cs = 1;
macgyveremir 3:9bf082d65d25 20 wait_ms (202);
macgyveremir 2:26afdc979a54 21 }
macgyveremir 2:26afdc979a54 22
macgyveremir 2:26afdc979a54 23 void MAX1120x::calibrate_system_zero ()
macgyveremir 2:26afdc979a54 24 {
macgyveremir 2:26afdc979a54 25 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 26 wait_us (5);
macgyveremir 3:9bf082d65d25 27
macgyveremir 2:26afdc979a54 28 *cs = 0;
macgyveremir 2:26afdc979a54 29 spi->write (mode_action(ACT_SYS_OFF_CAL));
macgyveremir 2:26afdc979a54 30 *cs = 1;
macgyveremir 2:26afdc979a54 31 wait_ms(102);
macgyveremir 0:af630aa9a00d 32 }
macgyveremir 0:af630aa9a00d 33
macgyveremir 2:26afdc979a54 34 void MAX1120x::calibrate_system_gain ()
macgyveremir 0:af630aa9a00d 35 {
macgyveremir 2:26afdc979a54 36 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 37 wait_us (5);
macgyveremir 3:9bf082d65d25 38
macgyveremir 0:af630aa9a00d 39 *cs = 0;
macgyveremir 2:26afdc979a54 40 spi->write (mode_action(ACT_SYS_GAN_CAL));
macgyveremir 2:26afdc979a54 41 *cs = 1;
macgyveremir 2:26afdc979a54 42 wait_ms(102);
macgyveremir 2:26afdc979a54 43 }
macgyveremir 2:26afdc979a54 44
macgyveremir 2:26afdc979a54 45 char MAX1120x::get_status ()
macgyveremir 2:26afdc979a54 46 {
macgyveremir 2:26afdc979a54 47 char value;
macgyveremir 2:26afdc979a54 48
macgyveremir 2:26afdc979a54 49 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 50 wait_us (5);
macgyveremir 3:9bf082d65d25 51
macgyveremir 2:26afdc979a54 52 *cs = 0;
macgyveremir 2:26afdc979a54 53 spi->write (mode_register_read(REG_STAT1));
macgyveremir 2:26afdc979a54 54 value = (char) spi->write(0);
macgyveremir 2:26afdc979a54 55 *cs = 1;
macgyveremir 2:26afdc979a54 56
macgyveremir 2:26afdc979a54 57 return value;
macgyveremir 2:26afdc979a54 58 }
macgyveremir 2:26afdc979a54 59
macgyveremir 2:26afdc979a54 60 void MAX1120x::set_control_1 (char ctrl)
macgyveremir 2:26afdc979a54 61 {
macgyveremir 2:26afdc979a54 62 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 63 wait_us (5);
macgyveremir 3:9bf082d65d25 64
macgyveremir 2:26afdc979a54 65 *cs = 0;
macgyveremir 2:26afdc979a54 66 spi->write (mode_register_write(REG_CTRL1));
macgyveremir 2:26afdc979a54 67 spi->write (ctrl);
macgyveremir 0:af630aa9a00d 68 *cs = 1;
macgyveremir 0:af630aa9a00d 69 }
macgyveremir 0:af630aa9a00d 70
macgyveremir 0:af630aa9a00d 71 char MAX1120x::get_control_1 ()
macgyveremir 0:af630aa9a00d 72 {
macgyveremir 0:af630aa9a00d 73 char value;
macgyveremir 0:af630aa9a00d 74
macgyveremir 2:26afdc979a54 75 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 76 wait_us (5);
macgyveremir 3:9bf082d65d25 77
macgyveremir 0:af630aa9a00d 78 *cs = 0;
macgyveremir 2:26afdc979a54 79 spi->write (mode_register_read(REG_CTRL1));
macgyveremir 0:af630aa9a00d 80 value = (char) spi->write(0);
macgyveremir 0:af630aa9a00d 81 *cs = 1;
macgyveremir 0:af630aa9a00d 82
macgyveremir 0:af630aa9a00d 83 return value;
macgyveremir 0:af630aa9a00d 84 }
macgyveremir 0:af630aa9a00d 85
macgyveremir 2:26afdc979a54 86 void MAX1120x::set_control_2 (char ctrl)
macgyveremir 1:17195d284d76 87 {
macgyveremir 2:26afdc979a54 88 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 89 wait_us (5);
macgyveremir 3:9bf082d65d25 90
macgyveremir 1:17195d284d76 91 *cs = 0;
macgyveremir 2:26afdc979a54 92 spi->write (mode_register_write(REG_CTRL2));
macgyveremir 2:26afdc979a54 93 spi->write (ctrl);
macgyveremir 1:17195d284d76 94 *cs = 1;
macgyveremir 1:17195d284d76 95 }
macgyveremir 1:17195d284d76 96
macgyveremir 1:17195d284d76 97 char MAX1120x::get_control_2 ()
macgyveremir 1:17195d284d76 98 {
macgyveremir 1:17195d284d76 99 char value;
macgyveremir 1:17195d284d76 100
macgyveremir 2:26afdc979a54 101 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 102 wait_us (5);
macgyveremir 3:9bf082d65d25 103
macgyveremir 1:17195d284d76 104 *cs = 0;
macgyveremir 2:26afdc979a54 105 spi->write (mode_register_read(REG_CTRL2));
macgyveremir 2:26afdc979a54 106 value = (char) spi->write(0);
macgyveremir 2:26afdc979a54 107 *cs = 1;
macgyveremir 2:26afdc979a54 108
macgyveremir 2:26afdc979a54 109 return value;
macgyveremir 2:26afdc979a54 110 }
macgyveremir 2:26afdc979a54 111
macgyveremir 2:26afdc979a54 112 void MAX1120x::set_control_3 (char ctrl)
macgyveremir 2:26afdc979a54 113 {
macgyveremir 2:26afdc979a54 114 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 115 wait_us (5);
macgyveremir 3:9bf082d65d25 116
macgyveremir 2:26afdc979a54 117 *cs = 0;
macgyveremir 2:26afdc979a54 118 spi->write (mode_register_write(REG_CTRL3));
macgyveremir 2:26afdc979a54 119 spi->write (ctrl);
macgyveremir 2:26afdc979a54 120 *cs = 1;
macgyveremir 2:26afdc979a54 121 }
macgyveremir 2:26afdc979a54 122
macgyveremir 2:26afdc979a54 123 char MAX1120x::get_control_3 ()
macgyveremir 2:26afdc979a54 124 {
macgyveremir 2:26afdc979a54 125 char value;
macgyveremir 2:26afdc979a54 126
macgyveremir 2:26afdc979a54 127 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 128 wait_us (5);
macgyveremir 3:9bf082d65d25 129
macgyveremir 2:26afdc979a54 130 *cs = 0;
macgyveremir 2:26afdc979a54 131 spi->write (mode_register_read(REG_CTRL3));
macgyveremir 1:17195d284d76 132 value = (char) spi->write(0);
macgyveremir 1:17195d284d76 133 *cs = 1;
macgyveremir 1:17195d284d76 134
macgyveremir 1:17195d284d76 135 return value;
macgyveremir 1:17195d284d76 136 }
macgyveremir 1:17195d284d76 137
macgyveremir 0:af630aa9a00d 138 uint MAX1120x::get_single_sample ()
macgyveremir 0:af630aa9a00d 139 {
macgyveremir 2:26afdc979a54 140 UI32toC_t sample;
macgyveremir 2:26afdc979a54 141
macgyveremir 2:26afdc979a54 142 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 143 wait_us (5);
macgyveremir 3:9bf082d65d25 144
macgyveremir 2:26afdc979a54 145 *cs = 0;
macgyveremir 2:26afdc979a54 146 spi->write (mode_action(ACT_CONV_1SPS));
macgyveremir 2:26afdc979a54 147 *cs = 1;
macgyveremir 2:26afdc979a54 148
macgyveremir 2:26afdc979a54 149 wait_ms(1);
macgyveremir 0:af630aa9a00d 150
macgyveremir 0:af630aa9a00d 151 *cs = 0;
macgyveremir 2:26afdc979a54 152 while (*rdy_dout) {};
macgyveremir 2:26afdc979a54 153 spi->write (mode_register_read(REG_DATA));
macgyveremir 2:26afdc979a54 154 sample.bytes[2] = (char) spi->write(0);
macgyveremir 2:26afdc979a54 155 sample.bytes[1] = (char) spi->write(0);
macgyveremir 2:26afdc979a54 156 sample.bytes[0] = (char) spi->write(0);
macgyveremir 0:af630aa9a00d 157 *cs = 1;
macgyveremir 2:26afdc979a54 158 sample.bytes[3] = 0;
macgyveremir 2:26afdc979a54 159
macgyveremir 2:26afdc979a54 160 return sample.value;
macgyveremir 2:26afdc979a54 161 }
macgyveremir 0:af630aa9a00d 162
macgyveremir 2:26afdc979a54 163 uint MAX1120x::get_cal_register (char register_add)
macgyveremir 2:26afdc979a54 164 {
macgyveremir 2:26afdc979a54 165 UI32toC_t data;
macgyveremir 2:26afdc979a54 166
macgyveremir 2:26afdc979a54 167 spi->format (8, MAX1120x_SPI_MODE);
macgyveremir 3:9bf082d65d25 168 wait_us (5);
macgyveremir 3:9bf082d65d25 169
macgyveremir 2:26afdc979a54 170 *cs = 0;
macgyveremir 2:26afdc979a54 171 spi->write (mode_register_read(register_add));
macgyveremir 2:26afdc979a54 172 data.bytes[2] = (char) spi->write(0);
macgyveremir 2:26afdc979a54 173 data.bytes[1] = (char) spi->write(0);
macgyveremir 2:26afdc979a54 174 data.bytes[0] = (char) spi->write(0);
macgyveremir 2:26afdc979a54 175 *cs = 1;
macgyveremir 2:26afdc979a54 176 data.bytes[3] = 0;
macgyveremir 2:26afdc979a54 177
macgyveremir 2:26afdc979a54 178 return data.value;
macgyveremir 0:af630aa9a00d 179 }
macgyveremir 2:26afdc979a54 180
macgyveremir 2:26afdc979a54 181 void MAX1120x::init_singlecycle_unipolar_nosyscal ()
macgyveremir 2:26afdc979a54 182 {
macgyveremir 2:26afdc979a54 183 set_control_1 (CTRL1_SCYCLE | CTRL1_SIGBUF | CTRL1_REFBUF | CTRL1_UNIP_BIP);
macgyveremir 2:26afdc979a54 184 set_control_3 (CTRL3_NOSYSG | CTRL3_NOSYSO );
macgyveremir 2:26afdc979a54 185 do_self_calibration ();
macgyveremir 2:26afdc979a54 186 }