DMA_LLI_TEST - LINKED LIST TEST on mbed

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xeye_ atsu / Mbed 2 deprecated DMA_LLI_TEST

LINKED LIST TEST on mbed

I2S_Example/lpc17xx_uart.c@0:e8bfffbb3ab6, 2011-02-26 (annotated)

Committer:: lynxeyed_atsu
Date:: Sat Feb 26 03:55:12 2011 +0000
Revision:: 0:e8bfffbb3ab6

Who changed what in which revision?

User	Revision	Line number	New contents of line
lynxeyed_atsu	0:e8bfffbb3ab6	1	/*********************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	2	* @file lpc17xx_uart.c
lynxeyed_atsu	0:e8bfffbb3ab6	3	* @brief Contains all functions support for UART firmware library on LPC17xx
lynxeyed_atsu	0:e8bfffbb3ab6	4	* @version 3.0
lynxeyed_atsu	0:e8bfffbb3ab6	5	* @date 18. June. 2010
lynxeyed_atsu	0:e8bfffbb3ab6	6	* @author NXP MCU SW Application Team
lynxeyed_atsu	0:e8bfffbb3ab6	7	**************************************************************************
lynxeyed_atsu	0:e8bfffbb3ab6	8	* Software that is described herein is for illustrative purposes only
lynxeyed_atsu	0:e8bfffbb3ab6	9	* which provides customers with programming information regarding the
lynxeyed_atsu	0:e8bfffbb3ab6	10	* products. This software is supplied "AS IS" without any warranties.
lynxeyed_atsu	0:e8bfffbb3ab6	11	* NXP Semiconductors assumes no responsibility or liability for the
lynxeyed_atsu	0:e8bfffbb3ab6	12	* use of the software, conveys no license or title under any patent,
lynxeyed_atsu	0:e8bfffbb3ab6	13	* copyright, or mask work right to the product. NXP Semiconductors
lynxeyed_atsu	0:e8bfffbb3ab6	14	* reserves the right to make changes in the software without
lynxeyed_atsu	0:e8bfffbb3ab6	15	* notification. NXP Semiconductors also make no representation or
lynxeyed_atsu	0:e8bfffbb3ab6	16	* warranty that such application will be suitable for the specified
lynxeyed_atsu	0:e8bfffbb3ab6	17	* use without further testing or modification.
lynxeyed_atsu	0:e8bfffbb3ab6	18	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	19
lynxeyed_atsu	0:e8bfffbb3ab6	20	/* Peripheral group ----------------------------------------------------------- */
lynxeyed_atsu	0:e8bfffbb3ab6	21	/** @addtogroup UART
lynxeyed_atsu	0:e8bfffbb3ab6	22	* @{
lynxeyed_atsu	0:e8bfffbb3ab6	23	*/
lynxeyed_atsu	0:e8bfffbb3ab6	24
lynxeyed_atsu	0:e8bfffbb3ab6	25	/* Includes ------------------------------------------------------------------- */
lynxeyed_atsu	0:e8bfffbb3ab6	26	#include "lpc17xx_uart.h"
lynxeyed_atsu	0:e8bfffbb3ab6	27	#include "lpc17xx_clkpwr.h"
lynxeyed_atsu	0:e8bfffbb3ab6	28
lynxeyed_atsu	0:e8bfffbb3ab6	29	/* If this source file built with example, the LPC17xx FW library configuration
lynxeyed_atsu	0:e8bfffbb3ab6	30	* file in each example directory ("lpc17xx_libcfg.h") must be included,
lynxeyed_atsu	0:e8bfffbb3ab6	31	* otherwise the default FW library configuration file must be included instead
lynxeyed_atsu	0:e8bfffbb3ab6	32	*/
lynxeyed_atsu	0:e8bfffbb3ab6	33	#ifdef __BUILD_WITH_EXAMPLE__
lynxeyed_atsu	0:e8bfffbb3ab6	34	#include "lpc17xx_libcfg.h"
lynxeyed_atsu	0:e8bfffbb3ab6	35	#else
lynxeyed_atsu	0:e8bfffbb3ab6	36	#include "lpc17xx_libcfg_default.h"
lynxeyed_atsu	0:e8bfffbb3ab6	37	#endif /* __BUILD_WITH_EXAMPLE__ */
lynxeyed_atsu	0:e8bfffbb3ab6	38
lynxeyed_atsu	0:e8bfffbb3ab6	39
lynxeyed_atsu	0:e8bfffbb3ab6	40	#ifdef _UART
lynxeyed_atsu	0:e8bfffbb3ab6	41
lynxeyed_atsu	0:e8bfffbb3ab6	42	/* Private Functions ---------------------------------------------------------- */
lynxeyed_atsu	0:e8bfffbb3ab6	43
lynxeyed_atsu	0:e8bfffbb3ab6	44	static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
lynxeyed_atsu	0:e8bfffbb3ab6	45
lynxeyed_atsu	0:e8bfffbb3ab6	46
lynxeyed_atsu	0:e8bfffbb3ab6	47	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	48	* @brief Determines best dividers to get a target clock rate
lynxeyed_atsu	0:e8bfffbb3ab6	49	* @param[in] UARTx Pointer to selected UART peripheral, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	50	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	51	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	52	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	53	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	54	* @param[in] baudrate Desired UART baud rate.
lynxeyed_atsu	0:e8bfffbb3ab6	55	* @return Error status, could be:
lynxeyed_atsu	0:e8bfffbb3ab6	56	* - SUCCESS
lynxeyed_atsu	0:e8bfffbb3ab6	57	* - ERROR
lynxeyed_atsu	0:e8bfffbb3ab6	58	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	59	static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
lynxeyed_atsu	0:e8bfffbb3ab6	60	{
lynxeyed_atsu	0:e8bfffbb3ab6	61	Status errorStatus = ERROR;
lynxeyed_atsu	0:e8bfffbb3ab6	62
lynxeyed_atsu	0:e8bfffbb3ab6	63	uint32_t uClk = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	64	uint32_t calcBaudrate = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	65	uint32_t temp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	66
lynxeyed_atsu	0:e8bfffbb3ab6	67	uint32_t mulFracDiv, dividerAddFracDiv;
lynxeyed_atsu	0:e8bfffbb3ab6	68	uint32_t diviser = 0 ;
lynxeyed_atsu	0:e8bfffbb3ab6	69	uint32_t mulFracDivOptimal = 1;
lynxeyed_atsu	0:e8bfffbb3ab6	70	uint32_t dividerAddOptimal = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	71	uint32_t diviserOptimal = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	72
lynxeyed_atsu	0:e8bfffbb3ab6	73	uint32_t relativeError = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	74	uint32_t relativeOptimalError = 100000;
lynxeyed_atsu	0:e8bfffbb3ab6	75
lynxeyed_atsu	0:e8bfffbb3ab6	76	/* get UART block clock */
lynxeyed_atsu	0:e8bfffbb3ab6	77	if (UARTx == (LPC_UART_TypeDef *)LPC_UART0)
lynxeyed_atsu	0:e8bfffbb3ab6	78	{
lynxeyed_atsu	0:e8bfffbb3ab6	79	uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART0);
lynxeyed_atsu	0:e8bfffbb3ab6	80	}
lynxeyed_atsu	0:e8bfffbb3ab6	81	else if (UARTx == (LPC_UART_TypeDef *)LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	82	{
lynxeyed_atsu	0:e8bfffbb3ab6	83	uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART1);
lynxeyed_atsu	0:e8bfffbb3ab6	84	}
lynxeyed_atsu	0:e8bfffbb3ab6	85	else if (UARTx == LPC_UART2)
lynxeyed_atsu	0:e8bfffbb3ab6	86	{
lynxeyed_atsu	0:e8bfffbb3ab6	87	uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART2);
lynxeyed_atsu	0:e8bfffbb3ab6	88	}
lynxeyed_atsu	0:e8bfffbb3ab6	89	else if (UARTx == LPC_UART3)
lynxeyed_atsu	0:e8bfffbb3ab6	90	{
lynxeyed_atsu	0:e8bfffbb3ab6	91	uClk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_UART3);
lynxeyed_atsu	0:e8bfffbb3ab6	92	}
lynxeyed_atsu	0:e8bfffbb3ab6	93
lynxeyed_atsu	0:e8bfffbb3ab6	94
lynxeyed_atsu	0:e8bfffbb3ab6	95	uClk = uClk >> 4; /* div by 16 */
lynxeyed_atsu	0:e8bfffbb3ab6	96	/* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
lynxeyed_atsu	0:e8bfffbb3ab6	97	* The formula is :
lynxeyed_atsu	0:e8bfffbb3ab6	98	* BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
lynxeyed_atsu	0:e8bfffbb3ab6	99	* It involves floating point calculations. That's the reason the formulae are adjusted with
lynxeyed_atsu	0:e8bfffbb3ab6	100	* Multiply and divide method.*/
lynxeyed_atsu	0:e8bfffbb3ab6	101	/* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
lynxeyed_atsu	0:e8bfffbb3ab6	102	* 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
lynxeyed_atsu	0:e8bfffbb3ab6	103	for (mulFracDiv = 1 ; mulFracDiv <= 15 ;mulFracDiv++)
lynxeyed_atsu	0:e8bfffbb3ab6	104	{
lynxeyed_atsu	0:e8bfffbb3ab6	105	for (dividerAddFracDiv = 0 ; dividerAddFracDiv <= 15 ;dividerAddFracDiv++)
lynxeyed_atsu	0:e8bfffbb3ab6	106	{
lynxeyed_atsu	0:e8bfffbb3ab6	107	temp = (mulFracDiv * uClk) / ((mulFracDiv + dividerAddFracDiv));
lynxeyed_atsu	0:e8bfffbb3ab6	108
lynxeyed_atsu	0:e8bfffbb3ab6	109	diviser = temp / baudrate;
lynxeyed_atsu	0:e8bfffbb3ab6	110	if ((temp % baudrate) > (baudrate / 2))
lynxeyed_atsu	0:e8bfffbb3ab6	111	diviser++;
lynxeyed_atsu	0:e8bfffbb3ab6	112
lynxeyed_atsu	0:e8bfffbb3ab6	113	if (diviser > 2 && diviser < 65536)
lynxeyed_atsu	0:e8bfffbb3ab6	114	{
lynxeyed_atsu	0:e8bfffbb3ab6	115	calcBaudrate = temp / diviser;
lynxeyed_atsu	0:e8bfffbb3ab6	116
lynxeyed_atsu	0:e8bfffbb3ab6	117	if (calcBaudrate <= baudrate)
lynxeyed_atsu	0:e8bfffbb3ab6	118	relativeError = baudrate - calcBaudrate;
lynxeyed_atsu	0:e8bfffbb3ab6	119	else
lynxeyed_atsu	0:e8bfffbb3ab6	120	relativeError = calcBaudrate - baudrate;
lynxeyed_atsu	0:e8bfffbb3ab6	121
lynxeyed_atsu	0:e8bfffbb3ab6	122	if ((relativeError < relativeOptimalError))
lynxeyed_atsu	0:e8bfffbb3ab6	123	{
lynxeyed_atsu	0:e8bfffbb3ab6	124	mulFracDivOptimal = mulFracDiv ;
lynxeyed_atsu	0:e8bfffbb3ab6	125	dividerAddOptimal = dividerAddFracDiv;
lynxeyed_atsu	0:e8bfffbb3ab6	126	diviserOptimal = diviser;
lynxeyed_atsu	0:e8bfffbb3ab6	127	relativeOptimalError = relativeError;
lynxeyed_atsu	0:e8bfffbb3ab6	128	if (relativeError == 0)
lynxeyed_atsu	0:e8bfffbb3ab6	129	break;
lynxeyed_atsu	0:e8bfffbb3ab6	130	}
lynxeyed_atsu	0:e8bfffbb3ab6	131	} /* End of if */
lynxeyed_atsu	0:e8bfffbb3ab6	132	} /* end of inner for loop */
lynxeyed_atsu	0:e8bfffbb3ab6	133	if (relativeError == 0)
lynxeyed_atsu	0:e8bfffbb3ab6	134	break;
lynxeyed_atsu	0:e8bfffbb3ab6	135	} /* end of outer for loop */
lynxeyed_atsu	0:e8bfffbb3ab6	136
lynxeyed_atsu	0:e8bfffbb3ab6	137	if (relativeOptimalError < ((baudrate * UART_ACCEPTED_BAUDRATE_ERROR)/100))
lynxeyed_atsu	0:e8bfffbb3ab6	138	{
lynxeyed_atsu	0:e8bfffbb3ab6	139	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	140	{
lynxeyed_atsu	0:e8bfffbb3ab6	141	((LPC_UART1_TypeDef *)UARTx)->LCR \|= UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	142	((LPC_UART1_TypeDef )UARTx)->/DLIER.*/DLM = UART_LOAD_DLM(diviserOptimal);
lynxeyed_atsu	0:e8bfffbb3ab6	143	((LPC_UART1_TypeDef )UARTx)->/RBTHDLR.*/DLL = UART_LOAD_DLL(diviserOptimal);
lynxeyed_atsu	0:e8bfffbb3ab6	144	/* Then reset DLAB bit */
lynxeyed_atsu	0:e8bfffbb3ab6	145	((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	146	((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(mulFracDivOptimal) \
lynxeyed_atsu	0:e8bfffbb3ab6	147	\| UART_FDR_DIVADDVAL(dividerAddOptimal)) & UART_FDR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	148	}
lynxeyed_atsu	0:e8bfffbb3ab6	149	else
lynxeyed_atsu	0:e8bfffbb3ab6	150	{
lynxeyed_atsu	0:e8bfffbb3ab6	151	UARTx->LCR \|= UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	152	UARTx->/DLIER./DLM = UART_LOAD_DLM(diviserOptimal);
lynxeyed_atsu	0:e8bfffbb3ab6	153	UARTx->/RBTHDLR./DLL = UART_LOAD_DLL(diviserOptimal);
lynxeyed_atsu	0:e8bfffbb3ab6	154	/* Then reset DLAB bit */
lynxeyed_atsu	0:e8bfffbb3ab6	155	UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	156	UARTx->FDR = (UART_FDR_MULVAL(mulFracDivOptimal) \
lynxeyed_atsu	0:e8bfffbb3ab6	157	\| UART_FDR_DIVADDVAL(dividerAddOptimal)) & UART_FDR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	158	}
lynxeyed_atsu	0:e8bfffbb3ab6	159	errorStatus = SUCCESS;
lynxeyed_atsu	0:e8bfffbb3ab6	160	}
lynxeyed_atsu	0:e8bfffbb3ab6	161
lynxeyed_atsu	0:e8bfffbb3ab6	162	return errorStatus;
lynxeyed_atsu	0:e8bfffbb3ab6	163	}
lynxeyed_atsu	0:e8bfffbb3ab6	164
lynxeyed_atsu	0:e8bfffbb3ab6	165	/* End of Private Functions ---------------------------------------------------- */
lynxeyed_atsu	0:e8bfffbb3ab6	166
lynxeyed_atsu	0:e8bfffbb3ab6	167
lynxeyed_atsu	0:e8bfffbb3ab6	168	/* Public Functions ----------------------------------------------------------- */
lynxeyed_atsu	0:e8bfffbb3ab6	169	/** @addtogroup UART_Public_Functions
lynxeyed_atsu	0:e8bfffbb3ab6	170	* @{
lynxeyed_atsu	0:e8bfffbb3ab6	171	*/
lynxeyed_atsu	0:e8bfffbb3ab6	172	/* UART Init/DeInit functions -------------------------------------------------*/
lynxeyed_atsu	0:e8bfffbb3ab6	173	/******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	174	* @brief Initializes the UARTx peripheral according to the specified
lynxeyed_atsu	0:e8bfffbb3ab6	175	* parameters in the UART_ConfigStruct.
lynxeyed_atsu	0:e8bfffbb3ab6	176	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	177	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	178	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	179	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	180	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	181	* @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
lynxeyed_atsu	0:e8bfffbb3ab6	182	* that contains the configuration information for the
lynxeyed_atsu	0:e8bfffbb3ab6	183	* specified UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	184	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	185	*********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	186	void UART_Init(LPC_UART_TypeDef UARTx, UART_CFG_Type UART_ConfigStruct)
lynxeyed_atsu	0:e8bfffbb3ab6	187	{
lynxeyed_atsu	0:e8bfffbb3ab6	188	uint32_t tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	189
lynxeyed_atsu	0:e8bfffbb3ab6	190	// For debug mode
lynxeyed_atsu	0:e8bfffbb3ab6	191	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	192	CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));
lynxeyed_atsu	0:e8bfffbb3ab6	193	CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));
lynxeyed_atsu	0:e8bfffbb3ab6	194	CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));
lynxeyed_atsu	0:e8bfffbb3ab6	195
lynxeyed_atsu	0:e8bfffbb3ab6	196	#ifdef _UART0
lynxeyed_atsu	0:e8bfffbb3ab6	197	if(UARTx == (LPC_UART_TypeDef *)LPC_UART0)
lynxeyed_atsu	0:e8bfffbb3ab6	198	{
lynxeyed_atsu	0:e8bfffbb3ab6	199	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	200	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	201	}
lynxeyed_atsu	0:e8bfffbb3ab6	202	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	203
lynxeyed_atsu	0:e8bfffbb3ab6	204	#ifdef _UART1
lynxeyed_atsu	0:e8bfffbb3ab6	205	if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	206	{
lynxeyed_atsu	0:e8bfffbb3ab6	207	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	208	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	209	}
lynxeyed_atsu	0:e8bfffbb3ab6	210	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	211
lynxeyed_atsu	0:e8bfffbb3ab6	212	#ifdef _UART2
lynxeyed_atsu	0:e8bfffbb3ab6	213	if(UARTx == LPC_UART2)
lynxeyed_atsu	0:e8bfffbb3ab6	214	{
lynxeyed_atsu	0:e8bfffbb3ab6	215	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	216	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	217	}
lynxeyed_atsu	0:e8bfffbb3ab6	218	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	219
lynxeyed_atsu	0:e8bfffbb3ab6	220	#ifdef _UART3
lynxeyed_atsu	0:e8bfffbb3ab6	221	if(UARTx == LPC_UART3)
lynxeyed_atsu	0:e8bfffbb3ab6	222	{
lynxeyed_atsu	0:e8bfffbb3ab6	223	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	224	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	225	}
lynxeyed_atsu	0:e8bfffbb3ab6	226	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	227
lynxeyed_atsu	0:e8bfffbb3ab6	228	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	229	{
lynxeyed_atsu	0:e8bfffbb3ab6	230	/* FIFOs are empty */
lynxeyed_atsu	0:e8bfffbb3ab6	231	((LPC_UART1_TypeDef )UARTx)->/IIFCR.*/FCR = ( UART_FCR_FIFO_EN \
lynxeyed_atsu	0:e8bfffbb3ab6	232	\| UART_FCR_RX_RS \| UART_FCR_TX_RS);
lynxeyed_atsu	0:e8bfffbb3ab6	233	// Disable FIFO
lynxeyed_atsu	0:e8bfffbb3ab6	234	((LPC_UART1_TypeDef )UARTx)->/IIFCR.*/FCR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	235
lynxeyed_atsu	0:e8bfffbb3ab6	236	// Dummy reading
lynxeyed_atsu	0:e8bfffbb3ab6	237	while (((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_RDR)
lynxeyed_atsu	0:e8bfffbb3ab6	238	{
lynxeyed_atsu	0:e8bfffbb3ab6	239	tmp = ((LPC_UART1_TypeDef )UARTx)->/RBTHDLR.*/RBR;
lynxeyed_atsu	0:e8bfffbb3ab6	240	}
lynxeyed_atsu	0:e8bfffbb3ab6	241
lynxeyed_atsu	0:e8bfffbb3ab6	242	((LPC_UART1_TypeDef *)UARTx)->TER = UART_TER_TXEN;
lynxeyed_atsu	0:e8bfffbb3ab6	243	// Wait for current transmit complete
lynxeyed_atsu	0:e8bfffbb3ab6	244	while (!(((LPC_UART1_TypeDef *)UARTx)->LSR & UART_LSR_THRE));
lynxeyed_atsu	0:e8bfffbb3ab6	245	// Disable Tx
lynxeyed_atsu	0:e8bfffbb3ab6	246	((LPC_UART1_TypeDef *)UARTx)->TER = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	247
lynxeyed_atsu	0:e8bfffbb3ab6	248	// Disable interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	249	((LPC_UART1_TypeDef )UARTx)->/DLIER.*/IER = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	250	// Set LCR to default state
lynxeyed_atsu	0:e8bfffbb3ab6	251	((LPC_UART1_TypeDef *)UARTx)->LCR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	252	// Set ACR to default state
lynxeyed_atsu	0:e8bfffbb3ab6	253	((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	254	// Set Modem Control to default state
lynxeyed_atsu	0:e8bfffbb3ab6	255	((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	256	// Set RS485 control to default state
lynxeyed_atsu	0:e8bfffbb3ab6	257	((LPC_UART1_TypeDef *)UARTx)->RS485CTRL = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	258	// Set RS485 delay timer to default state
lynxeyed_atsu	0:e8bfffbb3ab6	259	((LPC_UART1_TypeDef *)UARTx)->RS485DLY = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	260	// Set RS485 addr match to default state
lynxeyed_atsu	0:e8bfffbb3ab6	261	((LPC_UART1_TypeDef *)UARTx)->ADRMATCH = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	262	//Dummy Reading to Clear Status
lynxeyed_atsu	0:e8bfffbb3ab6	263	tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
lynxeyed_atsu	0:e8bfffbb3ab6	264	tmp = ((LPC_UART1_TypeDef *)UARTx)->LSR;
lynxeyed_atsu	0:e8bfffbb3ab6	265	}
lynxeyed_atsu	0:e8bfffbb3ab6	266	else
lynxeyed_atsu	0:e8bfffbb3ab6	267	{
lynxeyed_atsu	0:e8bfffbb3ab6	268	/* FIFOs are empty */
lynxeyed_atsu	0:e8bfffbb3ab6	269	UARTx->/IIFCR./FCR = ( UART_FCR_FIFO_EN \| UART_FCR_RX_RS \| UART_FCR_TX_RS);
lynxeyed_atsu	0:e8bfffbb3ab6	270	// Disable FIFO
lynxeyed_atsu	0:e8bfffbb3ab6	271	UARTx->/IIFCR./FCR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	272
lynxeyed_atsu	0:e8bfffbb3ab6	273	// Dummy reading
lynxeyed_atsu	0:e8bfffbb3ab6	274	while (UARTx->LSR & UART_LSR_RDR)
lynxeyed_atsu	0:e8bfffbb3ab6	275	{
lynxeyed_atsu	0:e8bfffbb3ab6	276	tmp = UARTx->/RBTHDLR./RBR;
lynxeyed_atsu	0:e8bfffbb3ab6	277	}
lynxeyed_atsu	0:e8bfffbb3ab6	278
lynxeyed_atsu	0:e8bfffbb3ab6	279	UARTx->TER = UART_TER_TXEN;
lynxeyed_atsu	0:e8bfffbb3ab6	280	// Wait for current transmit complete
lynxeyed_atsu	0:e8bfffbb3ab6	281	while (!(UARTx->LSR & UART_LSR_THRE));
lynxeyed_atsu	0:e8bfffbb3ab6	282	// Disable Tx
lynxeyed_atsu	0:e8bfffbb3ab6	283	UARTx->TER = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	284
lynxeyed_atsu	0:e8bfffbb3ab6	285	// Disable interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	286	UARTx->/DLIER./IER = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	287	// Set LCR to default state
lynxeyed_atsu	0:e8bfffbb3ab6	288	UARTx->LCR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	289	// Set ACR to default state
lynxeyed_atsu	0:e8bfffbb3ab6	290	UARTx->ACR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	291	// Dummy reading
lynxeyed_atsu	0:e8bfffbb3ab6	292	tmp = UARTx->LSR;
lynxeyed_atsu	0:e8bfffbb3ab6	293	}
lynxeyed_atsu	0:e8bfffbb3ab6	294
lynxeyed_atsu	0:e8bfffbb3ab6	295	if (UARTx == LPC_UART3)
lynxeyed_atsu	0:e8bfffbb3ab6	296	{
lynxeyed_atsu	0:e8bfffbb3ab6	297	// Set IrDA to default state
lynxeyed_atsu	0:e8bfffbb3ab6	298	UARTx->ICR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	299	}
lynxeyed_atsu	0:e8bfffbb3ab6	300
lynxeyed_atsu	0:e8bfffbb3ab6	301	// Set Line Control register ----------------------------
lynxeyed_atsu	0:e8bfffbb3ab6	302
lynxeyed_atsu	0:e8bfffbb3ab6	303	uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
lynxeyed_atsu	0:e8bfffbb3ab6	304
lynxeyed_atsu	0:e8bfffbb3ab6	305	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	306	{
lynxeyed_atsu	0:e8bfffbb3ab6	307	tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN \| UART_LCR_BREAK_EN)) \
lynxeyed_atsu	0:e8bfffbb3ab6	308	& UART_LCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	309	}
lynxeyed_atsu	0:e8bfffbb3ab6	310	else
lynxeyed_atsu	0:e8bfffbb3ab6	311	{
lynxeyed_atsu	0:e8bfffbb3ab6	312	tmp = (UARTx->LCR & (UART_LCR_DLAB_EN \| UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	313	}
lynxeyed_atsu	0:e8bfffbb3ab6	314
lynxeyed_atsu	0:e8bfffbb3ab6	315	switch (UART_ConfigStruct->Databits){
lynxeyed_atsu	0:e8bfffbb3ab6	316	case UART_DATABIT_5:
lynxeyed_atsu	0:e8bfffbb3ab6	317	tmp \|= UART_LCR_WLEN5;
lynxeyed_atsu	0:e8bfffbb3ab6	318	break;
lynxeyed_atsu	0:e8bfffbb3ab6	319	case UART_DATABIT_6:
lynxeyed_atsu	0:e8bfffbb3ab6	320	tmp \|= UART_LCR_WLEN6;
lynxeyed_atsu	0:e8bfffbb3ab6	321	break;
lynxeyed_atsu	0:e8bfffbb3ab6	322	case UART_DATABIT_7:
lynxeyed_atsu	0:e8bfffbb3ab6	323	tmp \|= UART_LCR_WLEN7;
lynxeyed_atsu	0:e8bfffbb3ab6	324	break;
lynxeyed_atsu	0:e8bfffbb3ab6	325	case UART_DATABIT_8:
lynxeyed_atsu	0:e8bfffbb3ab6	326	default:
lynxeyed_atsu	0:e8bfffbb3ab6	327	tmp \|= UART_LCR_WLEN8;
lynxeyed_atsu	0:e8bfffbb3ab6	328	break;
lynxeyed_atsu	0:e8bfffbb3ab6	329	}
lynxeyed_atsu	0:e8bfffbb3ab6	330
lynxeyed_atsu	0:e8bfffbb3ab6	331	if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
lynxeyed_atsu	0:e8bfffbb3ab6	332	{
lynxeyed_atsu	0:e8bfffbb3ab6	333	// Do nothing...
lynxeyed_atsu	0:e8bfffbb3ab6	334	}
lynxeyed_atsu	0:e8bfffbb3ab6	335	else
lynxeyed_atsu	0:e8bfffbb3ab6	336	{
lynxeyed_atsu	0:e8bfffbb3ab6	337	tmp \|= UART_LCR_PARITY_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	338	switch (UART_ConfigStruct->Parity)
lynxeyed_atsu	0:e8bfffbb3ab6	339	{
lynxeyed_atsu	0:e8bfffbb3ab6	340	case UART_PARITY_ODD:
lynxeyed_atsu	0:e8bfffbb3ab6	341	tmp \|= UART_LCR_PARITY_ODD;
lynxeyed_atsu	0:e8bfffbb3ab6	342	break;
lynxeyed_atsu	0:e8bfffbb3ab6	343
lynxeyed_atsu	0:e8bfffbb3ab6	344	case UART_PARITY_EVEN:
lynxeyed_atsu	0:e8bfffbb3ab6	345	tmp \|= UART_LCR_PARITY_EVEN;
lynxeyed_atsu	0:e8bfffbb3ab6	346	break;
lynxeyed_atsu	0:e8bfffbb3ab6	347
lynxeyed_atsu	0:e8bfffbb3ab6	348	case UART_PARITY_SP_1:
lynxeyed_atsu	0:e8bfffbb3ab6	349	tmp \|= UART_LCR_PARITY_F_1;
lynxeyed_atsu	0:e8bfffbb3ab6	350	break;
lynxeyed_atsu	0:e8bfffbb3ab6	351
lynxeyed_atsu	0:e8bfffbb3ab6	352	case UART_PARITY_SP_0:
lynxeyed_atsu	0:e8bfffbb3ab6	353	tmp \|= UART_LCR_PARITY_F_0;
lynxeyed_atsu	0:e8bfffbb3ab6	354	break;
lynxeyed_atsu	0:e8bfffbb3ab6	355	default:
lynxeyed_atsu	0:e8bfffbb3ab6	356	break;
lynxeyed_atsu	0:e8bfffbb3ab6	357	}
lynxeyed_atsu	0:e8bfffbb3ab6	358	}
lynxeyed_atsu	0:e8bfffbb3ab6	359
lynxeyed_atsu	0:e8bfffbb3ab6	360	switch (UART_ConfigStruct->Stopbits){
lynxeyed_atsu	0:e8bfffbb3ab6	361	case UART_STOPBIT_2:
lynxeyed_atsu	0:e8bfffbb3ab6	362	tmp \|= UART_LCR_STOPBIT_SEL;
lynxeyed_atsu	0:e8bfffbb3ab6	363	break;
lynxeyed_atsu	0:e8bfffbb3ab6	364	case UART_STOPBIT_1:
lynxeyed_atsu	0:e8bfffbb3ab6	365	default:
lynxeyed_atsu	0:e8bfffbb3ab6	366	// Do no thing
lynxeyed_atsu	0:e8bfffbb3ab6	367	break;
lynxeyed_atsu	0:e8bfffbb3ab6	368	}
lynxeyed_atsu	0:e8bfffbb3ab6	369
lynxeyed_atsu	0:e8bfffbb3ab6	370
lynxeyed_atsu	0:e8bfffbb3ab6	371	// Write back to LCR, configure FIFO and Disable Tx
lynxeyed_atsu	0:e8bfffbb3ab6	372	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	373	{
lynxeyed_atsu	0:e8bfffbb3ab6	374	((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
lynxeyed_atsu	0:e8bfffbb3ab6	375	}
lynxeyed_atsu	0:e8bfffbb3ab6	376	else
lynxeyed_atsu	0:e8bfffbb3ab6	377	{
lynxeyed_atsu	0:e8bfffbb3ab6	378	UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
lynxeyed_atsu	0:e8bfffbb3ab6	379	}
lynxeyed_atsu	0:e8bfffbb3ab6	380	}
lynxeyed_atsu	0:e8bfffbb3ab6	381
lynxeyed_atsu	0:e8bfffbb3ab6	382	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	383	* @brief De-initializes the UARTx peripheral registers to their
lynxeyed_atsu	0:e8bfffbb3ab6	384	* default reset values.
lynxeyed_atsu	0:e8bfffbb3ab6	385	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	386	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	387	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	388	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	389	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	390	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	391	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	392	void UART_DeInit(LPC_UART_TypeDef* UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	393	{
lynxeyed_atsu	0:e8bfffbb3ab6	394	// For debug mode
lynxeyed_atsu	0:e8bfffbb3ab6	395	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	396
lynxeyed_atsu	0:e8bfffbb3ab6	397	UART_TxCmd(UARTx, DISABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	398
lynxeyed_atsu	0:e8bfffbb3ab6	399	#ifdef _UART0
lynxeyed_atsu	0:e8bfffbb3ab6	400	if (UARTx == (LPC_UART_TypeDef *)LPC_UART0)
lynxeyed_atsu	0:e8bfffbb3ab6	401	{
lynxeyed_atsu	0:e8bfffbb3ab6	402	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	403	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	404	}
lynxeyed_atsu	0:e8bfffbb3ab6	405	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	406
lynxeyed_atsu	0:e8bfffbb3ab6	407	#ifdef _UART1
lynxeyed_atsu	0:e8bfffbb3ab6	408	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	409	{
lynxeyed_atsu	0:e8bfffbb3ab6	410	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	411	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	412	}
lynxeyed_atsu	0:e8bfffbb3ab6	413	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	414
lynxeyed_atsu	0:e8bfffbb3ab6	415	#ifdef _UART2
lynxeyed_atsu	0:e8bfffbb3ab6	416	if (UARTx == LPC_UART2)
lynxeyed_atsu	0:e8bfffbb3ab6	417	{
lynxeyed_atsu	0:e8bfffbb3ab6	418	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	419	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	420	}
lynxeyed_atsu	0:e8bfffbb3ab6	421	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	422
lynxeyed_atsu	0:e8bfffbb3ab6	423	#ifdef _UART3
lynxeyed_atsu	0:e8bfffbb3ab6	424	if (UARTx == LPC_UART3)
lynxeyed_atsu	0:e8bfffbb3ab6	425	{
lynxeyed_atsu	0:e8bfffbb3ab6	426	/* Set up clock and power for UART module */
lynxeyed_atsu	0:e8bfffbb3ab6	427	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
lynxeyed_atsu	0:e8bfffbb3ab6	428	}
lynxeyed_atsu	0:e8bfffbb3ab6	429	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	430	}
lynxeyed_atsu	0:e8bfffbb3ab6	431
lynxeyed_atsu	0:e8bfffbb3ab6	432	/***************************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	433	* @brief Fills each UART_InitStruct member with its default value:
lynxeyed_atsu	0:e8bfffbb3ab6	434	* - 9600 bps
lynxeyed_atsu	0:e8bfffbb3ab6	435	* - 8-bit data
lynxeyed_atsu	0:e8bfffbb3ab6	436	* - 1 Stopbit
lynxeyed_atsu	0:e8bfffbb3ab6	437	* - None Parity
lynxeyed_atsu	0:e8bfffbb3ab6	438	* @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
lynxeyed_atsu	0:e8bfffbb3ab6	439	* which will be initialized.
lynxeyed_atsu	0:e8bfffbb3ab6	440	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	441	*******************************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	442	void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
lynxeyed_atsu	0:e8bfffbb3ab6	443	{
lynxeyed_atsu	0:e8bfffbb3ab6	444	UART_InitStruct->Baud_rate = 9600;
lynxeyed_atsu	0:e8bfffbb3ab6	445	UART_InitStruct->Databits = UART_DATABIT_8;
lynxeyed_atsu	0:e8bfffbb3ab6	446	UART_InitStruct->Parity = UART_PARITY_NONE;
lynxeyed_atsu	0:e8bfffbb3ab6	447	UART_InitStruct->Stopbits = UART_STOPBIT_1;
lynxeyed_atsu	0:e8bfffbb3ab6	448	}
lynxeyed_atsu	0:e8bfffbb3ab6	449
lynxeyed_atsu	0:e8bfffbb3ab6	450	/* UART Send/Recieve functions -------------------------------------------------*/
lynxeyed_atsu	0:e8bfffbb3ab6	451	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	452	* @brief Transmit a single data through UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	453	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	454	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	455	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	456	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	457	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	458	* @param[in] Data Data to transmit (must be 8-bit long)
lynxeyed_atsu	0:e8bfffbb3ab6	459	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	460	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	461	void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
lynxeyed_atsu	0:e8bfffbb3ab6	462	{
lynxeyed_atsu	0:e8bfffbb3ab6	463	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	464
lynxeyed_atsu	0:e8bfffbb3ab6	465	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	466	{
lynxeyed_atsu	0:e8bfffbb3ab6	467	((LPC_UART1_TypeDef )UARTx)->/RBTHDLR.*/THR = Data & UART_THR_MASKBIT;
lynxeyed_atsu	0:e8bfffbb3ab6	468	}
lynxeyed_atsu	0:e8bfffbb3ab6	469	else
lynxeyed_atsu	0:e8bfffbb3ab6	470	{
lynxeyed_atsu	0:e8bfffbb3ab6	471	UARTx->/RBTHDLR./THR = Data & UART_THR_MASKBIT;
lynxeyed_atsu	0:e8bfffbb3ab6	472	}
lynxeyed_atsu	0:e8bfffbb3ab6	473
lynxeyed_atsu	0:e8bfffbb3ab6	474	}
lynxeyed_atsu	0:e8bfffbb3ab6	475
lynxeyed_atsu	0:e8bfffbb3ab6	476
lynxeyed_atsu	0:e8bfffbb3ab6	477	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	478	* @brief Receive a single data from UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	479	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	480	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	481	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	482	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	483	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	484	* @return Data received
lynxeyed_atsu	0:e8bfffbb3ab6	485	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	486	uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	487	{
lynxeyed_atsu	0:e8bfffbb3ab6	488	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	489
lynxeyed_atsu	0:e8bfffbb3ab6	490	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	491	{
lynxeyed_atsu	0:e8bfffbb3ab6	492	return (((LPC_UART1_TypeDef )UARTx)->/RBTHDLR.*/RBR & UART_RBR_MASKBIT);
lynxeyed_atsu	0:e8bfffbb3ab6	493	}
lynxeyed_atsu	0:e8bfffbb3ab6	494	else
lynxeyed_atsu	0:e8bfffbb3ab6	495	{
lynxeyed_atsu	0:e8bfffbb3ab6	496	return (UARTx->/RBTHDLR./RBR & UART_RBR_MASKBIT);
lynxeyed_atsu	0:e8bfffbb3ab6	497	}
lynxeyed_atsu	0:e8bfffbb3ab6	498	}
lynxeyed_atsu	0:e8bfffbb3ab6	499
lynxeyed_atsu	0:e8bfffbb3ab6	500	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	501	* @brief Send a block of data via UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	502	* @param[in] UARTx Selected UART peripheral used to send data, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	503	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	504	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	505	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	506	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	507	* @param[in] txbuf Pointer to Transmit buffer
lynxeyed_atsu	0:e8bfffbb3ab6	508	* @param[in] buflen Length of Transmit buffer
lynxeyed_atsu	0:e8bfffbb3ab6	509	* @param[in] flag Flag used in UART transfer, should be
lynxeyed_atsu	0:e8bfffbb3ab6	510	* NONE_BLOCKING or BLOCKING
lynxeyed_atsu	0:e8bfffbb3ab6	511	* @return Number of bytes sent.
lynxeyed_atsu	0:e8bfffbb3ab6	512	*
lynxeyed_atsu	0:e8bfffbb3ab6	513	* Note: when using UART in BLOCKING mode, a time-out condition is used
lynxeyed_atsu	0:e8bfffbb3ab6	514	* via defined symbol UART_BLOCKING_TIMEOUT.
lynxeyed_atsu	0:e8bfffbb3ab6	515	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	516	uint32_t UART_Send(LPC_UART_TypeDef UARTx, uint8_t txbuf,
lynxeyed_atsu	0:e8bfffbb3ab6	517	uint32_t buflen, TRANSFER_BLOCK_Type flag)
lynxeyed_atsu	0:e8bfffbb3ab6	518	{
lynxeyed_atsu	0:e8bfffbb3ab6	519	uint32_t bToSend, bSent, timeOut, fifo_cnt;
lynxeyed_atsu	0:e8bfffbb3ab6	520	uint8_t *pChar = txbuf;
lynxeyed_atsu	0:e8bfffbb3ab6	521
lynxeyed_atsu	0:e8bfffbb3ab6	522	bToSend = buflen;
lynxeyed_atsu	0:e8bfffbb3ab6	523
lynxeyed_atsu	0:e8bfffbb3ab6	524	// blocking mode
lynxeyed_atsu	0:e8bfffbb3ab6	525	if (flag == BLOCKING) {
lynxeyed_atsu	0:e8bfffbb3ab6	526	bSent = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	527	while (bToSend){
lynxeyed_atsu	0:e8bfffbb3ab6	528	timeOut = UART_BLOCKING_TIMEOUT;
lynxeyed_atsu	0:e8bfffbb3ab6	529	// Wait for THR empty with timeout
lynxeyed_atsu	0:e8bfffbb3ab6	530	while (!(UARTx->LSR & UART_LSR_THRE)) {
lynxeyed_atsu	0:e8bfffbb3ab6	531	if (timeOut == 0) break;
lynxeyed_atsu	0:e8bfffbb3ab6	532	timeOut--;
lynxeyed_atsu	0:e8bfffbb3ab6	533	}
lynxeyed_atsu	0:e8bfffbb3ab6	534	// Time out!
lynxeyed_atsu	0:e8bfffbb3ab6	535	if(timeOut == 0) break;
lynxeyed_atsu	0:e8bfffbb3ab6	536	fifo_cnt = UART_TX_FIFO_SIZE;
lynxeyed_atsu	0:e8bfffbb3ab6	537	while (fifo_cnt && bToSend){
lynxeyed_atsu	0:e8bfffbb3ab6	538	UART_SendByte(UARTx, (*pChar++));
lynxeyed_atsu	0:e8bfffbb3ab6	539	fifo_cnt--;
lynxeyed_atsu	0:e8bfffbb3ab6	540	bToSend--;
lynxeyed_atsu	0:e8bfffbb3ab6	541	bSent++;
lynxeyed_atsu	0:e8bfffbb3ab6	542	}
lynxeyed_atsu	0:e8bfffbb3ab6	543	}
lynxeyed_atsu	0:e8bfffbb3ab6	544	}
lynxeyed_atsu	0:e8bfffbb3ab6	545	// None blocking mode
lynxeyed_atsu	0:e8bfffbb3ab6	546	else {
lynxeyed_atsu	0:e8bfffbb3ab6	547	bSent = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	548	while (bToSend) {
lynxeyed_atsu	0:e8bfffbb3ab6	549	if (!(UARTx->LSR & UART_LSR_THRE)){
lynxeyed_atsu	0:e8bfffbb3ab6	550	break;
lynxeyed_atsu	0:e8bfffbb3ab6	551	}
lynxeyed_atsu	0:e8bfffbb3ab6	552	fifo_cnt = UART_TX_FIFO_SIZE;
lynxeyed_atsu	0:e8bfffbb3ab6	553	while (fifo_cnt && bToSend) {
lynxeyed_atsu	0:e8bfffbb3ab6	554	UART_SendByte(UARTx, (*pChar++));
lynxeyed_atsu	0:e8bfffbb3ab6	555	bToSend--;
lynxeyed_atsu	0:e8bfffbb3ab6	556	fifo_cnt--;
lynxeyed_atsu	0:e8bfffbb3ab6	557	bSent++;
lynxeyed_atsu	0:e8bfffbb3ab6	558	}
lynxeyed_atsu	0:e8bfffbb3ab6	559	}
lynxeyed_atsu	0:e8bfffbb3ab6	560	}
lynxeyed_atsu	0:e8bfffbb3ab6	561	return bSent;
lynxeyed_atsu	0:e8bfffbb3ab6	562	}
lynxeyed_atsu	0:e8bfffbb3ab6	563
lynxeyed_atsu	0:e8bfffbb3ab6	564	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	565	* @brief Receive a block of data via UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	566	* @param[in] UARTx Selected UART peripheral used to send data,
lynxeyed_atsu	0:e8bfffbb3ab6	567	* should be:
lynxeyed_atsu	0:e8bfffbb3ab6	568	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	569	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	570	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	571	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	572	* @param[out] rxbuf Pointer to Received buffer
lynxeyed_atsu	0:e8bfffbb3ab6	573	* @param[in] buflen Length of Received buffer
lynxeyed_atsu	0:e8bfffbb3ab6	574	* @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
lynxeyed_atsu	0:e8bfffbb3ab6	575
lynxeyed_atsu	0:e8bfffbb3ab6	576	* @return Number of bytes received
lynxeyed_atsu	0:e8bfffbb3ab6	577	*
lynxeyed_atsu	0:e8bfffbb3ab6	578	* Note: when using UART in BLOCKING mode, a time-out condition is used
lynxeyed_atsu	0:e8bfffbb3ab6	579	* via defined symbol UART_BLOCKING_TIMEOUT.
lynxeyed_atsu	0:e8bfffbb3ab6	580	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	581	uint32_t UART_Receive(LPC_UART_TypeDef UARTx, uint8_t rxbuf, \
lynxeyed_atsu	0:e8bfffbb3ab6	582	uint32_t buflen, TRANSFER_BLOCK_Type flag)
lynxeyed_atsu	0:e8bfffbb3ab6	583	{
lynxeyed_atsu	0:e8bfffbb3ab6	584	uint32_t bToRecv, bRecv, timeOut;
lynxeyed_atsu	0:e8bfffbb3ab6	585	uint8_t *pChar = rxbuf;
lynxeyed_atsu	0:e8bfffbb3ab6	586
lynxeyed_atsu	0:e8bfffbb3ab6	587	bToRecv = buflen;
lynxeyed_atsu	0:e8bfffbb3ab6	588
lynxeyed_atsu	0:e8bfffbb3ab6	589	// Blocking mode
lynxeyed_atsu	0:e8bfffbb3ab6	590	if (flag == BLOCKING) {
lynxeyed_atsu	0:e8bfffbb3ab6	591	bRecv = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	592	while (bToRecv){
lynxeyed_atsu	0:e8bfffbb3ab6	593	timeOut = UART_BLOCKING_TIMEOUT;
lynxeyed_atsu	0:e8bfffbb3ab6	594	while (!(UARTx->LSR & UART_LSR_RDR)){
lynxeyed_atsu	0:e8bfffbb3ab6	595	if (timeOut == 0) break;
lynxeyed_atsu	0:e8bfffbb3ab6	596	timeOut--;
lynxeyed_atsu	0:e8bfffbb3ab6	597	}
lynxeyed_atsu	0:e8bfffbb3ab6	598	// Time out!
lynxeyed_atsu	0:e8bfffbb3ab6	599	if(timeOut == 0) break;
lynxeyed_atsu	0:e8bfffbb3ab6	600	// Get data from the buffer
lynxeyed_atsu	0:e8bfffbb3ab6	601	(*pChar++) = UART_ReceiveByte(UARTx);
lynxeyed_atsu	0:e8bfffbb3ab6	602	bToRecv--;
lynxeyed_atsu	0:e8bfffbb3ab6	603	bRecv++;
lynxeyed_atsu	0:e8bfffbb3ab6	604	}
lynxeyed_atsu	0:e8bfffbb3ab6	605	}
lynxeyed_atsu	0:e8bfffbb3ab6	606	// None blocking mode
lynxeyed_atsu	0:e8bfffbb3ab6	607	else {
lynxeyed_atsu	0:e8bfffbb3ab6	608	bRecv = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	609	while (bToRecv) {
lynxeyed_atsu	0:e8bfffbb3ab6	610	if (!(UARTx->LSR & UART_LSR_RDR)) {
lynxeyed_atsu	0:e8bfffbb3ab6	611	break;
lynxeyed_atsu	0:e8bfffbb3ab6	612	} else {
lynxeyed_atsu	0:e8bfffbb3ab6	613	(*pChar++) = UART_ReceiveByte(UARTx);
lynxeyed_atsu	0:e8bfffbb3ab6	614	bRecv++;
lynxeyed_atsu	0:e8bfffbb3ab6	615	bToRecv--;
lynxeyed_atsu	0:e8bfffbb3ab6	616	}
lynxeyed_atsu	0:e8bfffbb3ab6	617	}
lynxeyed_atsu	0:e8bfffbb3ab6	618	}
lynxeyed_atsu	0:e8bfffbb3ab6	619	return bRecv;
lynxeyed_atsu	0:e8bfffbb3ab6	620	}
lynxeyed_atsu	0:e8bfffbb3ab6	621
lynxeyed_atsu	0:e8bfffbb3ab6	622	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	623	* @brief Force BREAK character on UART line, output pin UARTx TXD is
lynxeyed_atsu	0:e8bfffbb3ab6	624	forced to logic 0.
lynxeyed_atsu	0:e8bfffbb3ab6	625	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	626	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	627	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	628	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	629	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	630	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	631	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	632	void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	633	{
lynxeyed_atsu	0:e8bfffbb3ab6	634	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	635
lynxeyed_atsu	0:e8bfffbb3ab6	636	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	637	{
lynxeyed_atsu	0:e8bfffbb3ab6	638	((LPC_UART1_TypeDef *)UARTx)->LCR \|= UART_LCR_BREAK_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	639	}
lynxeyed_atsu	0:e8bfffbb3ab6	640	else
lynxeyed_atsu	0:e8bfffbb3ab6	641	{
lynxeyed_atsu	0:e8bfffbb3ab6	642	UARTx->LCR \|= UART_LCR_BREAK_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	643	}
lynxeyed_atsu	0:e8bfffbb3ab6	644	}
lynxeyed_atsu	0:e8bfffbb3ab6	645
lynxeyed_atsu	0:e8bfffbb3ab6	646
lynxeyed_atsu	0:e8bfffbb3ab6	647	/******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	648	* @brief Enable or disable specified UART interrupt.
lynxeyed_atsu	0:e8bfffbb3ab6	649	* @param[in] UARTx UART peripheral selected, should be
lynxeyed_atsu	0:e8bfffbb3ab6	650	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	651	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	652	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	653	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	654	* @param[in] UARTIntCfg Specifies the interrupt flag,
lynxeyed_atsu	0:e8bfffbb3ab6	655	* should be one of the following:
lynxeyed_atsu	0:e8bfffbb3ab6	656	- UART_INTCFG_RBR : RBR Interrupt enable
lynxeyed_atsu	0:e8bfffbb3ab6	657	- UART_INTCFG_THRE : THR Interrupt enable
lynxeyed_atsu	0:e8bfffbb3ab6	658	- UART_INTCFG_RLS : RX line status interrupt enable
lynxeyed_atsu	0:e8bfffbb3ab6	659	- UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
lynxeyed_atsu	0:e8bfffbb3ab6	660	- UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
lynxeyed_atsu	0:e8bfffbb3ab6	661	- UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	662	- UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	663	* @param[in] NewState New state of specified UART interrupt type,
lynxeyed_atsu	0:e8bfffbb3ab6	664	* should be:
lynxeyed_atsu	0:e8bfffbb3ab6	665	* - ENALBE: Enable this UART interrupt type.
lynxeyed_atsu	0:e8bfffbb3ab6	666	* - DISALBE: Disable this UART interrupt type.
lynxeyed_atsu	0:e8bfffbb3ab6	667	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	668	*********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	669	void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	670	{
lynxeyed_atsu	0:e8bfffbb3ab6	671	uint32_t tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	672
lynxeyed_atsu	0:e8bfffbb3ab6	673	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	674	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	675
lynxeyed_atsu	0:e8bfffbb3ab6	676	switch(UARTIntCfg){
lynxeyed_atsu	0:e8bfffbb3ab6	677	case UART_INTCFG_RBR:
lynxeyed_atsu	0:e8bfffbb3ab6	678	tmp = UART_IER_RBRINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	679	break;
lynxeyed_atsu	0:e8bfffbb3ab6	680	case UART_INTCFG_THRE:
lynxeyed_atsu	0:e8bfffbb3ab6	681	tmp = UART_IER_THREINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	682	break;
lynxeyed_atsu	0:e8bfffbb3ab6	683	case UART_INTCFG_RLS:
lynxeyed_atsu	0:e8bfffbb3ab6	684	tmp = UART_IER_RLSINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	685	break;
lynxeyed_atsu	0:e8bfffbb3ab6	686	case UART1_INTCFG_MS:
lynxeyed_atsu	0:e8bfffbb3ab6	687	tmp = UART1_IER_MSINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	688	break;
lynxeyed_atsu	0:e8bfffbb3ab6	689	case UART1_INTCFG_CTS:
lynxeyed_atsu	0:e8bfffbb3ab6	690	tmp = UART1_IER_CTSINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	691	break;
lynxeyed_atsu	0:e8bfffbb3ab6	692	case UART_INTCFG_ABEO:
lynxeyed_atsu	0:e8bfffbb3ab6	693	tmp = UART_IER_ABEOINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	694	break;
lynxeyed_atsu	0:e8bfffbb3ab6	695	case UART_INTCFG_ABTO:
lynxeyed_atsu	0:e8bfffbb3ab6	696	tmp = UART_IER_ABTOINT_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	697	break;
lynxeyed_atsu	0:e8bfffbb3ab6	698	}
lynxeyed_atsu	0:e8bfffbb3ab6	699
lynxeyed_atsu	0:e8bfffbb3ab6	700	if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	701	{
lynxeyed_atsu	0:e8bfffbb3ab6	702	CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) \|\| (PARAM_UART1_INTCFG(UARTIntCfg)));
lynxeyed_atsu	0:e8bfffbb3ab6	703	}
lynxeyed_atsu	0:e8bfffbb3ab6	704	else
lynxeyed_atsu	0:e8bfffbb3ab6	705	{
lynxeyed_atsu	0:e8bfffbb3ab6	706	CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));
lynxeyed_atsu	0:e8bfffbb3ab6	707	}
lynxeyed_atsu	0:e8bfffbb3ab6	708
lynxeyed_atsu	0:e8bfffbb3ab6	709	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	710	{
lynxeyed_atsu	0:e8bfffbb3ab6	711	if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	712	{
lynxeyed_atsu	0:e8bfffbb3ab6	713	((LPC_UART1_TypeDef )UARTx)->/DLIER.*/IER \|= tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	714	}
lynxeyed_atsu	0:e8bfffbb3ab6	715	else
lynxeyed_atsu	0:e8bfffbb3ab6	716	{
lynxeyed_atsu	0:e8bfffbb3ab6	717	UARTx->/DLIER./IER \|= tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	718	}
lynxeyed_atsu	0:e8bfffbb3ab6	719	}
lynxeyed_atsu	0:e8bfffbb3ab6	720	else
lynxeyed_atsu	0:e8bfffbb3ab6	721	{
lynxeyed_atsu	0:e8bfffbb3ab6	722	if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	723	{
lynxeyed_atsu	0:e8bfffbb3ab6	724	((LPC_UART1_TypeDef )UARTx)->/DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	725	}
lynxeyed_atsu	0:e8bfffbb3ab6	726	else
lynxeyed_atsu	0:e8bfffbb3ab6	727	{
lynxeyed_atsu	0:e8bfffbb3ab6	728	UARTx->/DLIER./IER &= (~tmp) & UART_IER_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	729	}
lynxeyed_atsu	0:e8bfffbb3ab6	730	}
lynxeyed_atsu	0:e8bfffbb3ab6	731	}
lynxeyed_atsu	0:e8bfffbb3ab6	732
lynxeyed_atsu	0:e8bfffbb3ab6	733
lynxeyed_atsu	0:e8bfffbb3ab6	734	/******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	735	* @brief Get current value of Line Status register in UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	736	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	737	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	738	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	739	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	740	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	741	* @return Current value of Line Status register in UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	742	* Note: The return value of this function must be ANDed with each member in
lynxeyed_atsu	0:e8bfffbb3ab6	743	* UART_LS_Type enumeration to determine current flag status
lynxeyed_atsu	0:e8bfffbb3ab6	744	* corresponding to each Line status type. Because some flags in
lynxeyed_atsu	0:e8bfffbb3ab6	745	* Line Status register will be cleared after reading, the next reading
lynxeyed_atsu	0:e8bfffbb3ab6	746	* Line Status register could not be correct. So this function used to
lynxeyed_atsu	0:e8bfffbb3ab6	747	* read Line status register in one time only, then the return value
lynxeyed_atsu	0:e8bfffbb3ab6	748	* used to check all flags.
lynxeyed_atsu	0:e8bfffbb3ab6	749	*********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	750	uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	751	{
lynxeyed_atsu	0:e8bfffbb3ab6	752	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	753
lynxeyed_atsu	0:e8bfffbb3ab6	754	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	755	{
lynxeyed_atsu	0:e8bfffbb3ab6	756	return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
lynxeyed_atsu	0:e8bfffbb3ab6	757	}
lynxeyed_atsu	0:e8bfffbb3ab6	758	else
lynxeyed_atsu	0:e8bfffbb3ab6	759	{
lynxeyed_atsu	0:e8bfffbb3ab6	760	return ((UARTx->LSR) & UART_LSR_BITMASK);
lynxeyed_atsu	0:e8bfffbb3ab6	761	}
lynxeyed_atsu	0:e8bfffbb3ab6	762	}
lynxeyed_atsu	0:e8bfffbb3ab6	763
lynxeyed_atsu	0:e8bfffbb3ab6	764	/******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	765	* @brief Get Interrupt Identification value
lynxeyed_atsu	0:e8bfffbb3ab6	766	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	767	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	768	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	769	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	770	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	771	* @return Current value of UART UIIR register in UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	772	*********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	773	uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	774	{
lynxeyed_atsu	0:e8bfffbb3ab6	775	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	776	return (UARTx->IIR & 0x03CF);
lynxeyed_atsu	0:e8bfffbb3ab6	777	}
lynxeyed_atsu	0:e8bfffbb3ab6	778
lynxeyed_atsu	0:e8bfffbb3ab6	779	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	780	* @brief Check whether if UART is busy or not
lynxeyed_atsu	0:e8bfffbb3ab6	781	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	782	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	783	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	784	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	785	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	786	* @return RESET if UART is not busy, otherwise return SET.
lynxeyed_atsu	0:e8bfffbb3ab6	787	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	788	FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	789	{
lynxeyed_atsu	0:e8bfffbb3ab6	790	if (UARTx->LSR & UART_LSR_TEMT){
lynxeyed_atsu	0:e8bfffbb3ab6	791	return RESET;
lynxeyed_atsu	0:e8bfffbb3ab6	792	} else {
lynxeyed_atsu	0:e8bfffbb3ab6	793	return SET;
lynxeyed_atsu	0:e8bfffbb3ab6	794	}
lynxeyed_atsu	0:e8bfffbb3ab6	795	}
lynxeyed_atsu	0:e8bfffbb3ab6	796
lynxeyed_atsu	0:e8bfffbb3ab6	797
lynxeyed_atsu	0:e8bfffbb3ab6	798	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	799	* @brief Configure FIFO function on selected UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	800	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	801	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	802	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	803	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	804	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	805	* @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
lynxeyed_atsu	0:e8bfffbb3ab6	806	* contains specified information about FIFO configuration
lynxeyed_atsu	0:e8bfffbb3ab6	807	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	808	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	809	void UART_FIFOConfig(LPC_UART_TypeDef UARTx, UART_FIFO_CFG_Type FIFOCfg)
lynxeyed_atsu	0:e8bfffbb3ab6	810	{
lynxeyed_atsu	0:e8bfffbb3ab6	811	uint8_t tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	812
lynxeyed_atsu	0:e8bfffbb3ab6	813	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	814	CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));
lynxeyed_atsu	0:e8bfffbb3ab6	815	CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));
lynxeyed_atsu	0:e8bfffbb3ab6	816	CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));
lynxeyed_atsu	0:e8bfffbb3ab6	817	CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));
lynxeyed_atsu	0:e8bfffbb3ab6	818
lynxeyed_atsu	0:e8bfffbb3ab6	819	tmp \|= UART_FCR_FIFO_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	820	switch (FIFOCfg->FIFO_Level){
lynxeyed_atsu	0:e8bfffbb3ab6	821	case UART_FIFO_TRGLEV0:
lynxeyed_atsu	0:e8bfffbb3ab6	822	tmp \|= UART_FCR_TRG_LEV0;
lynxeyed_atsu	0:e8bfffbb3ab6	823	break;
lynxeyed_atsu	0:e8bfffbb3ab6	824	case UART_FIFO_TRGLEV1:
lynxeyed_atsu	0:e8bfffbb3ab6	825	tmp \|= UART_FCR_TRG_LEV1;
lynxeyed_atsu	0:e8bfffbb3ab6	826	break;
lynxeyed_atsu	0:e8bfffbb3ab6	827	case UART_FIFO_TRGLEV2:
lynxeyed_atsu	0:e8bfffbb3ab6	828	tmp \|= UART_FCR_TRG_LEV2;
lynxeyed_atsu	0:e8bfffbb3ab6	829	break;
lynxeyed_atsu	0:e8bfffbb3ab6	830	case UART_FIFO_TRGLEV3:
lynxeyed_atsu	0:e8bfffbb3ab6	831	default:
lynxeyed_atsu	0:e8bfffbb3ab6	832	tmp \|= UART_FCR_TRG_LEV3;
lynxeyed_atsu	0:e8bfffbb3ab6	833	break;
lynxeyed_atsu	0:e8bfffbb3ab6	834	}
lynxeyed_atsu	0:e8bfffbb3ab6	835
lynxeyed_atsu	0:e8bfffbb3ab6	836	if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	837	{
lynxeyed_atsu	0:e8bfffbb3ab6	838	tmp \|= UART_FCR_TX_RS;
lynxeyed_atsu	0:e8bfffbb3ab6	839	}
lynxeyed_atsu	0:e8bfffbb3ab6	840	if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	841	{
lynxeyed_atsu	0:e8bfffbb3ab6	842	tmp \|= UART_FCR_RX_RS;
lynxeyed_atsu	0:e8bfffbb3ab6	843	}
lynxeyed_atsu	0:e8bfffbb3ab6	844	if (FIFOCfg->FIFO_DMAMode == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	845	{
lynxeyed_atsu	0:e8bfffbb3ab6	846	tmp \|= UART_FCR_DMAMODE_SEL;
lynxeyed_atsu	0:e8bfffbb3ab6	847	}
lynxeyed_atsu	0:e8bfffbb3ab6	848
lynxeyed_atsu	0:e8bfffbb3ab6	849
lynxeyed_atsu	0:e8bfffbb3ab6	850	//write to FIFO control register
lynxeyed_atsu	0:e8bfffbb3ab6	851	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	852	{
lynxeyed_atsu	0:e8bfffbb3ab6	853	((LPC_UART1_TypeDef )UARTx)->/IIFCR.*/FCR = tmp & UART_FCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	854	}
lynxeyed_atsu	0:e8bfffbb3ab6	855	else
lynxeyed_atsu	0:e8bfffbb3ab6	856	{
lynxeyed_atsu	0:e8bfffbb3ab6	857	UARTx->/IIFCR./FCR = tmp & UART_FCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	858	}
lynxeyed_atsu	0:e8bfffbb3ab6	859	}
lynxeyed_atsu	0:e8bfffbb3ab6	860
lynxeyed_atsu	0:e8bfffbb3ab6	861	/***************************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	862	* @brief Fills each UART_FIFOInitStruct member with its default value:
lynxeyed_atsu	0:e8bfffbb3ab6	863	* - FIFO_DMAMode = DISABLE
lynxeyed_atsu	0:e8bfffbb3ab6	864	* - FIFO_Level = UART_FIFO_TRGLEV0
lynxeyed_atsu	0:e8bfffbb3ab6	865	* - FIFO_ResetRxBuf = ENABLE
lynxeyed_atsu	0:e8bfffbb3ab6	866	* - FIFO_ResetTxBuf = ENABLE
lynxeyed_atsu	0:e8bfffbb3ab6	867	* - FIFO_State = ENABLE
lynxeyed_atsu	0:e8bfffbb3ab6	868
lynxeyed_atsu	0:e8bfffbb3ab6	869	* @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
lynxeyed_atsu	0:e8bfffbb3ab6	870	* which will be initialized.
lynxeyed_atsu	0:e8bfffbb3ab6	871	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	872	*******************************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	873	void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
lynxeyed_atsu	0:e8bfffbb3ab6	874	{
lynxeyed_atsu	0:e8bfffbb3ab6	875	UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
lynxeyed_atsu	0:e8bfffbb3ab6	876	UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
lynxeyed_atsu	0:e8bfffbb3ab6	877	UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
lynxeyed_atsu	0:e8bfffbb3ab6	878	UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
lynxeyed_atsu	0:e8bfffbb3ab6	879	}
lynxeyed_atsu	0:e8bfffbb3ab6	880
lynxeyed_atsu	0:e8bfffbb3ab6	881
lynxeyed_atsu	0:e8bfffbb3ab6	882	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	883	* @brief Start/Stop Auto Baudrate activity
lynxeyed_atsu	0:e8bfffbb3ab6	884	* @param[in] UARTx UART peripheral selected, should be
lynxeyed_atsu	0:e8bfffbb3ab6	885	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	886	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	887	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	888	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	889	* @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
lynxeyed_atsu	0:e8bfffbb3ab6	890	* contains specified information about UART
lynxeyed_atsu	0:e8bfffbb3ab6	891	* auto baudrate configuration
lynxeyed_atsu	0:e8bfffbb3ab6	892	* @param[in] NewState New State of Auto baudrate activity, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	893	* - ENABLE: Start this activity
lynxeyed_atsu	0:e8bfffbb3ab6	894	* - DISABLE: Stop this activity
lynxeyed_atsu	0:e8bfffbb3ab6	895	* Note: Auto-baudrate mode enable bit will be cleared once this mode
lynxeyed_atsu	0:e8bfffbb3ab6	896	* completed.
lynxeyed_atsu	0:e8bfffbb3ab6	897	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	898	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	899	void UART_ABCmd(LPC_UART_TypeDef UARTx, UART_AB_CFG_Type ABConfigStruct, \
lynxeyed_atsu	0:e8bfffbb3ab6	900	FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	901	{
lynxeyed_atsu	0:e8bfffbb3ab6	902	uint32_t tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	903
lynxeyed_atsu	0:e8bfffbb3ab6	904	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	905	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	906
lynxeyed_atsu	0:e8bfffbb3ab6	907	tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	908	if (NewState == ENABLE) {
lynxeyed_atsu	0:e8bfffbb3ab6	909	if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){
lynxeyed_atsu	0:e8bfffbb3ab6	910	tmp \|= UART_ACR_MODE;
lynxeyed_atsu	0:e8bfffbb3ab6	911	}
lynxeyed_atsu	0:e8bfffbb3ab6	912	if (ABConfigStruct->AutoRestart == ENABLE){
lynxeyed_atsu	0:e8bfffbb3ab6	913	tmp \|= UART_ACR_AUTO_RESTART;
lynxeyed_atsu	0:e8bfffbb3ab6	914	}
lynxeyed_atsu	0:e8bfffbb3ab6	915	}
lynxeyed_atsu	0:e8bfffbb3ab6	916
lynxeyed_atsu	0:e8bfffbb3ab6	917	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	918	{
lynxeyed_atsu	0:e8bfffbb3ab6	919	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	920	{
lynxeyed_atsu	0:e8bfffbb3ab6	921	// Clear DLL and DLM value
lynxeyed_atsu	0:e8bfffbb3ab6	922	((LPC_UART1_TypeDef *)UARTx)->LCR \|= UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	923	((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	924	((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	925	((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	926	// FDR value must be reset to default value
lynxeyed_atsu	0:e8bfffbb3ab6	927	((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
lynxeyed_atsu	0:e8bfffbb3ab6	928	((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START \| tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	929	}
lynxeyed_atsu	0:e8bfffbb3ab6	930	else
lynxeyed_atsu	0:e8bfffbb3ab6	931	{
lynxeyed_atsu	0:e8bfffbb3ab6	932	((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	933	}
lynxeyed_atsu	0:e8bfffbb3ab6	934	}
lynxeyed_atsu	0:e8bfffbb3ab6	935	else
lynxeyed_atsu	0:e8bfffbb3ab6	936	{
lynxeyed_atsu	0:e8bfffbb3ab6	937	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	938	{
lynxeyed_atsu	0:e8bfffbb3ab6	939	// Clear DLL and DLM value
lynxeyed_atsu	0:e8bfffbb3ab6	940	UARTx->LCR \|= UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	941	UARTx->DLL = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	942	UARTx->DLM = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	943	UARTx->LCR &= ~UART_LCR_DLAB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	944	// FDR value must be reset to default value
lynxeyed_atsu	0:e8bfffbb3ab6	945	UARTx->FDR = 0x10;
lynxeyed_atsu	0:e8bfffbb3ab6	946	UARTx->ACR = UART_ACR_START \| tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	947	}
lynxeyed_atsu	0:e8bfffbb3ab6	948	else
lynxeyed_atsu	0:e8bfffbb3ab6	949	{
lynxeyed_atsu	0:e8bfffbb3ab6	950	UARTx->ACR = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	951	}
lynxeyed_atsu	0:e8bfffbb3ab6	952	}
lynxeyed_atsu	0:e8bfffbb3ab6	953	}
lynxeyed_atsu	0:e8bfffbb3ab6	954
lynxeyed_atsu	0:e8bfffbb3ab6	955	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	956	* @brief Clear Autobaud Interrupt Pending
lynxeyed_atsu	0:e8bfffbb3ab6	957	* @param[in] UARTx UART peripheral selected, should be
lynxeyed_atsu	0:e8bfffbb3ab6	958	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	959	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	960	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	961	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	962	* @param[in] ABIntType type of auto-baud interrupt, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	963	* - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	964	* - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
lynxeyed_atsu	0:e8bfffbb3ab6	965	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	966	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	967	void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
lynxeyed_atsu	0:e8bfffbb3ab6	968	{
lynxeyed_atsu	0:e8bfffbb3ab6	969	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	970	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	971	{
lynxeyed_atsu	0:e8bfffbb3ab6	972	UARTx->ACR \|= ABIntType;
lynxeyed_atsu	0:e8bfffbb3ab6	973	}
lynxeyed_atsu	0:e8bfffbb3ab6	974	else
lynxeyed_atsu	0:e8bfffbb3ab6	975	UARTx->ACR \|= ABIntType;
lynxeyed_atsu	0:e8bfffbb3ab6	976	}
lynxeyed_atsu	0:e8bfffbb3ab6	977
lynxeyed_atsu	0:e8bfffbb3ab6	978	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	979	* @brief Enable/Disable transmission on UART TxD pin
lynxeyed_atsu	0:e8bfffbb3ab6	980	* @param[in] UARTx UART peripheral selected, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	981	* - LPC_UART0: UART0 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	982	* - LPC_UART1: UART1 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	983	* - LPC_UART2: UART2 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	984	* - LPC_UART3: UART3 peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	985	* @param[in] NewState New State of Tx transmission function, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	986	* - ENABLE: Enable this function
lynxeyed_atsu	0:e8bfffbb3ab6	987	- DISABLE: Disable this function
lynxeyed_atsu	0:e8bfffbb3ab6	988	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	989	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	990	void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	991	{
lynxeyed_atsu	0:e8bfffbb3ab6	992	CHECK_PARAM(PARAM_UARTx(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	993	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	994
lynxeyed_atsu	0:e8bfffbb3ab6	995	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	996	{
lynxeyed_atsu	0:e8bfffbb3ab6	997	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	998	{
lynxeyed_atsu	0:e8bfffbb3ab6	999	((LPC_UART1_TypeDef *)UARTx)->TER \|= UART_TER_TXEN;
lynxeyed_atsu	0:e8bfffbb3ab6	1000	}
lynxeyed_atsu	0:e8bfffbb3ab6	1001	else
lynxeyed_atsu	0:e8bfffbb3ab6	1002	{
lynxeyed_atsu	0:e8bfffbb3ab6	1003	UARTx->TER \|= UART_TER_TXEN;
lynxeyed_atsu	0:e8bfffbb3ab6	1004	}
lynxeyed_atsu	0:e8bfffbb3ab6	1005	}
lynxeyed_atsu	0:e8bfffbb3ab6	1006	else
lynxeyed_atsu	0:e8bfffbb3ab6	1007	{
lynxeyed_atsu	0:e8bfffbb3ab6	1008	if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
lynxeyed_atsu	0:e8bfffbb3ab6	1009	{
lynxeyed_atsu	0:e8bfffbb3ab6	1010	((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1011	}
lynxeyed_atsu	0:e8bfffbb3ab6	1012	else
lynxeyed_atsu	0:e8bfffbb3ab6	1013	{
lynxeyed_atsu	0:e8bfffbb3ab6	1014	UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1015	}
lynxeyed_atsu	0:e8bfffbb3ab6	1016	}
lynxeyed_atsu	0:e8bfffbb3ab6	1017	}
lynxeyed_atsu	0:e8bfffbb3ab6	1018
lynxeyed_atsu	0:e8bfffbb3ab6	1019	/* UART IrDA functions ---------------------------------------------------*/
lynxeyed_atsu	0:e8bfffbb3ab6	1020
lynxeyed_atsu	0:e8bfffbb3ab6	1021	#ifdef _UART3
lynxeyed_atsu	0:e8bfffbb3ab6	1022
lynxeyed_atsu	0:e8bfffbb3ab6	1023	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1024	* @brief Enable or disable inverting serial input function of IrDA
lynxeyed_atsu	0:e8bfffbb3ab6	1025	* on UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	1026	* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1027	* @param[in] NewState New state of inverting serial input, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1028	* - ENABLE: Enable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1029	* - DISABLE: Disable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1030	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	1031	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1032	void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	1033	{
lynxeyed_atsu	0:e8bfffbb3ab6	1034	CHECK_PARAM(PARAM_UART_IrDA(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1035	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	1036
lynxeyed_atsu	0:e8bfffbb3ab6	1037	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1038	{
lynxeyed_atsu	0:e8bfffbb3ab6	1039	UARTx->ICR \|= UART_ICR_IRDAINV;
lynxeyed_atsu	0:e8bfffbb3ab6	1040	}
lynxeyed_atsu	0:e8bfffbb3ab6	1041	else if (NewState == DISABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1042	{
lynxeyed_atsu	0:e8bfffbb3ab6	1043	UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1044	}
lynxeyed_atsu	0:e8bfffbb3ab6	1045	}
lynxeyed_atsu	0:e8bfffbb3ab6	1046
lynxeyed_atsu	0:e8bfffbb3ab6	1047
lynxeyed_atsu	0:e8bfffbb3ab6	1048	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1049	* @brief Enable or disable IrDA function on UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	1050	* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1051	* @param[in] NewState New state of IrDA function, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1052	* - ENABLE: Enable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1053	* - DISABLE: Disable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1054	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	1055	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1056	void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	1057	{
lynxeyed_atsu	0:e8bfffbb3ab6	1058	CHECK_PARAM(PARAM_UART_IrDA(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1059	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	1060
lynxeyed_atsu	0:e8bfffbb3ab6	1061	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1062	{
lynxeyed_atsu	0:e8bfffbb3ab6	1063	UARTx->ICR \|= UART_ICR_IRDAEN;
lynxeyed_atsu	0:e8bfffbb3ab6	1064	}
lynxeyed_atsu	0:e8bfffbb3ab6	1065	else
lynxeyed_atsu	0:e8bfffbb3ab6	1066	{
lynxeyed_atsu	0:e8bfffbb3ab6	1067	UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1068	}
lynxeyed_atsu	0:e8bfffbb3ab6	1069	}
lynxeyed_atsu	0:e8bfffbb3ab6	1070
lynxeyed_atsu	0:e8bfffbb3ab6	1071
lynxeyed_atsu	0:e8bfffbb3ab6	1072	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1073	* @brief Configure Pulse divider for IrDA function on UART peripheral.
lynxeyed_atsu	0:e8bfffbb3ab6	1074	* @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1075	* @param[in] PulseDiv Pulse Divider value from Peripheral clock,
lynxeyed_atsu	0:e8bfffbb3ab6	1076	* should be one of the following:
lynxeyed_atsu	0:e8bfffbb3ab6	1077	- UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1078	- UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1079	- UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1080	- UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1081	- UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1082	- UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1083	- UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1084	- UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
lynxeyed_atsu	0:e8bfffbb3ab6	1085
lynxeyed_atsu	0:e8bfffbb3ab6	1086	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	1087	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1088	void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
lynxeyed_atsu	0:e8bfffbb3ab6	1089	{
lynxeyed_atsu	0:e8bfffbb3ab6	1090	uint32_t tmp, tmp1;
lynxeyed_atsu	0:e8bfffbb3ab6	1091	CHECK_PARAM(PARAM_UART_IrDA(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1092	CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));
lynxeyed_atsu	0:e8bfffbb3ab6	1093
lynxeyed_atsu	0:e8bfffbb3ab6	1094	tmp1 = UART_ICR_PULSEDIV(PulseDiv);
lynxeyed_atsu	0:e8bfffbb3ab6	1095	tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));
lynxeyed_atsu	0:e8bfffbb3ab6	1096	tmp \|= tmp1 \| UART_ICR_FIXPULSE_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1097	UARTx->ICR = tmp & UART_ICR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1098	}
lynxeyed_atsu	0:e8bfffbb3ab6	1099
lynxeyed_atsu	0:e8bfffbb3ab6	1100	#endif
lynxeyed_atsu	0:e8bfffbb3ab6	1101
lynxeyed_atsu	0:e8bfffbb3ab6	1102
lynxeyed_atsu	0:e8bfffbb3ab6	1103	/* UART1 FullModem function ---------------------------------------------*/
lynxeyed_atsu	0:e8bfffbb3ab6	1104
lynxeyed_atsu	0:e8bfffbb3ab6	1105	#ifdef _UART1
lynxeyed_atsu	0:e8bfffbb3ab6	1106
lynxeyed_atsu	0:e8bfffbb3ab6	1107	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1108	* @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
lynxeyed_atsu	0:e8bfffbb3ab6	1109	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1110	* @param[in] Pin Pin that NewState will be applied to, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1111	* - UART1_MODEM_PIN_DTR: DTR pin.
lynxeyed_atsu	0:e8bfffbb3ab6	1112	* - UART1_MODEM_PIN_RTS: RTS pin.
lynxeyed_atsu	0:e8bfffbb3ab6	1113	* @param[in] NewState New State of DTR/RTS pin, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1114	* - INACTIVE: Force the pin to inactive signal.
lynxeyed_atsu	0:e8bfffbb3ab6	1115	- ACTIVE: Force the pin to active signal.
lynxeyed_atsu	0:e8bfffbb3ab6	1116	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	1117	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1118	void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx, UART_MODEM_PIN_Type Pin, \
lynxeyed_atsu	0:e8bfffbb3ab6	1119	UART1_SignalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	1120	{
lynxeyed_atsu	0:e8bfffbb3ab6	1121	uint8_t tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	1122
lynxeyed_atsu	0:e8bfffbb3ab6	1123	CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1124	CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));
lynxeyed_atsu	0:e8bfffbb3ab6	1125	CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	1126
lynxeyed_atsu	0:e8bfffbb3ab6	1127	switch (Pin){
lynxeyed_atsu	0:e8bfffbb3ab6	1128	case UART1_MODEM_PIN_DTR:
lynxeyed_atsu	0:e8bfffbb3ab6	1129	tmp = UART1_MCR_DTR_CTRL;
lynxeyed_atsu	0:e8bfffbb3ab6	1130	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1131	case UART1_MODEM_PIN_RTS:
lynxeyed_atsu	0:e8bfffbb3ab6	1132	tmp = UART1_MCR_RTS_CTRL;
lynxeyed_atsu	0:e8bfffbb3ab6	1133	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1134	default:
lynxeyed_atsu	0:e8bfffbb3ab6	1135	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1136	}
lynxeyed_atsu	0:e8bfffbb3ab6	1137
lynxeyed_atsu	0:e8bfffbb3ab6	1138	if (NewState == ACTIVE){
lynxeyed_atsu	0:e8bfffbb3ab6	1139	UARTx->MCR \|= tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	1140	} else {
lynxeyed_atsu	0:e8bfffbb3ab6	1141	UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1142	}
lynxeyed_atsu	0:e8bfffbb3ab6	1143	}
lynxeyed_atsu	0:e8bfffbb3ab6	1144
lynxeyed_atsu	0:e8bfffbb3ab6	1145
lynxeyed_atsu	0:e8bfffbb3ab6	1146	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1147	* @brief Configure Full Modem mode for UART peripheral
lynxeyed_atsu	0:e8bfffbb3ab6	1148	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1149	* @param[in] Mode Full Modem mode, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1150	* - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1151	* - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1152	* - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1153	* @param[in] NewState New State of this mode, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1154	* - ENABLE: Enable this mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1155	- DISABLE: Disable this mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1156	* @return none
lynxeyed_atsu	0:e8bfffbb3ab6	1157	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1158	void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode, \
lynxeyed_atsu	0:e8bfffbb3ab6	1159	FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	1160	{
lynxeyed_atsu	0:e8bfffbb3ab6	1161	uint8_t tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	1162
lynxeyed_atsu	0:e8bfffbb3ab6	1163	CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1164	CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));
lynxeyed_atsu	0:e8bfffbb3ab6	1165	CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
lynxeyed_atsu	0:e8bfffbb3ab6	1166
lynxeyed_atsu	0:e8bfffbb3ab6	1167	switch(Mode){
lynxeyed_atsu	0:e8bfffbb3ab6	1168	case UART1_MODEM_MODE_LOOPBACK:
lynxeyed_atsu	0:e8bfffbb3ab6	1169	tmp = UART1_MCR_LOOPB_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1170	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1171	case UART1_MODEM_MODE_AUTO_RTS:
lynxeyed_atsu	0:e8bfffbb3ab6	1172	tmp = UART1_MCR_AUTO_RTS_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1173	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1174	case UART1_MODEM_MODE_AUTO_CTS:
lynxeyed_atsu	0:e8bfffbb3ab6	1175	tmp = UART1_MCR_AUTO_CTS_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1176	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1177	default:
lynxeyed_atsu	0:e8bfffbb3ab6	1178	break;
lynxeyed_atsu	0:e8bfffbb3ab6	1179	}
lynxeyed_atsu	0:e8bfffbb3ab6	1180
lynxeyed_atsu	0:e8bfffbb3ab6	1181	if (NewState == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1182	{
lynxeyed_atsu	0:e8bfffbb3ab6	1183	UARTx->MCR \|= tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	1184	}
lynxeyed_atsu	0:e8bfffbb3ab6	1185	else
lynxeyed_atsu	0:e8bfffbb3ab6	1186	{
lynxeyed_atsu	0:e8bfffbb3ab6	1187	UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1188	}
lynxeyed_atsu	0:e8bfffbb3ab6	1189	}
lynxeyed_atsu	0:e8bfffbb3ab6	1190
lynxeyed_atsu	0:e8bfffbb3ab6	1191
lynxeyed_atsu	0:e8bfffbb3ab6	1192	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1193	* @brief Get current status of modem status register
lynxeyed_atsu	0:e8bfffbb3ab6	1194	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1195	* @return Current value of modem status register
lynxeyed_atsu	0:e8bfffbb3ab6	1196	* Note: The return value of this function must be ANDed with each member
lynxeyed_atsu	0:e8bfffbb3ab6	1197	* UART_MODEM_STAT_type enumeration to determine current flag status
lynxeyed_atsu	0:e8bfffbb3ab6	1198	* corresponding to each modem flag status. Because some flags in
lynxeyed_atsu	0:e8bfffbb3ab6	1199	* modem status register will be cleared after reading, the next reading
lynxeyed_atsu	0:e8bfffbb3ab6	1200	* modem register could not be correct. So this function used to
lynxeyed_atsu	0:e8bfffbb3ab6	1201	* read modem status register in one time only, then the return value
lynxeyed_atsu	0:e8bfffbb3ab6	1202	* used to check all flags.
lynxeyed_atsu	0:e8bfffbb3ab6	1203	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1204	uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
lynxeyed_atsu	0:e8bfffbb3ab6	1205	{
lynxeyed_atsu	0:e8bfffbb3ab6	1206	CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1207	return ((UARTx->MSR) & UART1_MSR_BITMASK);
lynxeyed_atsu	0:e8bfffbb3ab6	1208	}
lynxeyed_atsu	0:e8bfffbb3ab6	1209
lynxeyed_atsu	0:e8bfffbb3ab6	1210
lynxeyed_atsu	0:e8bfffbb3ab6	1211	/* UART RS485 functions --------------------------------------------------------------*/
lynxeyed_atsu	0:e8bfffbb3ab6	1212
lynxeyed_atsu	0:e8bfffbb3ab6	1213	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1214	* @brief Configure UART peripheral in RS485 mode according to the specified
lynxeyed_atsu	0:e8bfffbb3ab6	1215	* parameters in the RS485ConfigStruct.
lynxeyed_atsu	0:e8bfffbb3ab6	1216	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1217	* @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
lynxeyed_atsu	0:e8bfffbb3ab6	1218	* that contains the configuration information for specified UART
lynxeyed_atsu	0:e8bfffbb3ab6	1219	* in RS485 mode.
lynxeyed_atsu	0:e8bfffbb3ab6	1220	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	1221	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1222	void UART_RS485Config(LPC_UART1_TypeDef UARTx, UART1_RS485_CTRLCFG_Type RS485ConfigStruct)
lynxeyed_atsu	0:e8bfffbb3ab6	1223	{
lynxeyed_atsu	0:e8bfffbb3ab6	1224	uint32_t tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	1225
lynxeyed_atsu	0:e8bfffbb3ab6	1226	CHECK_PARAM(PARAM_UART1_MODEM(UARTx));
lynxeyed_atsu	0:e8bfffbb3ab6	1227	CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));
lynxeyed_atsu	0:e8bfffbb3ab6	1228	CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));
lynxeyed_atsu	0:e8bfffbb3ab6	1229	CHECK_PARAM(PARAM_UART1_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));
lynxeyed_atsu	0:e8bfffbb3ab6	1230	CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));
lynxeyed_atsu	0:e8bfffbb3ab6	1231	CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));
lynxeyed_atsu	0:e8bfffbb3ab6	1232	CHECK_PARAM(PARAM_UART1_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));
lynxeyed_atsu	0:e8bfffbb3ab6	1233	CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));
lynxeyed_atsu	0:e8bfffbb3ab6	1234	CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));
lynxeyed_atsu	0:e8bfffbb3ab6	1235
lynxeyed_atsu	0:e8bfffbb3ab6	1236	tmp = 0;
lynxeyed_atsu	0:e8bfffbb3ab6	1237	// If Auto Direction Control is enabled - This function is used in Master mode
lynxeyed_atsu	0:e8bfffbb3ab6	1238	if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1239	{
lynxeyed_atsu	0:e8bfffbb3ab6	1240	tmp \|= UART1_RS485CTRL_DCTRL_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1241
lynxeyed_atsu	0:e8bfffbb3ab6	1242	// Set polar
lynxeyed_atsu	0:e8bfffbb3ab6	1243	if (RS485ConfigStruct->DirCtrlPol_Level == SET)
lynxeyed_atsu	0:e8bfffbb3ab6	1244	{
lynxeyed_atsu	0:e8bfffbb3ab6	1245	tmp \|= UART1_RS485CTRL_OINV_1;
lynxeyed_atsu	0:e8bfffbb3ab6	1246	}
lynxeyed_atsu	0:e8bfffbb3ab6	1247
lynxeyed_atsu	0:e8bfffbb3ab6	1248	// Set pin according to
lynxeyed_atsu	0:e8bfffbb3ab6	1249	if (RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
lynxeyed_atsu	0:e8bfffbb3ab6	1250	{
lynxeyed_atsu	0:e8bfffbb3ab6	1251	tmp \|= UART1_RS485CTRL_SEL_DTR;
lynxeyed_atsu	0:e8bfffbb3ab6	1252	}
lynxeyed_atsu	0:e8bfffbb3ab6	1253
lynxeyed_atsu	0:e8bfffbb3ab6	1254	// Fill delay time
lynxeyed_atsu	0:e8bfffbb3ab6	1255	UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1256	}
lynxeyed_atsu	0:e8bfffbb3ab6	1257
lynxeyed_atsu	0:e8bfffbb3ab6	1258	// MultiDrop mode is enable
lynxeyed_atsu	0:e8bfffbb3ab6	1259	if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1260	{
lynxeyed_atsu	0:e8bfffbb3ab6	1261	tmp \|= UART1_RS485CTRL_NMM_EN;
lynxeyed_atsu	0:e8bfffbb3ab6	1262	}
lynxeyed_atsu	0:e8bfffbb3ab6	1263
lynxeyed_atsu	0:e8bfffbb3ab6	1264	// Auto Address Detect function
lynxeyed_atsu	0:e8bfffbb3ab6	1265	if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1266	{
lynxeyed_atsu	0:e8bfffbb3ab6	1267	tmp \|= UART1_RS485CTRL_AADEN;
lynxeyed_atsu	0:e8bfffbb3ab6	1268	// Fill Match Address
lynxeyed_atsu	0:e8bfffbb3ab6	1269	UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1270	}
lynxeyed_atsu	0:e8bfffbb3ab6	1271
lynxeyed_atsu	0:e8bfffbb3ab6	1272
lynxeyed_atsu	0:e8bfffbb3ab6	1273	// Receiver is disable
lynxeyed_atsu	0:e8bfffbb3ab6	1274	if (RS485ConfigStruct->Rx_State == DISABLE)
lynxeyed_atsu	0:e8bfffbb3ab6	1275	{
lynxeyed_atsu	0:e8bfffbb3ab6	1276	tmp \|= UART1_RS485CTRL_RX_DIS;
lynxeyed_atsu	0:e8bfffbb3ab6	1277	}
lynxeyed_atsu	0:e8bfffbb3ab6	1278
lynxeyed_atsu	0:e8bfffbb3ab6	1279	// write back to RS485 control register
lynxeyed_atsu	0:e8bfffbb3ab6	1280	UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1281
lynxeyed_atsu	0:e8bfffbb3ab6	1282	// Enable Parity function and leave parity in stick '0' parity as default
lynxeyed_atsu	0:e8bfffbb3ab6	1283	UARTx->LCR \|= (UART_LCR_PARITY_F_0 \| UART_LCR_PARITY_EN);
lynxeyed_atsu	0:e8bfffbb3ab6	1284	}
lynxeyed_atsu	0:e8bfffbb3ab6	1285
lynxeyed_atsu	0:e8bfffbb3ab6	1286	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1287	* @brief Enable/Disable receiver in RS485 module in UART1
lynxeyed_atsu	0:e8bfffbb3ab6	1288	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1289	* @param[in] NewState New State of command, should be:
lynxeyed_atsu	0:e8bfffbb3ab6	1290	* - ENABLE: Enable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1291	* - DISABLE: Disable this function.
lynxeyed_atsu	0:e8bfffbb3ab6	1292	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	1293	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1294	void UART_RS485ReceiverCmd(LPC_UART1_TypeDef *UARTx, FunctionalState NewState)
lynxeyed_atsu	0:e8bfffbb3ab6	1295	{
lynxeyed_atsu	0:e8bfffbb3ab6	1296	if (NewState == ENABLE){
lynxeyed_atsu	0:e8bfffbb3ab6	1297	UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
lynxeyed_atsu	0:e8bfffbb3ab6	1298	} else {
lynxeyed_atsu	0:e8bfffbb3ab6	1299	UARTx->RS485CTRL \|= UART1_RS485CTRL_RX_DIS;
lynxeyed_atsu	0:e8bfffbb3ab6	1300	}
lynxeyed_atsu	0:e8bfffbb3ab6	1301	}
lynxeyed_atsu	0:e8bfffbb3ab6	1302
lynxeyed_atsu	0:e8bfffbb3ab6	1303	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1304	* @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
lynxeyed_atsu	0:e8bfffbb3ab6	1305	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1306	* @param[in] pDatFrm Pointer to data frame.
lynxeyed_atsu	0:e8bfffbb3ab6	1307	* @param[in] size Size of data.
lynxeyed_atsu	0:e8bfffbb3ab6	1308	* @param[in] ParityStick Parity Stick value, should be 0 or 1.
lynxeyed_atsu	0:e8bfffbb3ab6	1309	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	1310	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1311	uint32_t UART_RS485Send(LPC_UART1_TypeDef UARTx, uint8_t pDatFrm, \
lynxeyed_atsu	0:e8bfffbb3ab6	1312	uint32_t size, uint8_t ParityStick)
lynxeyed_atsu	0:e8bfffbb3ab6	1313	{
lynxeyed_atsu	0:e8bfffbb3ab6	1314	uint8_t tmp, save;
lynxeyed_atsu	0:e8bfffbb3ab6	1315	uint32_t cnt;
lynxeyed_atsu	0:e8bfffbb3ab6	1316
lynxeyed_atsu	0:e8bfffbb3ab6	1317	if (ParityStick){
lynxeyed_atsu	0:e8bfffbb3ab6	1318	save = tmp = UARTx->LCR & UART_LCR_BITMASK;
lynxeyed_atsu	0:e8bfffbb3ab6	1319	tmp &= ~(UART_LCR_PARITY_EVEN);
lynxeyed_atsu	0:e8bfffbb3ab6	1320	UARTx->LCR = tmp;
lynxeyed_atsu	0:e8bfffbb3ab6	1321	cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
lynxeyed_atsu	0:e8bfffbb3ab6	1322	while (!(UARTx->LSR & UART_LSR_TEMT));
lynxeyed_atsu	0:e8bfffbb3ab6	1323	UARTx->LCR = save;
lynxeyed_atsu	0:e8bfffbb3ab6	1324	} else {
lynxeyed_atsu	0:e8bfffbb3ab6	1325	cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
lynxeyed_atsu	0:e8bfffbb3ab6	1326	while (!(UARTx->LSR & UART_LSR_TEMT));
lynxeyed_atsu	0:e8bfffbb3ab6	1327	}
lynxeyed_atsu	0:e8bfffbb3ab6	1328	return cnt;
lynxeyed_atsu	0:e8bfffbb3ab6	1329	}
lynxeyed_atsu	0:e8bfffbb3ab6	1330
lynxeyed_atsu	0:e8bfffbb3ab6	1331	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1332	* @brief Send Slave address frames on RS485 bus.
lynxeyed_atsu	0:e8bfffbb3ab6	1333	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1334	* @param[in] SlvAddr Slave Address.
lynxeyed_atsu	0:e8bfffbb3ab6	1335	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	1336	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1337	void UART_RS485SendSlvAddr(LPC_UART1_TypeDef *UARTx, uint8_t SlvAddr)
lynxeyed_atsu	0:e8bfffbb3ab6	1338	{
lynxeyed_atsu	0:e8bfffbb3ab6	1339	UART_RS485Send(UARTx, &SlvAddr, 1, 1);
lynxeyed_atsu	0:e8bfffbb3ab6	1340	}
lynxeyed_atsu	0:e8bfffbb3ab6	1341
lynxeyed_atsu	0:e8bfffbb3ab6	1342	/*******************************************************************//
lynxeyed_atsu	0:e8bfffbb3ab6	1343	* @brief Send Data frames on RS485 bus.
lynxeyed_atsu	0:e8bfffbb3ab6	1344	* @param[in] UARTx LPC_UART1 (only)
lynxeyed_atsu	0:e8bfffbb3ab6	1345	* @param[in] pData Pointer to data to be sent.
lynxeyed_atsu	0:e8bfffbb3ab6	1346	* @param[in] size Size of data frame to be sent.
lynxeyed_atsu	0:e8bfffbb3ab6	1347	* @return None
lynxeyed_atsu	0:e8bfffbb3ab6	1348	**********************************************************************/
lynxeyed_atsu	0:e8bfffbb3ab6	1349	uint32_t UART_RS485SendData(LPC_UART1_TypeDef UARTx, uint8_t pData, uint32_t size)
lynxeyed_atsu	0:e8bfffbb3ab6	1350	{
lynxeyed_atsu	0:e8bfffbb3ab6	1351	return (UART_RS485Send(UARTx, pData, size, 0));
lynxeyed_atsu	0:e8bfffbb3ab6	1352	}
lynxeyed_atsu	0:e8bfffbb3ab6	1353
lynxeyed_atsu	0:e8bfffbb3ab6	1354	#endif /* _UART1 */
lynxeyed_atsu	0:e8bfffbb3ab6	1355
lynxeyed_atsu	0:e8bfffbb3ab6	1356	#endif /* _UART */
lynxeyed_atsu	0:e8bfffbb3ab6	1357
lynxeyed_atsu	0:e8bfffbb3ab6	1358	/**
lynxeyed_atsu	0:e8bfffbb3ab6	1359	* @}
lynxeyed_atsu	0:e8bfffbb3ab6	1360	*/
lynxeyed_atsu	0:e8bfffbb3ab6	1361
lynxeyed_atsu	0:e8bfffbb3ab6	1362	/**
lynxeyed_atsu	0:e8bfffbb3ab6	1363	* @}
lynxeyed_atsu	0:e8bfffbb3ab6	1364	*/
lynxeyed_atsu	0:e8bfffbb3ab6	1365	/* --------------------------------- End Of File ------------------------------ */
lynxeyed_atsu	0:e8bfffbb3ab6	1366

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	26 Feb 2011
Imports:	12
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	1

I2S_Example/lpc17xx_uart.c@0:e8bfffbb3ab6, 2011-02-26 (annotated)

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