long dao / mbed-src

Mbed for VNG board

Fork of mbed-src by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/gpio_irq_api.c@430:d406b7919023, 2014-12-09 (annotated)

Committer:
mbed_official
Date:
Tue Dec 09 14:30:09 2014 +0000
Revision:
430:d406b7919023
Parent:
427:8eeb5157dee4
Child:
437:0b72c0f86db6
Synchronized with git revision 0f2b2cdf092ac0325f6003d3e903308446f2da6f



Full URL: https://github.com/mbedmicro/mbed/commit/0f2b2cdf092ac0325f6003d3e903308446f2da6f/



Targets: RZ_A1H - Fix some bugs about I2C, SPI, Interruptin and add terminal definition of user button.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 409:a95c696104d3 1 /* mbed Microcontroller Library
mbed_official 409:a95c696104d3 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 409:a95c696104d3 3 *
mbed_official 409:a95c696104d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 409:a95c696104d3 5 * you may not use this file except in compliance with the License.
mbed_official 409:a95c696104d3 6 * You may obtain a copy of the License at
mbed_official 409:a95c696104d3 7 *
mbed_official 409:a95c696104d3 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 409:a95c696104d3 9 *
mbed_official 409:a95c696104d3 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 409:a95c696104d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 409:a95c696104d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 409:a95c696104d3 13 * See the License for the specific language governing permissions and
mbed_official 409:a95c696104d3 14 * limitations under the License.
mbed_official 409:a95c696104d3 15 */
mbed_official 409:a95c696104d3 16 #include <stddef.h>
mbed_official 409:a95c696104d3 17
mbed_official 409:a95c696104d3 18 #include "gpio_irq_api.h"
mbed_official 409:a95c696104d3 19 #include "intc_iodefine.h"
mbed_official 409:a95c696104d3 20 #include "pinmap.h"
mbed_official 409:a95c696104d3 21 #include "cmsis.h"
mbed_official 430:d406b7919023 22 #include "gpio_addrdefine.h"
mbed_official 409:a95c696104d3 23
mbed_official 409:a95c696104d3 24 #define CHANNEL_NUM 8
mbed_official 409:a95c696104d3 25
mbed_official 430:d406b7919023 26 static void gpio_irq0(void);
mbed_official 430:d406b7919023 27 static void gpio_irq1(void);
mbed_official 430:d406b7919023 28 static void gpio_irq2(void);
mbed_official 430:d406b7919023 29 static void gpio_irq3(void);
mbed_official 430:d406b7919023 30 static void gpio_irq4(void);
mbed_official 430:d406b7919023 31 static void gpio_irq5(void);
mbed_official 430:d406b7919023 32 static void gpio_irq6(void);
mbed_official 430:d406b7919023 33 static void gpio_irq7(void);
mbed_official 430:d406b7919023 34
mbed_official 430:d406b7919023 35 static gpio_irq_t *channel_obj[CHANNEL_NUM] = {NULL};
mbed_official 409:a95c696104d3 36 static gpio_irq_handler irq_handler;
mbed_official 409:a95c696104d3 37 static const int nIRQn_h = 32;
mbed_official 409:a95c696104d3 38 extern PinName gpio_multi_guard;
mbed_official 409:a95c696104d3 39
mbed_official 409:a95c696104d3 40 enum {
mbed_official 409:a95c696104d3 41 IRQ0,IRQ1,
mbed_official 409:a95c696104d3 42 IRQ2,IRQ3,
mbed_official 409:a95c696104d3 43 IRQ4,IRQ5,
mbed_official 409:a95c696104d3 44 IRQ6,IRQ7,
mbed_official 409:a95c696104d3 45
mbed_official 409:a95c696104d3 46 } IRQNo;
mbed_official 409:a95c696104d3 47
mbed_official 430:d406b7919023 48 static const IRQHandler irq_tbl[CHANNEL_NUM] = {
mbed_official 430:d406b7919023 49 &gpio_irq0,
mbed_official 430:d406b7919023 50 &gpio_irq1,
mbed_official 430:d406b7919023 51 &gpio_irq2,
mbed_official 430:d406b7919023 52 &gpio_irq3,
mbed_official 430:d406b7919023 53 &gpio_irq4,
mbed_official 430:d406b7919023 54 &gpio_irq5,
mbed_official 430:d406b7919023 55 &gpio_irq6,
mbed_official 430:d406b7919023 56 &gpio_irq7,
mbed_official 430:d406b7919023 57 };
mbed_official 430:d406b7919023 58
mbed_official 409:a95c696104d3 59 static const PinMap PinMap_IRQ[] = {
mbed_official 409:a95c696104d3 60 {P1_0, IRQ0, 4}, {P1_1, IRQ1, 4}, {P1_2, IRQ2, 4},
mbed_official 409:a95c696104d3 61 {P1_3, IRQ3, 4}, {P1_5, IRQ5, 4}, {P1_7, IRQ7, 4},
mbed_official 409:a95c696104d3 62 {P1_8, IRQ2, 3}, {P1_9, IRQ3, 3}, {P1_10, IRQ4, 3},
mbed_official 409:a95c696104d3 63 {P1_11, IRQ5, 3}, // 9
mbed_official 409:a95c696104d3 64 {P2_0, IRQ5, 6}, {P2_13, IRQ7, 8}, {P2_14, IRQ0, 8},
mbed_official 409:a95c696104d3 65 {P2_15, IRQ1, 8}, // 13
mbed_official 409:a95c696104d3 66 {P3_0, IRQ2, 3}, {P3_3, IRQ4, 3}, // 15
mbed_official 409:a95c696104d3 67 {P4_8, IRQ0, 8}, {P4_9, IRQ1, 8}, {P4_10, IRQ2, 8},
mbed_official 409:a95c696104d3 68 {P4_11, IRQ3, 8}, {P4_12, IRQ4, 8}, {P4_13, IRQ5, 8},
mbed_official 409:a95c696104d3 69 {P4_14, IRQ6, 8}, {P4_15, IRQ7, 8}, // 23
mbed_official 409:a95c696104d3 70 {P5_6, IRQ6, 6}, {P5_8, IRQ0, 2}, {P5_9, IRQ2, 4}, // 26
mbed_official 409:a95c696104d3 71 {P6_0, IRQ5, 6}, {P6_1, IRQ4, 4}, {P6_2, IRQ7, 4},
mbed_official 409:a95c696104d3 72 {P6_3, IRQ2, 4}, {P6_4, IRQ3, 4}, {P6_8, IRQ0, 8},
mbed_official 409:a95c696104d3 73 {P6_9, IRQ1, 8}, {P6_10, IRQ2, 8}, {P6_11, IRQ3, 8},
mbed_official 409:a95c696104d3 74 {P6_12, IRQ4, 8}, {P6_13, IRQ5, 8}, {P6_14, IRQ6, 8},
mbed_official 409:a95c696104d3 75 {P6_15, IRQ7, 8}, // 39
mbed_official 409:a95c696104d3 76 {P7_8, IRQ1, 8}, {P7_9, IRQ0, 8}, {P7_10, IRQ2, 8},
mbed_official 409:a95c696104d3 77 {P7_11, IRQ3, 8}, {P7_12, IRQ4, 8}, {P7_13, IRQ5, 8},
mbed_official 409:a95c696104d3 78 {P7_14, IRQ6, 8}, // 46
mbed_official 409:a95c696104d3 79 {P8_2, IRQ0, 5}, {P8_3, IRQ1, 6}, {P8_7, IRQ5, 4},
mbed_official 409:a95c696104d3 80 {P9_1, IRQ0, 4}, // 50
mbed_official 409:a95c696104d3 81 {P11_12,IRQ3, 3}, {P11_15,IRQ1, 3}, // 52
mbed_official 409:a95c696104d3 82
mbed_official 409:a95c696104d3 83 {NC, NC, 0}
mbed_official 409:a95c696104d3 84 };
mbed_official 409:a95c696104d3 85
mbed_official 430:d406b7919023 86 static void handle_interrupt_in(int irq_num) {
mbed_official 430:d406b7919023 87 uint16_t irqs;
mbed_official 430:d406b7919023 88 uint16_t edge_req;
mbed_official 430:d406b7919023 89 gpio_irq_t *obj;
mbed_official 430:d406b7919023 90 gpio_irq_event irq_event;
mbed_official 409:a95c696104d3 91
mbed_official 409:a95c696104d3 92 irqs = INTCIRQRR;
mbed_official 430:d406b7919023 93 if (irqs & (1 << irq_num)) {
mbed_official 430:d406b7919023 94 obj = channel_obj[irq_num];
mbed_official 430:d406b7919023 95 if (obj != NULL) {
mbed_official 430:d406b7919023 96 edge_req = ((INTCICR1 >> (obj->ch * 2)) & 3);
mbed_official 430:d406b7919023 97 if (edge_req == 1) {
mbed_official 430:d406b7919023 98 irq_event = IRQ_FALL;
mbed_official 430:d406b7919023 99 } else if (edge_req == 2) {
mbed_official 430:d406b7919023 100 irq_event = IRQ_RISE;
mbed_official 430:d406b7919023 101 } else {
mbed_official 430:d406b7919023 102 uint32_t mask = (1 << (obj->pin & 0x0F));
mbed_official 430:d406b7919023 103 __I uint32_t *reg_in = (volatile uint32_t *) PPR((int)PINGROUP(obj->pin));
mbed_official 430:d406b7919023 104
mbed_official 430:d406b7919023 105 if ((*reg_in & mask) == 0) {
mbed_official 430:d406b7919023 106 irq_event = IRQ_FALL;
mbed_official 430:d406b7919023 107 } else {
mbed_official 430:d406b7919023 108 irq_event = IRQ_RISE;
mbed_official 430:d406b7919023 109 }
mbed_official 430:d406b7919023 110 }
mbed_official 430:d406b7919023 111 irq_handler(obj->port, irq_event);
mbed_official 409:a95c696104d3 112 }
mbed_official 430:d406b7919023 113 INTCIRQRR &= ~(1 << irq_num);
mbed_official 409:a95c696104d3 114 }
mbed_official 409:a95c696104d3 115 }
mbed_official 409:a95c696104d3 116
mbed_official 430:d406b7919023 117 static void gpio_irq0(void) {
mbed_official 430:d406b7919023 118 handle_interrupt_in(0);
mbed_official 430:d406b7919023 119 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 0));
mbed_official 430:d406b7919023 120 }
mbed_official 430:d406b7919023 121
mbed_official 430:d406b7919023 122 static void gpio_irq1(void) {
mbed_official 430:d406b7919023 123 handle_interrupt_in(1);
mbed_official 430:d406b7919023 124 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 1));
mbed_official 430:d406b7919023 125 }
mbed_official 430:d406b7919023 126
mbed_official 430:d406b7919023 127 static void gpio_irq2(void) {
mbed_official 430:d406b7919023 128 handle_interrupt_in(2);
mbed_official 430:d406b7919023 129 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 2));
mbed_official 430:d406b7919023 130 }
mbed_official 430:d406b7919023 131
mbed_official 430:d406b7919023 132 static void gpio_irq3(void) {
mbed_official 430:d406b7919023 133 handle_interrupt_in(3);
mbed_official 430:d406b7919023 134 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 3));
mbed_official 430:d406b7919023 135 }
mbed_official 430:d406b7919023 136
mbed_official 430:d406b7919023 137 static void gpio_irq4(void) {
mbed_official 430:d406b7919023 138 handle_interrupt_in(4);
mbed_official 430:d406b7919023 139 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 4));
mbed_official 430:d406b7919023 140 }
mbed_official 430:d406b7919023 141
mbed_official 430:d406b7919023 142 static void gpio_irq5(void) {
mbed_official 430:d406b7919023 143 handle_interrupt_in(5);
mbed_official 430:d406b7919023 144 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 5));
mbed_official 430:d406b7919023 145 }
mbed_official 430:d406b7919023 146
mbed_official 430:d406b7919023 147 static void gpio_irq6(void) {
mbed_official 430:d406b7919023 148 handle_interrupt_in(6);
mbed_official 430:d406b7919023 149 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 6));
mbed_official 430:d406b7919023 150 }
mbed_official 430:d406b7919023 151
mbed_official 430:d406b7919023 152 static void gpio_irq7(void) {
mbed_official 430:d406b7919023 153 handle_interrupt_in(7);
mbed_official 430:d406b7919023 154 GIC_EndInterrupt((IRQn_Type)(nIRQn_h + 7));
mbed_official 430:d406b7919023 155 }
mbed_official 430:d406b7919023 156
mbed_official 409:a95c696104d3 157 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 409:a95c696104d3 158 int shift;
mbed_official 409:a95c696104d3 159 if (pin == NC) return -1;
mbed_official 409:a95c696104d3 160
mbed_official 409:a95c696104d3 161 obj->ch = pinmap_peripheral(pin, PinMap_IRQ);
mbed_official 409:a95c696104d3 162 obj->pin = (int)pin ;
mbed_official 409:a95c696104d3 163 obj->port = (int)id ;
mbed_official 430:d406b7919023 164
mbed_official 409:a95c696104d3 165 shift = obj->ch*2;
mbed_official 430:d406b7919023 166 channel_obj[obj->ch] = obj;
mbed_official 409:a95c696104d3 167 irq_handler = handler;
mbed_official 409:a95c696104d3 168
mbed_official 409:a95c696104d3 169 pinmap_pinout(pin, PinMap_IRQ);
mbed_official 409:a95c696104d3 170 gpio_multi_guard = pin; /* Set multi guard */
mbed_official 409:a95c696104d3 171
mbed_official 409:a95c696104d3 172 // INTC settings
mbed_official 430:d406b7919023 173 InterruptHandlerRegister((IRQn_Type)(nIRQn_h+obj->ch), (void (*)(uint32_t))irq_tbl[obj->ch]);
mbed_official 409:a95c696104d3 174 INTCICR1 &= ~(0x3 << shift);
mbed_official 409:a95c696104d3 175 INTCICR1 |= (0x3 << shift);
mbed_official 409:a95c696104d3 176 GIC_SetPriority((IRQn_Type)(nIRQn_h+obj->ch), 5);
mbed_official 409:a95c696104d3 177 GIC_EnableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
mbed_official 409:a95c696104d3 178 __enable_irq();
mbed_official 409:a95c696104d3 179
mbed_official 409:a95c696104d3 180 return 0;
mbed_official 409:a95c696104d3 181 }
mbed_official 409:a95c696104d3 182
mbed_official 409:a95c696104d3 183 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 430:d406b7919023 184 channel_obj[obj->ch] = NULL;
mbed_official 409:a95c696104d3 185 }
mbed_official 409:a95c696104d3 186
mbed_official 409:a95c696104d3 187 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 409:a95c696104d3 188 int shift = obj->ch*2;
mbed_official 409:a95c696104d3 189 uint16_t val = event == IRQ_RISE ? 2 :
mbed_official 409:a95c696104d3 190 event == IRQ_FALL ? 1 : 0;
mbed_official 409:a95c696104d3 191 uint16_t work_icr_val;
mbed_official 409:a95c696104d3 192 uint16_t work_irqrr_val;
mbed_official 409:a95c696104d3 193
mbed_official 409:a95c696104d3 194 /* check edge interrupt setting */
mbed_official 409:a95c696104d3 195 work_icr_val = INTCICR1;
mbed_official 409:a95c696104d3 196 if (enable == 1) {
mbed_official 409:a95c696104d3 197 /* Set interrupt serect */
mbed_official 409:a95c696104d3 198 work_icr_val |= (val << shift);
mbed_official 409:a95c696104d3 199 } else {
mbed_official 409:a95c696104d3 200 /* Clear interrupt serect */
mbed_official 409:a95c696104d3 201 work_icr_val &= ~(val << shift);
mbed_official 409:a95c696104d3 202 }
mbed_official 409:a95c696104d3 203
mbed_official 409:a95c696104d3 204 if ((work_icr_val & (3 << shift)) == 0) {
mbed_official 409:a95c696104d3 205 /* No edge interrupt setting */
mbed_official 409:a95c696104d3 206 GIC_DisableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
mbed_official 409:a95c696104d3 207 /* Clear Interrupt flags */
mbed_official 409:a95c696104d3 208 work_irqrr_val = INTCIRQRR;
mbed_official 409:a95c696104d3 209 INTCIRQRR = (work_irqrr_val & ~(1 << obj->ch));
mbed_official 409:a95c696104d3 210 } else {
mbed_official 409:a95c696104d3 211 /* Edge interrupt setting */
mbed_official 409:a95c696104d3 212 GIC_EnableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
mbed_official 409:a95c696104d3 213 }
mbed_official 409:a95c696104d3 214 INTCICR1 = work_icr_val;
mbed_official 409:a95c696104d3 215 }
mbed_official 409:a95c696104d3 216
mbed_official 409:a95c696104d3 217 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 409:a95c696104d3 218 GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
mbed_official 409:a95c696104d3 219 }
mbed_official 409:a95c696104d3 220
mbed_official 409:a95c696104d3 221 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 409:a95c696104d3 222 GIC_DisableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
mbed_official 409:a95c696104d3 223 }
mbed_official 409:a95c696104d3 224