Mbed for VNG board
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_ll_fsmc.c@394:83f921546702, 2014-11-07 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 07 15:45:07 2014 +0000
- Revision:
- 394:83f921546702
- Parent:
- targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_ll_fsmc.c@354:e67efb2aab0e
Synchronized with git revision aab52cb7ec5a665869e507dd988bbfd55b7e087e
Full URL: https://github.com/mbedmicro/mbed/commit/aab52cb7ec5a665869e507dd988bbfd55b7e087e/
Tests: Fix cpputest testrunner
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 354:e67efb2aab0e | 1 | /** |
mbed_official | 354:e67efb2aab0e | 2 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 3 | * @file stm32l1xx_ll_fsmc.c |
mbed_official | 354:e67efb2aab0e | 4 | * @author MCD Application Team |
mbed_official | 354:e67efb2aab0e | 5 | * @version V1.0.0 |
mbed_official | 354:e67efb2aab0e | 6 | * @date 5-September-2014 |
mbed_official | 354:e67efb2aab0e | 7 | * @brief FSMC Low Layer HAL module driver. |
mbed_official | 354:e67efb2aab0e | 8 | * |
mbed_official | 354:e67efb2aab0e | 9 | * This file provides firmware functions to manage the following |
mbed_official | 354:e67efb2aab0e | 10 | * functionalities of the Flexible Static Memory Controller (FSMC) peripheral memories: |
mbed_official | 354:e67efb2aab0e | 11 | * + Initialization/de-initialization functions |
mbed_official | 354:e67efb2aab0e | 12 | * + Peripheral Control functions |
mbed_official | 354:e67efb2aab0e | 13 | * + Peripheral State functions |
mbed_official | 354:e67efb2aab0e | 14 | * |
mbed_official | 354:e67efb2aab0e | 15 | @verbatim |
mbed_official | 354:e67efb2aab0e | 16 | ============================================================================= |
mbed_official | 354:e67efb2aab0e | 17 | ##### FSMC peripheral features ##### |
mbed_official | 354:e67efb2aab0e | 18 | ============================================================================= |
mbed_official | 354:e67efb2aab0e | 19 | [..] The Flexible static memory controller (FSMC) includes following memory controllers: |
mbed_official | 354:e67efb2aab0e | 20 | (+) The NOR/PSRAM memory controller |
mbed_official | 354:e67efb2aab0e | 21 | |
mbed_official | 354:e67efb2aab0e | 22 | [..] The FSMC functional block makes the interface with synchronous and asynchronous static |
mbed_official | 354:e67efb2aab0e | 23 | memories and SDRAM memories. Its main purposes are: |
mbed_official | 354:e67efb2aab0e | 24 | (+) to translate AHB transactions into the appropriate external device protocol. |
mbed_official | 354:e67efb2aab0e | 25 | (+) to meet the access time requirements of the external memory devices. |
mbed_official | 354:e67efb2aab0e | 26 | |
mbed_official | 354:e67efb2aab0e | 27 | [..] All external memories share the addresses, data and control signals with the controller. |
mbed_official | 354:e67efb2aab0e | 28 | Each external device is accessed by means of a unique Chip Select. The FSMC performs |
mbed_official | 354:e67efb2aab0e | 29 | only one access at a time to an external device. |
mbed_official | 354:e67efb2aab0e | 30 | The main features of the FSMC controller are the following: |
mbed_official | 354:e67efb2aab0e | 31 | (+) Interface with static-memory mapped devices including: |
mbed_official | 354:e67efb2aab0e | 32 | (++) Static random access memory (SRAM). |
mbed_official | 354:e67efb2aab0e | 33 | (++) NOR Flash memory. |
mbed_official | 354:e67efb2aab0e | 34 | (++) PSRAM (4 memory banks). |
mbed_official | 354:e67efb2aab0e | 35 | (+) Independent Chip Select control for each memory bank. |
mbed_official | 354:e67efb2aab0e | 36 | (+) Independent configuration for each memory bank. |
mbed_official | 354:e67efb2aab0e | 37 | |
mbed_official | 354:e67efb2aab0e | 38 | ============================================================================= |
mbed_official | 354:e67efb2aab0e | 39 | ##### How to use NORSRAM device driver ##### |
mbed_official | 354:e67efb2aab0e | 40 | ============================================================================= |
mbed_official | 354:e67efb2aab0e | 41 | |
mbed_official | 354:e67efb2aab0e | 42 | [..] |
mbed_official | 354:e67efb2aab0e | 43 | This driver contains a set of APIs to interface with the FSMC NORSRAM banks in order |
mbed_official | 354:e67efb2aab0e | 44 | to run the NORSRAM external devices. |
mbed_official | 354:e67efb2aab0e | 45 | |
mbed_official | 354:e67efb2aab0e | 46 | (+) FSMC NORSRAM bank reset using the function FSMC_NORSRAM_DeInit() |
mbed_official | 354:e67efb2aab0e | 47 | (+) FSMC NORSRAM bank control configuration using the function FSMC_NORSRAM_Init() |
mbed_official | 354:e67efb2aab0e | 48 | (+) FSMC NORSRAM bank timing configuration using the function FSMC_NORSRAM_Timing_Init() |
mbed_official | 354:e67efb2aab0e | 49 | (+) FSMC NORSRAM bank extended timing configuration using the function |
mbed_official | 354:e67efb2aab0e | 50 | FSMC_NORSRAM_Extended_Timing_Init() |
mbed_official | 354:e67efb2aab0e | 51 | (+) FSMC NORSRAM bank enable/disable write operation using the functions |
mbed_official | 354:e67efb2aab0e | 52 | FSMC_NORSRAM_WriteOperation_Enable()/FSMC_NORSRAM_WriteOperation_Disable() |
mbed_official | 354:e67efb2aab0e | 53 | |
mbed_official | 354:e67efb2aab0e | 54 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 55 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 56 | * @attention |
mbed_official | 354:e67efb2aab0e | 57 | * |
mbed_official | 354:e67efb2aab0e | 58 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 354:e67efb2aab0e | 59 | * |
mbed_official | 354:e67efb2aab0e | 60 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 354:e67efb2aab0e | 61 | * are permitted provided that the following conditions are met: |
mbed_official | 354:e67efb2aab0e | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 63 | * this list of conditions and the following disclaimer. |
mbed_official | 354:e67efb2aab0e | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 354:e67efb2aab0e | 65 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 354:e67efb2aab0e | 66 | * and/or other materials provided with the distribution. |
mbed_official | 354:e67efb2aab0e | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 354:e67efb2aab0e | 68 | * may be used to endorse or promote products derived from this software |
mbed_official | 354:e67efb2aab0e | 69 | * without specific prior written permission. |
mbed_official | 354:e67efb2aab0e | 70 | * |
mbed_official | 354:e67efb2aab0e | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 354:e67efb2aab0e | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 354:e67efb2aab0e | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 354:e67efb2aab0e | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 354:e67efb2aab0e | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 354:e67efb2aab0e | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 354:e67efb2aab0e | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 354:e67efb2aab0e | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 354:e67efb2aab0e | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 354:e67efb2aab0e | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 354:e67efb2aab0e | 81 | * |
mbed_official | 354:e67efb2aab0e | 82 | ****************************************************************************** |
mbed_official | 354:e67efb2aab0e | 83 | */ |
mbed_official | 354:e67efb2aab0e | 84 | |
mbed_official | 354:e67efb2aab0e | 85 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 86 | #include "stm32l1xx_hal.h" |
mbed_official | 354:e67efb2aab0e | 87 | |
mbed_official | 354:e67efb2aab0e | 88 | /** @addtogroup STM32L1xx_HAL_Driver |
mbed_official | 354:e67efb2aab0e | 89 | * @{ |
mbed_official | 354:e67efb2aab0e | 90 | */ |
mbed_official | 354:e67efb2aab0e | 91 | |
mbed_official | 354:e67efb2aab0e | 92 | /** @defgroup FSMC_LL FSMC_LL |
mbed_official | 354:e67efb2aab0e | 93 | * @brief FSMC driver modules |
mbed_official | 354:e67efb2aab0e | 94 | * @{ |
mbed_official | 354:e67efb2aab0e | 95 | */ |
mbed_official | 354:e67efb2aab0e | 96 | |
mbed_official | 354:e67efb2aab0e | 97 | #if defined (HAL_SRAM_MODULE_ENABLED) || defined(HAL_NOR_MODULE_ENABLED) |
mbed_official | 354:e67efb2aab0e | 98 | |
mbed_official | 354:e67efb2aab0e | 99 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) |
mbed_official | 354:e67efb2aab0e | 100 | |
mbed_official | 354:e67efb2aab0e | 101 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 102 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 103 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 104 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 105 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 106 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 354:e67efb2aab0e | 107 | |
mbed_official | 354:e67efb2aab0e | 108 | /** @defgroup FSMC_Exported_Functions FSMC Exported Functions |
mbed_official | 354:e67efb2aab0e | 109 | * @{ |
mbed_official | 354:e67efb2aab0e | 110 | */ |
mbed_official | 354:e67efb2aab0e | 111 | |
mbed_official | 354:e67efb2aab0e | 112 | /** @defgroup HAL_FSMC_NORSRAM_Group1 Initialization/de-initialization functions |
mbed_official | 354:e67efb2aab0e | 113 | * @brief Initialization and Configuration functions |
mbed_official | 354:e67efb2aab0e | 114 | * |
mbed_official | 354:e67efb2aab0e | 115 | @verbatim |
mbed_official | 354:e67efb2aab0e | 116 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 117 | ##### Initialization and de_initialization functions ##### |
mbed_official | 354:e67efb2aab0e | 118 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 119 | [..] |
mbed_official | 354:e67efb2aab0e | 120 | This section provides functions allowing to: |
mbed_official | 354:e67efb2aab0e | 121 | (+) Initialize and configure the FSMC NORSRAM interface |
mbed_official | 354:e67efb2aab0e | 122 | (+) De-initialize the FSMC NORSRAM interface |
mbed_official | 354:e67efb2aab0e | 123 | (+) Configure the FSMC clock and associated GPIOs |
mbed_official | 354:e67efb2aab0e | 124 | |
mbed_official | 354:e67efb2aab0e | 125 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 126 | * @{ |
mbed_official | 354:e67efb2aab0e | 127 | */ |
mbed_official | 354:e67efb2aab0e | 128 | |
mbed_official | 354:e67efb2aab0e | 129 | /** |
mbed_official | 354:e67efb2aab0e | 130 | * @brief Initialize the FSMC_NORSRAM device according to the specified |
mbed_official | 354:e67efb2aab0e | 131 | * control parameters in the FSMC_NORSRAM_InitTypeDef |
mbed_official | 354:e67efb2aab0e | 132 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 133 | * @param Init: Pointer to NORSRAM Initialization structure |
mbed_official | 354:e67efb2aab0e | 134 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 135 | */ |
mbed_official | 354:e67efb2aab0e | 136 | HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TYPEDEF *Device, FSMC_NORSRAM_InitTypeDef* Init) |
mbed_official | 354:e67efb2aab0e | 137 | { |
mbed_official | 354:e67efb2aab0e | 138 | uint32_t tmpr = 0; |
mbed_official | 354:e67efb2aab0e | 139 | |
mbed_official | 354:e67efb2aab0e | 140 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 141 | assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank)); |
mbed_official | 354:e67efb2aab0e | 142 | assert_param(IS_FSMC_MUX(Init->DataAddressMux)); |
mbed_official | 354:e67efb2aab0e | 143 | assert_param(IS_FSMC_MEMORY(Init->MemoryType)); |
mbed_official | 354:e67efb2aab0e | 144 | assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth)); |
mbed_official | 354:e67efb2aab0e | 145 | assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode)); |
mbed_official | 354:e67efb2aab0e | 146 | assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity)); |
mbed_official | 354:e67efb2aab0e | 147 | assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode)); |
mbed_official | 354:e67efb2aab0e | 148 | assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive)); |
mbed_official | 354:e67efb2aab0e | 149 | assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation)); |
mbed_official | 354:e67efb2aab0e | 150 | assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal)); |
mbed_official | 354:e67efb2aab0e | 151 | assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode)); |
mbed_official | 354:e67efb2aab0e | 152 | assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); |
mbed_official | 354:e67efb2aab0e | 153 | assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); |
mbed_official | 354:e67efb2aab0e | 154 | |
mbed_official | 354:e67efb2aab0e | 155 | /* Set NORSRAM device control parameters */ |
mbed_official | 354:e67efb2aab0e | 156 | tmpr = (uint32_t)(Init->DataAddressMux |\ |
mbed_official | 354:e67efb2aab0e | 157 | Init->MemoryType |\ |
mbed_official | 354:e67efb2aab0e | 158 | Init->MemoryDataWidth |\ |
mbed_official | 354:e67efb2aab0e | 159 | Init->BurstAccessMode |\ |
mbed_official | 354:e67efb2aab0e | 160 | Init->WaitSignalPolarity |\ |
mbed_official | 354:e67efb2aab0e | 161 | Init->WrapMode |\ |
mbed_official | 354:e67efb2aab0e | 162 | Init->WaitSignalActive |\ |
mbed_official | 354:e67efb2aab0e | 163 | Init->WriteOperation |\ |
mbed_official | 354:e67efb2aab0e | 164 | Init->WaitSignal |\ |
mbed_official | 354:e67efb2aab0e | 165 | Init->ExtendedMode |\ |
mbed_official | 354:e67efb2aab0e | 166 | Init->AsynchronousWait |\ |
mbed_official | 354:e67efb2aab0e | 167 | Init->WriteBurst |
mbed_official | 354:e67efb2aab0e | 168 | ); |
mbed_official | 354:e67efb2aab0e | 169 | |
mbed_official | 354:e67efb2aab0e | 170 | if(Init->MemoryType == FSMC_MEMORY_TYPE_NOR) |
mbed_official | 354:e67efb2aab0e | 171 | { |
mbed_official | 354:e67efb2aab0e | 172 | tmpr |= (uint32_t)FSMC_NORSRAM_FLASH_ACCESS_ENABLE; |
mbed_official | 354:e67efb2aab0e | 173 | } |
mbed_official | 354:e67efb2aab0e | 174 | |
mbed_official | 354:e67efb2aab0e | 175 | Device->BTCR[Init->NSBank] = tmpr; |
mbed_official | 354:e67efb2aab0e | 176 | |
mbed_official | 354:e67efb2aab0e | 177 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 178 | } |
mbed_official | 354:e67efb2aab0e | 179 | |
mbed_official | 354:e67efb2aab0e | 180 | |
mbed_official | 354:e67efb2aab0e | 181 | /** |
mbed_official | 354:e67efb2aab0e | 182 | * @brief DeInitialize the FSMC_NORSRAM peripheral |
mbed_official | 354:e67efb2aab0e | 183 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 184 | * @param ExDevice: Pointer to NORSRAM extended mode device instance |
mbed_official | 354:e67efb2aab0e | 185 | * @param Bank: NORSRAM bank number |
mbed_official | 354:e67efb2aab0e | 186 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 187 | */ |
mbed_official | 354:e67efb2aab0e | 188 | HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TYPEDEF *Device, FSMC_NORSRAM_EXTENDED_TYPEDEF *ExDevice, uint32_t Bank) |
mbed_official | 354:e67efb2aab0e | 189 | { |
mbed_official | 354:e67efb2aab0e | 190 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 191 | assert_param(IS_FSMC_NORSRAM_DEVICE(Device)); |
mbed_official | 354:e67efb2aab0e | 192 | assert_param(IS_FSMC_NORSRAM_EXTENDED_DEVICE(ExDevice)); |
mbed_official | 354:e67efb2aab0e | 193 | |
mbed_official | 354:e67efb2aab0e | 194 | /* Disable the FSMC_NORSRAM device */ |
mbed_official | 354:e67efb2aab0e | 195 | __FSMC_NORSRAM_DISABLE(Device, Bank); |
mbed_official | 354:e67efb2aab0e | 196 | |
mbed_official | 354:e67efb2aab0e | 197 | /* De-initialize the FSMC_NORSRAM device */ |
mbed_official | 354:e67efb2aab0e | 198 | /* FSMC_NORSRAM_BANK1 */ |
mbed_official | 354:e67efb2aab0e | 199 | if(Bank == FSMC_BANK1_NORSRAM1) |
mbed_official | 354:e67efb2aab0e | 200 | { |
mbed_official | 354:e67efb2aab0e | 201 | Device->BTCR[Bank] = 0x000030DB; |
mbed_official | 354:e67efb2aab0e | 202 | } |
mbed_official | 354:e67efb2aab0e | 203 | /* FSMC_BANK1_NORSRAM2, FSMC_BANK1_NORSRAM3 or FSMC_BANK1_NORSRAM4 */ |
mbed_official | 354:e67efb2aab0e | 204 | else |
mbed_official | 354:e67efb2aab0e | 205 | { |
mbed_official | 354:e67efb2aab0e | 206 | Device->BTCR[Bank] = 0x000030D2; |
mbed_official | 354:e67efb2aab0e | 207 | } |
mbed_official | 354:e67efb2aab0e | 208 | |
mbed_official | 354:e67efb2aab0e | 209 | Device->BTCR[Bank + 1] = 0x0FFFFFFF; |
mbed_official | 354:e67efb2aab0e | 210 | ExDevice->BWTR[Bank] = 0x0FFFFFFF; |
mbed_official | 354:e67efb2aab0e | 211 | |
mbed_official | 354:e67efb2aab0e | 212 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 213 | } |
mbed_official | 354:e67efb2aab0e | 214 | |
mbed_official | 354:e67efb2aab0e | 215 | |
mbed_official | 354:e67efb2aab0e | 216 | /** |
mbed_official | 354:e67efb2aab0e | 217 | * @brief Initialize the FSMC_NORSRAM Timing according to the specified |
mbed_official | 354:e67efb2aab0e | 218 | * parameters in the FSMC_NORSRAM_TimingTypeDef |
mbed_official | 354:e67efb2aab0e | 219 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 220 | * @param Timing: Pointer to NORSRAM Timing structure |
mbed_official | 354:e67efb2aab0e | 221 | * @param Bank: NORSRAM bank number |
mbed_official | 354:e67efb2aab0e | 222 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 223 | */ |
mbed_official | 354:e67efb2aab0e | 224 | HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TYPEDEF *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) |
mbed_official | 354:e67efb2aab0e | 225 | { |
mbed_official | 354:e67efb2aab0e | 226 | uint32_t tmpr = 0; |
mbed_official | 354:e67efb2aab0e | 227 | |
mbed_official | 354:e67efb2aab0e | 228 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 229 | assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); |
mbed_official | 354:e67efb2aab0e | 230 | assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); |
mbed_official | 354:e67efb2aab0e | 231 | assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime)); |
mbed_official | 354:e67efb2aab0e | 232 | assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); |
mbed_official | 354:e67efb2aab0e | 233 | assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision)); |
mbed_official | 354:e67efb2aab0e | 234 | assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); |
mbed_official | 354:e67efb2aab0e | 235 | assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); |
mbed_official | 354:e67efb2aab0e | 236 | |
mbed_official | 354:e67efb2aab0e | 237 | /* Set FSMC_NORSRAM device timing parameters */ |
mbed_official | 354:e67efb2aab0e | 238 | tmpr = (uint32_t)(Timing->AddressSetupTime |\ |
mbed_official | 354:e67efb2aab0e | 239 | ((Timing->AddressHoldTime) << POSITION_VAL(FSMC_BTRx_ADDHLD)) |\ |
mbed_official | 354:e67efb2aab0e | 240 | ((Timing->DataSetupTime) << POSITION_VAL(FSMC_BTRx_DATAST)) |\ |
mbed_official | 354:e67efb2aab0e | 241 | ((Timing->BusTurnAroundDuration) << POSITION_VAL(FSMC_BTRx_BUSTURN)) |\ |
mbed_official | 354:e67efb2aab0e | 242 | (((Timing->CLKDivision)-1) << POSITION_VAL(FSMC_BTRx_CLKDIV)) |\ |
mbed_official | 354:e67efb2aab0e | 243 | (((Timing->DataLatency)-2) << POSITION_VAL(FSMC_BTRx_DATLAT)) |\ |
mbed_official | 354:e67efb2aab0e | 244 | (Timing->AccessMode) |
mbed_official | 354:e67efb2aab0e | 245 | ); |
mbed_official | 354:e67efb2aab0e | 246 | |
mbed_official | 354:e67efb2aab0e | 247 | Device->BTCR[Bank + 1] = tmpr; |
mbed_official | 354:e67efb2aab0e | 248 | |
mbed_official | 354:e67efb2aab0e | 249 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 250 | } |
mbed_official | 354:e67efb2aab0e | 251 | |
mbed_official | 354:e67efb2aab0e | 252 | /** |
mbed_official | 354:e67efb2aab0e | 253 | * @brief Initialize the FSMC_NORSRAM Extended mode Timing according to the specified |
mbed_official | 354:e67efb2aab0e | 254 | * parameters in the FSMC_NORSRAM_TimingTypeDef |
mbed_official | 354:e67efb2aab0e | 255 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 256 | * @param Timing: Pointer to NORSRAM Timing structure |
mbed_official | 354:e67efb2aab0e | 257 | * @param Bank: NORSRAM bank number |
mbed_official | 354:e67efb2aab0e | 258 | * @param ExtendedMode: FSMC Extended Mode |
mbed_official | 354:e67efb2aab0e | 259 | * This parameter can be one of the following values: |
mbed_official | 354:e67efb2aab0e | 260 | * @arg FSMC_EXTENDED_MODE_DISABLE |
mbed_official | 354:e67efb2aab0e | 261 | * @arg FSMC_EXTENDED_MODE_ENABLE |
mbed_official | 354:e67efb2aab0e | 262 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 263 | */ |
mbed_official | 354:e67efb2aab0e | 264 | HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TYPEDEF *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) |
mbed_official | 354:e67efb2aab0e | 265 | { |
mbed_official | 354:e67efb2aab0e | 266 | /* Set NORSRAM device timing register for write configuration, if extended mode is used */ |
mbed_official | 354:e67efb2aab0e | 267 | if(ExtendedMode == FSMC_EXTENDED_MODE_ENABLE) |
mbed_official | 354:e67efb2aab0e | 268 | { |
mbed_official | 354:e67efb2aab0e | 269 | /* Check the parameters */ |
mbed_official | 354:e67efb2aab0e | 270 | assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime)); |
mbed_official | 354:e67efb2aab0e | 271 | assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); |
mbed_official | 354:e67efb2aab0e | 272 | assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime)); |
mbed_official | 354:e67efb2aab0e | 273 | assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); |
mbed_official | 354:e67efb2aab0e | 274 | assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); |
mbed_official | 354:e67efb2aab0e | 275 | |
mbed_official | 354:e67efb2aab0e | 276 | Device->BWTR[Bank] = (uint32_t)(Timing->AddressSetupTime |\ |
mbed_official | 354:e67efb2aab0e | 277 | ((Timing->AddressHoldTime) << POSITION_VAL(FSMC_BWTRx_ADDHLD)) |\ |
mbed_official | 354:e67efb2aab0e | 278 | ((Timing->DataSetupTime) << POSITION_VAL(FSMC_BWTRx_DATAST)) |\ |
mbed_official | 354:e67efb2aab0e | 279 | ((Timing->BusTurnAroundDuration) << POSITION_VAL(FSMC_BWTRx_BUSTURN)) |\ |
mbed_official | 354:e67efb2aab0e | 280 | (Timing->AccessMode)); |
mbed_official | 354:e67efb2aab0e | 281 | } |
mbed_official | 354:e67efb2aab0e | 282 | else |
mbed_official | 354:e67efb2aab0e | 283 | { |
mbed_official | 354:e67efb2aab0e | 284 | Device->BWTR[Bank] = 0x0FFFFFFF; |
mbed_official | 354:e67efb2aab0e | 285 | } |
mbed_official | 354:e67efb2aab0e | 286 | |
mbed_official | 354:e67efb2aab0e | 287 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 288 | } |
mbed_official | 354:e67efb2aab0e | 289 | |
mbed_official | 354:e67efb2aab0e | 290 | |
mbed_official | 354:e67efb2aab0e | 291 | /** |
mbed_official | 354:e67efb2aab0e | 292 | * @} |
mbed_official | 354:e67efb2aab0e | 293 | */ |
mbed_official | 354:e67efb2aab0e | 294 | |
mbed_official | 354:e67efb2aab0e | 295 | |
mbed_official | 354:e67efb2aab0e | 296 | /** @defgroup HAL_FSMC_NORSRAM_Group2 Control functions |
mbed_official | 354:e67efb2aab0e | 297 | * @brief management functions |
mbed_official | 354:e67efb2aab0e | 298 | * |
mbed_official | 354:e67efb2aab0e | 299 | @verbatim |
mbed_official | 354:e67efb2aab0e | 300 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 301 | ##### FSMC_NORSRAM Control functions ##### |
mbed_official | 354:e67efb2aab0e | 302 | ============================================================================== |
mbed_official | 354:e67efb2aab0e | 303 | [..] |
mbed_official | 354:e67efb2aab0e | 304 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 354:e67efb2aab0e | 305 | the FSMC NORSRAM interface. |
mbed_official | 354:e67efb2aab0e | 306 | |
mbed_official | 354:e67efb2aab0e | 307 | @endverbatim |
mbed_official | 354:e67efb2aab0e | 308 | * @{ |
mbed_official | 354:e67efb2aab0e | 309 | */ |
mbed_official | 354:e67efb2aab0e | 310 | |
mbed_official | 354:e67efb2aab0e | 311 | /** |
mbed_official | 354:e67efb2aab0e | 312 | * @brief Enables dynamically FSMC_NORSRAM write operation. |
mbed_official | 354:e67efb2aab0e | 313 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 314 | * @param Bank: NORSRAM bank number |
mbed_official | 354:e67efb2aab0e | 315 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 316 | */ |
mbed_official | 354:e67efb2aab0e | 317 | HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TYPEDEF *Device, uint32_t Bank) |
mbed_official | 354:e67efb2aab0e | 318 | { |
mbed_official | 354:e67efb2aab0e | 319 | /* Enable write operation */ |
mbed_official | 354:e67efb2aab0e | 320 | Device->BTCR[Bank] |= FSMC_WRITE_OPERATION_ENABLE; |
mbed_official | 354:e67efb2aab0e | 321 | |
mbed_official | 354:e67efb2aab0e | 322 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 323 | } |
mbed_official | 354:e67efb2aab0e | 324 | |
mbed_official | 354:e67efb2aab0e | 325 | /** |
mbed_official | 354:e67efb2aab0e | 326 | * @brief Disables dynamically FSMC_NORSRAM write operation. |
mbed_official | 354:e67efb2aab0e | 327 | * @param Device: Pointer to NORSRAM device instance |
mbed_official | 354:e67efb2aab0e | 328 | * @param Bank: NORSRAM bank number |
mbed_official | 354:e67efb2aab0e | 329 | * @retval HAL status |
mbed_official | 354:e67efb2aab0e | 330 | */ |
mbed_official | 354:e67efb2aab0e | 331 | HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TYPEDEF *Device, uint32_t Bank) |
mbed_official | 354:e67efb2aab0e | 332 | { |
mbed_official | 354:e67efb2aab0e | 333 | /* Disable write operation */ |
mbed_official | 354:e67efb2aab0e | 334 | Device->BTCR[Bank] &= ~FSMC_WRITE_OPERATION_ENABLE; |
mbed_official | 354:e67efb2aab0e | 335 | |
mbed_official | 354:e67efb2aab0e | 336 | return HAL_OK; |
mbed_official | 354:e67efb2aab0e | 337 | } |
mbed_official | 354:e67efb2aab0e | 338 | |
mbed_official | 354:e67efb2aab0e | 339 | /** |
mbed_official | 354:e67efb2aab0e | 340 | * @} |
mbed_official | 354:e67efb2aab0e | 341 | */ |
mbed_official | 354:e67efb2aab0e | 342 | |
mbed_official | 354:e67efb2aab0e | 343 | /** |
mbed_official | 354:e67efb2aab0e | 344 | * @} |
mbed_official | 354:e67efb2aab0e | 345 | */ |
mbed_official | 354:e67efb2aab0e | 346 | |
mbed_official | 354:e67efb2aab0e | 347 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD */ |
mbed_official | 354:e67efb2aab0e | 348 | |
mbed_official | 354:e67efb2aab0e | 349 | #endif /* HAL_FSMC_MODULE_ENABLED */ |
mbed_official | 354:e67efb2aab0e | 350 | |
mbed_official | 354:e67efb2aab0e | 351 | /** |
mbed_official | 354:e67efb2aab0e | 352 | * @} |
mbed_official | 354:e67efb2aab0e | 353 | */ |
mbed_official | 354:e67efb2aab0e | 354 | |
mbed_official | 354:e67efb2aab0e | 355 | /** |
mbed_official | 354:e67efb2aab0e | 356 | * @} |
mbed_official | 354:e67efb2aab0e | 357 | */ |
mbed_official | 354:e67efb2aab0e | 358 | |
mbed_official | 354:e67efb2aab0e | 359 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |