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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_pwr.h@394:83f921546702, 2014-11-07 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 07 15:45:07 2014 +0000
- Revision:
- 394:83f921546702
- Parent:
- targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_hal_pwr.h@354:e67efb2aab0e
Synchronized with git revision aab52cb7ec5a665869e507dd988bbfd55b7e087e
Full URL: https://github.com/mbedmicro/mbed/commit/aab52cb7ec5a665869e507dd988bbfd55b7e087e/
Tests: Fix cpputest testrunner
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 354:e67efb2aab0e | 1 | /** |
| mbed_official | 354:e67efb2aab0e | 2 | ****************************************************************************** |
| mbed_official | 354:e67efb2aab0e | 3 | * @file stm32l1xx_hal_pwr.h |
| mbed_official | 354:e67efb2aab0e | 4 | * @author MCD Application Team |
| mbed_official | 354:e67efb2aab0e | 5 | * @version V1.0.0 |
| mbed_official | 354:e67efb2aab0e | 6 | * @date 5-September-2014 |
| mbed_official | 354:e67efb2aab0e | 7 | * @brief Header file of PWR HAL module. |
| mbed_official | 354:e67efb2aab0e | 8 | ****************************************************************************** |
| mbed_official | 354:e67efb2aab0e | 9 | * @attention |
| mbed_official | 354:e67efb2aab0e | 10 | * |
| mbed_official | 354:e67efb2aab0e | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 354:e67efb2aab0e | 12 | * |
| mbed_official | 354:e67efb2aab0e | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 354:e67efb2aab0e | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 354:e67efb2aab0e | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 354:e67efb2aab0e | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 354:e67efb2aab0e | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 354:e67efb2aab0e | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 354:e67efb2aab0e | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 354:e67efb2aab0e | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 354:e67efb2aab0e | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 354:e67efb2aab0e | 22 | * without specific prior written permission. |
| mbed_official | 354:e67efb2aab0e | 23 | * |
| mbed_official | 354:e67efb2aab0e | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 354:e67efb2aab0e | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 354:e67efb2aab0e | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 354:e67efb2aab0e | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 354:e67efb2aab0e | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 354:e67efb2aab0e | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 354:e67efb2aab0e | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 354:e67efb2aab0e | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 354:e67efb2aab0e | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 354:e67efb2aab0e | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 354:e67efb2aab0e | 34 | * |
| mbed_official | 354:e67efb2aab0e | 35 | ****************************************************************************** |
| mbed_official | 354:e67efb2aab0e | 36 | */ |
| mbed_official | 354:e67efb2aab0e | 37 | |
| mbed_official | 354:e67efb2aab0e | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 39 | #ifndef __STM32L1xx_HAL_PWR_H |
| mbed_official | 354:e67efb2aab0e | 40 | #define __STM32L1xx_HAL_PWR_H |
| mbed_official | 354:e67efb2aab0e | 41 | |
| mbed_official | 354:e67efb2aab0e | 42 | #ifdef __cplusplus |
| mbed_official | 354:e67efb2aab0e | 43 | extern "C" { |
| mbed_official | 354:e67efb2aab0e | 44 | #endif |
| mbed_official | 354:e67efb2aab0e | 45 | |
| mbed_official | 354:e67efb2aab0e | 46 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 47 | #include "stm32l1xx_hal_def.h" |
| mbed_official | 354:e67efb2aab0e | 48 | |
| mbed_official | 354:e67efb2aab0e | 49 | /** @addtogroup STM32L1xx_HAL_Driver |
| mbed_official | 354:e67efb2aab0e | 50 | * @{ |
| mbed_official | 354:e67efb2aab0e | 51 | */ |
| mbed_official | 354:e67efb2aab0e | 52 | |
| mbed_official | 354:e67efb2aab0e | 53 | /** @addtogroup PWR |
| mbed_official | 354:e67efb2aab0e | 54 | * @{ |
| mbed_official | 354:e67efb2aab0e | 55 | */ |
| mbed_official | 354:e67efb2aab0e | 56 | |
| mbed_official | 354:e67efb2aab0e | 57 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 58 | |
| mbed_official | 354:e67efb2aab0e | 59 | /** @defgroup PWR_Exported_Types PWR Exported Types |
| mbed_official | 354:e67efb2aab0e | 60 | * @{ |
| mbed_official | 354:e67efb2aab0e | 61 | */ |
| mbed_official | 354:e67efb2aab0e | 62 | |
| mbed_official | 354:e67efb2aab0e | 63 | /** |
| mbed_official | 354:e67efb2aab0e | 64 | * @brief PWR PVD configuration structure definition |
| mbed_official | 354:e67efb2aab0e | 65 | */ |
| mbed_official | 354:e67efb2aab0e | 66 | typedef struct |
| mbed_official | 354:e67efb2aab0e | 67 | { |
| mbed_official | 354:e67efb2aab0e | 68 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
| mbed_official | 354:e67efb2aab0e | 69 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
| mbed_official | 354:e67efb2aab0e | 70 | |
| mbed_official | 354:e67efb2aab0e | 71 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
| mbed_official | 354:e67efb2aab0e | 72 | This parameter can be a value of @ref PWR_PVD_Mode */ |
| mbed_official | 354:e67efb2aab0e | 73 | }PWR_PVDTypeDef; |
| mbed_official | 354:e67efb2aab0e | 74 | |
| mbed_official | 354:e67efb2aab0e | 75 | /** |
| mbed_official | 354:e67efb2aab0e | 76 | * @} |
| mbed_official | 354:e67efb2aab0e | 77 | */ |
| mbed_official | 354:e67efb2aab0e | 78 | |
| mbed_official | 354:e67efb2aab0e | 79 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 80 | |
| mbed_official | 354:e67efb2aab0e | 81 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
| mbed_official | 354:e67efb2aab0e | 82 | * @{ |
| mbed_official | 354:e67efb2aab0e | 83 | */ |
| mbed_official | 354:e67efb2aab0e | 84 | |
| mbed_official | 354:e67efb2aab0e | 85 | /** @defgroup PWR_register_alias_address PWR Register alias address |
| mbed_official | 354:e67efb2aab0e | 86 | * @{ |
| mbed_official | 354:e67efb2aab0e | 87 | */ |
| mbed_official | 354:e67efb2aab0e | 88 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
| mbed_official | 354:e67efb2aab0e | 89 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
| mbed_official | 354:e67efb2aab0e | 90 | #define PWR_CR_OFFSET 0x00 |
| mbed_official | 354:e67efb2aab0e | 91 | #define PWR_CSR_OFFSET 0x04 |
| mbed_official | 354:e67efb2aab0e | 92 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
| mbed_official | 354:e67efb2aab0e | 93 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
| mbed_official | 354:e67efb2aab0e | 94 | /** |
| mbed_official | 354:e67efb2aab0e | 95 | * @} |
| mbed_official | 354:e67efb2aab0e | 96 | */ |
| mbed_official | 354:e67efb2aab0e | 97 | |
| mbed_official | 354:e67efb2aab0e | 98 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
| mbed_official | 354:e67efb2aab0e | 99 | * @{ |
| mbed_official | 354:e67efb2aab0e | 100 | */ |
| mbed_official | 354:e67efb2aab0e | 101 | /* --- CR Register ---*/ |
| mbed_official | 354:e67efb2aab0e | 102 | /* Alias word address of LPSDSR bit */ |
| mbed_official | 354:e67efb2aab0e | 103 | #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) |
| mbed_official | 354:e67efb2aab0e | 104 | #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 105 | |
| mbed_official | 354:e67efb2aab0e | 106 | /* Alias word address of DBP bit */ |
| mbed_official | 354:e67efb2aab0e | 107 | #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) |
| mbed_official | 354:e67efb2aab0e | 108 | #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 109 | |
| mbed_official | 354:e67efb2aab0e | 110 | /* Alias word address of LPRUN bit */ |
| mbed_official | 354:e67efb2aab0e | 111 | #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN) |
| mbed_official | 354:e67efb2aab0e | 112 | #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 113 | |
| mbed_official | 354:e67efb2aab0e | 114 | /* Alias word address of PVDE bit */ |
| mbed_official | 354:e67efb2aab0e | 115 | #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) |
| mbed_official | 354:e67efb2aab0e | 116 | #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 117 | |
| mbed_official | 354:e67efb2aab0e | 118 | /* Alias word address of FWU bit */ |
| mbed_official | 354:e67efb2aab0e | 119 | #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU) |
| mbed_official | 354:e67efb2aab0e | 120 | #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 121 | |
| mbed_official | 354:e67efb2aab0e | 122 | /* Alias word address of ULP bit */ |
| mbed_official | 354:e67efb2aab0e | 123 | #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP) |
| mbed_official | 354:e67efb2aab0e | 124 | #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4))) |
| mbed_official | 354:e67efb2aab0e | 125 | /** |
| mbed_official | 354:e67efb2aab0e | 126 | * @} |
| mbed_official | 354:e67efb2aab0e | 127 | */ |
| mbed_official | 354:e67efb2aab0e | 128 | |
| mbed_official | 354:e67efb2aab0e | 129 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address |
| mbed_official | 354:e67efb2aab0e | 130 | * @{ |
| mbed_official | 354:e67efb2aab0e | 131 | */ |
| mbed_official | 354:e67efb2aab0e | 132 | |
| mbed_official | 354:e67efb2aab0e | 133 | /* --- CSR Register ---*/ |
| mbed_official | 354:e67efb2aab0e | 134 | /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ |
| mbed_official | 354:e67efb2aab0e | 135 | #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) |
| mbed_official | 354:e67efb2aab0e | 136 | /** |
| mbed_official | 354:e67efb2aab0e | 137 | * @} |
| mbed_official | 354:e67efb2aab0e | 138 | */ |
| mbed_official | 354:e67efb2aab0e | 139 | |
| mbed_official | 354:e67efb2aab0e | 140 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
| mbed_official | 354:e67efb2aab0e | 141 | * @{ |
| mbed_official | 354:e67efb2aab0e | 142 | */ |
| mbed_official | 354:e67efb2aab0e | 143 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| mbed_official | 354:e67efb2aab0e | 144 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| mbed_official | 354:e67efb2aab0e | 145 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| mbed_official | 354:e67efb2aab0e | 146 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| mbed_official | 354:e67efb2aab0e | 147 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| mbed_official | 354:e67efb2aab0e | 148 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| mbed_official | 354:e67efb2aab0e | 149 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| mbed_official | 354:e67efb2aab0e | 150 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage |
| mbed_official | 354:e67efb2aab0e | 151 | (Compare internally to VREFINT) */ |
| mbed_official | 354:e67efb2aab0e | 152 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
| mbed_official | 354:e67efb2aab0e | 153 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| mbed_official | 354:e67efb2aab0e | 154 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| mbed_official | 354:e67efb2aab0e | 155 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| mbed_official | 354:e67efb2aab0e | 156 | /** |
| mbed_official | 354:e67efb2aab0e | 157 | * @} |
| mbed_official | 354:e67efb2aab0e | 158 | */ |
| mbed_official | 354:e67efb2aab0e | 159 | |
| mbed_official | 354:e67efb2aab0e | 160 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
| mbed_official | 354:e67efb2aab0e | 161 | * @{ |
| mbed_official | 354:e67efb2aab0e | 162 | */ |
| mbed_official | 354:e67efb2aab0e | 163 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
| mbed_official | 354:e67efb2aab0e | 164 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 165 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 166 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 167 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 168 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 169 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| mbed_official | 354:e67efb2aab0e | 170 | |
| mbed_official | 354:e67efb2aab0e | 171 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
| mbed_official | 354:e67efb2aab0e | 172 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| mbed_official | 354:e67efb2aab0e | 173 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| mbed_official | 354:e67efb2aab0e | 174 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| mbed_official | 354:e67efb2aab0e | 175 | /** |
| mbed_official | 354:e67efb2aab0e | 176 | * @} |
| mbed_official | 354:e67efb2aab0e | 177 | */ |
| mbed_official | 354:e67efb2aab0e | 178 | |
| mbed_official | 354:e67efb2aab0e | 179 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode |
| mbed_official | 354:e67efb2aab0e | 180 | * @{ |
| mbed_official | 354:e67efb2aab0e | 181 | */ |
| mbed_official | 354:e67efb2aab0e | 182 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
| mbed_official | 354:e67efb2aab0e | 183 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR |
| mbed_official | 354:e67efb2aab0e | 184 | |
| mbed_official | 354:e67efb2aab0e | 185 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
| mbed_official | 354:e67efb2aab0e | 186 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
| mbed_official | 354:e67efb2aab0e | 187 | /** |
| mbed_official | 354:e67efb2aab0e | 188 | * @} |
| mbed_official | 354:e67efb2aab0e | 189 | */ |
| mbed_official | 354:e67efb2aab0e | 190 | |
| mbed_official | 354:e67efb2aab0e | 191 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
| mbed_official | 354:e67efb2aab0e | 192 | * @{ |
| mbed_official | 354:e67efb2aab0e | 193 | */ |
| mbed_official | 354:e67efb2aab0e | 194 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
| mbed_official | 354:e67efb2aab0e | 195 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
| mbed_official | 354:e67efb2aab0e | 196 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
| mbed_official | 354:e67efb2aab0e | 197 | /** |
| mbed_official | 354:e67efb2aab0e | 198 | * @} |
| mbed_official | 354:e67efb2aab0e | 199 | */ |
| mbed_official | 354:e67efb2aab0e | 200 | |
| mbed_official | 354:e67efb2aab0e | 201 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
| mbed_official | 354:e67efb2aab0e | 202 | * @{ |
| mbed_official | 354:e67efb2aab0e | 203 | */ |
| mbed_official | 354:e67efb2aab0e | 204 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
| mbed_official | 354:e67efb2aab0e | 205 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
| mbed_official | 354:e67efb2aab0e | 206 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) |
| mbed_official | 354:e67efb2aab0e | 207 | /** |
| mbed_official | 354:e67efb2aab0e | 208 | * @} |
| mbed_official | 354:e67efb2aab0e | 209 | */ |
| mbed_official | 354:e67efb2aab0e | 210 | |
| mbed_official | 354:e67efb2aab0e | 211 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
| mbed_official | 354:e67efb2aab0e | 212 | * @{ |
| mbed_official | 354:e67efb2aab0e | 213 | */ |
| mbed_official | 354:e67efb2aab0e | 214 | |
| mbed_official | 354:e67efb2aab0e | 215 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0 |
| mbed_official | 354:e67efb2aab0e | 216 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 |
| mbed_official | 354:e67efb2aab0e | 217 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS |
| mbed_official | 354:e67efb2aab0e | 218 | |
| mbed_official | 354:e67efb2aab0e | 219 | #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
| mbed_official | 354:e67efb2aab0e | 220 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
| mbed_official | 354:e67efb2aab0e | 221 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
| mbed_official | 354:e67efb2aab0e | 222 | /** |
| mbed_official | 354:e67efb2aab0e | 223 | * @} |
| mbed_official | 354:e67efb2aab0e | 224 | */ |
| mbed_official | 354:e67efb2aab0e | 225 | |
| mbed_official | 354:e67efb2aab0e | 226 | /** @defgroup PWR_Flag PWR Flag |
| mbed_official | 354:e67efb2aab0e | 227 | * @{ |
| mbed_official | 354:e67efb2aab0e | 228 | */ |
| mbed_official | 354:e67efb2aab0e | 229 | #define PWR_FLAG_WU PWR_CSR_WUF |
| mbed_official | 354:e67efb2aab0e | 230 | #define PWR_FLAG_SB PWR_CSR_SBF |
| mbed_official | 354:e67efb2aab0e | 231 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
| mbed_official | 354:e67efb2aab0e | 232 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| mbed_official | 354:e67efb2aab0e | 233 | #define PWR_FLAG_VOS PWR_CSR_VOSF |
| mbed_official | 354:e67efb2aab0e | 234 | #define PWR_FLAG_REGLP PWR_CSR_REGLPF |
| mbed_official | 354:e67efb2aab0e | 235 | |
| mbed_official | 354:e67efb2aab0e | 236 | /** |
| mbed_official | 354:e67efb2aab0e | 237 | * @} |
| mbed_official | 354:e67efb2aab0e | 238 | */ |
| mbed_official | 354:e67efb2aab0e | 239 | |
| mbed_official | 354:e67efb2aab0e | 240 | /** |
| mbed_official | 354:e67efb2aab0e | 241 | * @} |
| mbed_official | 354:e67efb2aab0e | 242 | */ |
| mbed_official | 354:e67efb2aab0e | 243 | |
| mbed_official | 354:e67efb2aab0e | 244 | /* Exported macro ------------------------------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 245 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
| mbed_official | 354:e67efb2aab0e | 246 | * @{ |
| mbed_official | 354:e67efb2aab0e | 247 | */ |
| mbed_official | 354:e67efb2aab0e | 248 | |
| mbed_official | 354:e67efb2aab0e | 249 | /** @brief macros configure the main internal regulator output voltage. |
| mbed_official | 354:e67efb2aab0e | 250 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
| mbed_official | 354:e67efb2aab0e | 251 | * a tradeoff between performance and power consumption when the device does |
| mbed_official | 354:e67efb2aab0e | 252 | * not operate at the maximum frequency (refer to the datasheets for more details). |
| mbed_official | 354:e67efb2aab0e | 253 | * This parameter can be one of the following values: |
| mbed_official | 354:e67efb2aab0e | 254 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, |
| mbed_official | 354:e67efb2aab0e | 255 | * System frequency up to 32 MHz. |
| mbed_official | 354:e67efb2aab0e | 256 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode, |
| mbed_official | 354:e67efb2aab0e | 257 | * System frequency up to 16 MHz. |
| mbed_official | 354:e67efb2aab0e | 258 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode, |
| mbed_official | 354:e67efb2aab0e | 259 | * System frequency up to 4.2 MHz |
| mbed_official | 354:e67efb2aab0e | 260 | * @retval None |
| mbed_official | 354:e67efb2aab0e | 261 | */ |
| mbed_official | 354:e67efb2aab0e | 262 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
| mbed_official | 354:e67efb2aab0e | 263 | |
| mbed_official | 354:e67efb2aab0e | 264 | /** @brief Check PWR flag is set or not. |
| mbed_official | 354:e67efb2aab0e | 265 | * @param __FLAG__: specifies the flag to check. |
| mbed_official | 354:e67efb2aab0e | 266 | * This parameter can be one of the following values: |
| mbed_official | 354:e67efb2aab0e | 267 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| mbed_official | 354:e67efb2aab0e | 268 | * was received from the WKUP pin or from the RTC alarm (Alarm B), |
| mbed_official | 354:e67efb2aab0e | 269 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
| mbed_official | 354:e67efb2aab0e | 270 | * An additional wakeup event is detected if the WKUP pin is enabled |
| mbed_official | 354:e67efb2aab0e | 271 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
| mbed_official | 354:e67efb2aab0e | 272 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| mbed_official | 354:e67efb2aab0e | 273 | * resumed from StandBy mode. |
| mbed_official | 354:e67efb2aab0e | 274 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| mbed_official | 354:e67efb2aab0e | 275 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
| mbed_official | 354:e67efb2aab0e | 276 | * For this reason, this bit is equal to 0 after Standby or reset |
| mbed_official | 354:e67efb2aab0e | 277 | * until the PVDE bit is set. |
| mbed_official | 354:e67efb2aab0e | 278 | * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. |
| mbed_official | 354:e67efb2aab0e | 279 | * This bit indicates the state of the internal voltage reference, VREFINT. |
| mbed_official | 354:e67efb2aab0e | 280 | * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for |
| mbed_official | 354:e67efb2aab0e | 281 | * the internal regulator to be ready after the voltage range is changed. |
| mbed_official | 354:e67efb2aab0e | 282 | * The VOSF bit indicates that the regulator has reached the voltage level |
| mbed_official | 354:e67efb2aab0e | 283 | * defined with bits VOS of PWR_CR register. |
| mbed_official | 354:e67efb2aab0e | 284 | * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run |
| mbed_official | 354:e67efb2aab0e | 285 | * mode, this bit stays at 1 until the regulator is ready in main mode. |
| mbed_official | 354:e67efb2aab0e | 286 | * A polling on this bit is recommended to wait for the regulator main mode. |
| mbed_official | 354:e67efb2aab0e | 287 | * This bit is reset by hardware when the regulator is ready. |
| mbed_official | 354:e67efb2aab0e | 288 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| mbed_official | 354:e67efb2aab0e | 289 | */ |
| mbed_official | 354:e67efb2aab0e | 290 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
| mbed_official | 354:e67efb2aab0e | 291 | |
| mbed_official | 354:e67efb2aab0e | 292 | /** @brief Clear the PWR's pending flags. |
| mbed_official | 354:e67efb2aab0e | 293 | * @param __FLAG__: specifies the flag to clear. |
| mbed_official | 354:e67efb2aab0e | 294 | * This parameter can be one of the following values: |
| mbed_official | 354:e67efb2aab0e | 295 | * @arg PWR_FLAG_WU: Wake Up flag |
| mbed_official | 354:e67efb2aab0e | 296 | * @arg PWR_FLAG_SB: StandBy flag |
| mbed_official | 354:e67efb2aab0e | 297 | */ |
| mbed_official | 354:e67efb2aab0e | 298 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2) |
| mbed_official | 354:e67efb2aab0e | 299 | |
| mbed_official | 354:e67efb2aab0e | 300 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| mbed_official | 354:e67efb2aab0e | 301 | |
| mbed_official | 354:e67efb2aab0e | 302 | /** |
| mbed_official | 354:e67efb2aab0e | 303 | * @brief Enable interrupt on PVD Exti Line 16. |
| mbed_official | 354:e67efb2aab0e | 304 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 305 | */ |
| mbed_official | 354:e67efb2aab0e | 306 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 307 | |
| mbed_official | 354:e67efb2aab0e | 308 | /** |
| mbed_official | 354:e67efb2aab0e | 309 | * @brief Disable interrupt on PVD Exti Line 16. |
| mbed_official | 354:e67efb2aab0e | 310 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 311 | */ |
| mbed_official | 354:e67efb2aab0e | 312 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 313 | |
| mbed_official | 354:e67efb2aab0e | 314 | /** |
| mbed_official | 354:e67efb2aab0e | 315 | * @brief Enable event on PVD Exti Line 16. |
| mbed_official | 354:e67efb2aab0e | 316 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 317 | */ |
| mbed_official | 354:e67efb2aab0e | 318 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 319 | |
| mbed_official | 354:e67efb2aab0e | 320 | /** |
| mbed_official | 354:e67efb2aab0e | 321 | * @brief Disable event on PVD Exti Line 16. |
| mbed_official | 354:e67efb2aab0e | 322 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 323 | */ |
| mbed_official | 354:e67efb2aab0e | 324 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 325 | |
| mbed_official | 354:e67efb2aab0e | 326 | /** |
| mbed_official | 354:e67efb2aab0e | 327 | * @brief PVD EXTI line configuration: clear falling edge trigger and set rising edge. |
| mbed_official | 354:e67efb2aab0e | 328 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 329 | */ |
| mbed_official | 354:e67efb2aab0e | 330 | #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \ |
| mbed_official | 354:e67efb2aab0e | 331 | EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD) |
| mbed_official | 354:e67efb2aab0e | 332 | |
| mbed_official | 354:e67efb2aab0e | 333 | /** |
| mbed_official | 354:e67efb2aab0e | 334 | * @brief PVD EXTI line configuration: set falling edge trigger. |
| mbed_official | 354:e67efb2aab0e | 335 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 336 | */ |
| mbed_official | 354:e67efb2aab0e | 337 | #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD) |
| mbed_official | 354:e67efb2aab0e | 338 | |
| mbed_official | 354:e67efb2aab0e | 339 | /** |
| mbed_official | 354:e67efb2aab0e | 340 | * @brief PVD EXTI line configuration: set rising edge trigger. |
| mbed_official | 354:e67efb2aab0e | 341 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 342 | */ |
| mbed_official | 354:e67efb2aab0e | 343 | #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD) |
| mbed_official | 354:e67efb2aab0e | 344 | |
| mbed_official | 354:e67efb2aab0e | 345 | /** |
| mbed_official | 354:e67efb2aab0e | 346 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
| mbed_official | 354:e67efb2aab0e | 347 | * @retval EXTI PVD Line Status. |
| mbed_official | 354:e67efb2aab0e | 348 | */ |
| mbed_official | 354:e67efb2aab0e | 349 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 350 | |
| mbed_official | 354:e67efb2aab0e | 351 | /** |
| mbed_official | 354:e67efb2aab0e | 352 | * @brief Clear the PVD EXTI flag. |
| mbed_official | 354:e67efb2aab0e | 353 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 354 | */ |
| mbed_official | 354:e67efb2aab0e | 355 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 356 | |
| mbed_official | 354:e67efb2aab0e | 357 | /** |
| mbed_official | 354:e67efb2aab0e | 358 | * @brief Generate a Software interrupt on selected EXTI line. |
| mbed_official | 354:e67efb2aab0e | 359 | * @retval None. |
| mbed_official | 354:e67efb2aab0e | 360 | */ |
| mbed_official | 354:e67efb2aab0e | 361 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
| mbed_official | 354:e67efb2aab0e | 362 | /** |
| mbed_official | 354:e67efb2aab0e | 363 | * @} |
| mbed_official | 354:e67efb2aab0e | 364 | */ |
| mbed_official | 354:e67efb2aab0e | 365 | |
| mbed_official | 354:e67efb2aab0e | 366 | /* Include PWR HAL Extension module */ |
| mbed_official | 354:e67efb2aab0e | 367 | #include "stm32l1xx_hal_pwr_ex.h" |
| mbed_official | 354:e67efb2aab0e | 368 | |
| mbed_official | 354:e67efb2aab0e | 369 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 354:e67efb2aab0e | 370 | |
| mbed_official | 354:e67efb2aab0e | 371 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
| mbed_official | 354:e67efb2aab0e | 372 | * @{ |
| mbed_official | 354:e67efb2aab0e | 373 | */ |
| mbed_official | 354:e67efb2aab0e | 374 | |
| mbed_official | 354:e67efb2aab0e | 375 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
| mbed_official | 354:e67efb2aab0e | 376 | * @{ |
| mbed_official | 354:e67efb2aab0e | 377 | */ |
| mbed_official | 354:e67efb2aab0e | 378 | |
| mbed_official | 354:e67efb2aab0e | 379 | /* Initialization and de-initialization functions *******************************/ |
| mbed_official | 354:e67efb2aab0e | 380 | void HAL_PWR_DeInit(void); |
| mbed_official | 354:e67efb2aab0e | 381 | void HAL_PWR_EnableBkUpAccess(void); |
| mbed_official | 354:e67efb2aab0e | 382 | void HAL_PWR_DisableBkUpAccess(void); |
| mbed_official | 354:e67efb2aab0e | 383 | |
| mbed_official | 354:e67efb2aab0e | 384 | /** |
| mbed_official | 354:e67efb2aab0e | 385 | * @} |
| mbed_official | 354:e67efb2aab0e | 386 | */ |
| mbed_official | 354:e67efb2aab0e | 387 | |
| mbed_official | 354:e67efb2aab0e | 388 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
| mbed_official | 354:e67efb2aab0e | 389 | * @{ |
| mbed_official | 354:e67efb2aab0e | 390 | */ |
| mbed_official | 354:e67efb2aab0e | 391 | |
| mbed_official | 354:e67efb2aab0e | 392 | /* Peripheral Control functions ************************************************/ |
| mbed_official | 354:e67efb2aab0e | 393 | void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD); |
| mbed_official | 354:e67efb2aab0e | 394 | void HAL_PWR_EnablePVD(void); |
| mbed_official | 354:e67efb2aab0e | 395 | void HAL_PWR_DisablePVD(void); |
| mbed_official | 354:e67efb2aab0e | 396 | |
| mbed_official | 354:e67efb2aab0e | 397 | /* WakeUp pins configuration functions ****************************************/ |
| mbed_official | 354:e67efb2aab0e | 398 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
| mbed_official | 354:e67efb2aab0e | 399 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
| mbed_official | 354:e67efb2aab0e | 400 | |
| mbed_official | 354:e67efb2aab0e | 401 | /* Low Power modes configuration functions ************************************/ |
| mbed_official | 354:e67efb2aab0e | 402 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
| mbed_official | 354:e67efb2aab0e | 403 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
| mbed_official | 354:e67efb2aab0e | 404 | void HAL_PWR_EnterSTANDBYMode(void); |
| mbed_official | 354:e67efb2aab0e | 405 | |
| mbed_official | 354:e67efb2aab0e | 406 | void HAL_PWR_PVD_IRQHandler(void); |
| mbed_official | 354:e67efb2aab0e | 407 | void HAL_PWR_PVDCallback(void); |
| mbed_official | 354:e67efb2aab0e | 408 | /** |
| mbed_official | 354:e67efb2aab0e | 409 | * @} |
| mbed_official | 354:e67efb2aab0e | 410 | */ |
| mbed_official | 354:e67efb2aab0e | 411 | |
| mbed_official | 354:e67efb2aab0e | 412 | /** |
| mbed_official | 354:e67efb2aab0e | 413 | * @} |
| mbed_official | 354:e67efb2aab0e | 414 | */ |
| mbed_official | 354:e67efb2aab0e | 415 | |
| mbed_official | 354:e67efb2aab0e | 416 | /** |
| mbed_official | 354:e67efb2aab0e | 417 | * @} |
| mbed_official | 354:e67efb2aab0e | 418 | */ |
| mbed_official | 354:e67efb2aab0e | 419 | |
| mbed_official | 354:e67efb2aab0e | 420 | /** |
| mbed_official | 354:e67efb2aab0e | 421 | * @} |
| mbed_official | 354:e67efb2aab0e | 422 | */ |
| mbed_official | 354:e67efb2aab0e | 423 | |
| mbed_official | 354:e67efb2aab0e | 424 | #ifdef __cplusplus |
| mbed_official | 354:e67efb2aab0e | 425 | } |
| mbed_official | 354:e67efb2aab0e | 426 | #endif |
| mbed_official | 354:e67efb2aab0e | 427 | |
| mbed_official | 354:e67efb2aab0e | 428 | |
| mbed_official | 354:e67efb2aab0e | 429 | #endif /* __STM32L1xx_HAL_PWR_H */ |
| mbed_official | 354:e67efb2aab0e | 430 | |
| mbed_official | 354:e67efb2aab0e | 431 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |