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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c@387:643a59b3dbac, 2014-11-05 (annotated)

Committer:: mbed_official
Date:: Wed Nov 05 14:30:08 2014 +0000
Revision:: 387:643a59b3dbac
Parent:: 382:ee426a420dbb

Synchronized with git revision cfeccf154f8f92c3ea9c0c881c577c154537aecc

Full URL: https://github.com/mbedmicro/mbed/commit/cfeccf154f8f92c3ea9c0c881c577c154537aecc/

Exporters: STM32L053R8 - IAR exporter

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	376:cb4d9db17537	1	/**
mbed_official	376:cb4d9db17537	2	******************************************************************************
mbed_official	376:cb4d9db17537	3	* @file stm32l0xx_hal_tim.c
mbed_official	376:cb4d9db17537	4	* @author MCD Application Team
mbed_official	376:cb4d9db17537	5	* @version V1.1.0
mbed_official	376:cb4d9db17537	6	* @date 18-June-2014
mbed_official	376:cb4d9db17537	7	* @brief TIM HAL module driver.
mbed_official	376:cb4d9db17537	8	* @brief This file provides firmware functions to manage the following
mbed_official	376:cb4d9db17537	9	* functionalities of the Timer (TIM) peripheral:
mbed_official	376:cb4d9db17537	10	* + Time Base Initialization
mbed_official	376:cb4d9db17537	11	* + Time Base Start
mbed_official	376:cb4d9db17537	12	* + Time Base Start Interruption
mbed_official	376:cb4d9db17537	13	* + Time Base Start DMA
mbed_official	376:cb4d9db17537	14	* + Time Output Compare/PWM Initialization
mbed_official	376:cb4d9db17537	15	* + Time Output Compare/PWM Channel Configuration
mbed_official	376:cb4d9db17537	16	* + Time Output Compare/PWM Start
mbed_official	376:cb4d9db17537	17	* + Time Output Compare/PWM Start Interruption
mbed_official	376:cb4d9db17537	18	* + Time Output Compare/PWM Start DMA
mbed_official	376:cb4d9db17537	19	* + Time Input Capture Initialization
mbed_official	376:cb4d9db17537	20	* + Time Input Capture Channel Configuration
mbed_official	376:cb4d9db17537	21	* + Time Input Capture Start
mbed_official	376:cb4d9db17537	22	* + Time Input Capture Start Interruption
mbed_official	376:cb4d9db17537	23	* + Time Input Capture Start DMA
mbed_official	376:cb4d9db17537	24	* + Time One Pulse Initialization
mbed_official	376:cb4d9db17537	25	* + Time One Pulse Channel Configuration
mbed_official	376:cb4d9db17537	26	* + Time One Pulse Start
mbed_official	376:cb4d9db17537	27	* + Time Encoder Interface Initialization
mbed_official	376:cb4d9db17537	28	* + Time Encoder Interface Start
mbed_official	376:cb4d9db17537	29	* + Time Encoder Interface Start Interruption
mbed_official	376:cb4d9db17537	30	* + Time Encoder Interface Start DMA
mbed_official	376:cb4d9db17537	31	* + Time OCRef clear configuration
mbed_official	376:cb4d9db17537	32	* + Time External Clock configuration
mbed_official	376:cb4d9db17537	33	* + Time Complementary signal bread and dead time configuration
mbed_official	376:cb4d9db17537	34	* + Time Master and Slave synchronization configuration
mbed_official	376:cb4d9db17537	35	@verbatim
mbed_official	376:cb4d9db17537	36	==============================================================================
mbed_official	376:cb4d9db17537	37	##### TIMER Generic features #####
mbed_official	376:cb4d9db17537	38	==============================================================================
mbed_official	376:cb4d9db17537	39	[..] The Timer features include:
mbed_official	376:cb4d9db17537	40	(#) 16-bit up, down, up/down auto-reload counter.
mbed_official	376:cb4d9db17537	41	(#) 16-bit programmable prescaler allowing dividing (also on the fly) the counter clock
mbed_official	376:cb4d9db17537	42	frequency either by any factor between 1 and 65536.
mbed_official	376:cb4d9db17537	43	(#) Up to 4 independent channels for:
mbed_official	376:cb4d9db17537	44	(++) Input Capture
mbed_official	376:cb4d9db17537	45	(++) Output Compare
mbed_official	376:cb4d9db17537	46	(++) PWM generation (Edge and Center-aligned Mode)
mbed_official	376:cb4d9db17537	47	(++) One-pulse mode output
mbed_official	376:cb4d9db17537	48	(#) Synchronization circuit to control the timer with external signals and to interconnect
mbed_official	376:cb4d9db17537	49	several timers together.
mbed_official	376:cb4d9db17537	50	(#) Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning
mbed_official	376:cb4d9db17537	51	purposes
mbed_official	376:cb4d9db17537	52
mbed_official	376:cb4d9db17537	53	##### How to use this driver #####
mbed_official	376:cb4d9db17537	54	================================================================================
mbed_official	376:cb4d9db17537	55	[..]
mbed_official	376:cb4d9db17537	56	(#) Enable the TIM interface clock using
mbed_official	376:cb4d9db17537	57	__TIMx_CLK_ENABLE();
mbed_official	376:cb4d9db17537	58
mbed_official	376:cb4d9db17537	59	(#) TIM pins configuration
mbed_official	376:cb4d9db17537	60	(++) Enable the clock for the TIM GPIOs using the following function:
mbed_official	376:cb4d9db17537	61	__GPIOx_CLK_ENABLE();
mbed_official	376:cb4d9db17537	62	(++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official	376:cb4d9db17537	63
mbed_official	376:cb4d9db17537	64	(#) The external Clock can be configured, if needed (the default clock is the internal clock from the APBx),
mbed_official	376:cb4d9db17537	65	using the following function:
mbed_official	376:cb4d9db17537	66	HAL_TIM_ConfigClockSource, the clock configuration should be done before any start function.
mbed_official	376:cb4d9db17537	67
mbed_official	376:cb4d9db17537	68	(#) Configure the TIM in the desired functioning mode using one of the
mbed_official	376:cb4d9db17537	69	initialization function of this driver:
mbed_official	376:cb4d9db17537	70	(++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
mbed_official	376:cb4d9db17537	71	(++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
mbed_official	376:cb4d9db17537	72	Output Compare signal.
mbed_official	376:cb4d9db17537	73	(++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
mbed_official	376:cb4d9db17537	74	PWM signal.
mbed_official	376:cb4d9db17537	75	(++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
mbed_official	376:cb4d9db17537	76	external signal.
mbed_official	376:cb4d9db17537	77	(++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer in One Pulse Mode.
mbed_official	376:cb4d9db17537	78	(++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
mbed_official	376:cb4d9db17537	79
mbed_official	376:cb4d9db17537	80	(#) Activate the TIM peripheral using one of the start functions:
mbed_official	376:cb4d9db17537	81	HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT(),
mbed_official	376:cb4d9db17537	82	HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT(),
mbed_official	376:cb4d9db17537	83	HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT(),
mbed_official	376:cb4d9db17537	84	HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT(),
mbed_official	376:cb4d9db17537	85	HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT(),
mbed_official	376:cb4d9db17537	86	HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA() or HAL_TIM_Encoder_Start_IT()
mbed_official	376:cb4d9db17537	87
mbed_official	376:cb4d9db17537	88	(#) The DMA Burst is managed with the two following functions:
mbed_official	376:cb4d9db17537	89	HAL_TIM_DMABurst_WriteStart
mbed_official	376:cb4d9db17537	90	HAL_TIM_DMABurst_ReadStart
mbed_official	376:cb4d9db17537	91
mbed_official	376:cb4d9db17537	92	@endverbatim
mbed_official	376:cb4d9db17537	93	******************************************************************************
mbed_official	376:cb4d9db17537	94	* @attention
mbed_official	376:cb4d9db17537	95	*
mbed_official	376:cb4d9db17537	96	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	376:cb4d9db17537	97	*
mbed_official	376:cb4d9db17537	98	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	376:cb4d9db17537	99	* are permitted provided that the following conditions are met:
mbed_official	376:cb4d9db17537	100	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	376:cb4d9db17537	101	* this list of conditions and the following disclaimer.
mbed_official	376:cb4d9db17537	102	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	376:cb4d9db17537	103	* this list of conditions and the following disclaimer in the documentation
mbed_official	376:cb4d9db17537	104	* and/or other materials provided with the distribution.
mbed_official	376:cb4d9db17537	105	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	376:cb4d9db17537	106	* may be used to endorse or promote products derived from this software
mbed_official	376:cb4d9db17537	107	* without specific prior written permission.
mbed_official	376:cb4d9db17537	108	*
mbed_official	376:cb4d9db17537	109	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	376:cb4d9db17537	110	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	376:cb4d9db17537	111	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	376:cb4d9db17537	112	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	376:cb4d9db17537	113	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	376:cb4d9db17537	114	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	376:cb4d9db17537	115	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	376:cb4d9db17537	116	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	376:cb4d9db17537	117	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	376:cb4d9db17537	118	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	376:cb4d9db17537	119	*
mbed_official	376:cb4d9db17537	120	******************************************************************************
mbed_official	376:cb4d9db17537	121	*/
mbed_official	376:cb4d9db17537	122
mbed_official	376:cb4d9db17537	123	/* Includes ------------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	124	#include "stm32l0xx_hal.h"
mbed_official	376:cb4d9db17537	125
mbed_official	376:cb4d9db17537	126	/** @addtogroup STM32L0xx_HAL_Driver
mbed_official	376:cb4d9db17537	127	* @{
mbed_official	376:cb4d9db17537	128	*/
mbed_official	376:cb4d9db17537	129
mbed_official	376:cb4d9db17537	130	/** @defgroup TIM
mbed_official	376:cb4d9db17537	131	* @brief TIM HAL module driver
mbed_official	376:cb4d9db17537	132	* @{
mbed_official	376:cb4d9db17537	133	*/
mbed_official	376:cb4d9db17537	134
mbed_official	376:cb4d9db17537	135	#ifdef HAL_TIM_MODULE_ENABLED
mbed_official	376:cb4d9db17537	136
mbed_official	376:cb4d9db17537	137	/* Private typedef -----------------------------------------------------------*/
mbed_official	376:cb4d9db17537	138	/* Private define ------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	139	/* Private macro -------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	140	/* Private variables ---------------------------------------------------------*/
mbed_official	376:cb4d9db17537	141	/* Private function prototypes -----------------------------------------------*/
mbed_official	376:cb4d9db17537	142	static void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure);
mbed_official	376:cb4d9db17537	143	static void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	376:cb4d9db17537	144	static void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	376:cb4d9db17537	145	static void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	376:cb4d9db17537	146	static void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config);
mbed_official	376:cb4d9db17537	147	static void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	148	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	149	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	150	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	151	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	152	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
mbed_official	376:cb4d9db17537	153	static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
mbed_official	376:cb4d9db17537	154	static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t TIM_ITRx);
mbed_official	376:cb4d9db17537	155	static void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
mbed_official	376:cb4d9db17537	156	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	157	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	158	/* Private functions ---------------------------------------------------------*/
mbed_official	376:cb4d9db17537	159
mbed_official	376:cb4d9db17537	160	/** @defgroup TIM_Private_Functions
mbed_official	376:cb4d9db17537	161	* @{
mbed_official	376:cb4d9db17537	162	*/
mbed_official	376:cb4d9db17537	163
mbed_official	376:cb4d9db17537	164	/** @defgroup TIM_Group1 Initialization/de-initialization functions
mbed_official	376:cb4d9db17537	165	* @brief Initialization and Configuration functions
mbed_official	376:cb4d9db17537	166	*
mbed_official	376:cb4d9db17537	167	@verbatim
mbed_official	376:cb4d9db17537	168	===============================================================================
mbed_official	376:cb4d9db17537	169	##### Initialization and de-initialization functions #####
mbed_official	376:cb4d9db17537	170	===============================================================================
mbed_official	376:cb4d9db17537	171	[..] This section provides functions allowing to:
mbed_official	376:cb4d9db17537	172	(+) Initialize and configure the TIM.
mbed_official	376:cb4d9db17537	173	(+) De-initialize the TIM.
mbed_official	376:cb4d9db17537	174
mbed_official	376:cb4d9db17537	175	@endverbatim
mbed_official	376:cb4d9db17537	176	* @{
mbed_official	376:cb4d9db17537	177	*/
mbed_official	376:cb4d9db17537	178	/**
mbed_official	376:cb4d9db17537	179	* @brief Initializes the TIM Time base Unit according to the specified
mbed_official	376:cb4d9db17537	180	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	181	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	182	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	183	* @retval HAL status
mbed_official	376:cb4d9db17537	184	*/
mbed_official	376:cb4d9db17537	185	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	186	{
mbed_official	376:cb4d9db17537	187	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	188	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	189	{
mbed_official	376:cb4d9db17537	190	return HAL_ERROR;
mbed_official	376:cb4d9db17537	191	}
mbed_official	376:cb4d9db17537	192
mbed_official	376:cb4d9db17537	193	/* Check the parameters */
mbed_official	376:cb4d9db17537	194	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	195	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	376:cb4d9db17537	196	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	376:cb4d9db17537	197
mbed_official	376:cb4d9db17537	198	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	199	{
mbed_official	376:cb4d9db17537	200	/* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official	376:cb4d9db17537	201	HAL_TIM_Base_MspInit(htim);
mbed_official	376:cb4d9db17537	202	}
mbed_official	376:cb4d9db17537	203
mbed_official	376:cb4d9db17537	204	/* Set the TIM state */
mbed_official	376:cb4d9db17537	205	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	206
mbed_official	376:cb4d9db17537	207	/* Set the Time Base configuration */
mbed_official	376:cb4d9db17537	208	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	209
mbed_official	376:cb4d9db17537	210	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	211	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	212
mbed_official	376:cb4d9db17537	213	return HAL_OK;
mbed_official	376:cb4d9db17537	214	}
mbed_official	376:cb4d9db17537	215
mbed_official	376:cb4d9db17537	216	/**
mbed_official	376:cb4d9db17537	217	* @brief Initializes the TIM Output Compare according to the specified
mbed_official	376:cb4d9db17537	218	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	219	* @param htim: TIM Output Compare handle
mbed_official	376:cb4d9db17537	220	* @retval HAL status
mbed_official	376:cb4d9db17537	221	*/
mbed_official	376:cb4d9db17537	222	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
mbed_official	376:cb4d9db17537	223	{
mbed_official	376:cb4d9db17537	224	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	225	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	226	{
mbed_official	376:cb4d9db17537	227	return HAL_ERROR;
mbed_official	376:cb4d9db17537	228	}
mbed_official	376:cb4d9db17537	229
mbed_official	376:cb4d9db17537	230	/* Check the parameters */
mbed_official	376:cb4d9db17537	231	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	232	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	376:cb4d9db17537	233	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	376:cb4d9db17537	234
mbed_official	376:cb4d9db17537	235	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	236	{
mbed_official	376:cb4d9db17537	237	/* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official	376:cb4d9db17537	238	HAL_TIM_OC_MspInit(htim);
mbed_official	376:cb4d9db17537	239	}
mbed_official	376:cb4d9db17537	240	/* Set the TIM state */
mbed_official	376:cb4d9db17537	241	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	242
mbed_official	376:cb4d9db17537	243	/* Init the base time for the Output Compare */
mbed_official	376:cb4d9db17537	244	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	245
mbed_official	376:cb4d9db17537	246	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	247	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	248
mbed_official	376:cb4d9db17537	249	return HAL_OK;
mbed_official	376:cb4d9db17537	250	}
mbed_official	376:cb4d9db17537	251
mbed_official	376:cb4d9db17537	252	/**
mbed_official	376:cb4d9db17537	253	* @brief Initializes the TIM PWM Time Base according to the specified
mbed_official	376:cb4d9db17537	254	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	255	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	256	* @retval HAL status
mbed_official	376:cb4d9db17537	257	*/
mbed_official	376:cb4d9db17537	258	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	259	{
mbed_official	376:cb4d9db17537	260	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	261	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	262	{
mbed_official	376:cb4d9db17537	263	return HAL_ERROR;
mbed_official	376:cb4d9db17537	264	}
mbed_official	376:cb4d9db17537	265
mbed_official	376:cb4d9db17537	266	/* Check the parameters */
mbed_official	376:cb4d9db17537	267	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	268	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	376:cb4d9db17537	269	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	376:cb4d9db17537	270
mbed_official	376:cb4d9db17537	271	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	272	{
mbed_official	376:cb4d9db17537	273	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	274	HAL_TIM_PWM_MspInit(htim);
mbed_official	376:cb4d9db17537	275	}
mbed_official	376:cb4d9db17537	276
mbed_official	376:cb4d9db17537	277	/* Set the TIM state */
mbed_official	376:cb4d9db17537	278	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	279
mbed_official	376:cb4d9db17537	280	/* Init the base time for the PWM */
mbed_official	376:cb4d9db17537	281	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	282
mbed_official	376:cb4d9db17537	283	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	284	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	285
mbed_official	376:cb4d9db17537	286	return HAL_OK;
mbed_official	376:cb4d9db17537	287	}
mbed_official	376:cb4d9db17537	288
mbed_official	376:cb4d9db17537	289	/**
mbed_official	376:cb4d9db17537	290	* @brief Initializes the TIM Input Capture Time base according to the specified
mbed_official	376:cb4d9db17537	291	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	292	* @param htim: TIM Input Capture handle
mbed_official	376:cb4d9db17537	293	* @retval HAL status
mbed_official	376:cb4d9db17537	294	*/
mbed_official	376:cb4d9db17537	295	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	296	{
mbed_official	376:cb4d9db17537	297	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	298	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	299	{
mbed_official	376:cb4d9db17537	300	return HAL_ERROR;
mbed_official	376:cb4d9db17537	301	}
mbed_official	376:cb4d9db17537	302
mbed_official	376:cb4d9db17537	303	/* Check the parameters */
mbed_official	376:cb4d9db17537	304	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	305	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	376:cb4d9db17537	306	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	376:cb4d9db17537	307
mbed_official	376:cb4d9db17537	308	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	309	{
mbed_official	376:cb4d9db17537	310	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	311	HAL_TIM_IC_MspInit(htim);
mbed_official	376:cb4d9db17537	312	}
mbed_official	376:cb4d9db17537	313
mbed_official	376:cb4d9db17537	314	/* Set the TIM state */
mbed_official	376:cb4d9db17537	315	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	316
mbed_official	376:cb4d9db17537	317	/* Init the base time for the input capture */
mbed_official	376:cb4d9db17537	318	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	319
mbed_official	376:cb4d9db17537	320	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	321	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	322
mbed_official	376:cb4d9db17537	323	return HAL_OK;
mbed_official	376:cb4d9db17537	324	}
mbed_official	376:cb4d9db17537	325
mbed_official	376:cb4d9db17537	326	/**
mbed_official	376:cb4d9db17537	327	* @brief Initializes the TIM One Pulse Time Base according to the specified
mbed_official	376:cb4d9db17537	328	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	329	* @param htim: TIM OnePulse handle
mbed_official	376:cb4d9db17537	330	* @param OnePulseMode: Select the One pulse mode.
mbed_official	376:cb4d9db17537	331	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	332	* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
mbed_official	376:cb4d9db17537	333	* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses wil be generated.
mbed_official	376:cb4d9db17537	334	* @retval HAL status
mbed_official	376:cb4d9db17537	335	*/
mbed_official	376:cb4d9db17537	336	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
mbed_official	376:cb4d9db17537	337	{
mbed_official	376:cb4d9db17537	338	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	339	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	340	{
mbed_official	376:cb4d9db17537	341	return HAL_ERROR;
mbed_official	376:cb4d9db17537	342	}
mbed_official	376:cb4d9db17537	343
mbed_official	376:cb4d9db17537	344	/* Check the parameters */
mbed_official	376:cb4d9db17537	345	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	346	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	376:cb4d9db17537	347	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	376:cb4d9db17537	348	assert_param(IS_TIM_OPM_MODE(OnePulseMode));
mbed_official	376:cb4d9db17537	349
mbed_official	376:cb4d9db17537	350	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	351	{
mbed_official	376:cb4d9db17537	352	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	353	HAL_TIM_OnePulse_MspInit(htim);
mbed_official	376:cb4d9db17537	354	}
mbed_official	376:cb4d9db17537	355
mbed_official	376:cb4d9db17537	356	/* Set the TIM state */
mbed_official	376:cb4d9db17537	357	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	358
mbed_official	376:cb4d9db17537	359	/* Configure the Time base in the One Pulse Mode */
mbed_official	376:cb4d9db17537	360	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	361
mbed_official	376:cb4d9db17537	362	/* Reset the OPM Bit */
mbed_official	376:cb4d9db17537	363	htim->Instance->CR1 &= ~TIM_CR1_OPM;
mbed_official	376:cb4d9db17537	364
mbed_official	376:cb4d9db17537	365	/* Configure the OPM Mode */
mbed_official	376:cb4d9db17537	366	htim->Instance->CR1 \|= OnePulseMode;
mbed_official	376:cb4d9db17537	367
mbed_official	376:cb4d9db17537	368	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	369	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	370
mbed_official	376:cb4d9db17537	371	return HAL_OK;
mbed_official	376:cb4d9db17537	372	}
mbed_official	376:cb4d9db17537	373
mbed_official	376:cb4d9db17537	374	/**
mbed_official	376:cb4d9db17537	375	* @brief Initializes the TIM Encoder Interface and create the associated handle.
mbed_official	376:cb4d9db17537	376	* @param htim: TIM Encoder Interface handle
mbed_official	376:cb4d9db17537	377	* @param sConfig: TIM Encoder Interface configuration structure
mbed_official	376:cb4d9db17537	378	* @retval HAL status
mbed_official	376:cb4d9db17537	379	*/
mbed_official	376:cb4d9db17537	380	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig)
mbed_official	376:cb4d9db17537	381	{
mbed_official	376:cb4d9db17537	382	uint32_t tmpsmcr = 0;
mbed_official	376:cb4d9db17537	383	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	384	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	385
mbed_official	376:cb4d9db17537	386	/* Check the TIM handle allocation */
mbed_official	387:643a59b3dbac	387	if(htim == HAL_NULL)
mbed_official	376:cb4d9db17537	388	{
mbed_official	376:cb4d9db17537	389	return HAL_ERROR;
mbed_official	376:cb4d9db17537	390	}
mbed_official	376:cb4d9db17537	391
mbed_official	376:cb4d9db17537	392	/* Check the parameters */
mbed_official	376:cb4d9db17537	393	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	394	assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
mbed_official	376:cb4d9db17537	395	assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
mbed_official	376:cb4d9db17537	396	assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
mbed_official	376:cb4d9db17537	397	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official	376:cb4d9db17537	398	assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
mbed_official	376:cb4d9db17537	399	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official	376:cb4d9db17537	400	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
mbed_official	376:cb4d9db17537	401	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official	376:cb4d9db17537	402	assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
mbed_official	376:cb4d9db17537	403
mbed_official	376:cb4d9db17537	404	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	405	{
mbed_official	376:cb4d9db17537	406	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	407	HAL_TIM_Encoder_MspInit(htim);
mbed_official	376:cb4d9db17537	408	}
mbed_official	376:cb4d9db17537	409
mbed_official	376:cb4d9db17537	410	/* Set the TIM state */
mbed_official	376:cb4d9db17537	411	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	412
mbed_official	376:cb4d9db17537	413	/* Reset the SMS bits */
mbed_official	376:cb4d9db17537	414	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	376:cb4d9db17537	415
mbed_official	376:cb4d9db17537	416	/* Configure the Time base in the Encoder Mode */
mbed_official	376:cb4d9db17537	417	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	376:cb4d9db17537	418
mbed_official	376:cb4d9db17537	419	/* Get the TIMx SMCR register value */
mbed_official	376:cb4d9db17537	420	tmpsmcr = htim->Instance->SMCR;
mbed_official	376:cb4d9db17537	421
mbed_official	376:cb4d9db17537	422	/* Get the TIMx CCMR1 register value */
mbed_official	376:cb4d9db17537	423	tmpccmr1 = htim->Instance->CCMR1;
mbed_official	376:cb4d9db17537	424
mbed_official	376:cb4d9db17537	425	/* Get the TIMx CCER register value */
mbed_official	376:cb4d9db17537	426	tmpccer = htim->Instance->CCER;
mbed_official	376:cb4d9db17537	427
mbed_official	376:cb4d9db17537	428	/* Set the encoder Mode */
mbed_official	376:cb4d9db17537	429	tmpsmcr \|= sConfig->EncoderMode;
mbed_official	376:cb4d9db17537	430
mbed_official	376:cb4d9db17537	431	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official	376:cb4d9db17537	432	tmpccmr1 &= ~(TIM_CCMR1_CC1S \| TIM_CCMR1_CC2S);
mbed_official	376:cb4d9db17537	433	tmpccmr1 \|= (sConfig->IC1Selection \| (sConfig->IC2Selection << 8));
mbed_official	376:cb4d9db17537	434
mbed_official	376:cb4d9db17537	435	/* Set the the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
mbed_official	376:cb4d9db17537	436	tmpccmr1 &= ~(TIM_CCMR1_IC1PSC \| TIM_CCMR1_IC2PSC);
mbed_official	376:cb4d9db17537	437	tmpccmr1 &= ~(TIM_CCMR1_IC1F \| TIM_CCMR1_IC2F);
mbed_official	376:cb4d9db17537	438	tmpccmr1 \|= sConfig->IC1Prescaler \| (sConfig->IC2Prescaler << 8);
mbed_official	376:cb4d9db17537	439	tmpccmr1 \|= (sConfig->IC1Filter << 4) \| (sConfig->IC2Filter << 12);
mbed_official	376:cb4d9db17537	440
mbed_official	376:cb4d9db17537	441	/* Set the TI1 and the TI2 Polarities */
mbed_official	376:cb4d9db17537	442	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC2P);
mbed_official	376:cb4d9db17537	443	tmpccer &= ~(TIM_CCER_CC1NP \| TIM_CCER_CC2NP);
mbed_official	376:cb4d9db17537	444	tmpccer \|= sConfig->IC1Polarity \| (sConfig->IC2Polarity << 4);
mbed_official	376:cb4d9db17537	445
mbed_official	376:cb4d9db17537	446	/* Write to TIMx SMCR */
mbed_official	376:cb4d9db17537	447	htim->Instance->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	448
mbed_official	376:cb4d9db17537	449	/* Write to TIMx CCMR1 */
mbed_official	376:cb4d9db17537	450	htim->Instance->CCMR1 = tmpccmr1;
mbed_official	376:cb4d9db17537	451
mbed_official	376:cb4d9db17537	452	/* Write to TIMx CCER */
mbed_official	376:cb4d9db17537	453	htim->Instance->CCER = tmpccer;
mbed_official	376:cb4d9db17537	454
mbed_official	376:cb4d9db17537	455	/* Initialize the TIM state*/
mbed_official	376:cb4d9db17537	456	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	457
mbed_official	376:cb4d9db17537	458	return HAL_OK;
mbed_official	376:cb4d9db17537	459	}
mbed_official	376:cb4d9db17537	460
mbed_official	376:cb4d9db17537	461	/**
mbed_official	376:cb4d9db17537	462	* @brief DeInitializes the TIM Base peripheral
mbed_official	376:cb4d9db17537	463	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	464	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	465	* @retval HAL status
mbed_official	376:cb4d9db17537	466	*/
mbed_official	376:cb4d9db17537	467	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	468	{
mbed_official	376:cb4d9db17537	469	/* Check the parameters */
mbed_official	376:cb4d9db17537	470	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	471
mbed_official	376:cb4d9db17537	472	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	473
mbed_official	376:cb4d9db17537	474	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	475	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	476
mbed_official	376:cb4d9db17537	477	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	376:cb4d9db17537	478	HAL_TIM_Base_MspDeInit(htim);
mbed_official	376:cb4d9db17537	479
mbed_official	376:cb4d9db17537	480	/* Change TIM state */
mbed_official	376:cb4d9db17537	481	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	482
mbed_official	376:cb4d9db17537	483	/* Release Lock */
mbed_official	376:cb4d9db17537	484	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	485
mbed_official	376:cb4d9db17537	486	return HAL_OK;
mbed_official	376:cb4d9db17537	487	}
mbed_official	376:cb4d9db17537	488
mbed_official	376:cb4d9db17537	489	/**
mbed_official	376:cb4d9db17537	490	* @brief DeInitializes the TIM peripheral
mbed_official	376:cb4d9db17537	491	* @param htim: TIM Output Compare handle
mbed_official	376:cb4d9db17537	492	* @retval HAL status
mbed_official	376:cb4d9db17537	493	*/
mbed_official	376:cb4d9db17537	494	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	495	{
mbed_official	376:cb4d9db17537	496	/* Check the parameters */
mbed_official	376:cb4d9db17537	497	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	498
mbed_official	376:cb4d9db17537	499	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	500
mbed_official	376:cb4d9db17537	501	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	502	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	503
mbed_official	376:cb4d9db17537	504	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	505	HAL_TIM_OC_MspDeInit(htim);
mbed_official	376:cb4d9db17537	506
mbed_official	376:cb4d9db17537	507	/* Change TIM state */
mbed_official	376:cb4d9db17537	508	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	509
mbed_official	376:cb4d9db17537	510	/* Release Lock */
mbed_official	376:cb4d9db17537	511	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	512
mbed_official	376:cb4d9db17537	513	return HAL_OK;
mbed_official	376:cb4d9db17537	514	}
mbed_official	376:cb4d9db17537	515
mbed_official	376:cb4d9db17537	516	/**
mbed_official	376:cb4d9db17537	517	* @brief DeInitializes the TIM peripheral
mbed_official	376:cb4d9db17537	518	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	519	* @retval HAL status
mbed_official	376:cb4d9db17537	520	*/
mbed_official	376:cb4d9db17537	521	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	522	{
mbed_official	376:cb4d9db17537	523	/* Check the parameters */
mbed_official	376:cb4d9db17537	524	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	525
mbed_official	376:cb4d9db17537	526	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	527
mbed_official	376:cb4d9db17537	528	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	529	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	530
mbed_official	376:cb4d9db17537	531	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	532	HAL_TIM_PWM_MspDeInit(htim);
mbed_official	376:cb4d9db17537	533
mbed_official	376:cb4d9db17537	534	/* Change TIM state */
mbed_official	376:cb4d9db17537	535	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	536
mbed_official	376:cb4d9db17537	537	/* Release Lock */
mbed_official	376:cb4d9db17537	538	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	539
mbed_official	376:cb4d9db17537	540	return HAL_OK;
mbed_official	376:cb4d9db17537	541	}
mbed_official	376:cb4d9db17537	542
mbed_official	376:cb4d9db17537	543	/**
mbed_official	376:cb4d9db17537	544	* @brief DeInitializes the TIM peripheral
mbed_official	376:cb4d9db17537	545	* @param htim: TIM Input Capture handle
mbed_official	376:cb4d9db17537	546	* @retval HAL status
mbed_official	376:cb4d9db17537	547	*/
mbed_official	376:cb4d9db17537	548	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	549	{
mbed_official	376:cb4d9db17537	550	/* Check the parameters */
mbed_official	376:cb4d9db17537	551	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	552
mbed_official	376:cb4d9db17537	553	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	554
mbed_official	376:cb4d9db17537	555	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	556	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	557
mbed_official	376:cb4d9db17537	558	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	376:cb4d9db17537	559	HAL_TIM_IC_MspDeInit(htim);
mbed_official	376:cb4d9db17537	560
mbed_official	376:cb4d9db17537	561	/* Change TIM state */
mbed_official	376:cb4d9db17537	562	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	563
mbed_official	376:cb4d9db17537	564	/* Release Lock */
mbed_official	376:cb4d9db17537	565	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	566
mbed_official	376:cb4d9db17537	567	return HAL_OK;
mbed_official	376:cb4d9db17537	568	}
mbed_official	376:cb4d9db17537	569
mbed_official	376:cb4d9db17537	570	/**
mbed_official	376:cb4d9db17537	571	* @brief DeInitializes the TIM One Pulse
mbed_official	376:cb4d9db17537	572	* @param htim: TIM One Pulse handle
mbed_official	376:cb4d9db17537	573	* @retval HAL status
mbed_official	376:cb4d9db17537	574	*/
mbed_official	376:cb4d9db17537	575	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	576	{
mbed_official	376:cb4d9db17537	577	/* Check the parameters */
mbed_official	376:cb4d9db17537	578	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	579
mbed_official	376:cb4d9db17537	580	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	581
mbed_official	376:cb4d9db17537	582	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	583	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	584
mbed_official	376:cb4d9db17537	585	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	376:cb4d9db17537	586	HAL_TIM_OnePulse_MspDeInit(htim);
mbed_official	376:cb4d9db17537	587
mbed_official	376:cb4d9db17537	588	/* Change TIM state */
mbed_official	376:cb4d9db17537	589	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	590
mbed_official	376:cb4d9db17537	591	/* Release Lock */
mbed_official	376:cb4d9db17537	592	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	593
mbed_official	376:cb4d9db17537	594	return HAL_OK;
mbed_official	376:cb4d9db17537	595	}
mbed_official	376:cb4d9db17537	596
mbed_official	376:cb4d9db17537	597	/**
mbed_official	376:cb4d9db17537	598	* @brief DeInitializes the TIM Encoder interface
mbed_official	376:cb4d9db17537	599	* @param htim: TIM Encoder handle
mbed_official	376:cb4d9db17537	600	* @retval HAL status
mbed_official	376:cb4d9db17537	601	*/
mbed_official	376:cb4d9db17537	602	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	603	{
mbed_official	376:cb4d9db17537	604	/* Check the parameters */
mbed_official	376:cb4d9db17537	605	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	606
mbed_official	376:cb4d9db17537	607	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	608
mbed_official	376:cb4d9db17537	609	/* Disable the TIM Peripheral Clock */
mbed_official	376:cb4d9db17537	610	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	611
mbed_official	376:cb4d9db17537	612	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	376:cb4d9db17537	613	HAL_TIM_Encoder_MspDeInit(htim);
mbed_official	376:cb4d9db17537	614
mbed_official	376:cb4d9db17537	615	/* Change TIM state */
mbed_official	376:cb4d9db17537	616	htim->State = HAL_TIM_STATE_RESET;
mbed_official	376:cb4d9db17537	617
mbed_official	376:cb4d9db17537	618	/* Release Lock */
mbed_official	376:cb4d9db17537	619	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	620
mbed_official	376:cb4d9db17537	621	return HAL_OK;
mbed_official	376:cb4d9db17537	622	}
mbed_official	376:cb4d9db17537	623
mbed_official	376:cb4d9db17537	624	/**
mbed_official	376:cb4d9db17537	625	* @brief Initializes the TIM Base MSP.
mbed_official	376:cb4d9db17537	626	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	627	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	628	* @retval None
mbed_official	376:cb4d9db17537	629	*/
mbed_official	376:cb4d9db17537	630	__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	631	{
mbed_official	376:cb4d9db17537	632	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	633	the HAL_TIM_Base_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	634	*/
mbed_official	376:cb4d9db17537	635	}
mbed_official	376:cb4d9db17537	636
mbed_official	376:cb4d9db17537	637	/**
mbed_official	376:cb4d9db17537	638	* @brief Initializes the TIM Output Compare MSP.
mbed_official	376:cb4d9db17537	639	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	640	* @retval None
mbed_official	376:cb4d9db17537	641	*/
mbed_official	376:cb4d9db17537	642	__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	643	{
mbed_official	376:cb4d9db17537	644	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	645	the HAL_TIM_OC_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	646	*/
mbed_official	376:cb4d9db17537	647	}
mbed_official	376:cb4d9db17537	648
mbed_official	376:cb4d9db17537	649	/**
mbed_official	376:cb4d9db17537	650	* @brief Initializes the TIM PWM MSP.
mbed_official	376:cb4d9db17537	651	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	652	* @retval None
mbed_official	376:cb4d9db17537	653	*/
mbed_official	376:cb4d9db17537	654	__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	655	{
mbed_official	376:cb4d9db17537	656	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	657	the HAL_TIM_PWM_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	658	*/
mbed_official	376:cb4d9db17537	659	}
mbed_official	376:cb4d9db17537	660
mbed_official	376:cb4d9db17537	661	/**
mbed_official	376:cb4d9db17537	662	* @brief Initializes the TIM INput Capture MSP.
mbed_official	376:cb4d9db17537	663	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	664	* @retval None
mbed_official	376:cb4d9db17537	665	*/
mbed_official	376:cb4d9db17537	666	__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	667	{
mbed_official	376:cb4d9db17537	668	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	669	the HAL_TIM_IC_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	670	*/
mbed_official	376:cb4d9db17537	671	}
mbed_official	376:cb4d9db17537	672
mbed_official	376:cb4d9db17537	673	/**
mbed_official	376:cb4d9db17537	674	* @brief Initializes the TIM One Pulse MSP.
mbed_official	376:cb4d9db17537	675	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	676	* @retval None
mbed_official	376:cb4d9db17537	677	*/
mbed_official	376:cb4d9db17537	678	__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	679	{
mbed_official	376:cb4d9db17537	680	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	681	the HAL_TIM_OnePulse_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	682	*/
mbed_official	376:cb4d9db17537	683	}
mbed_official	376:cb4d9db17537	684
mbed_official	376:cb4d9db17537	685	/**
mbed_official	376:cb4d9db17537	686	* @brief Initializes the TIM Encoder Interface MSP.
mbed_official	376:cb4d9db17537	687	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	688	* @retval None
mbed_official	376:cb4d9db17537	689	*/
mbed_official	376:cb4d9db17537	690	__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	691	{
mbed_official	376:cb4d9db17537	692	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	693	the HAL_TIM_Encoder_MspInit could be implemented in the user file
mbed_official	376:cb4d9db17537	694	*/
mbed_official	376:cb4d9db17537	695	}
mbed_official	376:cb4d9db17537	696
mbed_official	376:cb4d9db17537	697	/**
mbed_official	376:cb4d9db17537	698	* @brief DeInitializes TIM Base MSP.
mbed_official	376:cb4d9db17537	699	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	700	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	701	* @retval None
mbed_official	376:cb4d9db17537	702	*/
mbed_official	376:cb4d9db17537	703	__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	704	{
mbed_official	376:cb4d9db17537	705	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	706	the HAL_TIM_Base_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	707	*/
mbed_official	376:cb4d9db17537	708	}
mbed_official	376:cb4d9db17537	709
mbed_official	376:cb4d9db17537	710	/**
mbed_official	376:cb4d9db17537	711	* @brief DeInitializes TIM Output Compare MSP.
mbed_official	376:cb4d9db17537	712	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	713	* @retval None
mbed_official	376:cb4d9db17537	714	*/
mbed_official	376:cb4d9db17537	715	__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	716	{
mbed_official	376:cb4d9db17537	717	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	718	the HAL_TIM_OC_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	719	*/
mbed_official	376:cb4d9db17537	720	}
mbed_official	376:cb4d9db17537	721
mbed_official	376:cb4d9db17537	722	/**
mbed_official	376:cb4d9db17537	723	* @brief DeInitializes TIM PWM MSP.
mbed_official	376:cb4d9db17537	724	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	725	* @retval None
mbed_official	376:cb4d9db17537	726	*/
mbed_official	376:cb4d9db17537	727	__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	728	{
mbed_official	376:cb4d9db17537	729	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	730	the HAL_TIM_PWM_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	731	*/
mbed_official	376:cb4d9db17537	732	}
mbed_official	376:cb4d9db17537	733
mbed_official	376:cb4d9db17537	734	/**
mbed_official	376:cb4d9db17537	735	* @brief DeInitializes TIM Input Capture MSP.
mbed_official	376:cb4d9db17537	736	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	737	* @retval None
mbed_official	376:cb4d9db17537	738	*/
mbed_official	376:cb4d9db17537	739	__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	740	{
mbed_official	376:cb4d9db17537	741	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	742	the HAL_TIM_IC_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	743	*/
mbed_official	376:cb4d9db17537	744	}
mbed_official	376:cb4d9db17537	745
mbed_official	376:cb4d9db17537	746	/**
mbed_official	376:cb4d9db17537	747	* @brief DeInitializes TIM One Pulse MSP.
mbed_official	376:cb4d9db17537	748	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	749	* @retval None
mbed_official	376:cb4d9db17537	750	*/
mbed_official	376:cb4d9db17537	751	__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	752	{
mbed_official	376:cb4d9db17537	753	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	754	the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	755	*/
mbed_official	376:cb4d9db17537	756	}
mbed_official	376:cb4d9db17537	757
mbed_official	376:cb4d9db17537	758	/**
mbed_official	376:cb4d9db17537	759	* @brief DeInitializes TIM Encoder Interface MSP.
mbed_official	376:cb4d9db17537	760	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	761	* @retval None
mbed_official	376:cb4d9db17537	762	*/
mbed_official	376:cb4d9db17537	763	__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	764	{
mbed_official	376:cb4d9db17537	765	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	766	the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
mbed_official	376:cb4d9db17537	767	*/
mbed_official	376:cb4d9db17537	768	}
mbed_official	376:cb4d9db17537	769
mbed_official	376:cb4d9db17537	770	/**
mbed_official	376:cb4d9db17537	771	* @}
mbed_official	376:cb4d9db17537	772	*/
mbed_official	376:cb4d9db17537	773
mbed_official	376:cb4d9db17537	774	/** @defgroup TIM_Group2 I/O operation functions
mbed_official	376:cb4d9db17537	775	* @brief I/O operation functions
mbed_official	376:cb4d9db17537	776	*
mbed_official	376:cb4d9db17537	777	@verbatim
mbed_official	376:cb4d9db17537	778	===============================================================================
mbed_official	376:cb4d9db17537	779	##### IO operation functions #####
mbed_official	376:cb4d9db17537	780	===============================================================================
mbed_official	376:cb4d9db17537	781	[..] This section provides functions allowing to:
mbed_official	376:cb4d9db17537	782	(+) Start the Time Base.
mbed_official	376:cb4d9db17537	783	(+) Stop the Time Base.
mbed_official	376:cb4d9db17537	784	(+) Start the Time Base and enable interrupt.
mbed_official	376:cb4d9db17537	785	(+) Stop the Time Base and disable interrupt.
mbed_official	376:cb4d9db17537	786	(+) Start the Time Base and enable DMA transfer.
mbed_official	376:cb4d9db17537	787	(+) Stop the Time Base and disable DMA transfer.
mbed_official	376:cb4d9db17537	788	(+) Start the Output Compare/PWM.
mbed_official	376:cb4d9db17537	789	(+) Stop the Output Compare/PWM.
mbed_official	376:cb4d9db17537	790	(+) Start the Output Compare/PWM and enable interrupts.
mbed_official	376:cb4d9db17537	791	(+) Stop the Output Compare/PWM and disable interrupts.
mbed_official	376:cb4d9db17537	792	(+) Start the Output Compare/PWM and enable DMA transfers.
mbed_official	376:cb4d9db17537	793	(+) Stop the Output Compare/PWM and disable DMA transfers.
mbed_official	376:cb4d9db17537	794	(+) Start the Input Capture measurement.
mbed_official	376:cb4d9db17537	795	(+) Stop the Input Capture.
mbed_official	376:cb4d9db17537	796	(+) Start the Input Capture and enable interrupts.
mbed_official	376:cb4d9db17537	797	(+) Stop the Input Capture and disable interrupts.
mbed_official	376:cb4d9db17537	798	(+) Start the Input Capture and enable DMA transfers.
mbed_official	376:cb4d9db17537	799	(+) Stop the Input Capture and disable DMA transfers.
mbed_official	376:cb4d9db17537	800	(+) Start the One Pulse generation.
mbed_official	376:cb4d9db17537	801	(+) Stop the One Pulse.
mbed_official	376:cb4d9db17537	802	(+) Start the One Pulse and enable interrupts.
mbed_official	376:cb4d9db17537	803	(+) Stop the One Pulse and disable interrupts.
mbed_official	376:cb4d9db17537	804	(+) Start the Encoder Interface.
mbed_official	376:cb4d9db17537	805	(+) Stop the Encoder Interface.
mbed_official	376:cb4d9db17537	806	(+) Start the Encoder Interface and enable interrupts.
mbed_official	376:cb4d9db17537	807	(+) Stop the Encoder Interface and disable interrupts.
mbed_official	376:cb4d9db17537	808	(+) Start the Encoder Interface and enable DMA transfers.
mbed_official	376:cb4d9db17537	809	(+) Stop the Encoder Interface and disable DMA transfers.
mbed_official	376:cb4d9db17537	810	(+) Start the Hall Sensor Interface.
mbed_official	376:cb4d9db17537	811	(+) Stop the Hall Sensor Interface.
mbed_official	376:cb4d9db17537	812	(+) Start the Hall Sensor Interface and enable interrupts.
mbed_official	376:cb4d9db17537	813	(+) Stop the Hall Sensor Interface and disable interrupts.
mbed_official	376:cb4d9db17537	814	(+) Start the Hall Sensor Interface and enable DMA transfers.
mbed_official	376:cb4d9db17537	815	(+) Stop the Hall Sensor Interface and disable DMA transfers.
mbed_official	376:cb4d9db17537	816	(+) Handle TIM interrupt request.
mbed_official	376:cb4d9db17537	817
mbed_official	376:cb4d9db17537	818	@endverbatim
mbed_official	376:cb4d9db17537	819	* @{
mbed_official	376:cb4d9db17537	820	*/
mbed_official	376:cb4d9db17537	821	/**
mbed_official	376:cb4d9db17537	822	* @brief Starts the TIM Base generation.
mbed_official	376:cb4d9db17537	823	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	824	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	825	* @retval HAL status
mbed_official	376:cb4d9db17537	826	*/
mbed_official	376:cb4d9db17537	827	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	828	{
mbed_official	376:cb4d9db17537	829	/* Check the parameters */
mbed_official	376:cb4d9db17537	830	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	831
mbed_official	376:cb4d9db17537	832	/* Set the TIM state */
mbed_official	376:cb4d9db17537	833	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	834
mbed_official	376:cb4d9db17537	835	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	836	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	837
mbed_official	376:cb4d9db17537	838	/* Change the TIM state*/
mbed_official	376:cb4d9db17537	839	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	840
mbed_official	376:cb4d9db17537	841	/* Return function status */
mbed_official	376:cb4d9db17537	842	return HAL_OK;
mbed_official	376:cb4d9db17537	843	}
mbed_official	376:cb4d9db17537	844
mbed_official	376:cb4d9db17537	845	/**
mbed_official	376:cb4d9db17537	846	* @brief Stops the TIM Base generation.
mbed_official	376:cb4d9db17537	847	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	848	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	849	* @retval HAL status
mbed_official	376:cb4d9db17537	850	*/
mbed_official	376:cb4d9db17537	851	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	852	{
mbed_official	376:cb4d9db17537	853	/* Check the parameters */
mbed_official	376:cb4d9db17537	854	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	855
mbed_official	376:cb4d9db17537	856	/* Set the TIM state */
mbed_official	376:cb4d9db17537	857	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	858
mbed_official	376:cb4d9db17537	859	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	860	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	861
mbed_official	376:cb4d9db17537	862	/* Change the TIM state*/
mbed_official	376:cb4d9db17537	863	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	864
mbed_official	376:cb4d9db17537	865	/* Return function status */
mbed_official	376:cb4d9db17537	866	return HAL_OK;
mbed_official	376:cb4d9db17537	867	}
mbed_official	376:cb4d9db17537	868
mbed_official	376:cb4d9db17537	869	/**
mbed_official	376:cb4d9db17537	870	* @brief Starts the TIM Base generation in interrupt mode.
mbed_official	376:cb4d9db17537	871	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	872	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	873	* @retval HAL status
mbed_official	376:cb4d9db17537	874	*/
mbed_official	376:cb4d9db17537	875	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	876	{
mbed_official	376:cb4d9db17537	877	/* Check the parameters */
mbed_official	376:cb4d9db17537	878	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	879
mbed_official	376:cb4d9db17537	880	/* Enable the TIM Update interrupt */
mbed_official	376:cb4d9db17537	881	__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
mbed_official	376:cb4d9db17537	882
mbed_official	376:cb4d9db17537	883	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	884	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	885
mbed_official	376:cb4d9db17537	886	/* Return function status */
mbed_official	376:cb4d9db17537	887	return HAL_OK;
mbed_official	376:cb4d9db17537	888	}
mbed_official	376:cb4d9db17537	889
mbed_official	376:cb4d9db17537	890	/**
mbed_official	376:cb4d9db17537	891	* @brief Stops the TIM Base generation in interrupt mode.
mbed_official	376:cb4d9db17537	892	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	893	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	894	* @retval HAL status
mbed_official	376:cb4d9db17537	895	*/
mbed_official	376:cb4d9db17537	896	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	897	{
mbed_official	376:cb4d9db17537	898	/* Check the parameters */
mbed_official	376:cb4d9db17537	899	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	900	/* Disable the TIM Update interrupt */
mbed_official	376:cb4d9db17537	901	__HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
mbed_official	376:cb4d9db17537	902
mbed_official	376:cb4d9db17537	903	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	904	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	905
mbed_official	376:cb4d9db17537	906	/* Return function status */
mbed_official	376:cb4d9db17537	907	return HAL_OK;
mbed_official	376:cb4d9db17537	908	}
mbed_official	376:cb4d9db17537	909
mbed_official	376:cb4d9db17537	910	/**
mbed_official	376:cb4d9db17537	911	* @brief Starts the TIM Base generation in DMA mode.
mbed_official	376:cb4d9db17537	912	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	913	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	914	* @param pData: The source Buffer address.
mbed_official	376:cb4d9db17537	915	* @param Length: The length of data to be transferred from memory to peripheral.
mbed_official	376:cb4d9db17537	916	* @retval HAL status
mbed_official	376:cb4d9db17537	917	*/
mbed_official	376:cb4d9db17537	918	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
mbed_official	376:cb4d9db17537	919	{
mbed_official	376:cb4d9db17537	920	/* Check the parameters */
mbed_official	376:cb4d9db17537	921	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	922
mbed_official	376:cb4d9db17537	923	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	924	{
mbed_official	376:cb4d9db17537	925	return HAL_BUSY;
mbed_official	376:cb4d9db17537	926	}
mbed_official	376:cb4d9db17537	927	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	928	{
mbed_official	376:cb4d9db17537	929	if((pData == 0 ) && (Length > 0))
mbed_official	376:cb4d9db17537	930	{
mbed_official	376:cb4d9db17537	931	return HAL_ERROR;
mbed_official	376:cb4d9db17537	932	}
mbed_official	376:cb4d9db17537	933	else
mbed_official	376:cb4d9db17537	934	{
mbed_official	376:cb4d9db17537	935	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	936	}
mbed_official	376:cb4d9db17537	937	}
mbed_official	376:cb4d9db17537	938	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	939	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	376:cb4d9db17537	940
mbed_official	376:cb4d9db17537	941	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	942	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	943
mbed_official	376:cb4d9db17537	944	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	945	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
mbed_official	376:cb4d9db17537	946
mbed_official	376:cb4d9db17537	947	/* Enable the TIM Update DMA request */
mbed_official	376:cb4d9db17537	948	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official	376:cb4d9db17537	949
mbed_official	376:cb4d9db17537	950	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	951	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	952
mbed_official	376:cb4d9db17537	953	/* Return function status */
mbed_official	376:cb4d9db17537	954	return HAL_OK;
mbed_official	376:cb4d9db17537	955	}
mbed_official	376:cb4d9db17537	956
mbed_official	376:cb4d9db17537	957	/**
mbed_official	376:cb4d9db17537	958	* @brief Stops the TIM Base generation in DMA mode.
mbed_official	376:cb4d9db17537	959	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	960	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	961	* @retval HAL status
mbed_official	376:cb4d9db17537	962	*/
mbed_official	376:cb4d9db17537	963	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	964	{
mbed_official	376:cb4d9db17537	965	/* Check the parameters */
mbed_official	376:cb4d9db17537	966	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	967
mbed_official	376:cb4d9db17537	968	/* Disable the TIM Update DMA request */
mbed_official	376:cb4d9db17537	969	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official	376:cb4d9db17537	970
mbed_official	376:cb4d9db17537	971	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	972	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	973
mbed_official	376:cb4d9db17537	974	/* Change the htim state */
mbed_official	376:cb4d9db17537	975	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	976
mbed_official	376:cb4d9db17537	977	/* Return function status */
mbed_official	376:cb4d9db17537	978	return HAL_OK;
mbed_official	376:cb4d9db17537	979	}
mbed_official	376:cb4d9db17537	980
mbed_official	376:cb4d9db17537	981	/**
mbed_official	376:cb4d9db17537	982	* @brief Starts the TIM Output Compare signal generation.
mbed_official	376:cb4d9db17537	983	* @param htim : pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	984	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	985	* @param Channel: TIM Channel to be enabled.
mbed_official	376:cb4d9db17537	986	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	987	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	988	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	989	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	990	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	991	* @retval HAL status
mbed_official	376:cb4d9db17537	992	*/
mbed_official	376:cb4d9db17537	993	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	994	{
mbed_official	376:cb4d9db17537	995	/* Check the parameters */
mbed_official	376:cb4d9db17537	996	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	997
mbed_official	376:cb4d9db17537	998	/* Enable the Output compare channel */
mbed_official	376:cb4d9db17537	999	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1000
mbed_official	376:cb4d9db17537	1001	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1002	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1003
mbed_official	376:cb4d9db17537	1004	/* Return function status */
mbed_official	376:cb4d9db17537	1005	return HAL_OK;
mbed_official	376:cb4d9db17537	1006	}
mbed_official	376:cb4d9db17537	1007
mbed_official	376:cb4d9db17537	1008	/**
mbed_official	376:cb4d9db17537	1009	* @brief Stops the TIM Output Compare signal generation.
mbed_official	376:cb4d9db17537	1010	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1011	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1012	* @param Channel: TIM Channel to be disabled.
mbed_official	376:cb4d9db17537	1013	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1014	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1015	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1016	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1017	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1018	* @retval HAL status
mbed_official	376:cb4d9db17537	1019	*/
mbed_official	376:cb4d9db17537	1020	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1021	{
mbed_official	376:cb4d9db17537	1022	/* Check the parameters */
mbed_official	376:cb4d9db17537	1023	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1024
mbed_official	376:cb4d9db17537	1025	/* Disable the Output compare channel */
mbed_official	376:cb4d9db17537	1026	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1027
mbed_official	376:cb4d9db17537	1028	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1029	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1030
mbed_official	376:cb4d9db17537	1031	/* Return function status */
mbed_official	376:cb4d9db17537	1032	return HAL_OK;
mbed_official	376:cb4d9db17537	1033	}
mbed_official	376:cb4d9db17537	1034
mbed_official	376:cb4d9db17537	1035	/**
mbed_official	376:cb4d9db17537	1036	* @brief Starts the TIM Output Compare signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	1037	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1038	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1039	* @param Channel: TIM Channel to be enabled.
mbed_official	376:cb4d9db17537	1040	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1041	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1042	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1043	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1044	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1045	* @retval HAL status
mbed_official	376:cb4d9db17537	1046	*/
mbed_official	376:cb4d9db17537	1047	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1048	{
mbed_official	376:cb4d9db17537	1049	/* Check the parameters */
mbed_official	376:cb4d9db17537	1050	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1051
mbed_official	376:cb4d9db17537	1052	switch (Channel)
mbed_official	376:cb4d9db17537	1053	{
mbed_official	376:cb4d9db17537	1054	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1055	{
mbed_official	376:cb4d9db17537	1056	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1057	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1058	}
mbed_official	376:cb4d9db17537	1059	break;
mbed_official	376:cb4d9db17537	1060
mbed_official	376:cb4d9db17537	1061	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1062	{
mbed_official	376:cb4d9db17537	1063	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1064	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1065	}
mbed_official	376:cb4d9db17537	1066	break;
mbed_official	376:cb4d9db17537	1067
mbed_official	376:cb4d9db17537	1068	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1069	{
mbed_official	376:cb4d9db17537	1070	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1071	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1072	}
mbed_official	376:cb4d9db17537	1073	break;
mbed_official	376:cb4d9db17537	1074
mbed_official	376:cb4d9db17537	1075	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1076	{
mbed_official	376:cb4d9db17537	1077	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1078	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1079	}
mbed_official	376:cb4d9db17537	1080	break;
mbed_official	376:cb4d9db17537	1081
mbed_official	376:cb4d9db17537	1082	default:
mbed_official	376:cb4d9db17537	1083	break;
mbed_official	376:cb4d9db17537	1084	}
mbed_official	376:cb4d9db17537	1085
mbed_official	376:cb4d9db17537	1086	/* Enable the Output compare channel */
mbed_official	376:cb4d9db17537	1087	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1088
mbed_official	376:cb4d9db17537	1089	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1090	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1091
mbed_official	376:cb4d9db17537	1092	/* Return function status */
mbed_official	376:cb4d9db17537	1093	return HAL_OK;
mbed_official	376:cb4d9db17537	1094	}
mbed_official	376:cb4d9db17537	1095
mbed_official	376:cb4d9db17537	1096	/**
mbed_official	376:cb4d9db17537	1097	* @brief Stops the TIM Output Compare signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	1098	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1099	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1100	* @param Channel: TIM Channel to be disabled.
mbed_official	376:cb4d9db17537	1101	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1102	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1103	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1104	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1105	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1106	* @retval HAL status
mbed_official	376:cb4d9db17537	1107	*/
mbed_official	376:cb4d9db17537	1108	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1109	{
mbed_official	376:cb4d9db17537	1110	/* Check the parameters */
mbed_official	376:cb4d9db17537	1111	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1112
mbed_official	376:cb4d9db17537	1113	switch (Channel)
mbed_official	376:cb4d9db17537	1114	{
mbed_official	376:cb4d9db17537	1115	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1116	{
mbed_official	376:cb4d9db17537	1117	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1118	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1119	}
mbed_official	376:cb4d9db17537	1120	break;
mbed_official	376:cb4d9db17537	1121
mbed_official	376:cb4d9db17537	1122	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1123	{
mbed_official	376:cb4d9db17537	1124	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1125	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1126	}
mbed_official	376:cb4d9db17537	1127	break;
mbed_official	376:cb4d9db17537	1128
mbed_official	376:cb4d9db17537	1129	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1130	{
mbed_official	376:cb4d9db17537	1131	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1132	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1133	}
mbed_official	376:cb4d9db17537	1134	break;
mbed_official	376:cb4d9db17537	1135
mbed_official	376:cb4d9db17537	1136	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1137	{
mbed_official	376:cb4d9db17537	1138	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1139	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1140	}
mbed_official	376:cb4d9db17537	1141	break;
mbed_official	376:cb4d9db17537	1142
mbed_official	376:cb4d9db17537	1143	default:
mbed_official	376:cb4d9db17537	1144	break;
mbed_official	376:cb4d9db17537	1145	}
mbed_official	376:cb4d9db17537	1146
mbed_official	376:cb4d9db17537	1147	/* Disable the Output compare channel */
mbed_official	376:cb4d9db17537	1148	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1149
mbed_official	376:cb4d9db17537	1150	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1151	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1152
mbed_official	376:cb4d9db17537	1153	/* Return function status */
mbed_official	376:cb4d9db17537	1154	return HAL_OK;
mbed_official	376:cb4d9db17537	1155	}
mbed_official	376:cb4d9db17537	1156
mbed_official	376:cb4d9db17537	1157	/**
mbed_official	376:cb4d9db17537	1158	* @brief Starts the TIM Output Compare signal generation in DMA mode.
mbed_official	376:cb4d9db17537	1159	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1160	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1161	* @param Channel: TIM Channel to be enabled.
mbed_official	376:cb4d9db17537	1162	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1163	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1164	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1165	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1166	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1167	* @param pData: The source Buffer address.
mbed_official	376:cb4d9db17537	1168	* @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official	376:cb4d9db17537	1169	* @retval HAL status
mbed_official	376:cb4d9db17537	1170	*/
mbed_official	376:cb4d9db17537	1171	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	376:cb4d9db17537	1172	{
mbed_official	376:cb4d9db17537	1173	/* Check the parameters */
mbed_official	376:cb4d9db17537	1174	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1175
mbed_official	376:cb4d9db17537	1176	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	1177	{
mbed_official	376:cb4d9db17537	1178	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1179	}
mbed_official	376:cb4d9db17537	1180	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	1181	{
mbed_official	376:cb4d9db17537	1182	if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official	376:cb4d9db17537	1183	{
mbed_official	376:cb4d9db17537	1184	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1185	}
mbed_official	376:cb4d9db17537	1186	else
mbed_official	376:cb4d9db17537	1187	{
mbed_official	376:cb4d9db17537	1188	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	1189	}
mbed_official	376:cb4d9db17537	1190	}
mbed_official	376:cb4d9db17537	1191	switch (Channel)
mbed_official	376:cb4d9db17537	1192	{
mbed_official	376:cb4d9db17537	1193	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1194	{
mbed_official	376:cb4d9db17537	1195	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1196	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1197
mbed_official	376:cb4d9db17537	1198	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1199	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1200
mbed_official	376:cb4d9db17537	1201	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1202	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official	376:cb4d9db17537	1203
mbed_official	376:cb4d9db17537	1204	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	1205	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	1206	}
mbed_official	376:cb4d9db17537	1207	break;
mbed_official	376:cb4d9db17537	1208
mbed_official	376:cb4d9db17537	1209	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1210	{
mbed_official	376:cb4d9db17537	1211	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1212	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1213
mbed_official	376:cb4d9db17537	1214	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1215	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1216
mbed_official	376:cb4d9db17537	1217	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1218	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official	376:cb4d9db17537	1219
mbed_official	376:cb4d9db17537	1220	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	1221	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	1222	}
mbed_official	376:cb4d9db17537	1223	break;
mbed_official	376:cb4d9db17537	1224
mbed_official	376:cb4d9db17537	1225	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1226	{
mbed_official	376:cb4d9db17537	1227	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1228	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1229
mbed_official	376:cb4d9db17537	1230	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1231	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1232
mbed_official	376:cb4d9db17537	1233	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1234	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official	376:cb4d9db17537	1235
mbed_official	376:cb4d9db17537	1236	/* Enable the TIM Capture/Compare 3 DMA request */
mbed_official	376:cb4d9db17537	1237	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	1238	}
mbed_official	376:cb4d9db17537	1239	break;
mbed_official	376:cb4d9db17537	1240
mbed_official	376:cb4d9db17537	1241	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1242	{
mbed_official	376:cb4d9db17537	1243	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1244	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1245
mbed_official	376:cb4d9db17537	1246	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1247	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1248
mbed_official	376:cb4d9db17537	1249	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1250	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official	376:cb4d9db17537	1251
mbed_official	376:cb4d9db17537	1252	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	376:cb4d9db17537	1253	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	1254	}
mbed_official	376:cb4d9db17537	1255	break;
mbed_official	376:cb4d9db17537	1256
mbed_official	376:cb4d9db17537	1257	default:
mbed_official	376:cb4d9db17537	1258	break;
mbed_official	376:cb4d9db17537	1259	}
mbed_official	376:cb4d9db17537	1260
mbed_official	376:cb4d9db17537	1261	/* Enable the Output compare channel */
mbed_official	376:cb4d9db17537	1262	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1263
mbed_official	376:cb4d9db17537	1264	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1265	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1266
mbed_official	376:cb4d9db17537	1267	/* Return function status */
mbed_official	376:cb4d9db17537	1268	return HAL_OK;
mbed_official	376:cb4d9db17537	1269	}
mbed_official	376:cb4d9db17537	1270
mbed_official	376:cb4d9db17537	1271	/**
mbed_official	376:cb4d9db17537	1272	* @brief Stops the TIM Output Compare signal generation in DMA mode.
mbed_official	376:cb4d9db17537	1273	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1274	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1275	* @param Channel: TIM Channel to be disabled.
mbed_official	376:cb4d9db17537	1276	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1277	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1278	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1279	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1280	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1281	* @retval HAL status
mbed_official	376:cb4d9db17537	1282	*/
mbed_official	376:cb4d9db17537	1283	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1284	{
mbed_official	376:cb4d9db17537	1285	/* Check the parameters */
mbed_official	376:cb4d9db17537	1286	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1287
mbed_official	376:cb4d9db17537	1288	switch (Channel)
mbed_official	376:cb4d9db17537	1289	{
mbed_official	376:cb4d9db17537	1290	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1291	{
mbed_official	376:cb4d9db17537	1292	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	1293	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	1294	}
mbed_official	376:cb4d9db17537	1295	break;
mbed_official	376:cb4d9db17537	1296
mbed_official	376:cb4d9db17537	1297	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1298	{
mbed_official	376:cb4d9db17537	1299	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	1300	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	1301	}
mbed_official	376:cb4d9db17537	1302	break;
mbed_official	376:cb4d9db17537	1303
mbed_official	376:cb4d9db17537	1304	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1305	{
mbed_official	376:cb4d9db17537	1306	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	376:cb4d9db17537	1307	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	1308	}
mbed_official	376:cb4d9db17537	1309	break;
mbed_official	376:cb4d9db17537	1310
mbed_official	376:cb4d9db17537	1311	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1312	{
mbed_official	376:cb4d9db17537	1313	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1314	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	1315	}
mbed_official	376:cb4d9db17537	1316	break;
mbed_official	376:cb4d9db17537	1317
mbed_official	376:cb4d9db17537	1318	default:
mbed_official	376:cb4d9db17537	1319	break;
mbed_official	376:cb4d9db17537	1320	}
mbed_official	376:cb4d9db17537	1321
mbed_official	376:cb4d9db17537	1322	/* Disable the Output compare channel */
mbed_official	376:cb4d9db17537	1323	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1324
mbed_official	376:cb4d9db17537	1325	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1326	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1327
mbed_official	376:cb4d9db17537	1328	/* Change the htim state */
mbed_official	376:cb4d9db17537	1329	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	1330
mbed_official	376:cb4d9db17537	1331	/* Return function status */
mbed_official	376:cb4d9db17537	1332	return HAL_OK;
mbed_official	376:cb4d9db17537	1333	}
mbed_official	376:cb4d9db17537	1334
mbed_official	376:cb4d9db17537	1335	/**
mbed_official	376:cb4d9db17537	1336	* @brief Starts the PWM signal generation.
mbed_official	376:cb4d9db17537	1337	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1338	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1339	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	1340	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1341	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1342	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1343	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1344	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1345	* @retval HAL status
mbed_official	376:cb4d9db17537	1346	*/
mbed_official	376:cb4d9db17537	1347	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1348	{
mbed_official	376:cb4d9db17537	1349	/* Check the parameters */
mbed_official	376:cb4d9db17537	1350	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1351
mbed_official	376:cb4d9db17537	1352	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	1353	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1354
mbed_official	376:cb4d9db17537	1355	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1356	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1357
mbed_official	376:cb4d9db17537	1358	/* Return function status */
mbed_official	376:cb4d9db17537	1359	return HAL_OK;
mbed_official	376:cb4d9db17537	1360	}
mbed_official	376:cb4d9db17537	1361
mbed_official	376:cb4d9db17537	1362	/**
mbed_official	376:cb4d9db17537	1363	* @brief Stops the PWM signal generation.
mbed_official	376:cb4d9db17537	1364	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1365	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1366	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	1367	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1368	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1369	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1370	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1371	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1372	* @retval HAL status
mbed_official	376:cb4d9db17537	1373	*/
mbed_official	376:cb4d9db17537	1374	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1375	{
mbed_official	376:cb4d9db17537	1376	/* Check the parameters */
mbed_official	376:cb4d9db17537	1377	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1378
mbed_official	376:cb4d9db17537	1379	/* Disable the Capture compare channel */
mbed_official	376:cb4d9db17537	1380	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1381
mbed_official	376:cb4d9db17537	1382	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1383	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1384
mbed_official	376:cb4d9db17537	1385	/* Change the htim state */
mbed_official	376:cb4d9db17537	1386	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	1387
mbed_official	376:cb4d9db17537	1388	/* Return function status */
mbed_official	376:cb4d9db17537	1389	return HAL_OK;
mbed_official	376:cb4d9db17537	1390	}
mbed_official	376:cb4d9db17537	1391
mbed_official	376:cb4d9db17537	1392	/**
mbed_official	376:cb4d9db17537	1393	* @brief Starts the PWM signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	1394	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1395	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1396	* @param Channel: TIM Channel to be disabled.
mbed_official	376:cb4d9db17537	1397	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1398	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1399	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1400	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1401	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1402	* @retval HAL status
mbed_official	376:cb4d9db17537	1403	*/
mbed_official	376:cb4d9db17537	1404	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1405	{
mbed_official	376:cb4d9db17537	1406	/* Check the parameters */
mbed_official	376:cb4d9db17537	1407	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1408
mbed_official	376:cb4d9db17537	1409	switch (Channel)
mbed_official	376:cb4d9db17537	1410	{
mbed_official	376:cb4d9db17537	1411	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1412	{
mbed_official	376:cb4d9db17537	1413	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1414	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1415	}
mbed_official	376:cb4d9db17537	1416	break;
mbed_official	376:cb4d9db17537	1417
mbed_official	376:cb4d9db17537	1418	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1419	{
mbed_official	376:cb4d9db17537	1420	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1421	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1422	}
mbed_official	376:cb4d9db17537	1423	break;
mbed_official	376:cb4d9db17537	1424
mbed_official	376:cb4d9db17537	1425	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1426	{
mbed_official	376:cb4d9db17537	1427	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1428	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1429	}
mbed_official	376:cb4d9db17537	1430	break;
mbed_official	376:cb4d9db17537	1431
mbed_official	376:cb4d9db17537	1432	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1433	{
mbed_official	376:cb4d9db17537	1434	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1435	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1436	}
mbed_official	376:cb4d9db17537	1437	break;
mbed_official	376:cb4d9db17537	1438
mbed_official	376:cb4d9db17537	1439	default:
mbed_official	376:cb4d9db17537	1440	break;
mbed_official	376:cb4d9db17537	1441	}
mbed_official	376:cb4d9db17537	1442
mbed_official	376:cb4d9db17537	1443	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	1444	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1445
mbed_official	376:cb4d9db17537	1446	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1447	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1448
mbed_official	376:cb4d9db17537	1449	/* Return function status */
mbed_official	376:cb4d9db17537	1450	return HAL_OK;
mbed_official	376:cb4d9db17537	1451	}
mbed_official	376:cb4d9db17537	1452
mbed_official	376:cb4d9db17537	1453	/**
mbed_official	376:cb4d9db17537	1454	* @brief Stops the PWM signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	1455	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1456	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1457	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	1458	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1459	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1460	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1461	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1462	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1463	* @retval HAL status
mbed_official	376:cb4d9db17537	1464	*/
mbed_official	376:cb4d9db17537	1465	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1466	{
mbed_official	376:cb4d9db17537	1467	/* Check the parameters */
mbed_official	376:cb4d9db17537	1468	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1469
mbed_official	376:cb4d9db17537	1470	switch (Channel)
mbed_official	376:cb4d9db17537	1471	{
mbed_official	376:cb4d9db17537	1472	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1473	{
mbed_official	376:cb4d9db17537	1474	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1475	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1476	}
mbed_official	376:cb4d9db17537	1477	break;
mbed_official	376:cb4d9db17537	1478
mbed_official	376:cb4d9db17537	1479	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1480	{
mbed_official	376:cb4d9db17537	1481	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1482	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1483	}
mbed_official	376:cb4d9db17537	1484	break;
mbed_official	376:cb4d9db17537	1485
mbed_official	376:cb4d9db17537	1486	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1487	{
mbed_official	376:cb4d9db17537	1488	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1489	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1490	}
mbed_official	376:cb4d9db17537	1491	break;
mbed_official	376:cb4d9db17537	1492
mbed_official	376:cb4d9db17537	1493	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1494	{
mbed_official	376:cb4d9db17537	1495	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1496	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1497	}
mbed_official	376:cb4d9db17537	1498	break;
mbed_official	376:cb4d9db17537	1499
mbed_official	376:cb4d9db17537	1500	default:
mbed_official	376:cb4d9db17537	1501	break;
mbed_official	376:cb4d9db17537	1502	}
mbed_official	376:cb4d9db17537	1503
mbed_official	376:cb4d9db17537	1504	/* Disable the Capture compare channel */
mbed_official	376:cb4d9db17537	1505	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1506
mbed_official	376:cb4d9db17537	1507	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1508	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1509
mbed_official	376:cb4d9db17537	1510	/* Return function status */
mbed_official	376:cb4d9db17537	1511	return HAL_OK;
mbed_official	376:cb4d9db17537	1512	}
mbed_official	376:cb4d9db17537	1513
mbed_official	376:cb4d9db17537	1514	/**
mbed_official	376:cb4d9db17537	1515	* @brief Starts the TIM PWM signal generation in DMA mode.
mbed_official	376:cb4d9db17537	1516	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1517	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1518	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	1519	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1520	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1521	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1522	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1523	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1524	* @param pData: The source Buffer address.
mbed_official	376:cb4d9db17537	1525	* @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official	376:cb4d9db17537	1526	* @retval HAL status
mbed_official	376:cb4d9db17537	1527	*/
mbed_official	376:cb4d9db17537	1528	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	376:cb4d9db17537	1529	{
mbed_official	376:cb4d9db17537	1530	/* Check the parameters */
mbed_official	376:cb4d9db17537	1531	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1532
mbed_official	376:cb4d9db17537	1533	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	1534	{
mbed_official	376:cb4d9db17537	1535	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1536	}
mbed_official	376:cb4d9db17537	1537	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	1538	{
mbed_official	376:cb4d9db17537	1539	if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official	376:cb4d9db17537	1540	{
mbed_official	376:cb4d9db17537	1541	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1542	}
mbed_official	376:cb4d9db17537	1543	else
mbed_official	376:cb4d9db17537	1544	{
mbed_official	376:cb4d9db17537	1545	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	1546	}
mbed_official	376:cb4d9db17537	1547	}
mbed_official	376:cb4d9db17537	1548	switch (Channel)
mbed_official	376:cb4d9db17537	1549	{
mbed_official	376:cb4d9db17537	1550	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1551	{
mbed_official	376:cb4d9db17537	1552	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1553	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1554
mbed_official	376:cb4d9db17537	1555	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1556	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1557
mbed_official	376:cb4d9db17537	1558	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1559	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official	376:cb4d9db17537	1560
mbed_official	376:cb4d9db17537	1561	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	1562	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	1563	}
mbed_official	376:cb4d9db17537	1564	break;
mbed_official	376:cb4d9db17537	1565
mbed_official	376:cb4d9db17537	1566	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1567	{
mbed_official	376:cb4d9db17537	1568	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1569	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1570
mbed_official	376:cb4d9db17537	1571	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1572	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1573
mbed_official	376:cb4d9db17537	1574	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1575	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official	376:cb4d9db17537	1576
mbed_official	376:cb4d9db17537	1577	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	1578	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	1579	}
mbed_official	376:cb4d9db17537	1580	break;
mbed_official	376:cb4d9db17537	1581
mbed_official	376:cb4d9db17537	1582	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1583	{
mbed_official	376:cb4d9db17537	1584	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1585	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1586
mbed_official	376:cb4d9db17537	1587	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1588	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1589
mbed_official	376:cb4d9db17537	1590	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1591	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official	376:cb4d9db17537	1592
mbed_official	376:cb4d9db17537	1593	/* Enable the TIM Output Capture/Compare 3 request */
mbed_official	376:cb4d9db17537	1594	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	1595	}
mbed_official	376:cb4d9db17537	1596	break;
mbed_official	376:cb4d9db17537	1597
mbed_official	376:cb4d9db17537	1598	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1599	{
mbed_official	376:cb4d9db17537	1600	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1601	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	1602
mbed_official	376:cb4d9db17537	1603	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1604	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1605
mbed_official	376:cb4d9db17537	1606	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1607	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official	376:cb4d9db17537	1608
mbed_official	376:cb4d9db17537	1609	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	376:cb4d9db17537	1610	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	1611	}
mbed_official	376:cb4d9db17537	1612	break;
mbed_official	376:cb4d9db17537	1613
mbed_official	376:cb4d9db17537	1614	default:
mbed_official	376:cb4d9db17537	1615	break;
mbed_official	376:cb4d9db17537	1616	}
mbed_official	376:cb4d9db17537	1617
mbed_official	376:cb4d9db17537	1618	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	1619	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1620
mbed_official	376:cb4d9db17537	1621	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1622	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1623
mbed_official	376:cb4d9db17537	1624	/* Return function status */
mbed_official	376:cb4d9db17537	1625	return HAL_OK;
mbed_official	376:cb4d9db17537	1626	}
mbed_official	376:cb4d9db17537	1627
mbed_official	376:cb4d9db17537	1628	/**
mbed_official	376:cb4d9db17537	1629	* @brief Stops the TIM PWM signal generation in DMA mode.
mbed_official	376:cb4d9db17537	1630	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1631	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1632	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	1633	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1634	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1635	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1636	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1637	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1638	* @retval HAL status
mbed_official	376:cb4d9db17537	1639	*/
mbed_official	376:cb4d9db17537	1640	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1641	{
mbed_official	376:cb4d9db17537	1642	/* Check the parameters */
mbed_official	376:cb4d9db17537	1643	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1644
mbed_official	376:cb4d9db17537	1645	switch (Channel)
mbed_official	376:cb4d9db17537	1646	{
mbed_official	376:cb4d9db17537	1647	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1648	{
mbed_official	376:cb4d9db17537	1649	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	1650	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	1651	}
mbed_official	376:cb4d9db17537	1652	break;
mbed_official	376:cb4d9db17537	1653
mbed_official	376:cb4d9db17537	1654	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1655	{
mbed_official	376:cb4d9db17537	1656	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	1657	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	1658	}
mbed_official	376:cb4d9db17537	1659	break;
mbed_official	376:cb4d9db17537	1660
mbed_official	376:cb4d9db17537	1661	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1662	{
mbed_official	376:cb4d9db17537	1663	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	376:cb4d9db17537	1664	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	1665	}
mbed_official	376:cb4d9db17537	1666	break;
mbed_official	376:cb4d9db17537	1667
mbed_official	376:cb4d9db17537	1668	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1669	{
mbed_official	376:cb4d9db17537	1670	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1671	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	1672	}
mbed_official	376:cb4d9db17537	1673	break;
mbed_official	376:cb4d9db17537	1674
mbed_official	376:cb4d9db17537	1675	default:
mbed_official	376:cb4d9db17537	1676	break;
mbed_official	376:cb4d9db17537	1677	}
mbed_official	376:cb4d9db17537	1678
mbed_official	376:cb4d9db17537	1679	/* Disable the Capture compare channel */
mbed_official	376:cb4d9db17537	1680	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1681
mbed_official	376:cb4d9db17537	1682	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1683	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1684
mbed_official	376:cb4d9db17537	1685	/* Change the htim state */
mbed_official	376:cb4d9db17537	1686	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	1687
mbed_official	376:cb4d9db17537	1688	/* Return function status */
mbed_official	376:cb4d9db17537	1689	return HAL_OK;
mbed_official	376:cb4d9db17537	1690	}
mbed_official	376:cb4d9db17537	1691
mbed_official	376:cb4d9db17537	1692	/**
mbed_official	376:cb4d9db17537	1693	* @brief Starts the TIM Input Capture measurement.
mbed_official	376:cb4d9db17537	1694	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1695	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1696	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	1697	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1698	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1699	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1700	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1701	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1702	* @retval HAL status
mbed_official	376:cb4d9db17537	1703	*/
mbed_official	376:cb4d9db17537	1704	HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1705	{
mbed_official	376:cb4d9db17537	1706	/* Check the parameters */
mbed_official	376:cb4d9db17537	1707	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1708
mbed_official	376:cb4d9db17537	1709	/* Enable the Input Capture channel */
mbed_official	376:cb4d9db17537	1710	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1711
mbed_official	376:cb4d9db17537	1712	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1713	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1714
mbed_official	376:cb4d9db17537	1715	/* Return function status */
mbed_official	376:cb4d9db17537	1716	return HAL_OK;
mbed_official	376:cb4d9db17537	1717	}
mbed_official	376:cb4d9db17537	1718
mbed_official	376:cb4d9db17537	1719	/**
mbed_official	376:cb4d9db17537	1720	* @brief Stops the TIM Input Capture measurement.
mbed_official	376:cb4d9db17537	1721	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1722	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1723	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	1724	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1725	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1726	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1727	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1728	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1729	* @retval HAL status
mbed_official	376:cb4d9db17537	1730	*/
mbed_official	376:cb4d9db17537	1731	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1732	{
mbed_official	376:cb4d9db17537	1733	/* Check the parameters */
mbed_official	376:cb4d9db17537	1734	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1735
mbed_official	376:cb4d9db17537	1736	/* Disable the Input Capture channel */
mbed_official	376:cb4d9db17537	1737	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1738
mbed_official	376:cb4d9db17537	1739	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1740	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1741
mbed_official	376:cb4d9db17537	1742	/* Return function status */
mbed_official	376:cb4d9db17537	1743	return HAL_OK;
mbed_official	376:cb4d9db17537	1744	}
mbed_official	376:cb4d9db17537	1745
mbed_official	376:cb4d9db17537	1746	/**
mbed_official	376:cb4d9db17537	1747	* @brief Starts the TIM Input Capture measurement in interrupt mode.
mbed_official	376:cb4d9db17537	1748	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1749	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1750	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	1751	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1752	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1753	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1754	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1755	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1756	* @retval HAL status
mbed_official	376:cb4d9db17537	1757	*/
mbed_official	376:cb4d9db17537	1758	HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1759	{
mbed_official	376:cb4d9db17537	1760	/* Check the parameters */
mbed_official	376:cb4d9db17537	1761	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1762
mbed_official	376:cb4d9db17537	1763	switch (Channel)
mbed_official	376:cb4d9db17537	1764	{
mbed_official	376:cb4d9db17537	1765	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1766	{
mbed_official	376:cb4d9db17537	1767	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1768	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1769	}
mbed_official	376:cb4d9db17537	1770	break;
mbed_official	376:cb4d9db17537	1771
mbed_official	376:cb4d9db17537	1772	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1773	{
mbed_official	376:cb4d9db17537	1774	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1775	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1776	}
mbed_official	376:cb4d9db17537	1777	break;
mbed_official	376:cb4d9db17537	1778
mbed_official	376:cb4d9db17537	1779	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1780	{
mbed_official	376:cb4d9db17537	1781	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1782	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1783	}
mbed_official	376:cb4d9db17537	1784	break;
mbed_official	376:cb4d9db17537	1785
mbed_official	376:cb4d9db17537	1786	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1787	{
mbed_official	376:cb4d9db17537	1788	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1789	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1790	}
mbed_official	376:cb4d9db17537	1791	break;
mbed_official	376:cb4d9db17537	1792
mbed_official	376:cb4d9db17537	1793	default:
mbed_official	376:cb4d9db17537	1794	break;
mbed_official	376:cb4d9db17537	1795	}
mbed_official	376:cb4d9db17537	1796	/* Enable the Input Capture channel */
mbed_official	376:cb4d9db17537	1797	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1798
mbed_official	376:cb4d9db17537	1799	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1800	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1801
mbed_official	376:cb4d9db17537	1802	/* Return function status */
mbed_official	376:cb4d9db17537	1803	return HAL_OK;
mbed_official	376:cb4d9db17537	1804	}
mbed_official	376:cb4d9db17537	1805
mbed_official	376:cb4d9db17537	1806	/**
mbed_official	376:cb4d9db17537	1807	* @brief Stops the TIM Input Capture measurement in interrupt mode.
mbed_official	376:cb4d9db17537	1808	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1809	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1810	* @param Channel : TIM Channels to be disabled
mbed_official	376:cb4d9db17537	1811	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1812	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1813	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1814	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1815	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1816	* @retval HAL status
mbed_official	376:cb4d9db17537	1817	*/
mbed_official	376:cb4d9db17537	1818	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1819	{
mbed_official	376:cb4d9db17537	1820	/* Check the parameters */
mbed_official	376:cb4d9db17537	1821	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1822
mbed_official	376:cb4d9db17537	1823	switch (Channel)
mbed_official	376:cb4d9db17537	1824	{
mbed_official	376:cb4d9db17537	1825	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1826	{
mbed_official	376:cb4d9db17537	1827	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	1828	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	1829	}
mbed_official	376:cb4d9db17537	1830	break;
mbed_official	376:cb4d9db17537	1831
mbed_official	376:cb4d9db17537	1832	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1833	{
mbed_official	376:cb4d9db17537	1834	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	1835	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	1836	}
mbed_official	376:cb4d9db17537	1837	break;
mbed_official	376:cb4d9db17537	1838
mbed_official	376:cb4d9db17537	1839	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1840	{
mbed_official	376:cb4d9db17537	1841	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	376:cb4d9db17537	1842	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	1843	}
mbed_official	376:cb4d9db17537	1844	break;
mbed_official	376:cb4d9db17537	1845
mbed_official	376:cb4d9db17537	1846	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1847	{
mbed_official	376:cb4d9db17537	1848	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	376:cb4d9db17537	1849	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	1850	}
mbed_official	376:cb4d9db17537	1851	break;
mbed_official	376:cb4d9db17537	1852
mbed_official	376:cb4d9db17537	1853	default:
mbed_official	376:cb4d9db17537	1854	break;
mbed_official	376:cb4d9db17537	1855	}
mbed_official	376:cb4d9db17537	1856
mbed_official	376:cb4d9db17537	1857	/* Disable the Input Capture channel */
mbed_official	376:cb4d9db17537	1858	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	1859
mbed_official	376:cb4d9db17537	1860	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	1861	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	1862
mbed_official	376:cb4d9db17537	1863	/* Return function status */
mbed_official	376:cb4d9db17537	1864	return HAL_OK;
mbed_official	376:cb4d9db17537	1865	}
mbed_official	376:cb4d9db17537	1866
mbed_official	376:cb4d9db17537	1867	/**
mbed_official	376:cb4d9db17537	1868	* @brief Starts the TIM Input Capture measurement on in DMA mode.
mbed_official	376:cb4d9db17537	1869	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1870	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1871	* @param Channel : TIM Channels to be enabled
mbed_official	376:cb4d9db17537	1872	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1873	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1874	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1875	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1876	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1877	* @param pData: The destination Buffer address.
mbed_official	376:cb4d9db17537	1878	* @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official	376:cb4d9db17537	1879	* @retval HAL status
mbed_official	376:cb4d9db17537	1880	*/
mbed_official	376:cb4d9db17537	1881	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	376:cb4d9db17537	1882	{
mbed_official	376:cb4d9db17537	1883	/* Check the parameters */
mbed_official	376:cb4d9db17537	1884	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1885	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	1886
mbed_official	376:cb4d9db17537	1887	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	1888	{
mbed_official	376:cb4d9db17537	1889	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1890	}
mbed_official	376:cb4d9db17537	1891	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	1892	{
mbed_official	376:cb4d9db17537	1893	if((pData == 0 ) && (Length > 0))
mbed_official	376:cb4d9db17537	1894	{
mbed_official	376:cb4d9db17537	1895	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1896	}
mbed_official	376:cb4d9db17537	1897	else
mbed_official	376:cb4d9db17537	1898	{
mbed_official	376:cb4d9db17537	1899	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	1900	}
mbed_official	376:cb4d9db17537	1901	}
mbed_official	376:cb4d9db17537	1902
mbed_official	376:cb4d9db17537	1903	switch (Channel)
mbed_official	376:cb4d9db17537	1904	{
mbed_official	376:cb4d9db17537	1905	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	1906	{
mbed_official	376:cb4d9db17537	1907	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1908	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	1909
mbed_official	376:cb4d9db17537	1910	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1911	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1912
mbed_official	376:cb4d9db17537	1913	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1914	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official	376:cb4d9db17537	1915
mbed_official	376:cb4d9db17537	1916	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	1917	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	1918	}
mbed_official	376:cb4d9db17537	1919	break;
mbed_official	376:cb4d9db17537	1920
mbed_official	376:cb4d9db17537	1921	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	1922	{
mbed_official	376:cb4d9db17537	1923	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1924	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	1925
mbed_official	376:cb4d9db17537	1926	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1927	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1928
mbed_official	376:cb4d9db17537	1929	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1930	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
mbed_official	376:cb4d9db17537	1931
mbed_official	376:cb4d9db17537	1932	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	1933	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	1934	}
mbed_official	376:cb4d9db17537	1935	break;
mbed_official	376:cb4d9db17537	1936
mbed_official	376:cb4d9db17537	1937	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	1938	{
mbed_official	376:cb4d9db17537	1939	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1940	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	1941
mbed_official	376:cb4d9db17537	1942	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1943	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1944
mbed_official	376:cb4d9db17537	1945	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1946	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
mbed_official	376:cb4d9db17537	1947
mbed_official	376:cb4d9db17537	1948	/* Enable the TIM Capture/Compare 3 DMA request */
mbed_official	376:cb4d9db17537	1949	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	1950	}
mbed_official	376:cb4d9db17537	1951	break;
mbed_official	376:cb4d9db17537	1952
mbed_official	376:cb4d9db17537	1953	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	1954	{
mbed_official	376:cb4d9db17537	1955	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	1956	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	1957
mbed_official	376:cb4d9db17537	1958	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1959	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	1960
mbed_official	376:cb4d9db17537	1961	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	1962	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
mbed_official	376:cb4d9db17537	1963
mbed_official	376:cb4d9db17537	1964	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	376:cb4d9db17537	1965	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	1966	}
mbed_official	376:cb4d9db17537	1967	break;
mbed_official	376:cb4d9db17537	1968
mbed_official	376:cb4d9db17537	1969	default:
mbed_official	376:cb4d9db17537	1970	break;
mbed_official	376:cb4d9db17537	1971	}
mbed_official	376:cb4d9db17537	1972
mbed_official	376:cb4d9db17537	1973	/* Enable the Input Capture channel */
mbed_official	376:cb4d9db17537	1974	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	1975
mbed_official	376:cb4d9db17537	1976	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	1977	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	1978
mbed_official	376:cb4d9db17537	1979	/* Return function status */
mbed_official	376:cb4d9db17537	1980	return HAL_OK;
mbed_official	376:cb4d9db17537	1981	}
mbed_official	376:cb4d9db17537	1982
mbed_official	376:cb4d9db17537	1983	/**
mbed_official	376:cb4d9db17537	1984	* @brief Stops the TIM Input Capture measurement on in DMA mode.
mbed_official	376:cb4d9db17537	1985	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1986	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	1987	* @param Channel : TIM Channels to be disabled
mbed_official	376:cb4d9db17537	1988	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1989	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1990	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1991	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1992	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1993	* @retval HAL status
mbed_official	376:cb4d9db17537	1994	*/
mbed_official	376:cb4d9db17537	1995	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	1996	{
mbed_official	376:cb4d9db17537	1997	/* Check the parameters */
mbed_official	376:cb4d9db17537	1998	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	376:cb4d9db17537	1999	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2000
mbed_official	376:cb4d9db17537	2001	switch (Channel)
mbed_official	376:cb4d9db17537	2002	{
mbed_official	376:cb4d9db17537	2003	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2004	{
mbed_official	376:cb4d9db17537	2005	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	376:cb4d9db17537	2006	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	2007	}
mbed_official	376:cb4d9db17537	2008	break;
mbed_official	376:cb4d9db17537	2009
mbed_official	376:cb4d9db17537	2010	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2011	{
mbed_official	376:cb4d9db17537	2012	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	376:cb4d9db17537	2013	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	2014	}
mbed_official	376:cb4d9db17537	2015	break;
mbed_official	376:cb4d9db17537	2016
mbed_official	376:cb4d9db17537	2017	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	2018	{
mbed_official	376:cb4d9db17537	2019	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	376:cb4d9db17537	2020	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	376:cb4d9db17537	2021	}
mbed_official	376:cb4d9db17537	2022	break;
mbed_official	376:cb4d9db17537	2023
mbed_official	376:cb4d9db17537	2024	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	2025	{
mbed_official	376:cb4d9db17537	2026	/* Disable the TIM Capture/Compare 4 DMA request */
mbed_official	376:cb4d9db17537	2027	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	376:cb4d9db17537	2028	}
mbed_official	376:cb4d9db17537	2029	break;
mbed_official	376:cb4d9db17537	2030
mbed_official	376:cb4d9db17537	2031	default:
mbed_official	376:cb4d9db17537	2032	break;
mbed_official	376:cb4d9db17537	2033	}
mbed_official	376:cb4d9db17537	2034
mbed_official	376:cb4d9db17537	2035	/* Disable the Input Capture channel */
mbed_official	376:cb4d9db17537	2036	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2037
mbed_official	376:cb4d9db17537	2038	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2039	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2040
mbed_official	376:cb4d9db17537	2041	/* Change the htim state */
mbed_official	376:cb4d9db17537	2042	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2043
mbed_official	376:cb4d9db17537	2044	/* Return function status */
mbed_official	376:cb4d9db17537	2045	return HAL_OK;
mbed_official	376:cb4d9db17537	2046	}
mbed_official	376:cb4d9db17537	2047
mbed_official	376:cb4d9db17537	2048	/**
mbed_official	376:cb4d9db17537	2049	* @brief Starts the TIM One Pulse signal generation.
mbed_official	376:cb4d9db17537	2050	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2051	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2052	* @param OutputChannel : TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2053	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2054	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2055	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2056	* @retval HAL status
mbed_official	376:cb4d9db17537	2057	*/
mbed_official	376:cb4d9db17537	2058	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	376:cb4d9db17537	2059	{
mbed_official	376:cb4d9db17537	2060	/* Enable the Capture compare and the Input Capture channels
mbed_official	376:cb4d9db17537	2061	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2062	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	376:cb4d9db17537	2063	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	376:cb4d9db17537	2064	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official	376:cb4d9db17537	2065
mbed_official	376:cb4d9db17537	2066	No need to enable the counter, it's enabled automatically by hardware
mbed_official	376:cb4d9db17537	2067	(the counter starts in response to a stimulus and generate a pulse */
mbed_official	376:cb4d9db17537	2068
mbed_official	376:cb4d9db17537	2069	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2070	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2071
mbed_official	376:cb4d9db17537	2072	/* Return function status */
mbed_official	376:cb4d9db17537	2073	return HAL_OK;
mbed_official	376:cb4d9db17537	2074	}
mbed_official	376:cb4d9db17537	2075
mbed_official	376:cb4d9db17537	2076	/**
mbed_official	376:cb4d9db17537	2077	* @brief Stops the TIM One Pulse signal generation.
mbed_official	376:cb4d9db17537	2078	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2079	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2080	* @param OutputChannel : TIM Channels to be disable.
mbed_official	376:cb4d9db17537	2081	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2082	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2083	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2084	* @retval HAL status
mbed_official	376:cb4d9db17537	2085	*/
mbed_official	376:cb4d9db17537	2086	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	376:cb4d9db17537	2087	{
mbed_official	376:cb4d9db17537	2088	/* Disable the Capture compare and the Input Capture channels
mbed_official	376:cb4d9db17537	2089	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2090	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	376:cb4d9db17537	2091	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	376:cb4d9db17537	2092	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official	376:cb4d9db17537	2093
mbed_official	376:cb4d9db17537	2094	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2095	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2096
mbed_official	376:cb4d9db17537	2097	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2098	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2099
mbed_official	376:cb4d9db17537	2100	/* Return function status */
mbed_official	376:cb4d9db17537	2101	return HAL_OK;
mbed_official	376:cb4d9db17537	2102	}
mbed_official	376:cb4d9db17537	2103
mbed_official	376:cb4d9db17537	2104	/**
mbed_official	376:cb4d9db17537	2105	* @brief Starts the TIM One Pulse signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	2106	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2107	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2108	* @param OutputChannel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2109	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2110	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2111	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2112	* @retval HAL status
mbed_official	376:cb4d9db17537	2113	*/
mbed_official	376:cb4d9db17537	2114	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	376:cb4d9db17537	2115	{
mbed_official	376:cb4d9db17537	2116	/* Enable the Capture compare and the Input Capture channels
mbed_official	376:cb4d9db17537	2117	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2118	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	376:cb4d9db17537	2119	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	376:cb4d9db17537	2120	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official	376:cb4d9db17537	2121
mbed_official	376:cb4d9db17537	2122	No need to enable the counter, it's enabled automatically by hardware
mbed_official	376:cb4d9db17537	2123	(the counter starts in response to a stimulus and generate a pulse */
mbed_official	376:cb4d9db17537	2124
mbed_official	376:cb4d9db17537	2125	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	2126	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2127
mbed_official	376:cb4d9db17537	2128	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	2129	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2130
mbed_official	376:cb4d9db17537	2131	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2132	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2133
mbed_official	376:cb4d9db17537	2134	/* Return function status */
mbed_official	376:cb4d9db17537	2135	return HAL_OK;
mbed_official	376:cb4d9db17537	2136	}
mbed_official	376:cb4d9db17537	2137
mbed_official	376:cb4d9db17537	2138	/**
mbed_official	376:cb4d9db17537	2139	* @brief Stops the TIM One Pulse signal generation in interrupt mode.
mbed_official	376:cb4d9db17537	2140	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2141	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2142	* @param OutputChannel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2143	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2144	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2145	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2146	* @retval HAL status
mbed_official	376:cb4d9db17537	2147	*/
mbed_official	376:cb4d9db17537	2148	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	376:cb4d9db17537	2149	{
mbed_official	376:cb4d9db17537	2150	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	376:cb4d9db17537	2151	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2152
mbed_official	376:cb4d9db17537	2153	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	376:cb4d9db17537	2154	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2155
mbed_official	376:cb4d9db17537	2156	/* Disable the Capture compare and the Input Capture channels
mbed_official	376:cb4d9db17537	2157	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2158	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	376:cb4d9db17537	2159	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	376:cb4d9db17537	2160	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official	376:cb4d9db17537	2161	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2162	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2163
mbed_official	376:cb4d9db17537	2164	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2165	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2166
mbed_official	376:cb4d9db17537	2167	/* Return function status */
mbed_official	376:cb4d9db17537	2168	return HAL_OK;
mbed_official	376:cb4d9db17537	2169	}
mbed_official	376:cb4d9db17537	2170
mbed_official	376:cb4d9db17537	2171	/**
mbed_official	376:cb4d9db17537	2172	* @brief Starts the TIM Encoder Interface.
mbed_official	376:cb4d9db17537	2173	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2174	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2175	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2176	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2177	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2178	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2179	* @retval HAL status
mbed_official	376:cb4d9db17537	2180	*/
mbed_official	376:cb4d9db17537	2181	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	2182	{
mbed_official	376:cb4d9db17537	2183	/* Check the parameters */
mbed_official	376:cb4d9db17537	2184	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2185
mbed_official	376:cb4d9db17537	2186	/* Enable the encoder interface channels */
mbed_official	376:cb4d9db17537	2187	switch (Channel)
mbed_official	376:cb4d9db17537	2188	{
mbed_official	376:cb4d9db17537	2189	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2190	{
mbed_official	376:cb4d9db17537	2191	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2192	break;
mbed_official	376:cb4d9db17537	2193	}
mbed_official	376:cb4d9db17537	2194	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2195	{
mbed_official	376:cb4d9db17537	2196	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2197	break;
mbed_official	376:cb4d9db17537	2198	}
mbed_official	376:cb4d9db17537	2199	default :
mbed_official	376:cb4d9db17537	2200	{
mbed_official	376:cb4d9db17537	2201	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2202	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2203	break;
mbed_official	376:cb4d9db17537	2204	}
mbed_official	376:cb4d9db17537	2205	}
mbed_official	376:cb4d9db17537	2206	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	2207	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	2208
mbed_official	376:cb4d9db17537	2209	/* Return function status */
mbed_official	376:cb4d9db17537	2210	return HAL_OK;
mbed_official	376:cb4d9db17537	2211	}
mbed_official	376:cb4d9db17537	2212
mbed_official	376:cb4d9db17537	2213	/**
mbed_official	376:cb4d9db17537	2214	* @brief Stops the TIM Encoder Interface.
mbed_official	376:cb4d9db17537	2215	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2216	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2217	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	2218	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2219	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2220	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2221	* @retval HAL status
mbed_official	376:cb4d9db17537	2222	*/
mbed_official	376:cb4d9db17537	2223	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	2224	{
mbed_official	376:cb4d9db17537	2225	/* Check the parameters */
mbed_official	376:cb4d9db17537	2226	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2227
mbed_official	376:cb4d9db17537	2228	/* Disable the Input Capture channels 1 and 2
mbed_official	376:cb4d9db17537	2229	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	376:cb4d9db17537	2230	switch (Channel)
mbed_official	376:cb4d9db17537	2231	{
mbed_official	376:cb4d9db17537	2232	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2233	{
mbed_official	376:cb4d9db17537	2234	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2235	break;
mbed_official	376:cb4d9db17537	2236	}
mbed_official	376:cb4d9db17537	2237	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2238	{
mbed_official	376:cb4d9db17537	2239	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2240	break;
mbed_official	376:cb4d9db17537	2241	}
mbed_official	376:cb4d9db17537	2242	default :
mbed_official	376:cb4d9db17537	2243	{
mbed_official	376:cb4d9db17537	2244	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2245	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2246	break;
mbed_official	376:cb4d9db17537	2247	}
mbed_official	376:cb4d9db17537	2248	}
mbed_official	376:cb4d9db17537	2249	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2250	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2251
mbed_official	376:cb4d9db17537	2252	/* Return function status */
mbed_official	376:cb4d9db17537	2253	return HAL_OK;
mbed_official	376:cb4d9db17537	2254	}
mbed_official	376:cb4d9db17537	2255
mbed_official	376:cb4d9db17537	2256	/**
mbed_official	376:cb4d9db17537	2257	* @brief Starts the TIM Encoder Interface in interrupt mode.
mbed_official	376:cb4d9db17537	2258	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2259	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2260	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2261	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2262	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2263	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2264	* @retval HAL status
mbed_official	376:cb4d9db17537	2265	*/
mbed_official	376:cb4d9db17537	2266	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	2267	{
mbed_official	376:cb4d9db17537	2268	/* Check the parameters */
mbed_official	376:cb4d9db17537	2269	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2270
mbed_official	376:cb4d9db17537	2271	/* Enable the encoder interface channels */
mbed_official	376:cb4d9db17537	2272	/* Enable the capture compare Interrupts 1 and/or 2 */
mbed_official	376:cb4d9db17537	2273	switch (Channel)
mbed_official	376:cb4d9db17537	2274	{
mbed_official	376:cb4d9db17537	2275	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2276	{
mbed_official	376:cb4d9db17537	2277	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2278	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2279	break;
mbed_official	376:cb4d9db17537	2280	}
mbed_official	376:cb4d9db17537	2281	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2282	{
mbed_official	376:cb4d9db17537	2283	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2284	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2285	break;
mbed_official	376:cb4d9db17537	2286	}
mbed_official	376:cb4d9db17537	2287	default :
mbed_official	376:cb4d9db17537	2288	{
mbed_official	376:cb4d9db17537	2289	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2290	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2291	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2292	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2293	break;
mbed_official	376:cb4d9db17537	2294	}
mbed_official	376:cb4d9db17537	2295	}
mbed_official	376:cb4d9db17537	2296
mbed_official	376:cb4d9db17537	2297	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	2298	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	2299
mbed_official	376:cb4d9db17537	2300	/* Return function status */
mbed_official	376:cb4d9db17537	2301	return HAL_OK;
mbed_official	376:cb4d9db17537	2302	}
mbed_official	376:cb4d9db17537	2303
mbed_official	376:cb4d9db17537	2304	/**
mbed_official	376:cb4d9db17537	2305	* @brief Stops the TIM Encoder Interface in interrupt mode.
mbed_official	376:cb4d9db17537	2306	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2307	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2308	* @param Channel: TIM Channels to be disabled.
mbed_official	376:cb4d9db17537	2309	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2310	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2311	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2312	* @retval HAL status
mbed_official	376:cb4d9db17537	2313	*/
mbed_official	376:cb4d9db17537	2314	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	2315	{
mbed_official	376:cb4d9db17537	2316	/* Check the parameters */
mbed_official	376:cb4d9db17537	2317	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2318
mbed_official	376:cb4d9db17537	2319	/* Disable the Input Capture channels 1 and 2
mbed_official	376:cb4d9db17537	2320	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	376:cb4d9db17537	2321	if(Channel == TIM_CHANNEL_1)
mbed_official	376:cb4d9db17537	2322	{
mbed_official	376:cb4d9db17537	2323	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2324
mbed_official	376:cb4d9db17537	2325	/* Disable the capture compare Interrupts 1 */
mbed_official	376:cb4d9db17537	2326	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2327	}
mbed_official	376:cb4d9db17537	2328	else if(Channel == TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2329	{
mbed_official	376:cb4d9db17537	2330	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2331
mbed_official	376:cb4d9db17537	2332	/* Disable the capture compare Interrupts 2 */
mbed_official	376:cb4d9db17537	2333	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2334	}
mbed_official	376:cb4d9db17537	2335	else
mbed_official	376:cb4d9db17537	2336	{
mbed_official	376:cb4d9db17537	2337	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2338	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2339
mbed_official	376:cb4d9db17537	2340	/* Disable the capture compare Interrupts 1 and 2 */
mbed_official	376:cb4d9db17537	2341	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	2342	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	2343	}
mbed_official	376:cb4d9db17537	2344
mbed_official	376:cb4d9db17537	2345	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2346	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2347
mbed_official	376:cb4d9db17537	2348	/* Change the htim state */
mbed_official	376:cb4d9db17537	2349	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2350
mbed_official	376:cb4d9db17537	2351	/* Return function status */
mbed_official	376:cb4d9db17537	2352	return HAL_OK;
mbed_official	376:cb4d9db17537	2353	}
mbed_official	376:cb4d9db17537	2354
mbed_official	376:cb4d9db17537	2355	/**
mbed_official	376:cb4d9db17537	2356	* @brief Starts the TIM Encoder Interface in DMA mode.
mbed_official	376:cb4d9db17537	2357	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2358	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2359	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2360	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2361	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2362	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2363	* @param pData1: The destination Buffer address for IC1.
mbed_official	376:cb4d9db17537	2364	* @param pData2: The destination Buffer address for IC2.
mbed_official	376:cb4d9db17537	2365	* @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official	376:cb4d9db17537	2366	* @retval HAL status
mbed_official	376:cb4d9db17537	2367	*/
mbed_official	376:cb4d9db17537	2368	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length)
mbed_official	376:cb4d9db17537	2369	{
mbed_official	376:cb4d9db17537	2370	/* Check the parameters */
mbed_official	376:cb4d9db17537	2371	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2372
mbed_official	376:cb4d9db17537	2373	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	2374	{
mbed_official	376:cb4d9db17537	2375	return HAL_BUSY;
mbed_official	376:cb4d9db17537	2376	}
mbed_official	376:cb4d9db17537	2377	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	2378	{
mbed_official	376:cb4d9db17537	2379	if((((pData1 == 0) \|\| (pData2 == 0) )) && (Length > 0))
mbed_official	376:cb4d9db17537	2380	{
mbed_official	376:cb4d9db17537	2381	return HAL_ERROR;
mbed_official	376:cb4d9db17537	2382	}
mbed_official	376:cb4d9db17537	2383	else
mbed_official	376:cb4d9db17537	2384	{
mbed_official	376:cb4d9db17537	2385	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2386	}
mbed_official	376:cb4d9db17537	2387	}
mbed_official	376:cb4d9db17537	2388
mbed_official	376:cb4d9db17537	2389	switch (Channel)
mbed_official	376:cb4d9db17537	2390	{
mbed_official	376:cb4d9db17537	2391	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2392	{
mbed_official	376:cb4d9db17537	2393	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	2394	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	2395
mbed_official	376:cb4d9db17537	2396	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	2397	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	2398
mbed_official	376:cb4d9db17537	2399	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	2400	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
mbed_official	376:cb4d9db17537	2401
mbed_official	376:cb4d9db17537	2402	/* Enable the TIM Input Capture DMA request */
mbed_official	376:cb4d9db17537	2403	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	2404
mbed_official	376:cb4d9db17537	2405	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	2406	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	2407
mbed_official	376:cb4d9db17537	2408	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	2409	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2410	}
mbed_official	376:cb4d9db17537	2411	break;
mbed_official	376:cb4d9db17537	2412
mbed_official	376:cb4d9db17537	2413	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2414	{
mbed_official	376:cb4d9db17537	2415	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	2416	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	2417
mbed_official	376:cb4d9db17537	2418	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	2419	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError;
mbed_official	376:cb4d9db17537	2420	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	2421	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official	376:cb4d9db17537	2422
mbed_official	376:cb4d9db17537	2423	/* Enable the TIM Input Capture DMA request */
mbed_official	376:cb4d9db17537	2424	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	2425
mbed_official	376:cb4d9db17537	2426	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	2427	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	2428
mbed_official	376:cb4d9db17537	2429	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	2430	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2431	}
mbed_official	376:cb4d9db17537	2432	break;
mbed_official	376:cb4d9db17537	2433
mbed_official	376:cb4d9db17537	2434	case TIM_CHANNEL_ALL:
mbed_official	376:cb4d9db17537	2435	{
mbed_official	376:cb4d9db17537	2436	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	2437	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	2438
mbed_official	376:cb4d9db17537	2439	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	2440	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	2441
mbed_official	376:cb4d9db17537	2442	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	2443	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
mbed_official	376:cb4d9db17537	2444
mbed_official	376:cb4d9db17537	2445	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	2446	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	2447
mbed_official	376:cb4d9db17537	2448	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	2449	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	2450
mbed_official	376:cb4d9db17537	2451	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	2452	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official	376:cb4d9db17537	2453
mbed_official	376:cb4d9db17537	2454	/* Enable the Peripheral */
mbed_official	376:cb4d9db17537	2455	__HAL_TIM_ENABLE(htim);
mbed_official	376:cb4d9db17537	2456
mbed_official	376:cb4d9db17537	2457	/* Enable the Capture compare channel */
mbed_official	376:cb4d9db17537	2458	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2459	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	376:cb4d9db17537	2460
mbed_official	376:cb4d9db17537	2461	/* Enable the TIM Input Capture DMA request */
mbed_official	376:cb4d9db17537	2462	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	2463	/* Enable the TIM Input Capture DMA request */
mbed_official	376:cb4d9db17537	2464	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	2465	}
mbed_official	376:cb4d9db17537	2466	break;
mbed_official	376:cb4d9db17537	2467
mbed_official	376:cb4d9db17537	2468	default:
mbed_official	376:cb4d9db17537	2469	break;
mbed_official	376:cb4d9db17537	2470	}
mbed_official	376:cb4d9db17537	2471	/* Return function status */
mbed_official	376:cb4d9db17537	2472	return HAL_OK;
mbed_official	376:cb4d9db17537	2473	}
mbed_official	376:cb4d9db17537	2474
mbed_official	376:cb4d9db17537	2475	/**
mbed_official	376:cb4d9db17537	2476	* @brief Stops the TIM Encoder Interface in DMA mode.
mbed_official	376:cb4d9db17537	2477	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2478	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2479	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2480	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2481	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2482	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2483	* @retval HAL status
mbed_official	376:cb4d9db17537	2484	*/
mbed_official	376:cb4d9db17537	2485	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	2486	{
mbed_official	376:cb4d9db17537	2487	/* Check the parameters */
mbed_official	376:cb4d9db17537	2488	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2489
mbed_official	376:cb4d9db17537	2490	/* Disable the Input Capture channels 1 and 2
mbed_official	376:cb4d9db17537	2491	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	376:cb4d9db17537	2492	if(Channel == TIM_CHANNEL_1)
mbed_official	376:cb4d9db17537	2493	{
mbed_official	376:cb4d9db17537	2494	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2495
mbed_official	376:cb4d9db17537	2496	/* Disable the capture compare DMA Request 1 */
mbed_official	376:cb4d9db17537	2497	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	2498	}
mbed_official	376:cb4d9db17537	2499	else if(Channel == TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2500	{
mbed_official	376:cb4d9db17537	2501	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2502
mbed_official	376:cb4d9db17537	2503	/* Disable the capture compare DMA Request 2 */
mbed_official	376:cb4d9db17537	2504	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	2505	}
mbed_official	376:cb4d9db17537	2506	else
mbed_official	376:cb4d9db17537	2507	{
mbed_official	376:cb4d9db17537	2508	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2509	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	376:cb4d9db17537	2510
mbed_official	376:cb4d9db17537	2511	/* Disable the capture compare DMA Request 1 and 2 */
mbed_official	376:cb4d9db17537	2512	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	376:cb4d9db17537	2513	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	376:cb4d9db17537	2514	}
mbed_official	376:cb4d9db17537	2515
mbed_official	376:cb4d9db17537	2516	/* Disable the Peripheral */
mbed_official	376:cb4d9db17537	2517	__HAL_TIM_DISABLE(htim);
mbed_official	376:cb4d9db17537	2518
mbed_official	376:cb4d9db17537	2519	/* Change the htim state */
mbed_official	376:cb4d9db17537	2520	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2521
mbed_official	376:cb4d9db17537	2522	/* Return function status */
mbed_official	376:cb4d9db17537	2523	return HAL_OK;
mbed_official	376:cb4d9db17537	2524	}
mbed_official	376:cb4d9db17537	2525
mbed_official	376:cb4d9db17537	2526	/**
mbed_official	376:cb4d9db17537	2527	* @}
mbed_official	376:cb4d9db17537	2528	*/
mbed_official	376:cb4d9db17537	2529
mbed_official	376:cb4d9db17537	2530	/** @defgroup TIM_Group3 Peripheral Control functions
mbed_official	376:cb4d9db17537	2531	* @brief Peripheral Control functions
mbed_official	376:cb4d9db17537	2532	*
mbed_official	376:cb4d9db17537	2533	@verbatim
mbed_official	376:cb4d9db17537	2534	==============================================================================
mbed_official	376:cb4d9db17537	2535	##### Peripheral Control functions #####
mbed_official	376:cb4d9db17537	2536	==============================================================================
mbed_official	376:cb4d9db17537	2537	[..]
mbed_official	376:cb4d9db17537	2538	This section provides functions allowing to:
mbed_official	376:cb4d9db17537	2539	(+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
mbed_official	376:cb4d9db17537	2540	(+) Configure External Clock source.
mbed_official	376:cb4d9db17537	2541	(+) Configure Master and the Slave synchronization.
mbed_official	376:cb4d9db17537	2542	(+) Configure the DMA Burst Mode.
mbed_official	376:cb4d9db17537	2543
mbed_official	376:cb4d9db17537	2544	@endverbatim
mbed_official	376:cb4d9db17537	2545	* @{
mbed_official	376:cb4d9db17537	2546	*/
mbed_official	376:cb4d9db17537	2547	/**
mbed_official	376:cb4d9db17537	2548	* @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official	376:cb4d9db17537	2549	* parameters in the TIM_OC_InitTypeDef.
mbed_official	376:cb4d9db17537	2550	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2551	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2552	* @param sConfig: TIM Output Compare configuration structure
mbed_official	376:cb4d9db17537	2553	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2554	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2555	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2556	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2557	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	2558	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	2559	* @retval HAL status
mbed_official	376:cb4d9db17537	2560	*/
mbed_official	376:cb4d9db17537	2561	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	376:cb4d9db17537	2562	{
mbed_official	376:cb4d9db17537	2563	/* Check the parameters */
mbed_official	376:cb4d9db17537	2564	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	376:cb4d9db17537	2565	assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official	376:cb4d9db17537	2566	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official	376:cb4d9db17537	2567	assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official	376:cb4d9db17537	2568
mbed_official	376:cb4d9db17537	2569	/* Check input state */
mbed_official	376:cb4d9db17537	2570	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	2571
mbed_official	376:cb4d9db17537	2572	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2573
mbed_official	376:cb4d9db17537	2574	switch (Channel)
mbed_official	376:cb4d9db17537	2575	{
mbed_official	376:cb4d9db17537	2576	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2577	{
mbed_official	376:cb4d9db17537	2578	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2579	/* Configure the TIM Channel 1 in Output Compare */
mbed_official	376:cb4d9db17537	2580	TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2581	}
mbed_official	376:cb4d9db17537	2582	break;
mbed_official	376:cb4d9db17537	2583
mbed_official	376:cb4d9db17537	2584	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2585	{
mbed_official	376:cb4d9db17537	2586	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2587	/* Configure the TIM Channel 2 in Output Compare */
mbed_official	376:cb4d9db17537	2588	TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2589	}
mbed_official	376:cb4d9db17537	2590	break;
mbed_official	376:cb4d9db17537	2591
mbed_official	376:cb4d9db17537	2592	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	2593	{
mbed_official	376:cb4d9db17537	2594	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2595	/* Configure the TIM Channel 3 in Output Compare */
mbed_official	376:cb4d9db17537	2596	TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2597	}
mbed_official	376:cb4d9db17537	2598	break;
mbed_official	376:cb4d9db17537	2599
mbed_official	376:cb4d9db17537	2600	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	2601	{
mbed_official	376:cb4d9db17537	2602	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2603	/* Configure the TIM Channel 4 in Output Compare */
mbed_official	376:cb4d9db17537	2604	TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2605	}
mbed_official	376:cb4d9db17537	2606	break;
mbed_official	376:cb4d9db17537	2607
mbed_official	376:cb4d9db17537	2608	default:
mbed_official	376:cb4d9db17537	2609	break;
mbed_official	376:cb4d9db17537	2610	}
mbed_official	376:cb4d9db17537	2611	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2612
mbed_official	376:cb4d9db17537	2613	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	2614
mbed_official	376:cb4d9db17537	2615	return HAL_OK;
mbed_official	376:cb4d9db17537	2616	}
mbed_official	376:cb4d9db17537	2617
mbed_official	376:cb4d9db17537	2618	/**
mbed_official	376:cb4d9db17537	2619	* @brief Initializes the TIM Input Capture Channels according to the specified
mbed_official	376:cb4d9db17537	2620	* parameters in the TIM_IC_InitTypeDef.
mbed_official	376:cb4d9db17537	2621	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2622	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2623	* @param sConfig: TIM Input Capture configuration structure
mbed_official	376:cb4d9db17537	2624	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2625	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2626	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2627	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2628	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	2629	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	2630	* @retval HAL status
mbed_official	376:cb4d9db17537	2631	*/
mbed_official	376:cb4d9db17537	2632	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	376:cb4d9db17537	2633	{
mbed_official	376:cb4d9db17537	2634	/* Check the parameters */
mbed_official	376:cb4d9db17537	2635	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2636	assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
mbed_official	376:cb4d9db17537	2637	assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
mbed_official	376:cb4d9db17537	2638	assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
mbed_official	376:cb4d9db17537	2639	assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
mbed_official	376:cb4d9db17537	2640
mbed_official	376:cb4d9db17537	2641	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	2642
mbed_official	376:cb4d9db17537	2643	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2644
mbed_official	376:cb4d9db17537	2645	if (Channel == TIM_CHANNEL_1)
mbed_official	376:cb4d9db17537	2646	{
mbed_official	376:cb4d9db17537	2647	/* TI1 Configuration */
mbed_official	376:cb4d9db17537	2648	TIM_TI1_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	2649	sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2650	sConfig->ICSelection,
mbed_official	376:cb4d9db17537	2651	sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2652
mbed_official	376:cb4d9db17537	2653	/* Reset the IC1PSC Bits */
mbed_official	376:cb4d9db17537	2654	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official	376:cb4d9db17537	2655
mbed_official	376:cb4d9db17537	2656	/* Set the IC1PSC value */
mbed_official	376:cb4d9db17537	2657	htim->Instance->CCMR1 \|= sConfig->ICPrescaler;
mbed_official	376:cb4d9db17537	2658	}
mbed_official	376:cb4d9db17537	2659	else if (Channel == TIM_CHANNEL_2)
mbed_official	376:cb4d9db17537	2660	{
mbed_official	376:cb4d9db17537	2661	/* TI2 Configuration */
mbed_official	376:cb4d9db17537	2662	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2663
mbed_official	376:cb4d9db17537	2664	TIM_TI2_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	2665	sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2666	sConfig->ICSelection,
mbed_official	376:cb4d9db17537	2667	sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2668
mbed_official	376:cb4d9db17537	2669	/* Reset the IC2PSC Bits */
mbed_official	376:cb4d9db17537	2670	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official	376:cb4d9db17537	2671
mbed_official	376:cb4d9db17537	2672	/* Set the IC2PSC value */
mbed_official	376:cb4d9db17537	2673	htim->Instance->CCMR1 \|= (sConfig->ICPrescaler << 8);
mbed_official	376:cb4d9db17537	2674	}
mbed_official	376:cb4d9db17537	2675	else if (Channel == TIM_CHANNEL_3)
mbed_official	376:cb4d9db17537	2676	{
mbed_official	376:cb4d9db17537	2677	/* TI3 Configuration */
mbed_official	376:cb4d9db17537	2678	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2679
mbed_official	376:cb4d9db17537	2680	TIM_TI3_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	2681	sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2682	sConfig->ICSelection,
mbed_official	376:cb4d9db17537	2683	sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2684
mbed_official	376:cb4d9db17537	2685	/* Reset the IC3PSC Bits */
mbed_official	376:cb4d9db17537	2686	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
mbed_official	376:cb4d9db17537	2687
mbed_official	376:cb4d9db17537	2688	/* Set the IC3PSC value */
mbed_official	376:cb4d9db17537	2689	htim->Instance->CCMR2 \|= sConfig->ICPrescaler;
mbed_official	376:cb4d9db17537	2690	}
mbed_official	376:cb4d9db17537	2691	else
mbed_official	376:cb4d9db17537	2692	{
mbed_official	376:cb4d9db17537	2693	/* TI4 Configuration */
mbed_official	376:cb4d9db17537	2694	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2695
mbed_official	376:cb4d9db17537	2696	TIM_TI4_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	2697	sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2698	sConfig->ICSelection,
mbed_official	376:cb4d9db17537	2699	sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2700
mbed_official	376:cb4d9db17537	2701	/* Reset the IC4PSC Bits */
mbed_official	376:cb4d9db17537	2702	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
mbed_official	376:cb4d9db17537	2703
mbed_official	376:cb4d9db17537	2704	/* Set the IC4PSC value */
mbed_official	376:cb4d9db17537	2705	htim->Instance->CCMR2 \|= (sConfig->ICPrescaler << 8);
mbed_official	376:cb4d9db17537	2706	}
mbed_official	376:cb4d9db17537	2707
mbed_official	376:cb4d9db17537	2708	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2709
mbed_official	376:cb4d9db17537	2710	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	2711
mbed_official	376:cb4d9db17537	2712	return HAL_OK;
mbed_official	376:cb4d9db17537	2713	}
mbed_official	376:cb4d9db17537	2714
mbed_official	376:cb4d9db17537	2715	/**
mbed_official	376:cb4d9db17537	2716	* @brief Initializes the TIM PWM channels according to the specified
mbed_official	376:cb4d9db17537	2717	* parameters in the TIM_OC_InitTypeDef.
mbed_official	376:cb4d9db17537	2718	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2719	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2720	* @param sConfig: TIM PWM configuration structure
mbed_official	376:cb4d9db17537	2721	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2722	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2723	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2724	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2725	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	2726	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	2727	* @retval HAL status
mbed_official	376:cb4d9db17537	2728	*/
mbed_official	376:cb4d9db17537	2729	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	376:cb4d9db17537	2730	{
mbed_official	376:cb4d9db17537	2731	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	2732
mbed_official	376:cb4d9db17537	2733	/* Check the parameters */
mbed_official	376:cb4d9db17537	2734	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	376:cb4d9db17537	2735	assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official	376:cb4d9db17537	2736	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official	376:cb4d9db17537	2737
mbed_official	376:cb4d9db17537	2738	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2739
mbed_official	376:cb4d9db17537	2740	switch (Channel)
mbed_official	376:cb4d9db17537	2741	{
mbed_official	376:cb4d9db17537	2742	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2743	{
mbed_official	376:cb4d9db17537	2744	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2745	/* Configure the Channel 1 in PWM mode */
mbed_official	376:cb4d9db17537	2746	TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2747
mbed_official	376:cb4d9db17537	2748	/* Set the Preload enable bit for channel1 */
mbed_official	376:cb4d9db17537	2749	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1PE;
mbed_official	376:cb4d9db17537	2750
mbed_official	376:cb4d9db17537	2751	/* Configure the Output Fast mode */
mbed_official	376:cb4d9db17537	2752	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official	376:cb4d9db17537	2753	htim->Instance->CCMR1 \|= sConfig->OCFastMode;
mbed_official	376:cb4d9db17537	2754	}
mbed_official	376:cb4d9db17537	2755	break;
mbed_official	376:cb4d9db17537	2756
mbed_official	376:cb4d9db17537	2757	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2758	{
mbed_official	376:cb4d9db17537	2759	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2760	/* Configure the Channel 2 in PWM mode */
mbed_official	376:cb4d9db17537	2761	TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2762
mbed_official	376:cb4d9db17537	2763	/* Set the Preload enable bit for channel2 */
mbed_official	376:cb4d9db17537	2764	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2PE;
mbed_official	376:cb4d9db17537	2765
mbed_official	376:cb4d9db17537	2766	/* Configure the Output Fast mode */
mbed_official	376:cb4d9db17537	2767	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official	376:cb4d9db17537	2768	htim->Instance->CCMR1 \|= sConfig->OCFastMode << 8;
mbed_official	376:cb4d9db17537	2769	}
mbed_official	376:cb4d9db17537	2770	break;
mbed_official	376:cb4d9db17537	2771
mbed_official	376:cb4d9db17537	2772	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	2773	{
mbed_official	376:cb4d9db17537	2774	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2775	/* Configure the Channel 3 in PWM mode */
mbed_official	376:cb4d9db17537	2776	TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2777
mbed_official	376:cb4d9db17537	2778	/* Set the Preload enable bit for channel3 */
mbed_official	376:cb4d9db17537	2779	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3PE;
mbed_official	376:cb4d9db17537	2780
mbed_official	376:cb4d9db17537	2781	/* Configure the Output Fast mode */
mbed_official	376:cb4d9db17537	2782	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official	376:cb4d9db17537	2783	htim->Instance->CCMR2 \|= sConfig->OCFastMode;
mbed_official	376:cb4d9db17537	2784	}
mbed_official	376:cb4d9db17537	2785	break;
mbed_official	376:cb4d9db17537	2786
mbed_official	376:cb4d9db17537	2787	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	2788	{
mbed_official	376:cb4d9db17537	2789	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2790	/* Configure the Channel 4 in PWM mode */
mbed_official	376:cb4d9db17537	2791	TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official	376:cb4d9db17537	2792
mbed_official	376:cb4d9db17537	2793	/* Set the Preload enable bit for channel4 */
mbed_official	376:cb4d9db17537	2794	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4PE;
mbed_official	376:cb4d9db17537	2795
mbed_official	376:cb4d9db17537	2796	/* Configure the Output Fast mode */
mbed_official	376:cb4d9db17537	2797	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official	376:cb4d9db17537	2798	htim->Instance->CCMR2 \|= sConfig->OCFastMode << 8;
mbed_official	376:cb4d9db17537	2799	}
mbed_official	376:cb4d9db17537	2800	break;
mbed_official	376:cb4d9db17537	2801
mbed_official	376:cb4d9db17537	2802	default:
mbed_official	376:cb4d9db17537	2803	break;
mbed_official	376:cb4d9db17537	2804	}
mbed_official	376:cb4d9db17537	2805
mbed_official	376:cb4d9db17537	2806	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2807
mbed_official	376:cb4d9db17537	2808	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	2809
mbed_official	376:cb4d9db17537	2810	return HAL_OK;
mbed_official	376:cb4d9db17537	2811	}
mbed_official	376:cb4d9db17537	2812
mbed_official	376:cb4d9db17537	2813	/**
mbed_official	376:cb4d9db17537	2814	* @brief Initializes the TIM One Pulse Channels according to the specified
mbed_official	376:cb4d9db17537	2815	* parameters in the TIM_OnePulse_InitTypeDef.
mbed_official	376:cb4d9db17537	2816	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2817	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2818	* @param sConfig: TIM One Pulse configuration structure
mbed_official	376:cb4d9db17537	2819	* @param OutputChannel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2820	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2821	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2822	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2823	* @param InputChannel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	2824	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	2825	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	2826	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	2827	* @retval HAL status
mbed_official	376:cb4d9db17537	2828	*/
mbed_official	376:cb4d9db17537	2829	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel)
mbed_official	376:cb4d9db17537	2830	{
mbed_official	376:cb4d9db17537	2831	TIM_OC_InitTypeDef temp1;
mbed_official	376:cb4d9db17537	2832
mbed_official	376:cb4d9db17537	2833	/* Check the parameters */
mbed_official	376:cb4d9db17537	2834	assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
mbed_official	376:cb4d9db17537	2835	assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
mbed_official	376:cb4d9db17537	2836
mbed_official	376:cb4d9db17537	2837	if(OutputChannel != InputChannel)
mbed_official	376:cb4d9db17537	2838	{
mbed_official	376:cb4d9db17537	2839	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	2840
mbed_official	376:cb4d9db17537	2841	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2842
mbed_official	376:cb4d9db17537	2843	/* Extract the Ouput compare configuration from sConfig structure */
mbed_official	376:cb4d9db17537	2844	temp1.OCMode = sConfig->OCMode;
mbed_official	376:cb4d9db17537	2845	temp1.Pulse = sConfig->Pulse;
mbed_official	376:cb4d9db17537	2846	temp1.OCPolarity = sConfig->OCPolarity;
mbed_official	376:cb4d9db17537	2847
mbed_official	376:cb4d9db17537	2848	switch (OutputChannel)
mbed_official	376:cb4d9db17537	2849	{
mbed_official	376:cb4d9db17537	2850	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2851	{
mbed_official	376:cb4d9db17537	2852	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2853
mbed_official	376:cb4d9db17537	2854	TIM_OC1_SetConfig(htim->Instance, &temp1);
mbed_official	376:cb4d9db17537	2855	}
mbed_official	376:cb4d9db17537	2856	break;
mbed_official	376:cb4d9db17537	2857	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2858	{
mbed_official	376:cb4d9db17537	2859	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2860
mbed_official	376:cb4d9db17537	2861	TIM_OC2_SetConfig(htim->Instance, &temp1);
mbed_official	376:cb4d9db17537	2862	}
mbed_official	376:cb4d9db17537	2863	break;
mbed_official	376:cb4d9db17537	2864	default:
mbed_official	376:cb4d9db17537	2865	break;
mbed_official	376:cb4d9db17537	2866	}
mbed_official	376:cb4d9db17537	2867	switch (InputChannel)
mbed_official	376:cb4d9db17537	2868	{
mbed_official	376:cb4d9db17537	2869	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	2870	{
mbed_official	376:cb4d9db17537	2871	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2872
mbed_official	376:cb4d9db17537	2873	TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2874	sConfig->ICSelection, sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2875
mbed_official	376:cb4d9db17537	2876	/* Reset the IC1PSC Bits */
mbed_official	376:cb4d9db17537	2877	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official	376:cb4d9db17537	2878
mbed_official	376:cb4d9db17537	2879	/* Select the Trigger source */
mbed_official	376:cb4d9db17537	2880	htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official	376:cb4d9db17537	2881	htim->Instance->SMCR \|= TIM_TS_TI1FP1;
mbed_official	376:cb4d9db17537	2882
mbed_official	376:cb4d9db17537	2883	/* Select the Slave Mode */
mbed_official	376:cb4d9db17537	2884	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	376:cb4d9db17537	2885	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
mbed_official	376:cb4d9db17537	2886	}
mbed_official	376:cb4d9db17537	2887	break;
mbed_official	376:cb4d9db17537	2888	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	2889	{
mbed_official	376:cb4d9db17537	2890	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2891
mbed_official	376:cb4d9db17537	2892	TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official	376:cb4d9db17537	2893	sConfig->ICSelection, sConfig->ICFilter);
mbed_official	376:cb4d9db17537	2894
mbed_official	376:cb4d9db17537	2895	/* Reset the IC2PSC Bits */
mbed_official	376:cb4d9db17537	2896	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official	376:cb4d9db17537	2897
mbed_official	376:cb4d9db17537	2898	/* Select the Trigger source */
mbed_official	376:cb4d9db17537	2899	htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official	376:cb4d9db17537	2900	htim->Instance->SMCR \|= TIM_TS_TI2FP2;
mbed_official	376:cb4d9db17537	2901
mbed_official	376:cb4d9db17537	2902	/* Select the Slave Mode */
mbed_official	376:cb4d9db17537	2903	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	376:cb4d9db17537	2904	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
mbed_official	376:cb4d9db17537	2905	}
mbed_official	376:cb4d9db17537	2906	break;
mbed_official	376:cb4d9db17537	2907
mbed_official	376:cb4d9db17537	2908	default:
mbed_official	376:cb4d9db17537	2909	break;
mbed_official	376:cb4d9db17537	2910	}
mbed_official	376:cb4d9db17537	2911
mbed_official	376:cb4d9db17537	2912	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	2913
mbed_official	376:cb4d9db17537	2914	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	2915
mbed_official	376:cb4d9db17537	2916	return HAL_OK;
mbed_official	376:cb4d9db17537	2917	}
mbed_official	376:cb4d9db17537	2918	else
mbed_official	376:cb4d9db17537	2919	{
mbed_official	376:cb4d9db17537	2920	return HAL_ERROR;
mbed_official	376:cb4d9db17537	2921	}
mbed_official	376:cb4d9db17537	2922	}
mbed_official	376:cb4d9db17537	2923
mbed_official	376:cb4d9db17537	2924	/**
mbed_official	376:cb4d9db17537	2925	* @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
mbed_official	376:cb4d9db17537	2926	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2927	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	2928	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write.
mbed_official	376:cb4d9db17537	2929	* This parameters can be on of the following values:
mbed_official	376:cb4d9db17537	2930	* @arg TIM_DMABase_CR1
mbed_official	376:cb4d9db17537	2931	* @arg TIM_DMABase_CR2
mbed_official	376:cb4d9db17537	2932	* @arg TIM_DMABase_SMCR
mbed_official	376:cb4d9db17537	2933	* @arg TIM_DMABase_DIER
mbed_official	376:cb4d9db17537	2934	* @arg TIM_DMABase_SR
mbed_official	376:cb4d9db17537	2935	* @arg TIM_DMABase_EGR
mbed_official	376:cb4d9db17537	2936	* @arg TIM_DMABase_CCMR1
mbed_official	376:cb4d9db17537	2937	* @arg TIM_DMABase_CCMR2
mbed_official	376:cb4d9db17537	2938	* @arg TIM_DMABase_CCER
mbed_official	376:cb4d9db17537	2939	* @arg TIM_DMABase_CNT
mbed_official	376:cb4d9db17537	2940	* @arg TIM_DMABase_PSC
mbed_official	376:cb4d9db17537	2941	* @arg TIM_DMABase_ARR
mbed_official	376:cb4d9db17537	2942	* @arg TIM_DMABase_CCR1
mbed_official	376:cb4d9db17537	2943	* @arg TIM_DMABase_CCR2
mbed_official	376:cb4d9db17537	2944	* @arg TIM_DMABase_CCR3
mbed_official	376:cb4d9db17537	2945	* @arg TIM_DMABase_CCR4
mbed_official	376:cb4d9db17537	2946	* @arg TIM_DMABase_DCR
mbed_official	376:cb4d9db17537	2947	* @param BurstRequestSrc: TIM DMA Request sources.
mbed_official	376:cb4d9db17537	2948	* This parameters can be on of the following values:
mbed_official	376:cb4d9db17537	2949	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official	376:cb4d9db17537	2950	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	376:cb4d9db17537	2951	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	376:cb4d9db17537	2952	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	376:cb4d9db17537	2953	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	376:cb4d9db17537	2954	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official	376:cb4d9db17537	2955	* @param BurstBuffer: The Buffer address.
mbed_official	376:cb4d9db17537	2956	* @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official	376:cb4d9db17537	2957	* between TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	376:cb4d9db17537	2958	* @retval HAL status
mbed_official	376:cb4d9db17537	2959	*/
mbed_official	376:cb4d9db17537	2960	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official	376:cb4d9db17537	2961	uint32_t* BurstBuffer, uint32_t BurstLength)
mbed_official	376:cb4d9db17537	2962	{
mbed_official	376:cb4d9db17537	2963	/* Check the parameters */
mbed_official	376:cb4d9db17537	2964	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	2965	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official	376:cb4d9db17537	2966	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	376:cb4d9db17537	2967	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official	376:cb4d9db17537	2968
mbed_official	376:cb4d9db17537	2969	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	2970	{
mbed_official	376:cb4d9db17537	2971	return HAL_BUSY;
mbed_official	376:cb4d9db17537	2972	}
mbed_official	376:cb4d9db17537	2973	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	2974	{
mbed_official	376:cb4d9db17537	2975	if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official	376:cb4d9db17537	2976	{
mbed_official	376:cb4d9db17537	2977	return HAL_ERROR;
mbed_official	376:cb4d9db17537	2978	}
mbed_official	376:cb4d9db17537	2979	else
mbed_official	376:cb4d9db17537	2980	{
mbed_official	376:cb4d9db17537	2981	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	2982	}
mbed_official	376:cb4d9db17537	2983	}
mbed_official	376:cb4d9db17537	2984	switch(BurstRequestSrc)
mbed_official	376:cb4d9db17537	2985	{
mbed_official	376:cb4d9db17537	2986	case TIM_DMA_UPDATE:
mbed_official	376:cb4d9db17537	2987	{
mbed_official	376:cb4d9db17537	2988	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	2989	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	376:cb4d9db17537	2990
mbed_official	376:cb4d9db17537	2991	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	2992	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	2993
mbed_official	376:cb4d9db17537	2994	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	2995	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	2996	}
mbed_official	376:cb4d9db17537	2997	break;
mbed_official	376:cb4d9db17537	2998	case TIM_DMA_CC1:
mbed_official	376:cb4d9db17537	2999	{
mbed_official	376:cb4d9db17537	3000	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3001	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	3002
mbed_official	376:cb4d9db17537	3003	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3004	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3005
mbed_official	376:cb4d9db17537	3006	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3007	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3008	}
mbed_official	376:cb4d9db17537	3009	break;
mbed_official	376:cb4d9db17537	3010	case TIM_DMA_CC2:
mbed_official	376:cb4d9db17537	3011	{
mbed_official	376:cb4d9db17537	3012	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3013	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	3014
mbed_official	376:cb4d9db17537	3015	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3016	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3017
mbed_official	376:cb4d9db17537	3018	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3019	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3020	}
mbed_official	376:cb4d9db17537	3021	break;
mbed_official	376:cb4d9db17537	3022	case TIM_DMA_CC3:
mbed_official	376:cb4d9db17537	3023	{
mbed_official	376:cb4d9db17537	3024	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3025	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	3026
mbed_official	376:cb4d9db17537	3027	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3028	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3029
mbed_official	376:cb4d9db17537	3030	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3031	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3032	}
mbed_official	376:cb4d9db17537	3033	break;
mbed_official	376:cb4d9db17537	3034	case TIM_DMA_CC4:
mbed_official	376:cb4d9db17537	3035	{
mbed_official	376:cb4d9db17537	3036	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3037	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	376:cb4d9db17537	3038
mbed_official	376:cb4d9db17537	3039	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3040	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3041
mbed_official	376:cb4d9db17537	3042	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3043	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3044	}
mbed_official	376:cb4d9db17537	3045	break;
mbed_official	376:cb4d9db17537	3046	case TIM_DMA_TRIGGER:
mbed_official	376:cb4d9db17537	3047	{
mbed_official	376:cb4d9db17537	3048	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3049	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official	376:cb4d9db17537	3050
mbed_official	376:cb4d9db17537	3051	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3052	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3053
mbed_official	376:cb4d9db17537	3054	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3055	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3056	}
mbed_official	376:cb4d9db17537	3057	break;
mbed_official	376:cb4d9db17537	3058	default:
mbed_official	376:cb4d9db17537	3059	break;
mbed_official	376:cb4d9db17537	3060	}
mbed_official	376:cb4d9db17537	3061	/* configure the DMA Burst Mode */
mbed_official	376:cb4d9db17537	3062	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
mbed_official	376:cb4d9db17537	3063
mbed_official	376:cb4d9db17537	3064	/* Enable the TIM DMA Request */
mbed_official	376:cb4d9db17537	3065	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official	376:cb4d9db17537	3066
mbed_official	376:cb4d9db17537	3067	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3068
mbed_official	376:cb4d9db17537	3069	/* Return function status */
mbed_official	376:cb4d9db17537	3070	return HAL_OK;
mbed_official	376:cb4d9db17537	3071	}
mbed_official	376:cb4d9db17537	3072
mbed_official	376:cb4d9db17537	3073	/**
mbed_official	376:cb4d9db17537	3074	* @brief Stops the TIM DMA Burst mode
mbed_official	376:cb4d9db17537	3075	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3076	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3077	* @param BurstRequestSrc: TIM DMA Request sources to disable
mbed_official	376:cb4d9db17537	3078	* @retval HAL status
mbed_official	376:cb4d9db17537	3079	*/
mbed_official	376:cb4d9db17537	3080	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official	376:cb4d9db17537	3081	{
mbed_official	376:cb4d9db17537	3082	/* Check the parameters */
mbed_official	376:cb4d9db17537	3083	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	376:cb4d9db17537	3084
mbed_official	376:cb4d9db17537	3085	/* Disable the TIM Update DMA request */
mbed_official	376:cb4d9db17537	3086	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official	376:cb4d9db17537	3087
mbed_official	376:cb4d9db17537	3088	/* Return function status */
mbed_official	376:cb4d9db17537	3089	return HAL_OK;
mbed_official	376:cb4d9db17537	3090	}
mbed_official	376:cb4d9db17537	3091
mbed_official	376:cb4d9db17537	3092	/**
mbed_official	376:cb4d9db17537	3093	* @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
mbed_official	376:cb4d9db17537	3094	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3095	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3096	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read.
mbed_official	376:cb4d9db17537	3097	* This parameters can be on of the following values:
mbed_official	376:cb4d9db17537	3098	* @arg TIM_DMABase_CR1
mbed_official	376:cb4d9db17537	3099	* @arg TIM_DMABase_CR2
mbed_official	376:cb4d9db17537	3100	* @arg TIM_DMABase_SMCR
mbed_official	376:cb4d9db17537	3101	* @arg TIM_DMABase_DIER
mbed_official	376:cb4d9db17537	3102	* @arg TIM_DMABase_SR
mbed_official	376:cb4d9db17537	3103	* @arg TIM_DMABase_EGR
mbed_official	376:cb4d9db17537	3104	* @arg TIM_DMABase_CCMR1
mbed_official	376:cb4d9db17537	3105	* @arg TIM_DMABase_CCMR2
mbed_official	376:cb4d9db17537	3106	* @arg TIM_DMABase_CCER
mbed_official	376:cb4d9db17537	3107	* @arg TIM_DMABase_CNT
mbed_official	376:cb4d9db17537	3108	* @arg TIM_DMABase_PSC
mbed_official	376:cb4d9db17537	3109	* @arg TIM_DMABase_ARR
mbed_official	376:cb4d9db17537	3110	* @arg TIM_DMABase_CCR1
mbed_official	376:cb4d9db17537	3111	* @arg TIM_DMABase_CCR2
mbed_official	376:cb4d9db17537	3112	* @arg TIM_DMABase_CCR3
mbed_official	376:cb4d9db17537	3113	* @arg TIM_DMABase_CCR4
mbed_official	376:cb4d9db17537	3114	* @arg TIM_DMABase_DCR
mbed_official	376:cb4d9db17537	3115	* @param BurstRequestSrc: TIM DMA Request sources.
mbed_official	376:cb4d9db17537	3116	* This parameters can be on of the following values:
mbed_official	376:cb4d9db17537	3117	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official	376:cb4d9db17537	3118	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	376:cb4d9db17537	3119	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	376:cb4d9db17537	3120	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	376:cb4d9db17537	3121	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	376:cb4d9db17537	3122	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official	376:cb4d9db17537	3123	* @param BurstBuffer: The Buffer address.
mbed_official	376:cb4d9db17537	3124	* @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official	376:cb4d9db17537	3125	* between TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	376:cb4d9db17537	3126	* @retval HAL status
mbed_official	376:cb4d9db17537	3127	*/
mbed_official	376:cb4d9db17537	3128	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official	376:cb4d9db17537	3129	uint32_t *BurstBuffer, uint32_t BurstLength)
mbed_official	376:cb4d9db17537	3130	{
mbed_official	376:cb4d9db17537	3131	/* Check the parameters */
mbed_official	376:cb4d9db17537	3132	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3133	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official	376:cb4d9db17537	3134	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	376:cb4d9db17537	3135	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official	376:cb4d9db17537	3136
mbed_official	376:cb4d9db17537	3137	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	376:cb4d9db17537	3138	{
mbed_official	376:cb4d9db17537	3139	return HAL_BUSY;
mbed_official	376:cb4d9db17537	3140	}
mbed_official	376:cb4d9db17537	3141	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	376:cb4d9db17537	3142	{
mbed_official	376:cb4d9db17537	3143	if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official	376:cb4d9db17537	3144	{
mbed_official	376:cb4d9db17537	3145	return HAL_ERROR;
mbed_official	376:cb4d9db17537	3146	}
mbed_official	376:cb4d9db17537	3147	else
mbed_official	376:cb4d9db17537	3148	{
mbed_official	376:cb4d9db17537	3149	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	3150	}
mbed_official	376:cb4d9db17537	3151	}
mbed_official	376:cb4d9db17537	3152	switch(BurstRequestSrc)
mbed_official	376:cb4d9db17537	3153	{
mbed_official	376:cb4d9db17537	3154	case TIM_DMA_UPDATE:
mbed_official	376:cb4d9db17537	3155	{
mbed_official	376:cb4d9db17537	3156	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3157	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	376:cb4d9db17537	3158
mbed_official	376:cb4d9db17537	3159	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3160	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3161
mbed_official	376:cb4d9db17537	3162	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3163	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3164	}
mbed_official	376:cb4d9db17537	3165	break;
mbed_official	376:cb4d9db17537	3166	case TIM_DMA_CC1:
mbed_official	376:cb4d9db17537	3167	{
mbed_official	376:cb4d9db17537	3168	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3169	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	3170
mbed_official	376:cb4d9db17537	3171	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3172	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3173
mbed_official	376:cb4d9db17537	3174	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3175	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3176	}
mbed_official	376:cb4d9db17537	3177	break;
mbed_official	376:cb4d9db17537	3178	case TIM_DMA_CC2:
mbed_official	376:cb4d9db17537	3179	{
mbed_official	376:cb4d9db17537	3180	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3181	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	3182
mbed_official	376:cb4d9db17537	3183	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3184	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3185
mbed_official	376:cb4d9db17537	3186	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3187	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3188	}
mbed_official	376:cb4d9db17537	3189	break;
mbed_official	376:cb4d9db17537	3190	case TIM_DMA_CC3:
mbed_official	376:cb4d9db17537	3191	{
mbed_official	376:cb4d9db17537	3192	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3193	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	3194
mbed_official	376:cb4d9db17537	3195	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3196	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3197
mbed_official	376:cb4d9db17537	3198	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3199	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3200	}
mbed_official	376:cb4d9db17537	3201	break;
mbed_official	376:cb4d9db17537	3202	case TIM_DMA_CC4:
mbed_official	376:cb4d9db17537	3203	{
mbed_official	376:cb4d9db17537	3204	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3205	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	376:cb4d9db17537	3206
mbed_official	376:cb4d9db17537	3207	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3208	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3209
mbed_official	376:cb4d9db17537	3210	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3211	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3212	}
mbed_official	376:cb4d9db17537	3213	break;
mbed_official	376:cb4d9db17537	3214	case TIM_DMA_TRIGGER:
mbed_official	376:cb4d9db17537	3215	{
mbed_official	376:cb4d9db17537	3216	/* Set the DMA Period elapsed callback */
mbed_official	376:cb4d9db17537	3217	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official	376:cb4d9db17537	3218
mbed_official	376:cb4d9db17537	3219	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	3220	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	376:cb4d9db17537	3221
mbed_official	376:cb4d9db17537	3222	/* Enable the DMA Stream */
mbed_official	376:cb4d9db17537	3223	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	376:cb4d9db17537	3224	}
mbed_official	376:cb4d9db17537	3225	break;
mbed_official	376:cb4d9db17537	3226	default:
mbed_official	376:cb4d9db17537	3227	break;
mbed_official	376:cb4d9db17537	3228	}
mbed_official	376:cb4d9db17537	3229
mbed_official	376:cb4d9db17537	3230	/* configure the DMA Burst Mode */
mbed_official	376:cb4d9db17537	3231	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
mbed_official	376:cb4d9db17537	3232
mbed_official	376:cb4d9db17537	3233	/* Enable the TIM DMA Request */
mbed_official	376:cb4d9db17537	3234	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official	376:cb4d9db17537	3235
mbed_official	376:cb4d9db17537	3236	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3237
mbed_official	376:cb4d9db17537	3238	/* Return function status */
mbed_official	376:cb4d9db17537	3239	return HAL_OK;
mbed_official	376:cb4d9db17537	3240	}
mbed_official	376:cb4d9db17537	3241
mbed_official	376:cb4d9db17537	3242	/**
mbed_official	376:cb4d9db17537	3243	* @brief Stop the DMA burst reading
mbed_official	376:cb4d9db17537	3244	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3245	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3246	* @param BurstRequestSrc: TIM DMA Request sources to disable.
mbed_official	376:cb4d9db17537	3247	* @retval HAL status
mbed_official	376:cb4d9db17537	3248	*/
mbed_official	376:cb4d9db17537	3249	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official	376:cb4d9db17537	3250	{
mbed_official	376:cb4d9db17537	3251	/* Check the parameters */
mbed_official	376:cb4d9db17537	3252	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	376:cb4d9db17537	3253
mbed_official	376:cb4d9db17537	3254	/* Disable the TIM Update DMA request */
mbed_official	376:cb4d9db17537	3255	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official	376:cb4d9db17537	3256
mbed_official	376:cb4d9db17537	3257	/* Return function status */
mbed_official	376:cb4d9db17537	3258	return HAL_OK;
mbed_official	376:cb4d9db17537	3259	}
mbed_official	376:cb4d9db17537	3260
mbed_official	376:cb4d9db17537	3261	/**
mbed_official	376:cb4d9db17537	3262	* @brief Generate a software event
mbed_official	376:cb4d9db17537	3263	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3264	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3265	* @param EventSource: specifies the event source.
mbed_official	376:cb4d9db17537	3266	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	3267	* @arg TIM_EventSource_Update: Timer update Event source
mbed_official	376:cb4d9db17537	3268	* @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source
mbed_official	376:cb4d9db17537	3269	* @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
mbed_official	376:cb4d9db17537	3270	* @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
mbed_official	376:cb4d9db17537	3271	* @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
mbed_official	376:cb4d9db17537	3272	* @arg TIM_EventSource_Trigger: Timer Trigger Event source
mbed_official	376:cb4d9db17537	3273	* @note TIM6 can only generate an update event.
mbed_official	376:cb4d9db17537	3274	* @retval HAL status
mbed_official	376:cb4d9db17537	3275	*/
mbed_official	376:cb4d9db17537	3276
mbed_official	376:cb4d9db17537	3277	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
mbed_official	376:cb4d9db17537	3278	{
mbed_official	376:cb4d9db17537	3279	/* Check the parameters */
mbed_official	376:cb4d9db17537	3280	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3281	assert_param(IS_TIM_EVENT_SOURCE(EventSource));
mbed_official	376:cb4d9db17537	3282
mbed_official	376:cb4d9db17537	3283	/* Process Locked */
mbed_official	376:cb4d9db17537	3284	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	3285
mbed_official	376:cb4d9db17537	3286	/* Change the TIM state */
mbed_official	376:cb4d9db17537	3287	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	3288
mbed_official	376:cb4d9db17537	3289	/* Set the event sources */
mbed_official	376:cb4d9db17537	3290	htim->Instance->EGR = EventSource;
mbed_official	376:cb4d9db17537	3291
mbed_official	376:cb4d9db17537	3292	/* Change the TIM state */
mbed_official	376:cb4d9db17537	3293	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3294
mbed_official	376:cb4d9db17537	3295	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	3296
mbed_official	376:cb4d9db17537	3297	/* Return function status */
mbed_official	376:cb4d9db17537	3298	return HAL_OK;
mbed_official	376:cb4d9db17537	3299	}
mbed_official	376:cb4d9db17537	3300
mbed_official	376:cb4d9db17537	3301	/**
mbed_official	376:cb4d9db17537	3302	* @brief Configures the OCRef clear feature
mbed_official	376:cb4d9db17537	3303	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3304	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3305	* @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official	376:cb4d9db17537	3306	* contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official	376:cb4d9db17537	3307	* @param Channel: specifies the TIM Channel.
mbed_official	376:cb4d9db17537	3308	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	3309	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	3310	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	3311	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	3312	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	3313	* @retval HAL status
mbed_official	376:cb4d9db17537	3314	*/
mbed_official	376:cb4d9db17537	3315	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel)
mbed_official	376:cb4d9db17537	3316	{
mbed_official	376:cb4d9db17537	3317	/* Check the parameters */
mbed_official	376:cb4d9db17537	3318	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3319	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	376:cb4d9db17537	3320	assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official	376:cb4d9db17537	3321	assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official	376:cb4d9db17537	3322	assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official	376:cb4d9db17537	3323	assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official	376:cb4d9db17537	3324
mbed_official	376:cb4d9db17537	3325	/* Process Locked */
mbed_official	376:cb4d9db17537	3326	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	3327
mbed_official	376:cb4d9db17537	3328	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	3329
mbed_official	376:cb4d9db17537	3330	if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
mbed_official	376:cb4d9db17537	3331	{
mbed_official	376:cb4d9db17537	3332	TIM_ETR_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	3333	sClearInputConfig->ClearInputPrescaler,
mbed_official	376:cb4d9db17537	3334	sClearInputConfig->ClearInputPolarity,
mbed_official	376:cb4d9db17537	3335	sClearInputConfig->ClearInputFilter);
mbed_official	376:cb4d9db17537	3336	}
mbed_official	376:cb4d9db17537	3337
mbed_official	376:cb4d9db17537	3338	switch (Channel)
mbed_official	376:cb4d9db17537	3339	{
mbed_official	376:cb4d9db17537	3340	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	3341	{
mbed_official	376:cb4d9db17537	3342	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	376:cb4d9db17537	3343	{
mbed_official	376:cb4d9db17537	3344	/* Enable the Ocref clear feature for Channel 1 */
mbed_official	376:cb4d9db17537	3345	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1CE;
mbed_official	376:cb4d9db17537	3346	}
mbed_official	376:cb4d9db17537	3347	else
mbed_official	376:cb4d9db17537	3348	{
mbed_official	376:cb4d9db17537	3349	/* Disable the Ocref clear feature for Channel 1 */
mbed_official	376:cb4d9db17537	3350	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official	376:cb4d9db17537	3351	}
mbed_official	376:cb4d9db17537	3352	}
mbed_official	376:cb4d9db17537	3353	break;
mbed_official	376:cb4d9db17537	3354	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	3355	{
mbed_official	376:cb4d9db17537	3356	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3357	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	376:cb4d9db17537	3358	{
mbed_official	376:cb4d9db17537	3359	/* Enable the Ocref clear feature for Channel 2 */
mbed_official	376:cb4d9db17537	3360	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2CE;
mbed_official	376:cb4d9db17537	3361	}
mbed_official	376:cb4d9db17537	3362	else
mbed_official	376:cb4d9db17537	3363	{
mbed_official	376:cb4d9db17537	3364	/* Disable the Ocref clear feature for Channel 2 */
mbed_official	376:cb4d9db17537	3365	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official	376:cb4d9db17537	3366	}
mbed_official	376:cb4d9db17537	3367	}
mbed_official	376:cb4d9db17537	3368	break;
mbed_official	376:cb4d9db17537	3369	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	3370	{
mbed_official	376:cb4d9db17537	3371	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3372	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	376:cb4d9db17537	3373	{
mbed_official	376:cb4d9db17537	3374	/* Enable the Ocref clear feature for Channel 3 */
mbed_official	376:cb4d9db17537	3375	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3CE;
mbed_official	376:cb4d9db17537	3376	}
mbed_official	376:cb4d9db17537	3377	else
mbed_official	376:cb4d9db17537	3378	{
mbed_official	376:cb4d9db17537	3379	/* Disable the Ocref clear feature for Channel 3 */
mbed_official	376:cb4d9db17537	3380	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official	376:cb4d9db17537	3381	}
mbed_official	376:cb4d9db17537	3382	}
mbed_official	376:cb4d9db17537	3383	break;
mbed_official	376:cb4d9db17537	3384	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	3385	{
mbed_official	376:cb4d9db17537	3386	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3387	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	376:cb4d9db17537	3388	{
mbed_official	376:cb4d9db17537	3389	/* Enable the Ocref clear feature for Channel 4 */
mbed_official	376:cb4d9db17537	3390	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4CE;
mbed_official	376:cb4d9db17537	3391	}
mbed_official	376:cb4d9db17537	3392	else
mbed_official	376:cb4d9db17537	3393	{
mbed_official	376:cb4d9db17537	3394	/* Disable the Ocref clear feature for Channel 4 */
mbed_official	376:cb4d9db17537	3395	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official	376:cb4d9db17537	3396	}
mbed_official	376:cb4d9db17537	3397	}
mbed_official	376:cb4d9db17537	3398	break;
mbed_official	376:cb4d9db17537	3399	default:
mbed_official	376:cb4d9db17537	3400	break;
mbed_official	376:cb4d9db17537	3401	}
mbed_official	376:cb4d9db17537	3402
mbed_official	376:cb4d9db17537	3403	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3404
mbed_official	376:cb4d9db17537	3405	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	3406
mbed_official	376:cb4d9db17537	3407	return HAL_OK;
mbed_official	376:cb4d9db17537	3408	}
mbed_official	376:cb4d9db17537	3409
mbed_official	376:cb4d9db17537	3410	/**
mbed_official	376:cb4d9db17537	3411	* @brief Configures the clock source to be used
mbed_official	376:cb4d9db17537	3412	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3413	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3414	* @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
mbed_official	376:cb4d9db17537	3415	* contains the clock source information for the TIM peripheral.
mbed_official	376:cb4d9db17537	3416	* @retval HAL status
mbed_official	376:cb4d9db17537	3417	*/
mbed_official	376:cb4d9db17537	3418	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig)
mbed_official	376:cb4d9db17537	3419	{
mbed_official	376:cb4d9db17537	3420	uint32_t tmpsmcr = 0;
mbed_official	376:cb4d9db17537	3421
mbed_official	376:cb4d9db17537	3422	/* Process Locked */
mbed_official	376:cb4d9db17537	3423	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	3424
mbed_official	376:cb4d9db17537	3425	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	3426
mbed_official	376:cb4d9db17537	3427	/* Check the parameters */
mbed_official	376:cb4d9db17537	3428	assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
mbed_official	376:cb4d9db17537	3429	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
mbed_official	376:cb4d9db17537	3430	assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
mbed_official	376:cb4d9db17537	3431	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
mbed_official	376:cb4d9db17537	3432
mbed_official	376:cb4d9db17537	3433	/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
mbed_official	376:cb4d9db17537	3434	tmpsmcr = htim->Instance->SMCR;
mbed_official	376:cb4d9db17537	3435	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
mbed_official	376:cb4d9db17537	3436	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
mbed_official	376:cb4d9db17537	3437	htim->Instance->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	3438
mbed_official	376:cb4d9db17537	3439	switch (sClockSourceConfig->ClockSource)
mbed_official	376:cb4d9db17537	3440	{
mbed_official	376:cb4d9db17537	3441	case TIM_CLOCKSOURCE_INTERNAL:
mbed_official	376:cb4d9db17537	3442	{
mbed_official	376:cb4d9db17537	3443	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3444	/* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official	376:cb4d9db17537	3445	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	376:cb4d9db17537	3446	}
mbed_official	376:cb4d9db17537	3447	break;
mbed_official	376:cb4d9db17537	3448
mbed_official	376:cb4d9db17537	3449	case TIM_CLOCKSOURCE_ETRMODE1:
mbed_official	376:cb4d9db17537	3450	{
mbed_official	376:cb4d9db17537	3451	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3452	/* Configure the ETR Clock source */
mbed_official	376:cb4d9db17537	3453	TIM_ETR_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	3454	sClockSourceConfig->ClockPrescaler,
mbed_official	376:cb4d9db17537	3455	sClockSourceConfig->ClockPolarity,
mbed_official	376:cb4d9db17537	3456	sClockSourceConfig->ClockFilter);
mbed_official	376:cb4d9db17537	3457	/* Get the TIMx SMCR register value */
mbed_official	376:cb4d9db17537	3458	tmpsmcr = htim->Instance->SMCR;
mbed_official	376:cb4d9db17537	3459	/* Reset the SMS and TS Bits */
mbed_official	376:cb4d9db17537	3460	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
mbed_official	376:cb4d9db17537	3461	/* Select the External clock mode1 and the ETRF trigger */
mbed_official	376:cb4d9db17537	3462	tmpsmcr \|= (TIM_SLAVEMODE_EXTERNAL1 \| TIM_CLOCKSOURCE_ETRMODE1);
mbed_official	376:cb4d9db17537	3463	/* Write to TIMx SMCR */
mbed_official	376:cb4d9db17537	3464	htim->Instance->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	3465	}
mbed_official	376:cb4d9db17537	3466	break;
mbed_official	376:cb4d9db17537	3467
mbed_official	376:cb4d9db17537	3468	case TIM_CLOCKSOURCE_ETRMODE2:
mbed_official	376:cb4d9db17537	3469	{
mbed_official	376:cb4d9db17537	3470	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3471	/* Configure the ETR Clock source */
mbed_official	376:cb4d9db17537	3472	TIM_ETR_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	3473	sClockSourceConfig->ClockPrescaler,
mbed_official	376:cb4d9db17537	3474	sClockSourceConfig->ClockPolarity,
mbed_official	376:cb4d9db17537	3475	sClockSourceConfig->ClockFilter);
mbed_official	376:cb4d9db17537	3476	/* Enable the External clock mode2 */
mbed_official	376:cb4d9db17537	3477	htim->Instance->SMCR \|= TIM_SMCR_ECE;
mbed_official	376:cb4d9db17537	3478	}
mbed_official	376:cb4d9db17537	3479	break;
mbed_official	376:cb4d9db17537	3480
mbed_official	376:cb4d9db17537	3481	case TIM_CLOCKSOURCE_TI1:
mbed_official	376:cb4d9db17537	3482	{
mbed_official	376:cb4d9db17537	3483	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3484	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	376:cb4d9db17537	3485	sClockSourceConfig->ClockPolarity,
mbed_official	376:cb4d9db17537	3486	sClockSourceConfig->ClockFilter);
mbed_official	376:cb4d9db17537	3487	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
mbed_official	376:cb4d9db17537	3488	}
mbed_official	376:cb4d9db17537	3489	break;
mbed_official	376:cb4d9db17537	3490	case TIM_CLOCKSOURCE_TI2:
mbed_official	376:cb4d9db17537	3491	{
mbed_official	376:cb4d9db17537	3492	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3493	TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official	376:cb4d9db17537	3494	sClockSourceConfig->ClockPolarity,
mbed_official	376:cb4d9db17537	3495	sClockSourceConfig->ClockFilter);
mbed_official	376:cb4d9db17537	3496	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
mbed_official	376:cb4d9db17537	3497	}
mbed_official	376:cb4d9db17537	3498	break;
mbed_official	376:cb4d9db17537	3499	case TIM_CLOCKSOURCE_TI1ED:
mbed_official	376:cb4d9db17537	3500	{
mbed_official	376:cb4d9db17537	3501	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3502	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	376:cb4d9db17537	3503	sClockSourceConfig->ClockPolarity,
mbed_official	376:cb4d9db17537	3504	sClockSourceConfig->ClockFilter);
mbed_official	376:cb4d9db17537	3505	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
mbed_official	376:cb4d9db17537	3506	}
mbed_official	376:cb4d9db17537	3507	break;
mbed_official	376:cb4d9db17537	3508	case TIM_CLOCKSOURCE_ITR0:
mbed_official	376:cb4d9db17537	3509	{
mbed_official	376:cb4d9db17537	3510	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3511	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
mbed_official	376:cb4d9db17537	3512	}
mbed_official	376:cb4d9db17537	3513	break;
mbed_official	376:cb4d9db17537	3514	case TIM_CLOCKSOURCE_ITR1:
mbed_official	376:cb4d9db17537	3515	{
mbed_official	376:cb4d9db17537	3516	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3517	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
mbed_official	376:cb4d9db17537	3518	}
mbed_official	376:cb4d9db17537	3519	break;
mbed_official	376:cb4d9db17537	3520	case TIM_CLOCKSOURCE_ITR2:
mbed_official	376:cb4d9db17537	3521	{
mbed_official	376:cb4d9db17537	3522	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3523	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
mbed_official	376:cb4d9db17537	3524	}
mbed_official	376:cb4d9db17537	3525	break;
mbed_official	376:cb4d9db17537	3526	case TIM_CLOCKSOURCE_ITR3:
mbed_official	376:cb4d9db17537	3527	{
mbed_official	376:cb4d9db17537	3528	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3529	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
mbed_official	376:cb4d9db17537	3530	}
mbed_official	376:cb4d9db17537	3531	break;
mbed_official	376:cb4d9db17537	3532
mbed_official	376:cb4d9db17537	3533	default:
mbed_official	376:cb4d9db17537	3534	break;
mbed_official	376:cb4d9db17537	3535	}
mbed_official	376:cb4d9db17537	3536	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3537
mbed_official	376:cb4d9db17537	3538	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	3539
mbed_official	376:cb4d9db17537	3540	return HAL_OK;
mbed_official	376:cb4d9db17537	3541	}
mbed_official	376:cb4d9db17537	3542
mbed_official	376:cb4d9db17537	3543	/**
mbed_official	376:cb4d9db17537	3544	* @brief Selects the signal connected to the TI1 input: direct from CH1_input
mbed_official	376:cb4d9db17537	3545	* or a XOR combination between CH1_input, CH2_input & CH3_input
mbed_official	376:cb4d9db17537	3546	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3547	* the configuration information for TIM module..
mbed_official	376:cb4d9db17537	3548	* @param TI1_Selection: Indicate whether or not channel 1 is connected to the
mbed_official	376:cb4d9db17537	3549	* output of a XOR gate.
mbed_official	376:cb4d9db17537	3550	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	3551	* @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
mbed_official	376:cb4d9db17537	3552	* @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
mbed_official	376:cb4d9db17537	3553	* pins are connected to the TI1 input (XOR combination)
mbed_official	376:cb4d9db17537	3554	* @retval HAL status
mbed_official	376:cb4d9db17537	3555	*/
mbed_official	376:cb4d9db17537	3556	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
mbed_official	376:cb4d9db17537	3557	{
mbed_official	376:cb4d9db17537	3558	uint32_t tmpcr2 = 0;
mbed_official	376:cb4d9db17537	3559
mbed_official	376:cb4d9db17537	3560	/* Check the parameters */
mbed_official	376:cb4d9db17537	3561	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3562	assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
mbed_official	376:cb4d9db17537	3563
mbed_official	376:cb4d9db17537	3564	/* Get the TIMx CR2 register value */
mbed_official	376:cb4d9db17537	3565	tmpcr2 = htim->Instance->CR2;
mbed_official	376:cb4d9db17537	3566
mbed_official	376:cb4d9db17537	3567	/* Reset the TI1 selection */
mbed_official	376:cb4d9db17537	3568	tmpcr2 &= ~TIM_CR2_TI1S;
mbed_official	376:cb4d9db17537	3569
mbed_official	376:cb4d9db17537	3570	/* Set the the TI1 selection */
mbed_official	376:cb4d9db17537	3571	tmpcr2 \|= TI1_Selection;
mbed_official	376:cb4d9db17537	3572
mbed_official	376:cb4d9db17537	3573	/* Write to TIMxCR2 */
mbed_official	376:cb4d9db17537	3574	htim->Instance->CR2 = tmpcr2;
mbed_official	376:cb4d9db17537	3575
mbed_official	376:cb4d9db17537	3576	return HAL_OK;
mbed_official	376:cb4d9db17537	3577	}
mbed_official	376:cb4d9db17537	3578
mbed_official	376:cb4d9db17537	3579	/**
mbed_official	376:cb4d9db17537	3580	* @brief Configures the TIM in Slave mode
mbed_official	376:cb4d9db17537	3581	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3582	* the configuration information for TIM module..
mbed_official	376:cb4d9db17537	3583	* @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official	376:cb4d9db17537	3584	* contains the selected trigger (internal trigger input, filtered
mbed_official	376:cb4d9db17537	3585	* timer input or external trigger input) and the ) and the Slave
mbed_official	376:cb4d9db17537	3586	* mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official	376:cb4d9db17537	3587	* @retval HAL status
mbed_official	376:cb4d9db17537	3588	*/
mbed_official	376:cb4d9db17537	3589	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig)
mbed_official	376:cb4d9db17537	3590	{
mbed_official	376:cb4d9db17537	3591	uint32_t tmpsmcr = 0;
mbed_official	376:cb4d9db17537	3592	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	3593	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	3594
mbed_official	376:cb4d9db17537	3595	/* Check the parameters */
mbed_official	376:cb4d9db17537	3596	assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3597	assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official	376:cb4d9db17537	3598	assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official	376:cb4d9db17537	3599
mbed_official	376:cb4d9db17537	3600	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	3601
mbed_official	376:cb4d9db17537	3602	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	376:cb4d9db17537	3603
mbed_official	376:cb4d9db17537	3604	/* Get the TIMx SMCR register value */
mbed_official	376:cb4d9db17537	3605	tmpsmcr = htim->Instance->SMCR;
mbed_official	376:cb4d9db17537	3606
mbed_official	376:cb4d9db17537	3607	/* Reset the Trigger Selection Bits */
mbed_official	376:cb4d9db17537	3608	tmpsmcr &= ~TIM_SMCR_TS;
mbed_official	376:cb4d9db17537	3609	/* Set the Input Trigger source */
mbed_official	376:cb4d9db17537	3610	tmpsmcr \|= sSlaveConfig->InputTrigger;
mbed_official	376:cb4d9db17537	3611
mbed_official	376:cb4d9db17537	3612	/* Reset the slave mode Bits */
mbed_official	376:cb4d9db17537	3613	tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official	376:cb4d9db17537	3614	/* Set the slave mode */
mbed_official	376:cb4d9db17537	3615	tmpsmcr \|= sSlaveConfig->SlaveMode;
mbed_official	376:cb4d9db17537	3616
mbed_official	376:cb4d9db17537	3617	/* Write to TIMx SMCR */
mbed_official	376:cb4d9db17537	3618	htim->Instance->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	3619
mbed_official	376:cb4d9db17537	3620	/* Configure the trigger prescaler, filter, and polarity */
mbed_official	376:cb4d9db17537	3621	switch (sSlaveConfig->InputTrigger)
mbed_official	376:cb4d9db17537	3622	{
mbed_official	376:cb4d9db17537	3623	case TIM_TS_ETRF:
mbed_official	376:cb4d9db17537	3624	{
mbed_official	376:cb4d9db17537	3625	/* Check the parameters */
mbed_official	376:cb4d9db17537	3626	assert_param(IS_TIM_ETR_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3627	assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official	376:cb4d9db17537	3628	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	376:cb4d9db17537	3629	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	376:cb4d9db17537	3630	/* Configure the ETR Trigger source */
mbed_official	376:cb4d9db17537	3631	TIM_ETR_SetConfig(htim->Instance,
mbed_official	376:cb4d9db17537	3632	sSlaveConfig->TriggerPrescaler,
mbed_official	376:cb4d9db17537	3633	sSlaveConfig->TriggerPolarity,
mbed_official	376:cb4d9db17537	3634	sSlaveConfig->TriggerFilter);
mbed_official	376:cb4d9db17537	3635	}
mbed_official	376:cb4d9db17537	3636	break;
mbed_official	376:cb4d9db17537	3637
mbed_official	376:cb4d9db17537	3638	case TIM_TS_TI1F_ED:
mbed_official	376:cb4d9db17537	3639	{
mbed_official	376:cb4d9db17537	3640	/* Check the parameters */
mbed_official	376:cb4d9db17537	3641	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3642	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	376:cb4d9db17537	3643
mbed_official	376:cb4d9db17537	3644	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	376:cb4d9db17537	3645	tmpccer = htim->Instance->CCER;
mbed_official	376:cb4d9db17537	3646	htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official	376:cb4d9db17537	3647	tmpccmr1 = htim->Instance->CCMR1;
mbed_official	376:cb4d9db17537	3648
mbed_official	376:cb4d9db17537	3649	/* Set the filter */
mbed_official	376:cb4d9db17537	3650	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	376:cb4d9db17537	3651	tmpccmr1 \|= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official	376:cb4d9db17537	3652
mbed_official	376:cb4d9db17537	3653	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	376:cb4d9db17537	3654	htim->Instance->CCMR1 = tmpccmr1;
mbed_official	376:cb4d9db17537	3655	htim->Instance->CCER = tmpccer;
mbed_official	376:cb4d9db17537	3656
mbed_official	376:cb4d9db17537	3657	}
mbed_official	376:cb4d9db17537	3658	break;
mbed_official	376:cb4d9db17537	3659
mbed_official	376:cb4d9db17537	3660	case TIM_TS_TI1FP1:
mbed_official	376:cb4d9db17537	3661	{
mbed_official	376:cb4d9db17537	3662	/* Check the parameters */
mbed_official	376:cb4d9db17537	3663	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3664	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	376:cb4d9db17537	3665	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	376:cb4d9db17537	3666
mbed_official	376:cb4d9db17537	3667	/* Configure TI1 Filter and Polarity */
mbed_official	376:cb4d9db17537	3668	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	376:cb4d9db17537	3669	sSlaveConfig->TriggerPolarity,
mbed_official	376:cb4d9db17537	3670	sSlaveConfig->TriggerFilter);
mbed_official	376:cb4d9db17537	3671	}
mbed_official	376:cb4d9db17537	3672	break;
mbed_official	376:cb4d9db17537	3673
mbed_official	376:cb4d9db17537	3674	case TIM_TS_TI2FP2:
mbed_official	376:cb4d9db17537	3675	{
mbed_official	376:cb4d9db17537	3676	/* Check the parameters */
mbed_official	376:cb4d9db17537	3677	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3678	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	376:cb4d9db17537	3679	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	376:cb4d9db17537	3680
mbed_official	376:cb4d9db17537	3681	/* Configure TI2 Filter and Polarity */
mbed_official	376:cb4d9db17537	3682	TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official	376:cb4d9db17537	3683	sSlaveConfig->TriggerPolarity,
mbed_official	376:cb4d9db17537	3684	sSlaveConfig->TriggerFilter);
mbed_official	376:cb4d9db17537	3685	}
mbed_official	376:cb4d9db17537	3686	break;
mbed_official	376:cb4d9db17537	3687
mbed_official	376:cb4d9db17537	3688	case TIM_TS_ITR0:
mbed_official	376:cb4d9db17537	3689	{
mbed_official	376:cb4d9db17537	3690	/* Check the parameter */
mbed_official	376:cb4d9db17537	3691	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3692	}
mbed_official	376:cb4d9db17537	3693	break;
mbed_official	376:cb4d9db17537	3694
mbed_official	376:cb4d9db17537	3695	case TIM_TS_ITR1:
mbed_official	376:cb4d9db17537	3696	{
mbed_official	376:cb4d9db17537	3697	/* Check the parameter */
mbed_official	376:cb4d9db17537	3698	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3699	}
mbed_official	376:cb4d9db17537	3700	break;
mbed_official	376:cb4d9db17537	3701
mbed_official	376:cb4d9db17537	3702	case TIM_TS_ITR2:
mbed_official	376:cb4d9db17537	3703	{
mbed_official	376:cb4d9db17537	3704	/* Check the parameter */
mbed_official	376:cb4d9db17537	3705	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3706	}
mbed_official	376:cb4d9db17537	3707	break;
mbed_official	376:cb4d9db17537	3708
mbed_official	376:cb4d9db17537	3709	case TIM_TS_ITR3:
mbed_official	376:cb4d9db17537	3710	{
mbed_official	376:cb4d9db17537	3711	/* Check the parameter */
mbed_official	376:cb4d9db17537	3712	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3713	}
mbed_official	376:cb4d9db17537	3714	break;
mbed_official	376:cb4d9db17537	3715
mbed_official	376:cb4d9db17537	3716	default:
mbed_official	376:cb4d9db17537	3717	break;
mbed_official	376:cb4d9db17537	3718	}
mbed_official	376:cb4d9db17537	3719
mbed_official	376:cb4d9db17537	3720	htim->State = HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	3721
mbed_official	376:cb4d9db17537	3722	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	3723
mbed_official	376:cb4d9db17537	3724	return HAL_OK;
mbed_official	376:cb4d9db17537	3725	}
mbed_official	376:cb4d9db17537	3726
mbed_official	376:cb4d9db17537	3727	/**
mbed_official	376:cb4d9db17537	3728	* @brief Read the captured value from Capture Compare unit
mbed_official	376:cb4d9db17537	3729	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3730	* the configuration information for TIM module..
mbed_official	376:cb4d9db17537	3731	* @param Channel: TIM Channels to be enabled.
mbed_official	376:cb4d9db17537	3732	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	3733	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	3734	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	3735	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	3736	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	3737	* @retval Captured value
mbed_official	376:cb4d9db17537	3738	*/
mbed_official	376:cb4d9db17537	3739	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	376:cb4d9db17537	3740	{
mbed_official	376:cb4d9db17537	3741	uint32_t tmpreg = 0;
mbed_official	376:cb4d9db17537	3742
mbed_official	376:cb4d9db17537	3743	__HAL_LOCK(htim);
mbed_official	376:cb4d9db17537	3744
mbed_official	376:cb4d9db17537	3745	switch (Channel)
mbed_official	376:cb4d9db17537	3746	{
mbed_official	376:cb4d9db17537	3747	case TIM_CHANNEL_1:
mbed_official	376:cb4d9db17537	3748	{
mbed_official	376:cb4d9db17537	3749	/* Check the parameters */
mbed_official	376:cb4d9db17537	3750	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3751
mbed_official	376:cb4d9db17537	3752	/* Return the capture 1 value */
mbed_official	376:cb4d9db17537	3753	tmpreg = htim->Instance->CCR1;
mbed_official	376:cb4d9db17537	3754
mbed_official	376:cb4d9db17537	3755	break;
mbed_official	376:cb4d9db17537	3756	}
mbed_official	376:cb4d9db17537	3757	case TIM_CHANNEL_2:
mbed_official	376:cb4d9db17537	3758	{
mbed_official	376:cb4d9db17537	3759	/* Check the parameters */
mbed_official	376:cb4d9db17537	3760	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3761
mbed_official	376:cb4d9db17537	3762	/* Return the capture 2 value */
mbed_official	376:cb4d9db17537	3763	tmpreg = htim->Instance->CCR2;
mbed_official	376:cb4d9db17537	3764
mbed_official	376:cb4d9db17537	3765	break;
mbed_official	376:cb4d9db17537	3766	}
mbed_official	376:cb4d9db17537	3767
mbed_official	376:cb4d9db17537	3768	case TIM_CHANNEL_3:
mbed_official	376:cb4d9db17537	3769	{
mbed_official	376:cb4d9db17537	3770	/* Check the parameters */
mbed_official	376:cb4d9db17537	3771	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3772
mbed_official	376:cb4d9db17537	3773	/* Return the capture 3 value */
mbed_official	376:cb4d9db17537	3774	tmpreg = htim->Instance->CCR3;
mbed_official	376:cb4d9db17537	3775
mbed_official	376:cb4d9db17537	3776	break;
mbed_official	376:cb4d9db17537	3777	}
mbed_official	376:cb4d9db17537	3778
mbed_official	376:cb4d9db17537	3779	case TIM_CHANNEL_4:
mbed_official	376:cb4d9db17537	3780	{
mbed_official	376:cb4d9db17537	3781	/* Check the parameters */
mbed_official	376:cb4d9db17537	3782	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	376:cb4d9db17537	3783
mbed_official	376:cb4d9db17537	3784	/* Return the capture 4 value */
mbed_official	376:cb4d9db17537	3785	tmpreg = htim->Instance->CCR4;
mbed_official	376:cb4d9db17537	3786
mbed_official	376:cb4d9db17537	3787	break;
mbed_official	376:cb4d9db17537	3788	}
mbed_official	376:cb4d9db17537	3789
mbed_official	376:cb4d9db17537	3790	default:
mbed_official	376:cb4d9db17537	3791	break;
mbed_official	376:cb4d9db17537	3792	}
mbed_official	376:cb4d9db17537	3793
mbed_official	376:cb4d9db17537	3794	__HAL_UNLOCK(htim);
mbed_official	376:cb4d9db17537	3795	return tmpreg;
mbed_official	376:cb4d9db17537	3796	}
mbed_official	376:cb4d9db17537	3797
mbed_official	376:cb4d9db17537	3798	/**
mbed_official	376:cb4d9db17537	3799	* @}
mbed_official	376:cb4d9db17537	3800	*/
mbed_official	376:cb4d9db17537	3801
mbed_official	376:cb4d9db17537	3802	/** @defgroup TIM_Group4 TIM Callbacks functions
mbed_official	376:cb4d9db17537	3803	* @brief TIM Callbacks functions
mbed_official	376:cb4d9db17537	3804	*
mbed_official	376:cb4d9db17537	3805	@verbatim
mbed_official	376:cb4d9db17537	3806	==============================================================================
mbed_official	376:cb4d9db17537	3807	##### TIM Callbacks functions #####
mbed_official	376:cb4d9db17537	3808	==============================================================================
mbed_official	376:cb4d9db17537	3809	[..]
mbed_official	376:cb4d9db17537	3810	This section provides TIM callback functions:
mbed_official	376:cb4d9db17537	3811	(+) Timer Period elapsed callback
mbed_official	376:cb4d9db17537	3812	(+) Timer Output Compare callback
mbed_official	376:cb4d9db17537	3813	(+) Timer Input capture callback
mbed_official	376:cb4d9db17537	3814	(+) Timer Trigger callback
mbed_official	376:cb4d9db17537	3815	(+) Timer Error callback
mbed_official	376:cb4d9db17537	3816
mbed_official	376:cb4d9db17537	3817	@endverbatim
mbed_official	376:cb4d9db17537	3818	* @{
mbed_official	376:cb4d9db17537	3819	*/
mbed_official	376:cb4d9db17537	3820
mbed_official	376:cb4d9db17537	3821	/**
mbed_official	376:cb4d9db17537	3822	* @brief Period elapsed callback in non blocking mode
mbed_official	376:cb4d9db17537	3823	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3824	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3825	* @retval None
mbed_official	376:cb4d9db17537	3826	*/
mbed_official	376:cb4d9db17537	3827	__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3828	{
mbed_official	376:cb4d9db17537	3829	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3830	the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3831	*/
mbed_official	376:cb4d9db17537	3832
mbed_official	376:cb4d9db17537	3833	}
mbed_official	376:cb4d9db17537	3834	/**
mbed_official	376:cb4d9db17537	3835	* @brief Output Compare callback in non blocking mode
mbed_official	376:cb4d9db17537	3836	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3837	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3838	* @retval None
mbed_official	376:cb4d9db17537	3839	*/
mbed_official	376:cb4d9db17537	3840	__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3841	{
mbed_official	376:cb4d9db17537	3842	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3843	the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3844	*/
mbed_official	376:cb4d9db17537	3845	}
mbed_official	376:cb4d9db17537	3846	/**
mbed_official	376:cb4d9db17537	3847	* @brief Input Capture callback in non blocking mode
mbed_official	376:cb4d9db17537	3848	* @param htim: TIM IC handle
mbed_official	376:cb4d9db17537	3849	* @retval None
mbed_official	376:cb4d9db17537	3850	*/
mbed_official	376:cb4d9db17537	3851	__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3852	{
mbed_official	376:cb4d9db17537	3853	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3854	the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3855	*/
mbed_official	376:cb4d9db17537	3856	}
mbed_official	376:cb4d9db17537	3857
mbed_official	376:cb4d9db17537	3858	/**
mbed_official	376:cb4d9db17537	3859	* @brief PWM Pulse finished callback in non blocking mode
mbed_official	376:cb4d9db17537	3860	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3861	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3862	* @retval None
mbed_official	376:cb4d9db17537	3863	*/
mbed_official	376:cb4d9db17537	3864	__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3865	{
mbed_official	376:cb4d9db17537	3866	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3867	the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3868	*/
mbed_official	376:cb4d9db17537	3869	}
mbed_official	376:cb4d9db17537	3870
mbed_official	376:cb4d9db17537	3871	/**
mbed_official	376:cb4d9db17537	3872	* @brief Hall Trigger detection callback in non blocking mode
mbed_official	376:cb4d9db17537	3873	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3874	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3875	* @retval None
mbed_official	376:cb4d9db17537	3876	*/
mbed_official	376:cb4d9db17537	3877	__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3878	{
mbed_official	376:cb4d9db17537	3879	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3880	the HAL_TIM_TriggerCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3881	*/
mbed_official	376:cb4d9db17537	3882	}
mbed_official	376:cb4d9db17537	3883
mbed_official	376:cb4d9db17537	3884	/**
mbed_official	376:cb4d9db17537	3885	* @brief Timer error callback in non blocking mode
mbed_official	376:cb4d9db17537	3886	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3887	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3888	* @retval None
mbed_official	376:cb4d9db17537	3889	*/
mbed_official	376:cb4d9db17537	3890	__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3891	{
mbed_official	376:cb4d9db17537	3892	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	3893	the HAL_TIM_ErrorCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	3894	*/
mbed_official	376:cb4d9db17537	3895	}
mbed_official	376:cb4d9db17537	3896
mbed_official	376:cb4d9db17537	3897	/**
mbed_official	376:cb4d9db17537	3898	* @}
mbed_official	376:cb4d9db17537	3899	*/
mbed_official	376:cb4d9db17537	3900
mbed_official	376:cb4d9db17537	3901	/** @defgroup TIM_Group5 Peripheral State functions
mbed_official	376:cb4d9db17537	3902	* @brief Peripheral State functions
mbed_official	376:cb4d9db17537	3903	*
mbed_official	376:cb4d9db17537	3904	@verbatim
mbed_official	376:cb4d9db17537	3905	==============================================================================
mbed_official	376:cb4d9db17537	3906	##### Peripheral State functions #####
mbed_official	376:cb4d9db17537	3907	==============================================================================
mbed_official	376:cb4d9db17537	3908	[..]
mbed_official	376:cb4d9db17537	3909	This subsection permits to get in run-time the status of the peripheral
mbed_official	376:cb4d9db17537	3910	and the data flow.
mbed_official	376:cb4d9db17537	3911
mbed_official	376:cb4d9db17537	3912	@endverbatim
mbed_official	376:cb4d9db17537	3913	* @{
mbed_official	376:cb4d9db17537	3914	*/
mbed_official	376:cb4d9db17537	3915
mbed_official	376:cb4d9db17537	3916	/**
mbed_official	376:cb4d9db17537	3917	* @brief Return the TIM Base state
mbed_official	376:cb4d9db17537	3918	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3919	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3920	* @retval HAL state
mbed_official	376:cb4d9db17537	3921	*/
mbed_official	376:cb4d9db17537	3922	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3923	{
mbed_official	376:cb4d9db17537	3924	return htim->State;
mbed_official	376:cb4d9db17537	3925	}
mbed_official	376:cb4d9db17537	3926
mbed_official	376:cb4d9db17537	3927	/**
mbed_official	376:cb4d9db17537	3928	* @brief Return the TIM OC state
mbed_official	376:cb4d9db17537	3929	* @param htim: TIM Ouput Compare handle
mbed_official	376:cb4d9db17537	3930	* @retval HAL state
mbed_official	376:cb4d9db17537	3931	*/
mbed_official	376:cb4d9db17537	3932	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3933	{
mbed_official	376:cb4d9db17537	3934	return htim->State;
mbed_official	376:cb4d9db17537	3935	}
mbed_official	376:cb4d9db17537	3936
mbed_official	376:cb4d9db17537	3937	/**
mbed_official	376:cb4d9db17537	3938	* @brief Return the TIM PWM state
mbed_official	376:cb4d9db17537	3939	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3940	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3941	* @retval HAL state
mbed_official	376:cb4d9db17537	3942	*/
mbed_official	376:cb4d9db17537	3943	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3944	{
mbed_official	376:cb4d9db17537	3945	return htim->State;
mbed_official	376:cb4d9db17537	3946	}
mbed_official	376:cb4d9db17537	3947
mbed_official	376:cb4d9db17537	3948	/**
mbed_official	376:cb4d9db17537	3949	* @brief Return the TIM Input Capture state
mbed_official	376:cb4d9db17537	3950	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3951	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3952	* @retval HAL state
mbed_official	376:cb4d9db17537	3953	*/
mbed_official	376:cb4d9db17537	3954	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3955	{
mbed_official	376:cb4d9db17537	3956	return htim->State;
mbed_official	376:cb4d9db17537	3957	}
mbed_official	376:cb4d9db17537	3958
mbed_official	376:cb4d9db17537	3959	/**
mbed_official	376:cb4d9db17537	3960	* @brief Return the TIM One Pulse Mode state
mbed_official	376:cb4d9db17537	3961	* @param htim: TIM OPM handle
mbed_official	376:cb4d9db17537	3962	* @retval HAL state
mbed_official	376:cb4d9db17537	3963	*/
mbed_official	376:cb4d9db17537	3964	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3965	{
mbed_official	376:cb4d9db17537	3966	return htim->State;
mbed_official	376:cb4d9db17537	3967	}
mbed_official	376:cb4d9db17537	3968
mbed_official	376:cb4d9db17537	3969	/**
mbed_official	376:cb4d9db17537	3970	* @brief Return the TIM Encoder Mode state
mbed_official	376:cb4d9db17537	3971	* @param htim: pointer to a TIM_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	3972	* the configuration information for TIM module.
mbed_official	376:cb4d9db17537	3973	* @retval HAL state
mbed_official	376:cb4d9db17537	3974	*/
mbed_official	376:cb4d9db17537	3975	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	3976	{
mbed_official	376:cb4d9db17537	3977	return htim->State;
mbed_official	376:cb4d9db17537	3978	}
mbed_official	376:cb4d9db17537	3979
mbed_official	376:cb4d9db17537	3980	/**
mbed_official	376:cb4d9db17537	3981	* @}
mbed_official	376:cb4d9db17537	3982	*/
mbed_official	376:cb4d9db17537	3983
mbed_official	376:cb4d9db17537	3984	/** @defgroup TIM_Group6 TIM IRQ handler management
mbed_official	376:cb4d9db17537	3985	* @brief IRQ handler management
mbed_official	376:cb4d9db17537	3986	*
mbed_official	376:cb4d9db17537	3987	@verbatim
mbed_official	376:cb4d9db17537	3988	==============================================================================
mbed_official	376:cb4d9db17537	3989	##### IRQ handler management #####
mbed_official	376:cb4d9db17537	3990	==============================================================================
mbed_official	376:cb4d9db17537	3991	[..]
mbed_official	376:cb4d9db17537	3992	This section provides Timer IRQ handler function.
mbed_official	376:cb4d9db17537	3993
mbed_official	376:cb4d9db17537	3994	@endverbatim
mbed_official	376:cb4d9db17537	3995	* @{
mbed_official	376:cb4d9db17537	3996	*/
mbed_official	376:cb4d9db17537	3997	/**
mbed_official	376:cb4d9db17537	3998	* @brief This function handles TIM interrupts requests.
mbed_official	376:cb4d9db17537	3999	* @param htim: TIM handle
mbed_official	376:cb4d9db17537	4000	* @retval None
mbed_official	376:cb4d9db17537	4001	*/
mbed_official	376:cb4d9db17537	4002	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
mbed_official	376:cb4d9db17537	4003	{
mbed_official	376:cb4d9db17537	4004	/* Capture compare 1 event */
mbed_official	376:cb4d9db17537	4005	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
mbed_official	376:cb4d9db17537	4006	{
mbed_official	376:cb4d9db17537	4007	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC1) !=RESET)
mbed_official	376:cb4d9db17537	4008	{
mbed_official	376:cb4d9db17537	4009	{
mbed_official	376:cb4d9db17537	4010	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
mbed_official	376:cb4d9db17537	4011	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official	376:cb4d9db17537	4012
mbed_official	376:cb4d9db17537	4013	/* Input capture event */
mbed_official	376:cb4d9db17537	4014	if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
mbed_official	376:cb4d9db17537	4015	{
mbed_official	376:cb4d9db17537	4016	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	376:cb4d9db17537	4017	}
mbed_official	376:cb4d9db17537	4018	/* Output compare event */
mbed_official	376:cb4d9db17537	4019	else
mbed_official	376:cb4d9db17537	4020	{
mbed_official	376:cb4d9db17537	4021	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4022	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	376:cb4d9db17537	4023	}
mbed_official	376:cb4d9db17537	4024	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	376:cb4d9db17537	4025	}
mbed_official	376:cb4d9db17537	4026	}
mbed_official	376:cb4d9db17537	4027	}
mbed_official	376:cb4d9db17537	4028	/* Capture compare 2 event */
mbed_official	376:cb4d9db17537	4029	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
mbed_official	376:cb4d9db17537	4030	{
mbed_official	376:cb4d9db17537	4031	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC2) !=RESET)
mbed_official	376:cb4d9db17537	4032	{
mbed_official	376:cb4d9db17537	4033	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
mbed_official	376:cb4d9db17537	4034	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official	376:cb4d9db17537	4035	/* Input capture event */
mbed_official	376:cb4d9db17537	4036	if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
mbed_official	376:cb4d9db17537	4037	{
mbed_official	376:cb4d9db17537	4038	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	376:cb4d9db17537	4039	}
mbed_official	376:cb4d9db17537	4040	/* Output compare event */
mbed_official	376:cb4d9db17537	4041	else
mbed_official	376:cb4d9db17537	4042	{
mbed_official	376:cb4d9db17537	4043	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4044	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	376:cb4d9db17537	4045	}
mbed_official	376:cb4d9db17537	4046	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	376:cb4d9db17537	4047	}
mbed_official	376:cb4d9db17537	4048	}
mbed_official	376:cb4d9db17537	4049	/* Capture compare 3 event */
mbed_official	376:cb4d9db17537	4050	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
mbed_official	376:cb4d9db17537	4051	{
mbed_official	376:cb4d9db17537	4052	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC3) !=RESET)
mbed_official	376:cb4d9db17537	4053	{
mbed_official	376:cb4d9db17537	4054	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
mbed_official	376:cb4d9db17537	4055	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official	376:cb4d9db17537	4056	/* Input capture event */
mbed_official	376:cb4d9db17537	4057	if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
mbed_official	376:cb4d9db17537	4058	{
mbed_official	376:cb4d9db17537	4059	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	376:cb4d9db17537	4060	}
mbed_official	376:cb4d9db17537	4061	/* Output compare event */
mbed_official	376:cb4d9db17537	4062	else
mbed_official	376:cb4d9db17537	4063	{
mbed_official	376:cb4d9db17537	4064	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4065	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	376:cb4d9db17537	4066	}
mbed_official	376:cb4d9db17537	4067	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	376:cb4d9db17537	4068	}
mbed_official	376:cb4d9db17537	4069	}
mbed_official	376:cb4d9db17537	4070	/* Capture compare 4 event */
mbed_official	376:cb4d9db17537	4071	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
mbed_official	376:cb4d9db17537	4072	{
mbed_official	376:cb4d9db17537	4073	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC4) !=RESET)
mbed_official	376:cb4d9db17537	4074	{
mbed_official	376:cb4d9db17537	4075	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
mbed_official	376:cb4d9db17537	4076	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official	376:cb4d9db17537	4077	/* Input capture event */
mbed_official	376:cb4d9db17537	4078	if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
mbed_official	376:cb4d9db17537	4079	{
mbed_official	376:cb4d9db17537	4080	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	376:cb4d9db17537	4081	}
mbed_official	376:cb4d9db17537	4082	/* Output compare event */
mbed_official	376:cb4d9db17537	4083	else
mbed_official	376:cb4d9db17537	4084	{
mbed_official	376:cb4d9db17537	4085	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4086	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	376:cb4d9db17537	4087	}
mbed_official	376:cb4d9db17537	4088	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	376:cb4d9db17537	4089	}
mbed_official	376:cb4d9db17537	4090	}
mbed_official	376:cb4d9db17537	4091	/* TIM Update event */
mbed_official	376:cb4d9db17537	4092	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
mbed_official	376:cb4d9db17537	4093	{
mbed_official	376:cb4d9db17537	4094	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_UPDATE) !=RESET)
mbed_official	376:cb4d9db17537	4095	{
mbed_official	376:cb4d9db17537	4096	__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
mbed_official	376:cb4d9db17537	4097	HAL_TIM_PeriodElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4098	}
mbed_official	376:cb4d9db17537	4099	}
mbed_official	376:cb4d9db17537	4100	/* TIM Trigger detection event */
mbed_official	376:cb4d9db17537	4101	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
mbed_official	376:cb4d9db17537	4102	{
mbed_official	376:cb4d9db17537	4103	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_TRIGGER) !=RESET)
mbed_official	376:cb4d9db17537	4104	{
mbed_official	376:cb4d9db17537	4105	__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
mbed_official	376:cb4d9db17537	4106	HAL_TIM_TriggerCallback(htim);
mbed_official	376:cb4d9db17537	4107	}
mbed_official	376:cb4d9db17537	4108	}
mbed_official	376:cb4d9db17537	4109	}
mbed_official	376:cb4d9db17537	4110
mbed_official	376:cb4d9db17537	4111	/**
mbed_official	376:cb4d9db17537	4112	* @brief TIM DMA error callback
mbed_official	376:cb4d9db17537	4113	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	4114	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	4115	* @retval None
mbed_official	376:cb4d9db17537	4116	*/
mbed_official	376:cb4d9db17537	4117	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	4118	{
mbed_official	376:cb4d9db17537	4119	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	4120
mbed_official	376:cb4d9db17537	4121	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	4122
mbed_official	376:cb4d9db17537	4123	HAL_TIM_ErrorCallback(htim);
mbed_official	376:cb4d9db17537	4124	}
mbed_official	376:cb4d9db17537	4125
mbed_official	376:cb4d9db17537	4126	/**
mbed_official	376:cb4d9db17537	4127	* @brief TIM DMA Delay Pulse complete callback.
mbed_official	376:cb4d9db17537	4128	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	4129	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	4130	* @retval None
mbed_official	376:cb4d9db17537	4131	*/
mbed_official	376:cb4d9db17537	4132	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	4133	{
mbed_official	376:cb4d9db17537	4134	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	4135
mbed_official	376:cb4d9db17537	4136	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	4137
mbed_official	376:cb4d9db17537	4138	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	376:cb4d9db17537	4139	}
mbed_official	376:cb4d9db17537	4140	/**
mbed_official	376:cb4d9db17537	4141	* @brief TIM DMA Capture complete callback.
mbed_official	376:cb4d9db17537	4142	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	4143	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	4144	* @retval None
mbed_official	376:cb4d9db17537	4145	*/
mbed_official	376:cb4d9db17537	4146	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	4147	{
mbed_official	376:cb4d9db17537	4148	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	4149
mbed_official	376:cb4d9db17537	4150	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	4151
mbed_official	376:cb4d9db17537	4152	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	376:cb4d9db17537	4153
mbed_official	376:cb4d9db17537	4154	}
mbed_official	376:cb4d9db17537	4155
mbed_official	376:cb4d9db17537	4156	/**
mbed_official	376:cb4d9db17537	4157	* @}
mbed_official	376:cb4d9db17537	4158	*/
mbed_official	376:cb4d9db17537	4159
mbed_official	376:cb4d9db17537	4160
mbed_official	376:cb4d9db17537	4161	/**
mbed_official	376:cb4d9db17537	4162	* @brief TIM DMA Period Elapse complete callback.
mbed_official	376:cb4d9db17537	4163	* @param hdma: pointer to DMA handle.
mbed_official	376:cb4d9db17537	4164	* @retval None
mbed_official	376:cb4d9db17537	4165	*/
mbed_official	376:cb4d9db17537	4166	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	4167	{
mbed_official	376:cb4d9db17537	4168	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	4169
mbed_official	376:cb4d9db17537	4170	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	4171
mbed_official	376:cb4d9db17537	4172	HAL_TIM_PeriodElapsedCallback(htim);
mbed_official	376:cb4d9db17537	4173	}
mbed_official	376:cb4d9db17537	4174
mbed_official	376:cb4d9db17537	4175
mbed_official	376:cb4d9db17537	4176	/**
mbed_official	376:cb4d9db17537	4177	* @brief TIM DMA Trigger callback.
mbed_official	376:cb4d9db17537	4178	* @param hdma: pointer to DMA handle.
mbed_official	376:cb4d9db17537	4179	* @retval None
mbed_official	376:cb4d9db17537	4180	*/
mbed_official	376:cb4d9db17537	4181	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	4182	{
mbed_official	376:cb4d9db17537	4183	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	4184
mbed_official	376:cb4d9db17537	4185	htim->State= HAL_TIM_STATE_READY;
mbed_official	376:cb4d9db17537	4186
mbed_official	376:cb4d9db17537	4187	HAL_TIM_TriggerCallback(htim);
mbed_official	376:cb4d9db17537	4188	}
mbed_official	376:cb4d9db17537	4189
mbed_official	376:cb4d9db17537	4190	/**
mbed_official	376:cb4d9db17537	4191	* @brief Time Base configuration
mbed_official	376:cb4d9db17537	4192	* @param TIMx: TIM periheral
mbed_official	376:cb4d9db17537	4193	* @retval None
mbed_official	376:cb4d9db17537	4194	*/
mbed_official	376:cb4d9db17537	4195	static void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure)
mbed_official	376:cb4d9db17537	4196	{
mbed_official	376:cb4d9db17537	4197	uint32_t tmpcr1 = 0;
mbed_official	376:cb4d9db17537	4198	tmpcr1 = TIMx->CR1;
mbed_official	376:cb4d9db17537	4199
mbed_official	376:cb4d9db17537	4200	/* Set TIM Time Base Unit parameters ---------------------------------------*/
mbed_official	376:cb4d9db17537	4201	if(IS_TIM_CC3_INSTANCE(TIMx) != RESET)
mbed_official	376:cb4d9db17537	4202	{
mbed_official	376:cb4d9db17537	4203	/* Select the Counter Mode */
mbed_official	376:cb4d9db17537	4204	tmpcr1 &= ~(TIM_CR1_DIR \| TIM_CR1_CMS);
mbed_official	376:cb4d9db17537	4205	tmpcr1 \|= Structure->CounterMode;
mbed_official	376:cb4d9db17537	4206	}
mbed_official	376:cb4d9db17537	4207
mbed_official	376:cb4d9db17537	4208	if(IS_TIM_CC1_INSTANCE(TIMx) != RESET)
mbed_official	376:cb4d9db17537	4209	{
mbed_official	376:cb4d9db17537	4210	/* Set the clock division */
mbed_official	376:cb4d9db17537	4211	tmpcr1 &= ~TIM_CR1_CKD;
mbed_official	376:cb4d9db17537	4212	tmpcr1 \|= (uint32_t)Structure->ClockDivision;
mbed_official	376:cb4d9db17537	4213	}
mbed_official	376:cb4d9db17537	4214
mbed_official	376:cb4d9db17537	4215	TIMx->CR1 = tmpcr1;
mbed_official	376:cb4d9db17537	4216
mbed_official	376:cb4d9db17537	4217	/* Set the Autoreload value */
mbed_official	376:cb4d9db17537	4218	TIMx->ARR = (uint32_t)Structure->Period ;
mbed_official	376:cb4d9db17537	4219
mbed_official	376:cb4d9db17537	4220	/* Set the Prescaler value */
mbed_official	376:cb4d9db17537	4221	TIMx->PSC = (uint32_t)Structure->Prescaler;
mbed_official	376:cb4d9db17537	4222
mbed_official	376:cb4d9db17537	4223	/* Generate an update event to reload the Prescaler value immediatly */
mbed_official	376:cb4d9db17537	4224	TIMx->EGR = TIM_EGR_UG;
mbed_official	376:cb4d9db17537	4225	}
mbed_official	376:cb4d9db17537	4226
mbed_official	376:cb4d9db17537	4227	/**
mbed_official	376:cb4d9db17537	4228	* @brief Time Ouput Compare 1 configuration
mbed_official	376:cb4d9db17537	4229	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4230	* @param OC_Config: The ouput configuration structure
mbed_official	376:cb4d9db17537	4231	* @retval None
mbed_official	376:cb4d9db17537	4232	*/
mbed_official	376:cb4d9db17537	4233	static void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	376:cb4d9db17537	4234	{
mbed_official	376:cb4d9db17537	4235	uint32_t tmpccmrx = 0;
mbed_official	376:cb4d9db17537	4236	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4237	uint32_t tmpcr2 = 0;
mbed_official	376:cb4d9db17537	4238
mbed_official	376:cb4d9db17537	4239	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	376:cb4d9db17537	4240	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	376:cb4d9db17537	4241
mbed_official	376:cb4d9db17537	4242	/* Get the TIMx CCER register value */
mbed_official	376:cb4d9db17537	4243	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4244	/* Get the TIMx CR2 register value */
mbed_official	376:cb4d9db17537	4245	tmpcr2 = TIMx->CR2;
mbed_official	376:cb4d9db17537	4246
mbed_official	376:cb4d9db17537	4247	/* Get the TIMx CCMR1 register value */
mbed_official	376:cb4d9db17537	4248	tmpccmrx = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4249
mbed_official	376:cb4d9db17537	4250	/* Reset the Output Compare Mode Bits */
mbed_official	376:cb4d9db17537	4251	tmpccmrx &= ~TIM_CCMR1_OC1M;
mbed_official	376:cb4d9db17537	4252	tmpccmrx &= ~TIM_CCMR1_CC1S;
mbed_official	376:cb4d9db17537	4253	/* Select the Output Compare Mode */
mbed_official	376:cb4d9db17537	4254	tmpccmrx \|= OC_Config->OCMode;
mbed_official	376:cb4d9db17537	4255
mbed_official	376:cb4d9db17537	4256	/* Reset the Output Polarity level */
mbed_official	376:cb4d9db17537	4257	tmpccer &= ~TIM_CCER_CC1P;
mbed_official	376:cb4d9db17537	4258	/* Set the Output Compare Polarity */
mbed_official	376:cb4d9db17537	4259	tmpccer \|= OC_Config->OCPolarity;
mbed_official	376:cb4d9db17537	4260
mbed_official	376:cb4d9db17537	4261	/* Write to TIMx CR2 */
mbed_official	376:cb4d9db17537	4262	TIMx->CR2 = tmpcr2;
mbed_official	376:cb4d9db17537	4263
mbed_official	376:cb4d9db17537	4264	/* Write to TIMx CCMR1 */
mbed_official	376:cb4d9db17537	4265	TIMx->CCMR1 = tmpccmrx;
mbed_official	376:cb4d9db17537	4266
mbed_official	376:cb4d9db17537	4267	/* Set the Capture Compare Register value */
mbed_official	376:cb4d9db17537	4268	TIMx->CCR1 = OC_Config->Pulse;
mbed_official	376:cb4d9db17537	4269
mbed_official	376:cb4d9db17537	4270	/* Write to TIMx CCER */
mbed_official	376:cb4d9db17537	4271	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4272	}
mbed_official	376:cb4d9db17537	4273
mbed_official	376:cb4d9db17537	4274	/**
mbed_official	376:cb4d9db17537	4275	* @brief Time Ouput Compare 2 configuration
mbed_official	376:cb4d9db17537	4276	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4277	* @param OC_Config: The ouput configuration structure
mbed_official	376:cb4d9db17537	4278	* @retval None
mbed_official	376:cb4d9db17537	4279	*/
mbed_official	376:cb4d9db17537	4280	static void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	376:cb4d9db17537	4281	{
mbed_official	376:cb4d9db17537	4282	uint32_t tmpccmrx = 0;
mbed_official	376:cb4d9db17537	4283	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4284	uint32_t tmpcr2 = 0;
mbed_official	376:cb4d9db17537	4285
mbed_official	376:cb4d9db17537	4286	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	376:cb4d9db17537	4287	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	376:cb4d9db17537	4288
mbed_official	376:cb4d9db17537	4289	/* Get the TIMx CCER register value */
mbed_official	376:cb4d9db17537	4290	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4291	/* Get the TIMx CR2 register value */
mbed_official	376:cb4d9db17537	4292	tmpcr2 = TIMx->CR2;
mbed_official	376:cb4d9db17537	4293
mbed_official	376:cb4d9db17537	4294	/* Get the TIMx CCMR1 register value */
mbed_official	376:cb4d9db17537	4295	tmpccmrx = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4296
mbed_official	376:cb4d9db17537	4297	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	376:cb4d9db17537	4298	tmpccmrx &= ~TIM_CCMR1_OC2M;
mbed_official	376:cb4d9db17537	4299	tmpccmrx &= ~TIM_CCMR1_CC2S;
mbed_official	376:cb4d9db17537	4300
mbed_official	376:cb4d9db17537	4301	/* Select the Output Compare Mode */
mbed_official	376:cb4d9db17537	4302	tmpccmrx \|= (OC_Config->OCMode << 8);
mbed_official	376:cb4d9db17537	4303
mbed_official	376:cb4d9db17537	4304	/* Reset the Output Polarity level */
mbed_official	376:cb4d9db17537	4305	tmpccer &= ~TIM_CCER_CC2P;
mbed_official	376:cb4d9db17537	4306	/* Set the Output Compare Polarity */
mbed_official	376:cb4d9db17537	4307	tmpccer \|= (OC_Config->OCPolarity << 4);
mbed_official	376:cb4d9db17537	4308
mbed_official	376:cb4d9db17537	4309	/* Write to TIMx CR2 */
mbed_official	376:cb4d9db17537	4310	TIMx->CR2 = tmpcr2;
mbed_official	376:cb4d9db17537	4311
mbed_official	376:cb4d9db17537	4312	/* Write to TIMx CCMR1 */
mbed_official	376:cb4d9db17537	4313	TIMx->CCMR1 = tmpccmrx;
mbed_official	376:cb4d9db17537	4314
mbed_official	376:cb4d9db17537	4315	/* Set the Capture Compare Register value */
mbed_official	376:cb4d9db17537	4316	TIMx->CCR2 = OC_Config->Pulse;
mbed_official	376:cb4d9db17537	4317
mbed_official	376:cb4d9db17537	4318	/* Write to TIMx CCER */
mbed_official	376:cb4d9db17537	4319	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4320	}
mbed_official	376:cb4d9db17537	4321
mbed_official	376:cb4d9db17537	4322	/**
mbed_official	376:cb4d9db17537	4323	* @brief Time Ouput Compare 3 configuration
mbed_official	376:cb4d9db17537	4324	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4325	* @param OC_Config: The ouput configuration structure
mbed_official	376:cb4d9db17537	4326	* @retval None
mbed_official	376:cb4d9db17537	4327	*/
mbed_official	376:cb4d9db17537	4328	static void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	376:cb4d9db17537	4329	{
mbed_official	376:cb4d9db17537	4330	uint32_t tmpccmrx = 0;
mbed_official	376:cb4d9db17537	4331	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4332	uint32_t tmpcr2 = 0;
mbed_official	376:cb4d9db17537	4333
mbed_official	376:cb4d9db17537	4334	/* Disable the Channel 3: Reset the CC2E Bit */
mbed_official	376:cb4d9db17537	4335	TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official	376:cb4d9db17537	4336
mbed_official	376:cb4d9db17537	4337	/* Get the TIMx CCER register value */
mbed_official	376:cb4d9db17537	4338	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4339	/* Get the TIMx CR2 register value */
mbed_official	376:cb4d9db17537	4340	tmpcr2 = TIMx->CR2;
mbed_official	376:cb4d9db17537	4341
mbed_official	376:cb4d9db17537	4342	/* Get the TIMx CCMR2 register value */
mbed_official	376:cb4d9db17537	4343	tmpccmrx = TIMx->CCMR2;
mbed_official	376:cb4d9db17537	4344
mbed_official	376:cb4d9db17537	4345	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	376:cb4d9db17537	4346	tmpccmrx &= ~TIM_CCMR2_OC3M;
mbed_official	376:cb4d9db17537	4347	tmpccmrx &= ~TIM_CCMR2_CC3S;
mbed_official	376:cb4d9db17537	4348	/* Select the Output Compare Mode */
mbed_official	376:cb4d9db17537	4349	tmpccmrx \|= OC_Config->OCMode;
mbed_official	376:cb4d9db17537	4350
mbed_official	376:cb4d9db17537	4351	/* Reset the Output Polarity level */
mbed_official	376:cb4d9db17537	4352	tmpccer &= ~TIM_CCER_CC3P;
mbed_official	376:cb4d9db17537	4353	/* Set the Output Compare Polarity */
mbed_official	376:cb4d9db17537	4354	tmpccer \|= (OC_Config->OCPolarity << 8);
mbed_official	376:cb4d9db17537	4355
mbed_official	376:cb4d9db17537	4356	/* Write to TIMx CR2 */
mbed_official	376:cb4d9db17537	4357	TIMx->CR2 = tmpcr2;
mbed_official	376:cb4d9db17537	4358
mbed_official	376:cb4d9db17537	4359	/* Write to TIMx CCMR2 */
mbed_official	376:cb4d9db17537	4360	TIMx->CCMR2 = tmpccmrx;
mbed_official	376:cb4d9db17537	4361
mbed_official	376:cb4d9db17537	4362	/* Set the Capture Compare Register value */
mbed_official	376:cb4d9db17537	4363	TIMx->CCR3 = OC_Config->Pulse;
mbed_official	376:cb4d9db17537	4364
mbed_official	376:cb4d9db17537	4365	/* Write to TIMx CCER */
mbed_official	376:cb4d9db17537	4366	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4367	}
mbed_official	376:cb4d9db17537	4368
mbed_official	376:cb4d9db17537	4369	/**
mbed_official	376:cb4d9db17537	4370	* @brief Time Ouput Compare 4 configuration
mbed_official	376:cb4d9db17537	4371	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4372	* @param OC_Config: The ouput configuration structure
mbed_official	376:cb4d9db17537	4373	* @retval None
mbed_official	376:cb4d9db17537	4374	*/
mbed_official	376:cb4d9db17537	4375	static void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	376:cb4d9db17537	4376	{
mbed_official	376:cb4d9db17537	4377	uint32_t tmpccmrx = 0;
mbed_official	376:cb4d9db17537	4378	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4379	uint32_t tmpcr2 = 0;
mbed_official	376:cb4d9db17537	4380
mbed_official	376:cb4d9db17537	4381	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	376:cb4d9db17537	4382	TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official	376:cb4d9db17537	4383
mbed_official	376:cb4d9db17537	4384	/* Get the TIMx CCER register value */
mbed_official	376:cb4d9db17537	4385	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4386	/* Get the TIMx CR2 register value */
mbed_official	376:cb4d9db17537	4387	tmpcr2 = TIMx->CR2;
mbed_official	376:cb4d9db17537	4388
mbed_official	376:cb4d9db17537	4389	/* Get the TIMx CCMR2 register value */
mbed_official	376:cb4d9db17537	4390	tmpccmrx = TIMx->CCMR2;
mbed_official	376:cb4d9db17537	4391
mbed_official	376:cb4d9db17537	4392	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	376:cb4d9db17537	4393	tmpccmrx &= ~TIM_CCMR2_OC4M;
mbed_official	376:cb4d9db17537	4394	tmpccmrx &= ~TIM_CCMR2_CC4S;
mbed_official	376:cb4d9db17537	4395
mbed_official	376:cb4d9db17537	4396	/* Select the Output Compare Mode */
mbed_official	376:cb4d9db17537	4397	tmpccmrx \|= (OC_Config->OCMode << 8);
mbed_official	376:cb4d9db17537	4398
mbed_official	376:cb4d9db17537	4399	/* Reset the Output Polarity level */
mbed_official	376:cb4d9db17537	4400	tmpccer &= ~TIM_CCER_CC4P;
mbed_official	376:cb4d9db17537	4401	/* Set the Output Compare Polarity */
mbed_official	376:cb4d9db17537	4402	tmpccer \|= (OC_Config->OCPolarity << 12);
mbed_official	376:cb4d9db17537	4403
mbed_official	376:cb4d9db17537	4404	/* Write to TIMx CR2 */
mbed_official	376:cb4d9db17537	4405	TIMx->CR2 = tmpcr2;
mbed_official	376:cb4d9db17537	4406
mbed_official	376:cb4d9db17537	4407	/* Write to TIMx CCMR2 */
mbed_official	376:cb4d9db17537	4408	TIMx->CCMR2 = tmpccmrx;
mbed_official	376:cb4d9db17537	4409
mbed_official	376:cb4d9db17537	4410	/* Set the Capture Compare Register value */
mbed_official	376:cb4d9db17537	4411	TIMx->CCR4 = OC_Config->Pulse;
mbed_official	376:cb4d9db17537	4412
mbed_official	376:cb4d9db17537	4413	/* Write to TIMx CCER */
mbed_official	376:cb4d9db17537	4414	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4415	}
mbed_official	376:cb4d9db17537	4416
mbed_official	376:cb4d9db17537	4417	/**
mbed_official	376:cb4d9db17537	4418	* @brief Configure the TI1 as Input.
mbed_official	376:cb4d9db17537	4419	* @param TIMx to select the TIM peripheral.
mbed_official	376:cb4d9db17537	4420	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4421	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4422	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4423	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4424	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4425	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	376:cb4d9db17537	4426	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4427	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official	376:cb4d9db17537	4428	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official	376:cb4d9db17537	4429	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official	376:cb4d9db17537	4430	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4431	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4432	* @retval None
mbed_official	376:cb4d9db17537	4433	*/
mbed_official	376:cb4d9db17537	4434	static void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	376:cb4d9db17537	4435	uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4436	{
mbed_official	376:cb4d9db17537	4437	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	4438	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4439
mbed_official	376:cb4d9db17537	4440	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	376:cb4d9db17537	4441	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	376:cb4d9db17537	4442	tmpccmr1 = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4443	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4444
mbed_official	376:cb4d9db17537	4445	/* Select the Input */
mbed_official	376:cb4d9db17537	4446	if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
mbed_official	376:cb4d9db17537	4447	{
mbed_official	376:cb4d9db17537	4448	tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official	376:cb4d9db17537	4449	tmpccmr1 \|= TIM_ICSelection;
mbed_official	376:cb4d9db17537	4450	}
mbed_official	376:cb4d9db17537	4451	else
mbed_official	376:cb4d9db17537	4452	{
mbed_official	376:cb4d9db17537	4453	tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official	376:cb4d9db17537	4454	tmpccmr1 \|= TIM_CCMR1_CC1S_0;
mbed_official	376:cb4d9db17537	4455	}
mbed_official	376:cb4d9db17537	4456
mbed_official	376:cb4d9db17537	4457	/* Set the filter */
mbed_official	376:cb4d9db17537	4458	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	376:cb4d9db17537	4459	tmpccmr1 \|= (TIM_ICFilter << 4);
mbed_official	376:cb4d9db17537	4460
mbed_official	376:cb4d9db17537	4461	/* Select the Polarity and set the CC1E Bit */
mbed_official	376:cb4d9db17537	4462	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
mbed_official	376:cb4d9db17537	4463	tmpccer \|= TIM_ICPolarity;
mbed_official	376:cb4d9db17537	4464
mbed_official	376:cb4d9db17537	4465	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	376:cb4d9db17537	4466	TIMx->CCMR1 = tmpccmr1;
mbed_official	376:cb4d9db17537	4467	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4468	}
mbed_official	376:cb4d9db17537	4469
mbed_official	376:cb4d9db17537	4470	/**
mbed_official	376:cb4d9db17537	4471	* @brief Configure the Polarity and Filter for TI1.
mbed_official	376:cb4d9db17537	4472	* @param TIMx to select the TIM peripheral.
mbed_official	376:cb4d9db17537	4473	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4474	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4475	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4476	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4477	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4478	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4479	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4480	* @retval None
mbed_official	376:cb4d9db17537	4481	*/
mbed_official	376:cb4d9db17537	4482	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4483	{
mbed_official	376:cb4d9db17537	4484	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	4485	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4486
mbed_official	376:cb4d9db17537	4487	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	376:cb4d9db17537	4488	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4489	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	376:cb4d9db17537	4490	tmpccmr1 = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4491
mbed_official	376:cb4d9db17537	4492	/* Set the filter */
mbed_official	376:cb4d9db17537	4493	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	376:cb4d9db17537	4494	tmpccmr1 \|= (TIM_ICFilter << 4);
mbed_official	376:cb4d9db17537	4495
mbed_official	376:cb4d9db17537	4496	/* Select the Polarity and set the CC1E Bit */
mbed_official	376:cb4d9db17537	4497	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
mbed_official	376:cb4d9db17537	4498	tmpccer \|= TIM_ICPolarity;
mbed_official	376:cb4d9db17537	4499
mbed_official	376:cb4d9db17537	4500	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	376:cb4d9db17537	4501	TIMx->CCMR1 = tmpccmr1;
mbed_official	376:cb4d9db17537	4502	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4503	}
mbed_official	376:cb4d9db17537	4504
mbed_official	376:cb4d9db17537	4505	/**
mbed_official	376:cb4d9db17537	4506	* @brief Configure the TI2 as Input.
mbed_official	376:cb4d9db17537	4507	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4508	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4509	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4510	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4511	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4512	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4513	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	376:cb4d9db17537	4514	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4515	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official	376:cb4d9db17537	4516	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official	376:cb4d9db17537	4517	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official	376:cb4d9db17537	4518	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4519	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4520	* @retval None
mbed_official	376:cb4d9db17537	4521	*/
mbed_official	376:cb4d9db17537	4522	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	376:cb4d9db17537	4523	uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4524	{
mbed_official	376:cb4d9db17537	4525	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	4526	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4527
mbed_official	376:cb4d9db17537	4528	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	376:cb4d9db17537	4529	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	376:cb4d9db17537	4530	tmpccmr1 = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4531	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4532
mbed_official	376:cb4d9db17537	4533	/* Select the Input */
mbed_official	376:cb4d9db17537	4534	tmpccmr1 &= ~TIM_CCMR1_CC2S;
mbed_official	376:cb4d9db17537	4535	tmpccmr1 \|= (TIM_ICSelection << 8);
mbed_official	376:cb4d9db17537	4536
mbed_official	376:cb4d9db17537	4537	/* Set the filter */
mbed_official	376:cb4d9db17537	4538	tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official	376:cb4d9db17537	4539	tmpccmr1 \|= (TIM_ICFilter << 12);
mbed_official	376:cb4d9db17537	4540
mbed_official	376:cb4d9db17537	4541	/* Select the Polarity and set the CC2E Bit */
mbed_official	376:cb4d9db17537	4542	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
mbed_official	376:cb4d9db17537	4543	tmpccer \|= (TIM_ICPolarity << 4);
mbed_official	376:cb4d9db17537	4544
mbed_official	376:cb4d9db17537	4545	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	376:cb4d9db17537	4546	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	376:cb4d9db17537	4547	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4548	}
mbed_official	376:cb4d9db17537	4549
mbed_official	376:cb4d9db17537	4550	/**
mbed_official	376:cb4d9db17537	4551	* @brief Configure the Polarity and Filter for TI2.
mbed_official	376:cb4d9db17537	4552	* @param TIMx to select the TIM peripheral.
mbed_official	376:cb4d9db17537	4553	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4554	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4555	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4556	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4557	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4558	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4559	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4560	* @retval None
mbed_official	376:cb4d9db17537	4561	*/
mbed_official	376:cb4d9db17537	4562	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4563	{
mbed_official	376:cb4d9db17537	4564	uint32_t tmpccmr1 = 0;
mbed_official	376:cb4d9db17537	4565	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4566
mbed_official	376:cb4d9db17537	4567	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	376:cb4d9db17537	4568	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	376:cb4d9db17537	4569	tmpccmr1 = TIMx->CCMR1;
mbed_official	376:cb4d9db17537	4570	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4571
mbed_official	376:cb4d9db17537	4572	/* Set the filter */
mbed_official	376:cb4d9db17537	4573	tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official	376:cb4d9db17537	4574	tmpccmr1 \|= (TIM_ICFilter << 12);
mbed_official	376:cb4d9db17537	4575
mbed_official	376:cb4d9db17537	4576	/* Select the Polarity and set the CC2E Bit */
mbed_official	376:cb4d9db17537	4577	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
mbed_official	376:cb4d9db17537	4578	tmpccer \|= (TIM_ICPolarity << 4);
mbed_official	376:cb4d9db17537	4579
mbed_official	376:cb4d9db17537	4580	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	376:cb4d9db17537	4581	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	376:cb4d9db17537	4582	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4583	}
mbed_official	376:cb4d9db17537	4584
mbed_official	376:cb4d9db17537	4585	/**
mbed_official	376:cb4d9db17537	4586	* @brief Configure the TI3 as Input.
mbed_official	376:cb4d9db17537	4587	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4588	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4589	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4590	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4591	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4592	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4593	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	376:cb4d9db17537	4594	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4595	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official	376:cb4d9db17537	4596	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official	376:cb4d9db17537	4597	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official	376:cb4d9db17537	4598	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4599	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4600	* @retval None
mbed_official	376:cb4d9db17537	4601	*/
mbed_official	376:cb4d9db17537	4602	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	376:cb4d9db17537	4603	uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4604	{
mbed_official	376:cb4d9db17537	4605	uint32_t tmpccmr2 = 0;
mbed_official	376:cb4d9db17537	4606	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4607
mbed_official	376:cb4d9db17537	4608	/* Disable the Channel 3: Reset the CC3E Bit */
mbed_official	376:cb4d9db17537	4609	TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official	376:cb4d9db17537	4610	tmpccmr2 = TIMx->CCMR2;
mbed_official	376:cb4d9db17537	4611	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4612
mbed_official	376:cb4d9db17537	4613	/* Select the Input */
mbed_official	376:cb4d9db17537	4614	tmpccmr2 &= ~TIM_CCMR2_CC3S;
mbed_official	376:cb4d9db17537	4615	tmpccmr2 \|= TIM_ICSelection;
mbed_official	376:cb4d9db17537	4616
mbed_official	376:cb4d9db17537	4617	/* Set the filter */
mbed_official	376:cb4d9db17537	4618	tmpccmr2 &= ~TIM_CCMR2_IC3F;
mbed_official	376:cb4d9db17537	4619	tmpccmr2 \|= (TIM_ICFilter << 4);
mbed_official	376:cb4d9db17537	4620
mbed_official	376:cb4d9db17537	4621	/* Select the Polarity and set the CC3E Bit */
mbed_official	376:cb4d9db17537	4622	tmpccer &= ~(TIM_CCER_CC3P \| TIM_CCER_CC3NP);
mbed_official	376:cb4d9db17537	4623	tmpccer \|= (TIM_ICPolarity << 8);
mbed_official	376:cb4d9db17537	4624
mbed_official	376:cb4d9db17537	4625	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	376:cb4d9db17537	4626	TIMx->CCMR2 = tmpccmr2;
mbed_official	376:cb4d9db17537	4627	TIMx->CCER = tmpccer;
mbed_official	376:cb4d9db17537	4628	}
mbed_official	376:cb4d9db17537	4629
mbed_official	376:cb4d9db17537	4630	/**
mbed_official	376:cb4d9db17537	4631	* @brief Configure the TI4 as Input.
mbed_official	376:cb4d9db17537	4632	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4633	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	376:cb4d9db17537	4634	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4635	* @arg TIM_ICPolarity_Rising
mbed_official	376:cb4d9db17537	4636	* @arg TIM_ICPolarity_Falling
mbed_official	376:cb4d9db17537	4637	* @arg TIM_ICPolarity_BothEdge
mbed_official	376:cb4d9db17537	4638	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	376:cb4d9db17537	4639	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4640	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official	376:cb4d9db17537	4641	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official	376:cb4d9db17537	4642	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official	376:cb4d9db17537	4643	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	376:cb4d9db17537	4644	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	376:cb4d9db17537	4645	* @retval None
mbed_official	376:cb4d9db17537	4646	*/
mbed_official	376:cb4d9db17537	4647	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	376:cb4d9db17537	4648	uint32_t TIM_ICFilter)
mbed_official	376:cb4d9db17537	4649	{
mbed_official	376:cb4d9db17537	4650	uint32_t tmpccmr2 = 0;
mbed_official	376:cb4d9db17537	4651	uint32_t tmpccer = 0;
mbed_official	376:cb4d9db17537	4652
mbed_official	376:cb4d9db17537	4653	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	376:cb4d9db17537	4654	TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official	376:cb4d9db17537	4655	tmpccmr2 = TIMx->CCMR2;
mbed_official	376:cb4d9db17537	4656	tmpccer = TIMx->CCER;
mbed_official	376:cb4d9db17537	4657
mbed_official	376:cb4d9db17537	4658	/* Select the Input */
mbed_official	376:cb4d9db17537	4659	tmpccmr2 &= ~TIM_CCMR2_CC4S;
mbed_official	376:cb4d9db17537	4660	tmpccmr2 \|= (TIM_ICSelection << 8);
mbed_official	376:cb4d9db17537	4661
mbed_official	376:cb4d9db17537	4662	/* Set the filter */
mbed_official	376:cb4d9db17537	4663	tmpccmr2 &= ~TIM_CCMR2_IC4F;
mbed_official	376:cb4d9db17537	4664	tmpccmr2 \|= (TIM_ICFilter << 12);
mbed_official	376:cb4d9db17537	4665
mbed_official	376:cb4d9db17537	4666	/* Select the Polarity and set the CC4E Bit */
mbed_official	376:cb4d9db17537	4667	tmpccer &= ~(TIM_CCER_CC4P \| TIM_CCER_CC4NP);
mbed_official	376:cb4d9db17537	4668	tmpccer \|= (TIM_ICPolarity << 12);
mbed_official	376:cb4d9db17537	4669
mbed_official	376:cb4d9db17537	4670	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	376:cb4d9db17537	4671	TIMx->CCMR2 = tmpccmr2;
mbed_official	376:cb4d9db17537	4672	TIMx->CCER = tmpccer ;
mbed_official	376:cb4d9db17537	4673	}
mbed_official	376:cb4d9db17537	4674
mbed_official	376:cb4d9db17537	4675	/**
mbed_official	376:cb4d9db17537	4676	* @brief Selects the Input Trigger source
mbed_official	376:cb4d9db17537	4677	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4678	* @param InputTriggerSource: The Input Trigger source.
mbed_official	376:cb4d9db17537	4679	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4680	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	376:cb4d9db17537	4681	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	376:cb4d9db17537	4682	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	376:cb4d9db17537	4683	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	376:cb4d9db17537	4684	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official	376:cb4d9db17537	4685	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official	376:cb4d9db17537	4686	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official	376:cb4d9db17537	4687	* @arg TIM_TS_ETRF: External Trigger input
mbed_official	376:cb4d9db17537	4688	* @retval None
mbed_official	376:cb4d9db17537	4689	*/
mbed_official	376:cb4d9db17537	4690	static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t TIM_ITRx)
mbed_official	376:cb4d9db17537	4691	{
mbed_official	376:cb4d9db17537	4692	uint32_t tmpsmcr = 0;
mbed_official	376:cb4d9db17537	4693
mbed_official	376:cb4d9db17537	4694	/* Get the TIMx SMCR register value */
mbed_official	376:cb4d9db17537	4695	tmpsmcr = TIMx->SMCR;
mbed_official	376:cb4d9db17537	4696	/* Reset the TS Bits */
mbed_official	376:cb4d9db17537	4697	tmpsmcr &= ~TIM_SMCR_TS;
mbed_official	376:cb4d9db17537	4698	/* Set the Input Trigger source and the slave mode*/
mbed_official	376:cb4d9db17537	4699	tmpsmcr \|= TIM_ITRx \| TIM_SLAVEMODE_EXTERNAL1;
mbed_official	376:cb4d9db17537	4700	/* Write to TIMx SMCR */
mbed_official	376:cb4d9db17537	4701	TIMx->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	4702	}
mbed_official	376:cb4d9db17537	4703	/**
mbed_official	376:cb4d9db17537	4704	* @brief Configures the TIMx External Trigger (ETR).
mbed_official	376:cb4d9db17537	4705	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4706	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	376:cb4d9db17537	4707	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4708	* @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
mbed_official	376:cb4d9db17537	4709	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	376:cb4d9db17537	4710	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	376:cb4d9db17537	4711	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	376:cb4d9db17537	4712	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	376:cb4d9db17537	4713	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4714	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	376:cb4d9db17537	4715	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	376:cb4d9db17537	4716	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	376:cb4d9db17537	4717	* This parameter must be a value between 0x00 and 0x0F
mbed_official	376:cb4d9db17537	4718	* @retval None
mbed_official	376:cb4d9db17537	4719	*/
mbed_official	376:cb4d9db17537	4720	static void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official	376:cb4d9db17537	4721	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
mbed_official	376:cb4d9db17537	4722	{
mbed_official	376:cb4d9db17537	4723	uint32_t tmpsmcr = 0;
mbed_official	376:cb4d9db17537	4724
mbed_official	376:cb4d9db17537	4725	tmpsmcr = TIMx->SMCR;
mbed_official	376:cb4d9db17537	4726
mbed_official	376:cb4d9db17537	4727	/* Reset the ETR Bits */
mbed_official	376:cb4d9db17537	4728	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
mbed_official	376:cb4d9db17537	4729
mbed_official	376:cb4d9db17537	4730	/* Set the Prescaler, the Filter value and the Polarity */
mbed_official	376:cb4d9db17537	4731	tmpsmcr \|= (uint32_t)(TIM_ExtTRGPrescaler \| (TIM_ExtTRGPolarity \| (ExtTRGFilter << 8)));
mbed_official	376:cb4d9db17537	4732
mbed_official	376:cb4d9db17537	4733	/* Write to TIMx SMCR */
mbed_official	376:cb4d9db17537	4734	TIMx->SMCR = tmpsmcr;
mbed_official	376:cb4d9db17537	4735	}
mbed_official	376:cb4d9db17537	4736
mbed_official	376:cb4d9db17537	4737	/**
mbed_official	376:cb4d9db17537	4738	* @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official	376:cb4d9db17537	4739	* @param TIMx to select the TIM peripheral
mbed_official	376:cb4d9db17537	4740	* @param Channel: specifies the TIM Channel
mbed_official	376:cb4d9db17537	4741	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	4742	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	376:cb4d9db17537	4743	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	376:cb4d9db17537	4744	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	376:cb4d9db17537	4745	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	376:cb4d9db17537	4746	* @param ChannelState: specifies the TIM Channel CCxE bit new state.
mbed_official	376:cb4d9db17537	4747	* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
mbed_official	376:cb4d9db17537	4748	* @retval None
mbed_official	376:cb4d9db17537	4749	*/
mbed_official	376:cb4d9db17537	4750	static void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
mbed_official	376:cb4d9db17537	4751	{
mbed_official	376:cb4d9db17537	4752	uint32_t tmp = 0;
mbed_official	376:cb4d9db17537	4753
mbed_official	376:cb4d9db17537	4754	/* Check the parameters */
mbed_official	376:cb4d9db17537	4755	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
mbed_official	376:cb4d9db17537	4756	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	376:cb4d9db17537	4757
mbed_official	376:cb4d9db17537	4758	tmp = TIM_CCER_CC1E << Channel;
mbed_official	376:cb4d9db17537	4759
mbed_official	376:cb4d9db17537	4760	/* Reset the CCxE Bit */
mbed_official	376:cb4d9db17537	4761	TIMx->CCER &= ~tmp;
mbed_official	376:cb4d9db17537	4762
mbed_official	376:cb4d9db17537	4763	/* Set or reset the CCxE Bit */
mbed_official	376:cb4d9db17537	4764	TIMx->CCER \|= (uint32_t)(ChannelState << Channel);
mbed_official	376:cb4d9db17537	4765	}
mbed_official	376:cb4d9db17537	4766
mbed_official	376:cb4d9db17537	4767	/**
mbed_official	376:cb4d9db17537	4768	* @}
mbed_official	376:cb4d9db17537	4769	*/
mbed_official	376:cb4d9db17537	4770
mbed_official	376:cb4d9db17537	4771	#endif /* HAL_TIM_MODULE_ENABLED */
mbed_official	376:cb4d9db17537	4772	/**
mbed_official	376:cb4d9db17537	4773	* @}
mbed_official	376:cb4d9db17537	4774	*/
mbed_official	376:cb4d9db17537	4775
mbed_official	376:cb4d9db17537	4776	/**
mbed_official	376:cb4d9db17537	4777	* @}
mbed_official	376:cb4d9db17537	4778	*/
mbed_official	376:cb4d9db17537	4779	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	21 Jan 2016
Imports:	17
Forks:	0
Commits:	441
Dependents:	0
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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c@387:643a59b3dbac, 2014-11-05 (annotated)

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