Adam Kucybala
mbed library sources
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F072RB/stm32f0xx_hal_spi.h@205:c41fc65bcfb4, 2014-05-22 (annotated)
- Committer:
- mbed_official
- Date:
- Thu May 22 20:00:09 2014 +0100
- Revision:
- 205:c41fc65bcfb4
- Child:
- 218:44081b78fdc2
Synchronized with git revision ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb
Full URL: https://github.com/mbedmicro/mbed/commit/ea4b6f76efab17a3f7d7777b0cc1ef05fec6d1cb/
[NUCLEO_F072RB] cmsis files
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 205:c41fc65bcfb4 | 1 | /** |
| mbed_official | 205:c41fc65bcfb4 | 2 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 3 | * @file stm32f0xx_hal_spi.h |
| mbed_official | 205:c41fc65bcfb4 | 4 | * @author MCD Application Team |
| mbed_official | 205:c41fc65bcfb4 | 5 | * @version V1.0.0 |
| mbed_official | 205:c41fc65bcfb4 | 6 | * @date 20-May-2014 |
| mbed_official | 205:c41fc65bcfb4 | 7 | * @brief Header file of SPI HAL module. |
| mbed_official | 205:c41fc65bcfb4 | 8 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 9 | * @attention |
| mbed_official | 205:c41fc65bcfb4 | 10 | * |
| mbed_official | 205:c41fc65bcfb4 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 205:c41fc65bcfb4 | 12 | * |
| mbed_official | 205:c41fc65bcfb4 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 205:c41fc65bcfb4 | 14 | * are permitted provided that the following conditions are met: |
| mbed_official | 205:c41fc65bcfb4 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 205:c41fc65bcfb4 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 205:c41fc65bcfb4 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 205:c41fc65bcfb4 | 18 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 205:c41fc65bcfb4 | 19 | * and/or other materials provided with the distribution. |
| mbed_official | 205:c41fc65bcfb4 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 205:c41fc65bcfb4 | 21 | * may be used to endorse or promote products derived from this software |
| mbed_official | 205:c41fc65bcfb4 | 22 | * without specific prior written permission. |
| mbed_official | 205:c41fc65bcfb4 | 23 | * |
| mbed_official | 205:c41fc65bcfb4 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 205:c41fc65bcfb4 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 205:c41fc65bcfb4 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 205:c41fc65bcfb4 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 205:c41fc65bcfb4 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 205:c41fc65bcfb4 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 205:c41fc65bcfb4 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 205:c41fc65bcfb4 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 205:c41fc65bcfb4 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 205:c41fc65bcfb4 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 205:c41fc65bcfb4 | 34 | * |
| mbed_official | 205:c41fc65bcfb4 | 35 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 36 | */ |
| mbed_official | 205:c41fc65bcfb4 | 37 | |
| mbed_official | 205:c41fc65bcfb4 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 39 | #ifndef __STM32F0xx_HAL_SPI_H |
| mbed_official | 205:c41fc65bcfb4 | 40 | #define __STM32F0xx_HAL_SPI_H |
| mbed_official | 205:c41fc65bcfb4 | 41 | |
| mbed_official | 205:c41fc65bcfb4 | 42 | #ifdef __cplusplus |
| mbed_official | 205:c41fc65bcfb4 | 43 | extern "C" { |
| mbed_official | 205:c41fc65bcfb4 | 44 | #endif |
| mbed_official | 205:c41fc65bcfb4 | 45 | |
| mbed_official | 205:c41fc65bcfb4 | 46 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 47 | #include "stm32f0xx_hal_def.h" |
| mbed_official | 205:c41fc65bcfb4 | 48 | |
| mbed_official | 205:c41fc65bcfb4 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| mbed_official | 205:c41fc65bcfb4 | 50 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 51 | */ |
| mbed_official | 205:c41fc65bcfb4 | 52 | |
| mbed_official | 205:c41fc65bcfb4 | 53 | /** @addtogroup SPI |
| mbed_official | 205:c41fc65bcfb4 | 54 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 55 | */ |
| mbed_official | 205:c41fc65bcfb4 | 56 | |
| mbed_official | 205:c41fc65bcfb4 | 57 | /* Exported types ------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 58 | |
| mbed_official | 205:c41fc65bcfb4 | 59 | /** |
| mbed_official | 205:c41fc65bcfb4 | 60 | * @brief SPI Configuration Structure definition |
| mbed_official | 205:c41fc65bcfb4 | 61 | */ |
| mbed_official | 205:c41fc65bcfb4 | 62 | typedef struct |
| mbed_official | 205:c41fc65bcfb4 | 63 | { |
| mbed_official | 205:c41fc65bcfb4 | 64 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
| mbed_official | 205:c41fc65bcfb4 | 65 | This parameter can be a value of @ref SPI_mode */ |
| mbed_official | 205:c41fc65bcfb4 | 66 | |
| mbed_official | 205:c41fc65bcfb4 | 67 | uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. |
| mbed_official | 205:c41fc65bcfb4 | 68 | This parameter can be a value of @ref SPI_Direction */ |
| mbed_official | 205:c41fc65bcfb4 | 69 | |
| mbed_official | 205:c41fc65bcfb4 | 70 | uint32_t DataSize; /*!< Specifies the SPI data size. |
| mbed_official | 205:c41fc65bcfb4 | 71 | This parameter can be a value of @ref SPI_data_size */ |
| mbed_official | 205:c41fc65bcfb4 | 72 | |
| mbed_official | 205:c41fc65bcfb4 | 73 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
| mbed_official | 205:c41fc65bcfb4 | 74 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
| mbed_official | 205:c41fc65bcfb4 | 75 | |
| mbed_official | 205:c41fc65bcfb4 | 76 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
| mbed_official | 205:c41fc65bcfb4 | 77 | This parameter can be a value of @ref SPI_Clock_Phase */ |
| mbed_official | 205:c41fc65bcfb4 | 78 | |
| mbed_official | 205:c41fc65bcfb4 | 79 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
| mbed_official | 205:c41fc65bcfb4 | 80 | hardware (NSS pin) or by software using the SSI bit. |
| mbed_official | 205:c41fc65bcfb4 | 81 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
| mbed_official | 205:c41fc65bcfb4 | 82 | |
| mbed_official | 205:c41fc65bcfb4 | 83 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
| mbed_official | 205:c41fc65bcfb4 | 84 | used to configure the transmit and receive SCK clock. |
| mbed_official | 205:c41fc65bcfb4 | 85 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| mbed_official | 205:c41fc65bcfb4 | 86 | @note The communication clock is derived from the master |
| mbed_official | 205:c41fc65bcfb4 | 87 | clock. The slave clock does not need to be set. */ |
| mbed_official | 205:c41fc65bcfb4 | 88 | |
| mbed_official | 205:c41fc65bcfb4 | 89 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| mbed_official | 205:c41fc65bcfb4 | 90 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
| mbed_official | 205:c41fc65bcfb4 | 91 | |
| mbed_official | 205:c41fc65bcfb4 | 92 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not . |
| mbed_official | 205:c41fc65bcfb4 | 93 | This parameter can be a value of @ref SPI_TI_mode */ |
| mbed_official | 205:c41fc65bcfb4 | 94 | |
| mbed_official | 205:c41fc65bcfb4 | 95 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
| mbed_official | 205:c41fc65bcfb4 | 96 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
| mbed_official | 205:c41fc65bcfb4 | 97 | |
| mbed_official | 205:c41fc65bcfb4 | 98 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
| mbed_official | 205:c41fc65bcfb4 | 99 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
| mbed_official | 205:c41fc65bcfb4 | 100 | |
| mbed_official | 205:c41fc65bcfb4 | 101 | uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. |
| mbed_official | 205:c41fc65bcfb4 | 102 | CRC Length is only used with Data8 and Data16, not other data size |
| mbed_official | 205:c41fc65bcfb4 | 103 | This parameter must 0 or 1 or 2*/ |
| mbed_official | 205:c41fc65bcfb4 | 104 | |
| mbed_official | 205:c41fc65bcfb4 | 105 | uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . |
| mbed_official | 205:c41fc65bcfb4 | 106 | This mode is activated by the NSSP bit in the SPIx_CR2 register and |
| mbed_official | 205:c41fc65bcfb4 | 107 | it takes effect only if the SPI interface is configured as Motorola SPI |
| mbed_official | 205:c41fc65bcfb4 | 108 | master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0, |
| mbed_official | 205:c41fc65bcfb4 | 109 | CPOL setting is ignored).. */ |
| mbed_official | 205:c41fc65bcfb4 | 110 | } SPI_InitTypeDef; |
| mbed_official | 205:c41fc65bcfb4 | 111 | |
| mbed_official | 205:c41fc65bcfb4 | 112 | /** |
| mbed_official | 205:c41fc65bcfb4 | 113 | * @brief HAL State structures definition |
| mbed_official | 205:c41fc65bcfb4 | 114 | */ |
| mbed_official | 205:c41fc65bcfb4 | 115 | typedef enum |
| mbed_official | 205:c41fc65bcfb4 | 116 | { |
| mbed_official | 205:c41fc65bcfb4 | 117 | HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */ |
| mbed_official | 205:c41fc65bcfb4 | 118 | HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| mbed_official | 205:c41fc65bcfb4 | 119 | HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| mbed_official | 205:c41fc65bcfb4 | 120 | HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
| mbed_official | 205:c41fc65bcfb4 | 121 | HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
| mbed_official | 205:c41fc65bcfb4 | 122 | HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */ |
| mbed_official | 205:c41fc65bcfb4 | 123 | HAL_SPI_STATE_TIMEOUT = 0x06, /*!< Timeout state */ |
| mbed_official | 205:c41fc65bcfb4 | 124 | HAL_SPI_STATE_ERROR = 0x07 /*!< Data Transmission and Reception process is ongoing */ |
| mbed_official | 205:c41fc65bcfb4 | 125 | |
| mbed_official | 205:c41fc65bcfb4 | 126 | }HAL_SPI_StateTypeDef; |
| mbed_official | 205:c41fc65bcfb4 | 127 | |
| mbed_official | 205:c41fc65bcfb4 | 128 | /** |
| mbed_official | 205:c41fc65bcfb4 | 129 | * @brief HAL SPI Error Code structure definition |
| mbed_official | 205:c41fc65bcfb4 | 130 | */ |
| mbed_official | 205:c41fc65bcfb4 | 131 | typedef enum |
| mbed_official | 205:c41fc65bcfb4 | 132 | { |
| mbed_official | 205:c41fc65bcfb4 | 133 | HAL_SPI_ERROR_NONE = 0x00, /*!< No error */ |
| mbed_official | 205:c41fc65bcfb4 | 134 | HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */ |
| mbed_official | 205:c41fc65bcfb4 | 135 | HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */ |
| mbed_official | 205:c41fc65bcfb4 | 136 | HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */ |
| mbed_official | 205:c41fc65bcfb4 | 137 | HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */ |
| mbed_official | 205:c41fc65bcfb4 | 138 | HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */ |
| mbed_official | 205:c41fc65bcfb4 | 139 | HAL_SPI_ERROR_FLAG = 0x20, /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */ |
| mbed_official | 205:c41fc65bcfb4 | 140 | HAL_SPI_ERROR_UNKNOW = 0x40, /*!< Unknow Error error */ |
| mbed_official | 205:c41fc65bcfb4 | 141 | }HAL_SPI_ErrorTypeDef; |
| mbed_official | 205:c41fc65bcfb4 | 142 | |
| mbed_official | 205:c41fc65bcfb4 | 143 | /** |
| mbed_official | 205:c41fc65bcfb4 | 144 | * @brief SPI handle Structure definition |
| mbed_official | 205:c41fc65bcfb4 | 145 | */ |
| mbed_official | 205:c41fc65bcfb4 | 146 | typedef struct __SPI_HandleTypeDef |
| mbed_official | 205:c41fc65bcfb4 | 147 | { |
| mbed_official | 205:c41fc65bcfb4 | 148 | SPI_TypeDef *Instance; /* SPI registers base address */ |
| mbed_official | 205:c41fc65bcfb4 | 149 | |
| mbed_official | 205:c41fc65bcfb4 | 150 | SPI_InitTypeDef Init; /* SPI communication parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 151 | |
| mbed_official | 205:c41fc65bcfb4 | 152 | uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ |
| mbed_official | 205:c41fc65bcfb4 | 153 | |
| mbed_official | 205:c41fc65bcfb4 | 154 | uint16_t TxXferSize; /* SPI Tx Transfer size */ |
| mbed_official | 205:c41fc65bcfb4 | 155 | |
| mbed_official | 205:c41fc65bcfb4 | 156 | uint16_t TxXferCount; /* SPI Tx Transfer Counter */ |
| mbed_official | 205:c41fc65bcfb4 | 157 | |
| mbed_official | 205:c41fc65bcfb4 | 158 | uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ |
| mbed_official | 205:c41fc65bcfb4 | 159 | |
| mbed_official | 205:c41fc65bcfb4 | 160 | uint16_t RxXferSize; /* SPI Rx Transfer size */ |
| mbed_official | 205:c41fc65bcfb4 | 161 | |
| mbed_official | 205:c41fc65bcfb4 | 162 | uint16_t RxXferCount; /* SPI Rx Transfer Counter */ |
| mbed_official | 205:c41fc65bcfb4 | 163 | |
| mbed_official | 205:c41fc65bcfb4 | 164 | uint32_t CRCSize; /* SPI CRC size used for the transfer */ |
| mbed_official | 205:c41fc65bcfb4 | 165 | |
| mbed_official | 205:c41fc65bcfb4 | 166 | void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */ |
| mbed_official | 205:c41fc65bcfb4 | 167 | |
| mbed_official | 205:c41fc65bcfb4 | 168 | void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */ |
| mbed_official | 205:c41fc65bcfb4 | 169 | |
| mbed_official | 205:c41fc65bcfb4 | 170 | DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 171 | |
| mbed_official | 205:c41fc65bcfb4 | 172 | DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 173 | |
| mbed_official | 205:c41fc65bcfb4 | 174 | HAL_LockTypeDef Lock; /* Locking object */ |
| mbed_official | 205:c41fc65bcfb4 | 175 | |
| mbed_official | 205:c41fc65bcfb4 | 176 | HAL_SPI_StateTypeDef State; /* SPI communication state */ |
| mbed_official | 205:c41fc65bcfb4 | 177 | |
| mbed_official | 205:c41fc65bcfb4 | 178 | HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */ |
| mbed_official | 205:c41fc65bcfb4 | 179 | |
| mbed_official | 205:c41fc65bcfb4 | 180 | }SPI_HandleTypeDef; |
| mbed_official | 205:c41fc65bcfb4 | 181 | |
| mbed_official | 205:c41fc65bcfb4 | 182 | /* Exported constants --------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 183 | |
| mbed_official | 205:c41fc65bcfb4 | 184 | /** @defgroup SPI_Exported_Constants |
| mbed_official | 205:c41fc65bcfb4 | 185 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 186 | */ |
| mbed_official | 205:c41fc65bcfb4 | 187 | |
| mbed_official | 205:c41fc65bcfb4 | 188 | /** @defgroup SPI_mode |
| mbed_official | 205:c41fc65bcfb4 | 189 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 190 | */ |
| mbed_official | 205:c41fc65bcfb4 | 191 | |
| mbed_official | 205:c41fc65bcfb4 | 192 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 193 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| mbed_official | 205:c41fc65bcfb4 | 194 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 195 | ((MODE) == SPI_MODE_MASTER)) |
| mbed_official | 205:c41fc65bcfb4 | 196 | /** |
| mbed_official | 205:c41fc65bcfb4 | 197 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 198 | */ |
| mbed_official | 205:c41fc65bcfb4 | 199 | |
| mbed_official | 205:c41fc65bcfb4 | 200 | /** @defgroup SPI_Direction |
| mbed_official | 205:c41fc65bcfb4 | 201 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 202 | */ |
| mbed_official | 205:c41fc65bcfb4 | 203 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 204 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
| mbed_official | 205:c41fc65bcfb4 | 205 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
| mbed_official | 205:c41fc65bcfb4 | 206 | |
| mbed_official | 205:c41fc65bcfb4 | 207 | #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
| mbed_official | 205:c41fc65bcfb4 | 208 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\ |
| mbed_official | 205:c41fc65bcfb4 | 209 | ((MODE) == SPI_DIRECTION_1LINE)) |
| mbed_official | 205:c41fc65bcfb4 | 210 | |
| mbed_official | 205:c41fc65bcfb4 | 211 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) |
| mbed_official | 205:c41fc65bcfb4 | 212 | |
| mbed_official | 205:c41fc65bcfb4 | 213 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ |
| mbed_official | 205:c41fc65bcfb4 | 214 | ((MODE) == SPI_DIRECTION_1LINE)) |
| mbed_official | 205:c41fc65bcfb4 | 215 | /** |
| mbed_official | 205:c41fc65bcfb4 | 216 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 217 | */ |
| mbed_official | 205:c41fc65bcfb4 | 218 | |
| mbed_official | 205:c41fc65bcfb4 | 219 | /** @defgroup SPI_data_size |
| mbed_official | 205:c41fc65bcfb4 | 220 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 221 | */ |
| mbed_official | 205:c41fc65bcfb4 | 222 | |
| mbed_official | 205:c41fc65bcfb4 | 223 | #define SPI_DATASIZE_4BIT ((uint16_t)0x0300) |
| mbed_official | 205:c41fc65bcfb4 | 224 | #define SPI_DATASIZE_5BIT ((uint16_t)0x0400) |
| mbed_official | 205:c41fc65bcfb4 | 225 | #define SPI_DATASIZE_6BIT ((uint16_t)0x0500) |
| mbed_official | 205:c41fc65bcfb4 | 226 | #define SPI_DATASIZE_7BIT ((uint16_t)0x0600) |
| mbed_official | 205:c41fc65bcfb4 | 227 | #define SPI_DATASIZE_8BIT ((uint16_t)0x0700) |
| mbed_official | 205:c41fc65bcfb4 | 228 | #define SPI_DATASIZE_9BIT ((uint16_t)0x0800) |
| mbed_official | 205:c41fc65bcfb4 | 229 | #define SPI_DATASIZE_10BIT ((uint16_t)0x0900) |
| mbed_official | 205:c41fc65bcfb4 | 230 | #define SPI_DATASIZE_11BIT ((uint16_t)0x0A00) |
| mbed_official | 205:c41fc65bcfb4 | 231 | #define SPI_DATASIZE_12BIT ((uint16_t)0x0B00) |
| mbed_official | 205:c41fc65bcfb4 | 232 | #define SPI_DATASIZE_13BIT ((uint16_t)0x0C00) |
| mbed_official | 205:c41fc65bcfb4 | 233 | #define SPI_DATASIZE_14BIT ((uint16_t)0x0D00) |
| mbed_official | 205:c41fc65bcfb4 | 234 | #define SPI_DATASIZE_15BIT ((uint16_t)0x0E00) |
| mbed_official | 205:c41fc65bcfb4 | 235 | #define SPI_DATASIZE_16BIT ((uint16_t)0x0F00) |
| mbed_official | 205:c41fc65bcfb4 | 236 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 237 | ((DATASIZE) == SPI_DATASIZE_15BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 238 | ((DATASIZE) == SPI_DATASIZE_14BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 239 | ((DATASIZE) == SPI_DATASIZE_13BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 240 | ((DATASIZE) == SPI_DATASIZE_12BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 241 | ((DATASIZE) == SPI_DATASIZE_11BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 242 | ((DATASIZE) == SPI_DATASIZE_10BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 243 | ((DATASIZE) == SPI_DATASIZE_9BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 244 | ((DATASIZE) == SPI_DATASIZE_8BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 245 | ((DATASIZE) == SPI_DATASIZE_7BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 246 | ((DATASIZE) == SPI_DATASIZE_6BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 247 | ((DATASIZE) == SPI_DATASIZE_5BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 248 | ((DATASIZE) == SPI_DATASIZE_4BIT)) |
| mbed_official | 205:c41fc65bcfb4 | 249 | |
| mbed_official | 205:c41fc65bcfb4 | 250 | /** |
| mbed_official | 205:c41fc65bcfb4 | 251 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 252 | */ |
| mbed_official | 205:c41fc65bcfb4 | 253 | |
| mbed_official | 205:c41fc65bcfb4 | 254 | /** @defgroup SPI_Clock_Polarity |
| mbed_official | 205:c41fc65bcfb4 | 255 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 256 | */ |
| mbed_official | 205:c41fc65bcfb4 | 257 | |
| mbed_official | 205:c41fc65bcfb4 | 258 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 259 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
| mbed_official | 205:c41fc65bcfb4 | 260 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ |
| mbed_official | 205:c41fc65bcfb4 | 261 | ((CPOL) == SPI_POLARITY_HIGH)) |
| mbed_official | 205:c41fc65bcfb4 | 262 | /** |
| mbed_official | 205:c41fc65bcfb4 | 263 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 264 | */ |
| mbed_official | 205:c41fc65bcfb4 | 265 | |
| mbed_official | 205:c41fc65bcfb4 | 266 | /** @defgroup SPI_Clock_Phase |
| mbed_official | 205:c41fc65bcfb4 | 267 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 268 | */ |
| mbed_official | 205:c41fc65bcfb4 | 269 | |
| mbed_official | 205:c41fc65bcfb4 | 270 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 271 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
| mbed_official | 205:c41fc65bcfb4 | 272 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 273 | ((CPHA) == SPI_PHASE_2EDGE)) |
| mbed_official | 205:c41fc65bcfb4 | 274 | /** |
| mbed_official | 205:c41fc65bcfb4 | 275 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 276 | */ |
| mbed_official | 205:c41fc65bcfb4 | 277 | |
| mbed_official | 205:c41fc65bcfb4 | 278 | /** @defgroup SPI_Slave_Select_management |
| mbed_official | 205:c41fc65bcfb4 | 279 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 280 | */ |
| mbed_official | 205:c41fc65bcfb4 | 281 | |
| mbed_official | 205:c41fc65bcfb4 | 282 | #define SPI_NSS_SOFT SPI_CR1_SSM |
| mbed_official | 205:c41fc65bcfb4 | 283 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 284 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000) |
| mbed_official | 205:c41fc65bcfb4 | 285 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 286 | ((NSS) == SPI_NSS_HARD_INPUT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 287 | ((NSS) == SPI_NSS_HARD_OUTPUT)) |
| mbed_official | 205:c41fc65bcfb4 | 288 | |
| mbed_official | 205:c41fc65bcfb4 | 289 | /** |
| mbed_official | 205:c41fc65bcfb4 | 290 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 291 | */ |
| mbed_official | 205:c41fc65bcfb4 | 292 | |
| mbed_official | 205:c41fc65bcfb4 | 293 | |
| mbed_official | 205:c41fc65bcfb4 | 294 | /** @defgroup SPI_NSS pulse management |
| mbed_official | 205:c41fc65bcfb4 | 295 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 296 | */ |
| mbed_official | 205:c41fc65bcfb4 | 297 | #define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP |
| mbed_official | 205:c41fc65bcfb4 | 298 | #define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 299 | |
| mbed_official | 205:c41fc65bcfb4 | 300 | #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \ |
| mbed_official | 205:c41fc65bcfb4 | 301 | ((NSSP) == SPI_NSS_PULSE_DISABLED)) |
| mbed_official | 205:c41fc65bcfb4 | 302 | |
| mbed_official | 205:c41fc65bcfb4 | 303 | /** |
| mbed_official | 205:c41fc65bcfb4 | 304 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 305 | */ |
| mbed_official | 205:c41fc65bcfb4 | 306 | |
| mbed_official | 205:c41fc65bcfb4 | 307 | |
| mbed_official | 205:c41fc65bcfb4 | 308 | /** @defgroup SPI_BaudRate_Prescaler |
| mbed_official | 205:c41fc65bcfb4 | 309 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 310 | */ |
| mbed_official | 205:c41fc65bcfb4 | 311 | |
| mbed_official | 205:c41fc65bcfb4 | 312 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 313 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008) |
| mbed_official | 205:c41fc65bcfb4 | 314 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010) |
| mbed_official | 205:c41fc65bcfb4 | 315 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018) |
| mbed_official | 205:c41fc65bcfb4 | 316 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020) |
| mbed_official | 205:c41fc65bcfb4 | 317 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028) |
| mbed_official | 205:c41fc65bcfb4 | 318 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030) |
| mbed_official | 205:c41fc65bcfb4 | 319 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038) |
| mbed_official | 205:c41fc65bcfb4 | 320 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ |
| mbed_official | 205:c41fc65bcfb4 | 321 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ |
| mbed_official | 205:c41fc65bcfb4 | 322 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ |
| mbed_official | 205:c41fc65bcfb4 | 323 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ |
| mbed_official | 205:c41fc65bcfb4 | 324 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ |
| mbed_official | 205:c41fc65bcfb4 | 325 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ |
| mbed_official | 205:c41fc65bcfb4 | 326 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ |
| mbed_official | 205:c41fc65bcfb4 | 327 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) |
| mbed_official | 205:c41fc65bcfb4 | 328 | /** |
| mbed_official | 205:c41fc65bcfb4 | 329 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 330 | */ |
| mbed_official | 205:c41fc65bcfb4 | 331 | |
| mbed_official | 205:c41fc65bcfb4 | 332 | /** @defgroup SPI_MSB_LSB_transmission |
| mbed_official | 205:c41fc65bcfb4 | 333 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 334 | */ |
| mbed_official | 205:c41fc65bcfb4 | 335 | |
| mbed_official | 205:c41fc65bcfb4 | 336 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 337 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
| mbed_official | 205:c41fc65bcfb4 | 338 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ |
| mbed_official | 205:c41fc65bcfb4 | 339 | ((BIT) == SPI_FIRSTBIT_LSB)) |
| mbed_official | 205:c41fc65bcfb4 | 340 | /** |
| mbed_official | 205:c41fc65bcfb4 | 341 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 342 | */ |
| mbed_official | 205:c41fc65bcfb4 | 343 | |
| mbed_official | 205:c41fc65bcfb4 | 344 | /** @defgroup SPI_TI_mode |
| mbed_official | 205:c41fc65bcfb4 | 345 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 346 | */ |
| mbed_official | 205:c41fc65bcfb4 | 347 | |
| mbed_official | 205:c41fc65bcfb4 | 348 | #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 349 | #define SPI_TIMODE_ENABLED SPI_CR2_FRF |
| mbed_official | 205:c41fc65bcfb4 | 350 | #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \ |
| mbed_official | 205:c41fc65bcfb4 | 351 | ((MODE) == SPI_TIMODE_ENABLED)) |
| mbed_official | 205:c41fc65bcfb4 | 352 | /** |
| mbed_official | 205:c41fc65bcfb4 | 353 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 354 | */ |
| mbed_official | 205:c41fc65bcfb4 | 355 | |
| mbed_official | 205:c41fc65bcfb4 | 356 | /** @defgroup SPI_CRC_Calculation |
| mbed_official | 205:c41fc65bcfb4 | 357 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 358 | */ |
| mbed_official | 205:c41fc65bcfb4 | 359 | |
| mbed_official | 205:c41fc65bcfb4 | 360 | #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000) |
| mbed_official | 205:c41fc65bcfb4 | 361 | #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN |
| mbed_official | 205:c41fc65bcfb4 | 362 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \ |
| mbed_official | 205:c41fc65bcfb4 | 363 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLED)) |
| mbed_official | 205:c41fc65bcfb4 | 364 | /** |
| mbed_official | 205:c41fc65bcfb4 | 365 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 366 | */ |
| mbed_official | 205:c41fc65bcfb4 | 367 | |
| mbed_official | 205:c41fc65bcfb4 | 368 | /** @defgroup SPI_CRC_length |
| mbed_official | 205:c41fc65bcfb4 | 369 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 370 | * This parameter can be one of the following values: |
| mbed_official | 205:c41fc65bcfb4 | 371 | * SPI_CRC_LENGTH_DATASIZE: aligned with the data size |
| mbed_official | 205:c41fc65bcfb4 | 372 | * SPI_CRC_LENGTH_8BIT : CRC 8bit |
| mbed_official | 205:c41fc65bcfb4 | 373 | * SPI_CRC_LENGTH_16BIT : CRC 16bit |
| mbed_official | 205:c41fc65bcfb4 | 374 | */ |
| mbed_official | 205:c41fc65bcfb4 | 375 | #define SPI_CRC_LENGTH_DATASIZE 0 |
| mbed_official | 205:c41fc65bcfb4 | 376 | #define SPI_CRC_LENGTH_8BIT 1 |
| mbed_official | 205:c41fc65bcfb4 | 377 | #define SPI_CRC_LENGTH_16BIT 2 |
| mbed_official | 205:c41fc65bcfb4 | 378 | #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\ |
| mbed_official | 205:c41fc65bcfb4 | 379 | ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \ |
| mbed_official | 205:c41fc65bcfb4 | 380 | ((LENGTH) == SPI_CRC_LENGTH_16BIT)) |
| mbed_official | 205:c41fc65bcfb4 | 381 | /** |
| mbed_official | 205:c41fc65bcfb4 | 382 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 383 | */ |
| mbed_official | 205:c41fc65bcfb4 | 384 | |
| mbed_official | 205:c41fc65bcfb4 | 385 | /** @defgroup SPI_FIFO_reception_threshold |
| mbed_official | 205:c41fc65bcfb4 | 386 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 387 | * This parameter can be one of the following values: |
| mbed_official | 205:c41fc65bcfb4 | 388 | * SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO |
| mbed_official | 205:c41fc65bcfb4 | 389 | * level is greater or equal to 1/2(16-bits). |
| mbed_official | 205:c41fc65bcfb4 | 390 | * SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO |
| mbed_official | 205:c41fc65bcfb4 | 391 | * level is greater or equal to 1/4(8 bits). |
| mbed_official | 205:c41fc65bcfb4 | 392 | */ |
| mbed_official | 205:c41fc65bcfb4 | 393 | #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH |
| mbed_official | 205:c41fc65bcfb4 | 394 | #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH |
| mbed_official | 205:c41fc65bcfb4 | 395 | #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0) |
| mbed_official | 205:c41fc65bcfb4 | 396 | |
| mbed_official | 205:c41fc65bcfb4 | 397 | /** |
| mbed_official | 205:c41fc65bcfb4 | 398 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 399 | */ |
| mbed_official | 205:c41fc65bcfb4 | 400 | |
| mbed_official | 205:c41fc65bcfb4 | 401 | /** @defgroup SPI_Interrupt_configuration_definition |
| mbed_official | 205:c41fc65bcfb4 | 402 | * @brief SPI Interrupt definition |
| mbed_official | 205:c41fc65bcfb4 | 403 | * Elements values convention: 0xXXXXXXXX |
| mbed_official | 205:c41fc65bcfb4 | 404 | * - XXXXXXXX : Interrupt control mask |
| mbed_official | 205:c41fc65bcfb4 | 405 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 406 | */ |
| mbed_official | 205:c41fc65bcfb4 | 407 | #define SPI_IT_TXE SPI_CR2_TXEIE |
| mbed_official | 205:c41fc65bcfb4 | 408 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
| mbed_official | 205:c41fc65bcfb4 | 409 | #define SPI_IT_ERR SPI_CR2_ERRIE |
| mbed_official | 205:c41fc65bcfb4 | 410 | #define IS_SPI_IT(IT) (((IT) == SPI_IT_TXE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 411 | ((IT) == SPI_IT_RXNE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 412 | ((IT) == SPI_IT_ERR)) |
| mbed_official | 205:c41fc65bcfb4 | 413 | /** |
| mbed_official | 205:c41fc65bcfb4 | 414 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 415 | */ |
| mbed_official | 205:c41fc65bcfb4 | 416 | |
| mbed_official | 205:c41fc65bcfb4 | 417 | |
| mbed_official | 205:c41fc65bcfb4 | 418 | /** @defgroup SPI_Flag_definition |
| mbed_official | 205:c41fc65bcfb4 | 419 | * @brief Flag definition |
| mbed_official | 205:c41fc65bcfb4 | 420 | * Elements values convention: 0xXXXXYYYY |
| mbed_official | 205:c41fc65bcfb4 | 421 | * - XXXX : Flag register Index |
| mbed_official | 205:c41fc65bcfb4 | 422 | * - YYYY : Flag mask |
| mbed_official | 205:c41fc65bcfb4 | 423 | */ |
| mbed_official | 205:c41fc65bcfb4 | 424 | #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ |
| mbed_official | 205:c41fc65bcfb4 | 425 | #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ |
| mbed_official | 205:c41fc65bcfb4 | 426 | #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ |
| mbed_official | 205:c41fc65bcfb4 | 427 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ |
| mbed_official | 205:c41fc65bcfb4 | 428 | #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ |
| mbed_official | 205:c41fc65bcfb4 | 429 | #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ |
| mbed_official | 205:c41fc65bcfb4 | 430 | #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ |
| mbed_official | 205:c41fc65bcfb4 | 431 | #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */ |
| mbed_official | 205:c41fc65bcfb4 | 432 | #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */ |
| mbed_official | 205:c41fc65bcfb4 | 433 | #define IS_SPI_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXNE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 434 | ((FLAG) == SPI_FLAG_TXE) || \ |
| mbed_official | 205:c41fc65bcfb4 | 435 | ((FLAG) == SPI_FLAG_BSY) || \ |
| mbed_official | 205:c41fc65bcfb4 | 436 | ((FLAG) == SPI_FLAG_CRCERR)|| \ |
| mbed_official | 205:c41fc65bcfb4 | 437 | ((FLAG) == SPI_FLAG_MODF) || \ |
| mbed_official | 205:c41fc65bcfb4 | 438 | ((FLAG) == SPI_FLAG_OVR) || \ |
| mbed_official | 205:c41fc65bcfb4 | 439 | ((FLAG) == SPI_FLAG_FTLVL) || \ |
| mbed_official | 205:c41fc65bcfb4 | 440 | ((FLAG) == SPI_FLAG_FRLVL) || \ |
| mbed_official | 205:c41fc65bcfb4 | 441 | ((FLAG) == SPI_IT_FRE)) |
| mbed_official | 205:c41fc65bcfb4 | 442 | |
| mbed_official | 205:c41fc65bcfb4 | 443 | |
| mbed_official | 205:c41fc65bcfb4 | 444 | /** @defgroup SPI_transmission_fifo_status_level |
| mbed_official | 205:c41fc65bcfb4 | 445 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 446 | */ |
| mbed_official | 205:c41fc65bcfb4 | 447 | |
| mbed_official | 205:c41fc65bcfb4 | 448 | #define SPI_FTLVL_EMPTY ((uint16_t)0x0000) |
| mbed_official | 205:c41fc65bcfb4 | 449 | #define SPI_FTLVL_QUARTER_FULL ((uint16_t)0x0800) |
| mbed_official | 205:c41fc65bcfb4 | 450 | #define SPI_FTLVL_HALF_FULL ((uint16_t)0x1000) |
| mbed_official | 205:c41fc65bcfb4 | 451 | #define SPI_FTLVL_FULL ((uint16_t)0x1800) |
| mbed_official | 205:c41fc65bcfb4 | 452 | |
| mbed_official | 205:c41fc65bcfb4 | 453 | |
| mbed_official | 205:c41fc65bcfb4 | 454 | /** |
| mbed_official | 205:c41fc65bcfb4 | 455 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 456 | */ |
| mbed_official | 205:c41fc65bcfb4 | 457 | |
| mbed_official | 205:c41fc65bcfb4 | 458 | /** @defgroup SPI_reception_fifo_status_level |
| mbed_official | 205:c41fc65bcfb4 | 459 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 460 | */ |
| mbed_official | 205:c41fc65bcfb4 | 461 | #define SPI_FRLVL_EMPTY ((uint16_t)0x0000) |
| mbed_official | 205:c41fc65bcfb4 | 462 | #define SPI_FRLVL_QUARTER_FULL ((uint16_t)0x0200) |
| mbed_official | 205:c41fc65bcfb4 | 463 | #define SPI_FRLVL_HALF_FULL ((uint16_t)0x0400) |
| mbed_official | 205:c41fc65bcfb4 | 464 | #define SPI_FRLVL_FULL ((uint16_t)0x0600) |
| mbed_official | 205:c41fc65bcfb4 | 465 | |
| mbed_official | 205:c41fc65bcfb4 | 466 | /** |
| mbed_official | 205:c41fc65bcfb4 | 467 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 468 | */ |
| mbed_official | 205:c41fc65bcfb4 | 469 | |
| mbed_official | 205:c41fc65bcfb4 | 470 | /** |
| mbed_official | 205:c41fc65bcfb4 | 471 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 472 | */ |
| mbed_official | 205:c41fc65bcfb4 | 473 | |
| mbed_official | 205:c41fc65bcfb4 | 474 | |
| mbed_official | 205:c41fc65bcfb4 | 475 | /* Exported macros ------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 476 | |
| mbed_official | 205:c41fc65bcfb4 | 477 | /** @brief Reset SPI handle state |
| mbed_official | 205:c41fc65bcfb4 | 478 | * @param __HANDLE__: SPI handle. |
| mbed_official | 205:c41fc65bcfb4 | 479 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 480 | */ |
| mbed_official | 205:c41fc65bcfb4 | 481 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
| mbed_official | 205:c41fc65bcfb4 | 482 | |
| mbed_official | 205:c41fc65bcfb4 | 483 | /** @brief Enables or disables the specified SPI interrupts. |
| mbed_official | 205:c41fc65bcfb4 | 484 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 485 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 486 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| mbed_official | 205:c41fc65bcfb4 | 487 | * This parameter can be one of the following values: |
| mbed_official | 205:c41fc65bcfb4 | 488 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 489 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 490 | * @arg SPI_IT_ERR: Error interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 491 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 492 | */ |
| mbed_official | 205:c41fc65bcfb4 | 493 | |
| mbed_official | 205:c41fc65bcfb4 | 494 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| mbed_official | 205:c41fc65bcfb4 | 495 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__))) |
| mbed_official | 205:c41fc65bcfb4 | 496 | |
| mbed_official | 205:c41fc65bcfb4 | 497 | /** @brief Checks if the specified SPI interrupt source is enabled or disabled. |
| mbed_official | 205:c41fc65bcfb4 | 498 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 499 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 500 | * @param __INTERRUPT__: specifies the SPI interrupt source to check. |
| mbed_official | 205:c41fc65bcfb4 | 501 | * This parameter can be one of the following values: |
| mbed_official | 205:c41fc65bcfb4 | 502 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 503 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 504 | * @arg SPI_IT_ERR: Error interrupt enable |
| mbed_official | 205:c41fc65bcfb4 | 505 | * @retval The new state of __IT__ (TRUE or FALSE). |
| mbed_official | 205:c41fc65bcfb4 | 506 | */ |
| mbed_official | 205:c41fc65bcfb4 | 507 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| mbed_official | 205:c41fc65bcfb4 | 508 | |
| mbed_official | 205:c41fc65bcfb4 | 509 | /** @brief Checks whether the specified SPI flag is set or not. |
| mbed_official | 205:c41fc65bcfb4 | 510 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 511 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 512 | * @param __FLAG__: specifies the flag to check. |
| mbed_official | 205:c41fc65bcfb4 | 513 | * This parameter can be one of the following values: |
| mbed_official | 205:c41fc65bcfb4 | 514 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
| mbed_official | 205:c41fc65bcfb4 | 515 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
| mbed_official | 205:c41fc65bcfb4 | 516 | * @arg SPI_FLAG_CRCERR: CRC error flag |
| mbed_official | 205:c41fc65bcfb4 | 517 | * @arg SPI_FLAG_MODF: Mode fault flag |
| mbed_official | 205:c41fc65bcfb4 | 518 | * @arg SPI_FLAG_OVR: Overrun flag |
| mbed_official | 205:c41fc65bcfb4 | 519 | * @arg SPI_FLAG_BSY: Busy flag |
| mbed_official | 205:c41fc65bcfb4 | 520 | * @arg SPI_FLAG_FRE: Frame format error flag |
| mbed_official | 205:c41fc65bcfb4 | 521 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| mbed_official | 205:c41fc65bcfb4 | 522 | */ |
| mbed_official | 205:c41fc65bcfb4 | 523 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| mbed_official | 205:c41fc65bcfb4 | 524 | |
| mbed_official | 205:c41fc65bcfb4 | 525 | /** @brief Clears the SPI CRCERR pending flag. |
| mbed_official | 205:c41fc65bcfb4 | 526 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 527 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 528 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 529 | */ |
| mbed_official | 205:c41fc65bcfb4 | 530 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR &= (uint16_t)(~SPI_FLAG_CRCERR)) |
| mbed_official | 205:c41fc65bcfb4 | 531 | |
| mbed_official | 205:c41fc65bcfb4 | 532 | /** @brief Clears the SPI MODF pending flag. |
| mbed_official | 205:c41fc65bcfb4 | 533 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 534 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 535 | * |
| mbed_official | 205:c41fc65bcfb4 | 536 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 537 | */ |
| mbed_official | 205:c41fc65bcfb4 | 538 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\ |
| mbed_official | 205:c41fc65bcfb4 | 539 | (__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_SPE);}while(0) |
| mbed_official | 205:c41fc65bcfb4 | 540 | |
| mbed_official | 205:c41fc65bcfb4 | 541 | /** @brief Clears the SPI OVR pending flag. |
| mbed_official | 205:c41fc65bcfb4 | 542 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 543 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 544 | * |
| mbed_official | 205:c41fc65bcfb4 | 545 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 546 | */ |
| mbed_official | 205:c41fc65bcfb4 | 547 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\ |
| mbed_official | 205:c41fc65bcfb4 | 548 | (__HANDLE__)->Instance->SR;}while(0) |
| mbed_official | 205:c41fc65bcfb4 | 549 | |
| mbed_official | 205:c41fc65bcfb4 | 550 | /** @brief Clears the SPI FRE pending flag. |
| mbed_official | 205:c41fc65bcfb4 | 551 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 552 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 553 | * |
| mbed_official | 205:c41fc65bcfb4 | 554 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 555 | */ |
| mbed_official | 205:c41fc65bcfb4 | 556 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR) |
| mbed_official | 205:c41fc65bcfb4 | 557 | |
| mbed_official | 205:c41fc65bcfb4 | 558 | /** @brief Enables the SPI. |
| mbed_official | 205:c41fc65bcfb4 | 559 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 560 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 561 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 562 | */ |
| mbed_official | 205:c41fc65bcfb4 | 563 | #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) |
| mbed_official | 205:c41fc65bcfb4 | 564 | |
| mbed_official | 205:c41fc65bcfb4 | 565 | /** @brief Disables the SPI. |
| mbed_official | 205:c41fc65bcfb4 | 566 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 567 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 568 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 569 | */ |
| mbed_official | 205:c41fc65bcfb4 | 570 | #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_SPE)) |
| mbed_official | 205:c41fc65bcfb4 | 571 | |
| mbed_official | 205:c41fc65bcfb4 | 572 | /** @brief Sets the SPI transmit-only mode. |
| mbed_official | 205:c41fc65bcfb4 | 573 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 574 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 575 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 576 | */ |
| mbed_official | 205:c41fc65bcfb4 | 577 | #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) |
| mbed_official | 205:c41fc65bcfb4 | 578 | |
| mbed_official | 205:c41fc65bcfb4 | 579 | /** @brief Sets the SPI receive-only mode. |
| mbed_official | 205:c41fc65bcfb4 | 580 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 581 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 582 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 583 | */ |
| mbed_official | 205:c41fc65bcfb4 | 584 | #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_BIDIOE)) |
| mbed_official | 205:c41fc65bcfb4 | 585 | |
| mbed_official | 205:c41fc65bcfb4 | 586 | /** @brief Resets the CRC calculation of the SPI. |
| mbed_official | 205:c41fc65bcfb4 | 587 | * @param __HANDLE__: specifies the SPI Handle. |
| mbed_official | 205:c41fc65bcfb4 | 588 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| mbed_official | 205:c41fc65bcfb4 | 589 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 590 | */ |
| mbed_official | 205:c41fc65bcfb4 | 591 | #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\ |
| mbed_official | 205:c41fc65bcfb4 | 592 | (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0) |
| mbed_official | 205:c41fc65bcfb4 | 593 | |
| mbed_official | 205:c41fc65bcfb4 | 594 | |
| mbed_official | 205:c41fc65bcfb4 | 595 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF)) |
| mbed_official | 205:c41fc65bcfb4 | 596 | |
| mbed_official | 205:c41fc65bcfb4 | 597 | /* Exported functions --------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 598 | |
| mbed_official | 205:c41fc65bcfb4 | 599 | /* Initialization and de-initialization functions ****************************/ |
| mbed_official | 205:c41fc65bcfb4 | 600 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 601 | HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 602 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 603 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 604 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 605 | |
| mbed_official | 205:c41fc65bcfb4 | 606 | /* IO operation functions *****************************************************/ |
| mbed_official | 205:c41fc65bcfb4 | 607 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 205:c41fc65bcfb4 | 608 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 205:c41fc65bcfb4 | 609 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| mbed_official | 205:c41fc65bcfb4 | 610 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 611 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 612 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 613 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 614 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 615 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| mbed_official | 205:c41fc65bcfb4 | 616 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 617 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 618 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 619 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 620 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 621 | |
| mbed_official | 205:c41fc65bcfb4 | 622 | /* Peripheral State and Error functions ***************************************/ |
| mbed_official | 205:c41fc65bcfb4 | 623 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
| mbed_official | 205:c41fc65bcfb4 | 624 | |
| mbed_official | 205:c41fc65bcfb4 | 625 | /** |
| mbed_official | 205:c41fc65bcfb4 | 626 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 627 | */ |
| mbed_official | 205:c41fc65bcfb4 | 628 | |
| mbed_official | 205:c41fc65bcfb4 | 629 | /** |
| mbed_official | 205:c41fc65bcfb4 | 630 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 631 | */ |
| mbed_official | 205:c41fc65bcfb4 | 632 | |
| mbed_official | 205:c41fc65bcfb4 | 633 | #ifdef __cplusplus |
| mbed_official | 205:c41fc65bcfb4 | 634 | } |
| mbed_official | 205:c41fc65bcfb4 | 635 | #endif |
| mbed_official | 205:c41fc65bcfb4 | 636 | |
| mbed_official | 205:c41fc65bcfb4 | 637 | #endif /* __STM32F0xx_HAL_SPI_H */ |
| mbed_official | 205:c41fc65bcfb4 | 638 | |
| mbed_official | 205:c41fc65bcfb4 | 639 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |