Adam Kucybala
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F072RB/stm32f0xx_hal_dma.c@218:44081b78fdc2, 2014-05-30 (annotated)
- Committer:
- mbed_official
- Date:
- Fri May 30 15:30:09 2014 +0100
- Revision:
- 218:44081b78fdc2
- Parent:
- 205:c41fc65bcfb4
Synchronized with git revision d854859072d318241476ccc5f335965444d4c1d8
Full URL: https://github.com/mbedmicro/mbed/commit/d854859072d318241476ccc5f335965444d4c1d8/
[NUCLEO_F072RB] Update CubeF0 HAL driver
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 205:c41fc65bcfb4 | 1 | /** |
| mbed_official | 205:c41fc65bcfb4 | 2 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 3 | * @file stm32f0xx_hal_dma.c |
| mbed_official | 205:c41fc65bcfb4 | 4 | * @author MCD Application Team |
| mbed_official | 205:c41fc65bcfb4 | 5 | * @version V1.0.0 |
| mbed_official | 218:44081b78fdc2 | 6 | * @date 28-May-2014 |
| mbed_official | 205:c41fc65bcfb4 | 7 | * @brief DMA HAL module driver. |
| mbed_official | 205:c41fc65bcfb4 | 8 | * |
| mbed_official | 205:c41fc65bcfb4 | 9 | * This file provides firmware functions to manage the following |
| mbed_official | 205:c41fc65bcfb4 | 10 | * functionalities of the Direct Memory Access (DMA) peripheral: |
| mbed_official | 205:c41fc65bcfb4 | 11 | * + Initialization and de-initialization functions |
| mbed_official | 205:c41fc65bcfb4 | 12 | * + IO operation functions |
| mbed_official | 205:c41fc65bcfb4 | 13 | * + Peripheral State and errors functions |
| mbed_official | 205:c41fc65bcfb4 | 14 | @verbatim |
| mbed_official | 205:c41fc65bcfb4 | 15 | ============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 16 | ##### How to use this driver ##### |
| mbed_official | 205:c41fc65bcfb4 | 17 | ============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 18 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 19 | (#) Enable and configure the peripheral to be connected to the DMA Channel |
| mbed_official | 205:c41fc65bcfb4 | 20 | (except for internal SRAM / FLASH memories: no initialization is |
| mbed_official | 205:c41fc65bcfb4 | 21 | necessary) please refer to Reference manual for connection between peripherals |
| mbed_official | 205:c41fc65bcfb4 | 22 | and DMA requests . |
| mbed_official | 205:c41fc65bcfb4 | 23 | |
| mbed_official | 205:c41fc65bcfb4 | 24 | (#) For a given Channel, program the required configuration through the following parameters: |
| mbed_official | 205:c41fc65bcfb4 | 25 | Transfer Direction, Source and Destination data formats, |
| mbed_official | 205:c41fc65bcfb4 | 26 | Circular, Normal or peripheral flow control mode, Channel Priority level, |
| mbed_official | 205:c41fc65bcfb4 | 27 | Source and Destination Increment mode, FIFO mode and its Threshold (if needed), |
| mbed_official | 205:c41fc65bcfb4 | 28 | Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function. |
| mbed_official | 205:c41fc65bcfb4 | 29 | |
| mbed_official | 205:c41fc65bcfb4 | 30 | *** Polling mode IO operation *** |
| mbed_official | 205:c41fc65bcfb4 | 31 | ================================= |
| mbed_official | 205:c41fc65bcfb4 | 32 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 33 | (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source |
| mbed_official | 205:c41fc65bcfb4 | 34 | address and destination address and the Length of data to be transferred |
| mbed_official | 205:c41fc65bcfb4 | 35 | (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this |
| mbed_official | 205:c41fc65bcfb4 | 36 | case a fixed Timeout can be configured by User depending from his application. |
| mbed_official | 205:c41fc65bcfb4 | 37 | |
| mbed_official | 205:c41fc65bcfb4 | 38 | *** Interrupt mode IO operation *** |
| mbed_official | 205:c41fc65bcfb4 | 39 | =================================== |
| mbed_official | 205:c41fc65bcfb4 | 40 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 41 | (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() |
| mbed_official | 205:c41fc65bcfb4 | 42 | (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() |
| mbed_official | 205:c41fc65bcfb4 | 43 | (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of |
| mbed_official | 205:c41fc65bcfb4 | 44 | Source address and destination address and the Length of data to be transferred. In this |
| mbed_official | 205:c41fc65bcfb4 | 45 | case the DMA interrupt is configured |
| mbed_official | 205:c41fc65bcfb4 | 46 | (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine |
| mbed_official | 205:c41fc65bcfb4 | 47 | (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can |
| mbed_official | 205:c41fc65bcfb4 | 48 | add his own function by customization of function pointer XferCpltCallback and |
| mbed_official | 205:c41fc65bcfb4 | 49 | XferErrorCallback (i.e a member of DMA handle structure). |
| mbed_official | 205:c41fc65bcfb4 | 50 | |
| mbed_official | 205:c41fc65bcfb4 | 51 | (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error |
| mbed_official | 205:c41fc65bcfb4 | 52 | detection. |
| mbed_official | 205:c41fc65bcfb4 | 53 | |
| mbed_official | 205:c41fc65bcfb4 | 54 | (#) Use HAL_DMA_Abort() function to abort the current transfer |
| mbed_official | 205:c41fc65bcfb4 | 55 | |
| mbed_official | 205:c41fc65bcfb4 | 56 | -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. |
| mbed_official | 205:c41fc65bcfb4 | 57 | |
| mbed_official | 205:c41fc65bcfb4 | 58 | *** DMA HAL driver macros list *** |
| mbed_official | 205:c41fc65bcfb4 | 59 | ============================================= |
| mbed_official | 205:c41fc65bcfb4 | 60 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 61 | Below the list of most used macros in DMA HAL driver. |
| mbed_official | 205:c41fc65bcfb4 | 62 | |
| mbed_official | 205:c41fc65bcfb4 | 63 | (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 64 | (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 65 | (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags. |
| mbed_official | 205:c41fc65bcfb4 | 66 | (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags. |
| mbed_official | 205:c41fc65bcfb4 | 67 | (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts. |
| mbed_official | 205:c41fc65bcfb4 | 68 | (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts. |
| mbed_official | 205:c41fc65bcfb4 | 69 | (+) __HAL_DMA_IT_STATUS: Check whether the specified DMA Channel interrupt has occurred or not. |
| mbed_official | 205:c41fc65bcfb4 | 70 | |
| mbed_official | 205:c41fc65bcfb4 | 71 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 72 | (@) You can refer to the DMA HAL driver header file for more useful macros |
| mbed_official | 205:c41fc65bcfb4 | 73 | |
| mbed_official | 205:c41fc65bcfb4 | 74 | @endverbatim |
| mbed_official | 205:c41fc65bcfb4 | 75 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 76 | * @attention |
| mbed_official | 205:c41fc65bcfb4 | 77 | * |
| mbed_official | 205:c41fc65bcfb4 | 78 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 205:c41fc65bcfb4 | 79 | * |
| mbed_official | 205:c41fc65bcfb4 | 80 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 205:c41fc65bcfb4 | 81 | * are permitted provided that the following conditions are met: |
| mbed_official | 205:c41fc65bcfb4 | 82 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 205:c41fc65bcfb4 | 83 | * this list of conditions and the following disclaimer. |
| mbed_official | 205:c41fc65bcfb4 | 84 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 205:c41fc65bcfb4 | 85 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 205:c41fc65bcfb4 | 86 | * and/or other materials provided with the distribution. |
| mbed_official | 205:c41fc65bcfb4 | 87 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 205:c41fc65bcfb4 | 88 | * may be used to endorse or promote products derived from this software |
| mbed_official | 205:c41fc65bcfb4 | 89 | * without specific prior written permission. |
| mbed_official | 205:c41fc65bcfb4 | 90 | * |
| mbed_official | 205:c41fc65bcfb4 | 91 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 205:c41fc65bcfb4 | 92 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 205:c41fc65bcfb4 | 93 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 205:c41fc65bcfb4 | 94 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 205:c41fc65bcfb4 | 95 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 205:c41fc65bcfb4 | 96 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 205:c41fc65bcfb4 | 97 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 205:c41fc65bcfb4 | 98 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 205:c41fc65bcfb4 | 99 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 205:c41fc65bcfb4 | 100 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 205:c41fc65bcfb4 | 101 | * |
| mbed_official | 205:c41fc65bcfb4 | 102 | ****************************************************************************** |
| mbed_official | 205:c41fc65bcfb4 | 103 | */ |
| mbed_official | 205:c41fc65bcfb4 | 104 | |
| mbed_official | 205:c41fc65bcfb4 | 105 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 106 | #include "stm32f0xx_hal.h" |
| mbed_official | 205:c41fc65bcfb4 | 107 | |
| mbed_official | 205:c41fc65bcfb4 | 108 | /** @addtogroup STM32F0xx_HAL_Driver |
| mbed_official | 205:c41fc65bcfb4 | 109 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 110 | */ |
| mbed_official | 205:c41fc65bcfb4 | 111 | |
| mbed_official | 205:c41fc65bcfb4 | 112 | /** @defgroup DMA |
| mbed_official | 205:c41fc65bcfb4 | 113 | * @brief DMA HAL module driver |
| mbed_official | 205:c41fc65bcfb4 | 114 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 115 | */ |
| mbed_official | 205:c41fc65bcfb4 | 116 | |
| mbed_official | 205:c41fc65bcfb4 | 117 | #ifdef HAL_DMA_MODULE_ENABLED |
| mbed_official | 205:c41fc65bcfb4 | 118 | |
| mbed_official | 205:c41fc65bcfb4 | 119 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 120 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 121 | #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */ |
| mbed_official | 205:c41fc65bcfb4 | 122 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 123 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 124 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 125 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); |
| mbed_official | 205:c41fc65bcfb4 | 126 | |
| mbed_official | 205:c41fc65bcfb4 | 127 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 205:c41fc65bcfb4 | 128 | |
| mbed_official | 205:c41fc65bcfb4 | 129 | /** @defgroup DMA_Private_Functions |
| mbed_official | 205:c41fc65bcfb4 | 130 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 131 | */ |
| mbed_official | 205:c41fc65bcfb4 | 132 | |
| mbed_official | 205:c41fc65bcfb4 | 133 | /** @defgroup DMA_Group1 Initialization and de-initialization functions |
| mbed_official | 205:c41fc65bcfb4 | 134 | * @brief Initialization and de-initialization functions |
| mbed_official | 205:c41fc65bcfb4 | 135 | * |
| mbed_official | 205:c41fc65bcfb4 | 136 | @verbatim |
| mbed_official | 205:c41fc65bcfb4 | 137 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 138 | ##### Initialization and de-initialization functions ##### |
| mbed_official | 205:c41fc65bcfb4 | 139 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 140 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 141 | This section provides functions allowing to initialize the DMA Channel source |
| mbed_official | 205:c41fc65bcfb4 | 142 | and destination addresses, incrementation and data sizes, transfer direction, |
| mbed_official | 205:c41fc65bcfb4 | 143 | circular/normal mode selection, memory-to-memory mode selection and Channel priority value. |
| mbed_official | 205:c41fc65bcfb4 | 144 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 145 | The HAL_DMA_Init() function follows the DMA configuration procedures as described in |
| mbed_official | 205:c41fc65bcfb4 | 146 | reference manual. |
| mbed_official | 205:c41fc65bcfb4 | 147 | |
| mbed_official | 205:c41fc65bcfb4 | 148 | @endverbatim |
| mbed_official | 205:c41fc65bcfb4 | 149 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 150 | */ |
| mbed_official | 205:c41fc65bcfb4 | 151 | |
| mbed_official | 205:c41fc65bcfb4 | 152 | /** |
| mbed_official | 205:c41fc65bcfb4 | 153 | * @brief Initializes the DMA according to the specified |
| mbed_official | 205:c41fc65bcfb4 | 154 | * parameters in the DMA_InitTypeDef and create the associated handle. |
| mbed_official | 205:c41fc65bcfb4 | 155 | * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 156 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 157 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 158 | */ |
| mbed_official | 205:c41fc65bcfb4 | 159 | HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 160 | { |
| mbed_official | 205:c41fc65bcfb4 | 161 | uint32_t tmp = 0; |
| mbed_official | 205:c41fc65bcfb4 | 162 | |
| mbed_official | 205:c41fc65bcfb4 | 163 | /* Check the DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 164 | if(hdma == NULL) |
| mbed_official | 205:c41fc65bcfb4 | 165 | { |
| mbed_official | 205:c41fc65bcfb4 | 166 | return HAL_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 167 | } |
| mbed_official | 205:c41fc65bcfb4 | 168 | |
| mbed_official | 205:c41fc65bcfb4 | 169 | /* Check the parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 170 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); |
| mbed_official | 205:c41fc65bcfb4 | 171 | assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); |
| mbed_official | 205:c41fc65bcfb4 | 172 | assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); |
| mbed_official | 205:c41fc65bcfb4 | 173 | assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); |
| mbed_official | 205:c41fc65bcfb4 | 174 | assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); |
| mbed_official | 205:c41fc65bcfb4 | 175 | assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); |
| mbed_official | 205:c41fc65bcfb4 | 176 | assert_param(IS_DMA_MODE(hdma->Init.Mode)); |
| mbed_official | 205:c41fc65bcfb4 | 177 | assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); |
| mbed_official | 205:c41fc65bcfb4 | 178 | |
| mbed_official | 205:c41fc65bcfb4 | 179 | /* Change DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 180 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 205:c41fc65bcfb4 | 181 | |
| mbed_official | 205:c41fc65bcfb4 | 182 | /* Get the CR register value */ |
| mbed_official | 205:c41fc65bcfb4 | 183 | tmp = hdma->Instance->CCR; |
| mbed_official | 205:c41fc65bcfb4 | 184 | |
| mbed_official | 205:c41fc65bcfb4 | 185 | /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ |
| mbed_official | 205:c41fc65bcfb4 | 186 | tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ |
| mbed_official | 205:c41fc65bcfb4 | 187 | DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ |
| mbed_official | 205:c41fc65bcfb4 | 188 | DMA_CCR_DIR)); |
| mbed_official | 205:c41fc65bcfb4 | 189 | |
| mbed_official | 205:c41fc65bcfb4 | 190 | /* Prepare the DMA Channel configuration */ |
| mbed_official | 205:c41fc65bcfb4 | 191 | tmp |= hdma->Init.Direction | |
| mbed_official | 205:c41fc65bcfb4 | 192 | hdma->Init.PeriphInc | hdma->Init.MemInc | |
| mbed_official | 205:c41fc65bcfb4 | 193 | hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | |
| mbed_official | 205:c41fc65bcfb4 | 194 | hdma->Init.Mode | hdma->Init.Priority; |
| mbed_official | 205:c41fc65bcfb4 | 195 | |
| mbed_official | 205:c41fc65bcfb4 | 196 | /* Write to DMA Channel CR register */ |
| mbed_official | 205:c41fc65bcfb4 | 197 | hdma->Instance->CCR = tmp; |
| mbed_official | 205:c41fc65bcfb4 | 198 | |
| mbed_official | 205:c41fc65bcfb4 | 199 | /* Initialise the error code */ |
| mbed_official | 205:c41fc65bcfb4 | 200 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; |
| mbed_official | 205:c41fc65bcfb4 | 201 | |
| mbed_official | 205:c41fc65bcfb4 | 202 | /* Initialize the DMA state*/ |
| mbed_official | 205:c41fc65bcfb4 | 203 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 205:c41fc65bcfb4 | 204 | |
| mbed_official | 205:c41fc65bcfb4 | 205 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 206 | } |
| mbed_official | 205:c41fc65bcfb4 | 207 | |
| mbed_official | 205:c41fc65bcfb4 | 208 | /** |
| mbed_official | 205:c41fc65bcfb4 | 209 | * @brief DeInitializes the DMA peripheral |
| mbed_official | 205:c41fc65bcfb4 | 210 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 211 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 212 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 213 | */ |
| mbed_official | 205:c41fc65bcfb4 | 214 | HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 215 | { |
| mbed_official | 205:c41fc65bcfb4 | 216 | /* Check the DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 217 | if(hdma == NULL) |
| mbed_official | 205:c41fc65bcfb4 | 218 | { |
| mbed_official | 205:c41fc65bcfb4 | 219 | return HAL_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 220 | } |
| mbed_official | 205:c41fc65bcfb4 | 221 | |
| mbed_official | 218:44081b78fdc2 | 222 | /* Check the parameters */ |
| mbed_official | 218:44081b78fdc2 | 223 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); |
| mbed_official | 218:44081b78fdc2 | 224 | |
| mbed_official | 205:c41fc65bcfb4 | 225 | /* Check the DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 226 | if(hdma->State == HAL_DMA_STATE_BUSY) |
| mbed_official | 205:c41fc65bcfb4 | 227 | { |
| mbed_official | 205:c41fc65bcfb4 | 228 | return HAL_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 229 | } |
| mbed_official | 205:c41fc65bcfb4 | 230 | |
| mbed_official | 205:c41fc65bcfb4 | 231 | /* Disable the selected DMA Channelx */ |
| mbed_official | 205:c41fc65bcfb4 | 232 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 233 | |
| mbed_official | 205:c41fc65bcfb4 | 234 | /* Reset DMA Channel control register */ |
| mbed_official | 205:c41fc65bcfb4 | 235 | hdma->Instance->CCR = 0; |
| mbed_official | 205:c41fc65bcfb4 | 236 | |
| mbed_official | 205:c41fc65bcfb4 | 237 | /* Reset DMA Channel Number of Data to Transfer register */ |
| mbed_official | 205:c41fc65bcfb4 | 238 | hdma->Instance->CNDTR = 0; |
| mbed_official | 205:c41fc65bcfb4 | 239 | |
| mbed_official | 205:c41fc65bcfb4 | 240 | /* Reset DMA Channel peripheral address register */ |
| mbed_official | 205:c41fc65bcfb4 | 241 | hdma->Instance->CPAR = 0; |
| mbed_official | 205:c41fc65bcfb4 | 242 | |
| mbed_official | 205:c41fc65bcfb4 | 243 | /* Reset DMA Channel memory address register */ |
| mbed_official | 205:c41fc65bcfb4 | 244 | hdma->Instance->CMAR = 0; |
| mbed_official | 205:c41fc65bcfb4 | 245 | |
| mbed_official | 205:c41fc65bcfb4 | 246 | /* Clear all flags */ |
| mbed_official | 205:c41fc65bcfb4 | 247 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 248 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 249 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 250 | |
| mbed_official | 205:c41fc65bcfb4 | 251 | /* Initialise the error code */ |
| mbed_official | 205:c41fc65bcfb4 | 252 | hdma->ErrorCode = HAL_DMA_ERROR_NONE; |
| mbed_official | 205:c41fc65bcfb4 | 253 | |
| mbed_official | 205:c41fc65bcfb4 | 254 | /* Initialize the DMA state */ |
| mbed_official | 205:c41fc65bcfb4 | 255 | hdma->State = HAL_DMA_STATE_RESET; |
| mbed_official | 205:c41fc65bcfb4 | 256 | |
| mbed_official | 205:c41fc65bcfb4 | 257 | /* Release Lock */ |
| mbed_official | 205:c41fc65bcfb4 | 258 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 259 | |
| mbed_official | 205:c41fc65bcfb4 | 260 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 261 | } |
| mbed_official | 205:c41fc65bcfb4 | 262 | |
| mbed_official | 205:c41fc65bcfb4 | 263 | /** |
| mbed_official | 205:c41fc65bcfb4 | 264 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 265 | */ |
| mbed_official | 205:c41fc65bcfb4 | 266 | |
| mbed_official | 205:c41fc65bcfb4 | 267 | /** @defgroup DMA_Group2 I/O operation functions |
| mbed_official | 205:c41fc65bcfb4 | 268 | * @brief I/O operation functions |
| mbed_official | 205:c41fc65bcfb4 | 269 | * |
| mbed_official | 205:c41fc65bcfb4 | 270 | @verbatim |
| mbed_official | 205:c41fc65bcfb4 | 271 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 272 | ##### IO operation functions ##### |
| mbed_official | 205:c41fc65bcfb4 | 273 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 274 | [..] This section provides functions allowing to: |
| mbed_official | 205:c41fc65bcfb4 | 275 | (+) Configure the source, destination address and data length and Start DMA transfer |
| mbed_official | 205:c41fc65bcfb4 | 276 | (+) Configure the source, destination address and data length and |
| mbed_official | 205:c41fc65bcfb4 | 277 | Start DMA transfer with interrupt |
| mbed_official | 205:c41fc65bcfb4 | 278 | (+) Abort DMA transfer |
| mbed_official | 205:c41fc65bcfb4 | 279 | (+) Poll for transfer complete |
| mbed_official | 205:c41fc65bcfb4 | 280 | (+) Handle DMA interrupt request |
| mbed_official | 205:c41fc65bcfb4 | 281 | |
| mbed_official | 205:c41fc65bcfb4 | 282 | @endverbatim |
| mbed_official | 205:c41fc65bcfb4 | 283 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 284 | */ |
| mbed_official | 205:c41fc65bcfb4 | 285 | |
| mbed_official | 205:c41fc65bcfb4 | 286 | /** |
| mbed_official | 205:c41fc65bcfb4 | 287 | * @brief Starts the DMA Transfer. |
| mbed_official | 205:c41fc65bcfb4 | 288 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 289 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 290 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 291 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 292 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 205:c41fc65bcfb4 | 293 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 294 | */ |
| mbed_official | 205:c41fc65bcfb4 | 295 | HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 205:c41fc65bcfb4 | 296 | { |
| mbed_official | 205:c41fc65bcfb4 | 297 | /* Process locked */ |
| mbed_official | 205:c41fc65bcfb4 | 298 | __HAL_LOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 299 | |
| mbed_official | 205:c41fc65bcfb4 | 300 | /* Change DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 301 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 205:c41fc65bcfb4 | 302 | |
| mbed_official | 205:c41fc65bcfb4 | 303 | /* Check the parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 304 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
| mbed_official | 205:c41fc65bcfb4 | 305 | |
| mbed_official | 205:c41fc65bcfb4 | 306 | /* Disable the peripheral */ |
| mbed_official | 205:c41fc65bcfb4 | 307 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 308 | |
| mbed_official | 205:c41fc65bcfb4 | 309 | /* Configure the source, destination address and the data length */ |
| mbed_official | 205:c41fc65bcfb4 | 310 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
| mbed_official | 205:c41fc65bcfb4 | 311 | |
| mbed_official | 205:c41fc65bcfb4 | 312 | /* Enable the Peripheral */ |
| mbed_official | 205:c41fc65bcfb4 | 313 | __HAL_DMA_ENABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 314 | |
| mbed_official | 205:c41fc65bcfb4 | 315 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 316 | } |
| mbed_official | 205:c41fc65bcfb4 | 317 | |
| mbed_official | 205:c41fc65bcfb4 | 318 | /** |
| mbed_official | 205:c41fc65bcfb4 | 319 | * @brief Start the DMA Transfer with interrupt enabled. |
| mbed_official | 205:c41fc65bcfb4 | 320 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 321 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 322 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 323 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 324 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 205:c41fc65bcfb4 | 325 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 326 | */ |
| mbed_official | 205:c41fc65bcfb4 | 327 | HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 205:c41fc65bcfb4 | 328 | { |
| mbed_official | 205:c41fc65bcfb4 | 329 | /* Process locked */ |
| mbed_official | 205:c41fc65bcfb4 | 330 | __HAL_LOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 331 | |
| mbed_official | 205:c41fc65bcfb4 | 332 | /* Change DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 333 | hdma->State = HAL_DMA_STATE_BUSY; |
| mbed_official | 205:c41fc65bcfb4 | 334 | |
| mbed_official | 205:c41fc65bcfb4 | 335 | /* Check the parameters */ |
| mbed_official | 205:c41fc65bcfb4 | 336 | assert_param(IS_DMA_BUFFER_SIZE(DataLength)); |
| mbed_official | 205:c41fc65bcfb4 | 337 | |
| mbed_official | 205:c41fc65bcfb4 | 338 | /* Disable the peripheral */ |
| mbed_official | 205:c41fc65bcfb4 | 339 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 340 | |
| mbed_official | 205:c41fc65bcfb4 | 341 | /* Configure the source, destination address and the data length */ |
| mbed_official | 205:c41fc65bcfb4 | 342 | DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); |
| mbed_official | 205:c41fc65bcfb4 | 343 | |
| mbed_official | 205:c41fc65bcfb4 | 344 | /* Enable the transfer complete interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 345 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC); |
| mbed_official | 205:c41fc65bcfb4 | 346 | |
| mbed_official | 205:c41fc65bcfb4 | 347 | /* Enable the Half transfer complete interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 348 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT); |
| mbed_official | 205:c41fc65bcfb4 | 349 | |
| mbed_official | 205:c41fc65bcfb4 | 350 | /* Enable the transfer Error interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 351 | __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE); |
| mbed_official | 205:c41fc65bcfb4 | 352 | |
| mbed_official | 205:c41fc65bcfb4 | 353 | /* Enable the Peripheral */ |
| mbed_official | 205:c41fc65bcfb4 | 354 | __HAL_DMA_ENABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 355 | |
| mbed_official | 205:c41fc65bcfb4 | 356 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 357 | } |
| mbed_official | 205:c41fc65bcfb4 | 358 | |
| mbed_official | 205:c41fc65bcfb4 | 359 | /** |
| mbed_official | 205:c41fc65bcfb4 | 360 | * @brief Aborts the DMA Transfer. |
| mbed_official | 205:c41fc65bcfb4 | 361 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 362 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 363 | * |
| mbed_official | 205:c41fc65bcfb4 | 364 | * @note After disabling a DMA Channel, a check for wait until the DMA Channel is |
| mbed_official | 205:c41fc65bcfb4 | 365 | * effectively disabled is added. If a Channel is disabled |
| mbed_official | 205:c41fc65bcfb4 | 366 | * while a data transfer is ongoing, the current data will be transferred |
| mbed_official | 205:c41fc65bcfb4 | 367 | * and the Channel will be effectively disabled only after the transfer of |
| mbed_official | 205:c41fc65bcfb4 | 368 | * this single data is finished. |
| mbed_official | 205:c41fc65bcfb4 | 369 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 370 | */ |
| mbed_official | 205:c41fc65bcfb4 | 371 | HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 372 | { |
| mbed_official | 205:c41fc65bcfb4 | 373 | uint32_t tickstart = 0x00; |
| mbed_official | 205:c41fc65bcfb4 | 374 | |
| mbed_official | 205:c41fc65bcfb4 | 375 | /* Disable the channel */ |
| mbed_official | 205:c41fc65bcfb4 | 376 | __HAL_DMA_DISABLE(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 377 | |
| mbed_official | 205:c41fc65bcfb4 | 378 | /* Get timeout */ |
| mbed_official | 205:c41fc65bcfb4 | 379 | tickstart = HAL_GetTick(); |
| mbed_official | 205:c41fc65bcfb4 | 380 | |
| mbed_official | 205:c41fc65bcfb4 | 381 | /* Check if the DMA Channel is effectively disabled */ |
| mbed_official | 205:c41fc65bcfb4 | 382 | while((hdma->Instance->CCR & DMA_CCR_EN) != 0) |
| mbed_official | 205:c41fc65bcfb4 | 383 | { |
| mbed_official | 205:c41fc65bcfb4 | 384 | /* Check for the Timeout */ |
| mbed_official | 205:c41fc65bcfb4 | 385 | if((HAL_GetTick() - tickstart) > HAL_TIMEOUT_DMA_ABORT) |
| mbed_official | 205:c41fc65bcfb4 | 386 | { |
| mbed_official | 205:c41fc65bcfb4 | 387 | /* Update error code */ |
| mbed_official | 205:c41fc65bcfb4 | 388 | hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT; |
| mbed_official | 205:c41fc65bcfb4 | 389 | |
| mbed_official | 218:44081b78fdc2 | 390 | /* Change the DMA state */ |
| mbed_official | 218:44081b78fdc2 | 391 | hdma->State = HAL_DMA_STATE_TIMEOUT; |
| mbed_official | 218:44081b78fdc2 | 392 | |
| mbed_official | 205:c41fc65bcfb4 | 393 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 394 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 395 | |
| mbed_official | 205:c41fc65bcfb4 | 396 | return HAL_TIMEOUT; |
| mbed_official | 205:c41fc65bcfb4 | 397 | } |
| mbed_official | 205:c41fc65bcfb4 | 398 | } |
| mbed_official | 218:44081b78fdc2 | 399 | /* Change the DMA state*/ |
| mbed_official | 218:44081b78fdc2 | 400 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 218:44081b78fdc2 | 401 | |
| mbed_official | 205:c41fc65bcfb4 | 402 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 403 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 404 | |
| mbed_official | 205:c41fc65bcfb4 | 405 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 406 | } |
| mbed_official | 205:c41fc65bcfb4 | 407 | |
| mbed_official | 205:c41fc65bcfb4 | 408 | /** |
| mbed_official | 205:c41fc65bcfb4 | 409 | * @brief Polling for transfer complete. |
| mbed_official | 205:c41fc65bcfb4 | 410 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 411 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 412 | * @param CompleteLevel: Specifies the DMA level complete. |
| mbed_official | 205:c41fc65bcfb4 | 413 | * @param Timeout: Timeout duration. |
| mbed_official | 205:c41fc65bcfb4 | 414 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 415 | */ |
| mbed_official | 205:c41fc65bcfb4 | 416 | HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout) |
| mbed_official | 205:c41fc65bcfb4 | 417 | { |
| mbed_official | 205:c41fc65bcfb4 | 418 | uint32_t temp; |
| mbed_official | 205:c41fc65bcfb4 | 419 | uint32_t tickstart = 0x00; |
| mbed_official | 205:c41fc65bcfb4 | 420 | |
| mbed_official | 205:c41fc65bcfb4 | 421 | /* Get the level transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 422 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
| mbed_official | 205:c41fc65bcfb4 | 423 | { |
| mbed_official | 205:c41fc65bcfb4 | 424 | /* Transfer Complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 425 | temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 426 | } |
| mbed_official | 205:c41fc65bcfb4 | 427 | else |
| mbed_official | 205:c41fc65bcfb4 | 428 | { |
| mbed_official | 205:c41fc65bcfb4 | 429 | /* Half Transfer Complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 430 | temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 431 | } |
| mbed_official | 205:c41fc65bcfb4 | 432 | |
| mbed_official | 205:c41fc65bcfb4 | 433 | /* Get timeout */ |
| mbed_official | 205:c41fc65bcfb4 | 434 | tickstart = HAL_GetTick(); |
| mbed_official | 205:c41fc65bcfb4 | 435 | |
| mbed_official | 205:c41fc65bcfb4 | 436 | while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET) |
| mbed_official | 205:c41fc65bcfb4 | 437 | { |
| mbed_official | 205:c41fc65bcfb4 | 438 | if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)) |
| mbed_official | 205:c41fc65bcfb4 | 439 | { |
| mbed_official | 205:c41fc65bcfb4 | 440 | /* Clear the transfer error flags */ |
| mbed_official | 205:c41fc65bcfb4 | 441 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 442 | |
| mbed_official | 205:c41fc65bcfb4 | 443 | /* Change the DMA state */ |
| mbed_official | 205:c41fc65bcfb4 | 444 | hdma->State= HAL_DMA_STATE_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 445 | |
| mbed_official | 205:c41fc65bcfb4 | 446 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 447 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 448 | |
| mbed_official | 205:c41fc65bcfb4 | 449 | return HAL_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 450 | } |
| mbed_official | 205:c41fc65bcfb4 | 451 | /* Check for the Timeout */ |
| mbed_official | 205:c41fc65bcfb4 | 452 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 205:c41fc65bcfb4 | 453 | { |
| mbed_official | 205:c41fc65bcfb4 | 454 | if((HAL_GetTick() - tickstart) > Timeout) |
| mbed_official | 205:c41fc65bcfb4 | 455 | { |
| mbed_official | 205:c41fc65bcfb4 | 456 | /* Update error code */ |
| mbed_official | 205:c41fc65bcfb4 | 457 | hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT; |
| mbed_official | 205:c41fc65bcfb4 | 458 | |
| mbed_official | 218:44081b78fdc2 | 459 | /* Change the DMA state */ |
| mbed_official | 218:44081b78fdc2 | 460 | hdma->State = HAL_DMA_STATE_TIMEOUT; |
| mbed_official | 218:44081b78fdc2 | 461 | |
| mbed_official | 205:c41fc65bcfb4 | 462 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 463 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 464 | |
| mbed_official | 205:c41fc65bcfb4 | 465 | return HAL_TIMEOUT; |
| mbed_official | 205:c41fc65bcfb4 | 466 | } |
| mbed_official | 205:c41fc65bcfb4 | 467 | } |
| mbed_official | 205:c41fc65bcfb4 | 468 | } |
| mbed_official | 205:c41fc65bcfb4 | 469 | /* Clear the half transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 470 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 471 | |
| mbed_official | 205:c41fc65bcfb4 | 472 | /* Change DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 473 | hdma->State = HAL_DMA_STATE_READY_HALF; |
| mbed_official | 205:c41fc65bcfb4 | 474 | |
| mbed_official | 205:c41fc65bcfb4 | 475 | if(CompleteLevel == HAL_DMA_FULL_TRANSFER) |
| mbed_official | 205:c41fc65bcfb4 | 476 | { |
| mbed_official | 205:c41fc65bcfb4 | 477 | /* Clear the transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 478 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 479 | |
| mbed_official | 205:c41fc65bcfb4 | 480 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
| mbed_official | 205:c41fc65bcfb4 | 481 | all transfers are complete) */ |
| mbed_official | 205:c41fc65bcfb4 | 482 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 205:c41fc65bcfb4 | 483 | |
| mbed_official | 205:c41fc65bcfb4 | 484 | /* Process unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 485 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 486 | } |
| mbed_official | 205:c41fc65bcfb4 | 487 | else |
| mbed_official | 205:c41fc65bcfb4 | 488 | { |
| mbed_official | 205:c41fc65bcfb4 | 489 | /* Clear the half transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 490 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 491 | |
| mbed_official | 205:c41fc65bcfb4 | 492 | /* The selected Channelx EN bit is cleared (DMA is disabled and |
| mbed_official | 205:c41fc65bcfb4 | 493 | all transfers are complete) */ |
| mbed_official | 205:c41fc65bcfb4 | 494 | hdma->State = HAL_DMA_STATE_READY_HALF; |
| mbed_official | 205:c41fc65bcfb4 | 495 | } |
| mbed_official | 205:c41fc65bcfb4 | 496 | |
| mbed_official | 205:c41fc65bcfb4 | 497 | return HAL_OK; |
| mbed_official | 205:c41fc65bcfb4 | 498 | } |
| mbed_official | 205:c41fc65bcfb4 | 499 | |
| mbed_official | 205:c41fc65bcfb4 | 500 | /** |
| mbed_official | 205:c41fc65bcfb4 | 501 | * @brief Handles DMA interrupt request. |
| mbed_official | 205:c41fc65bcfb4 | 502 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 503 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 504 | * @retval None |
| mbed_official | 205:c41fc65bcfb4 | 505 | */ |
| mbed_official | 205:c41fc65bcfb4 | 506 | void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 507 | { |
| mbed_official | 205:c41fc65bcfb4 | 508 | /* Transfer Error Interrupt management ***************************************/ |
| mbed_official | 205:c41fc65bcfb4 | 509 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 510 | { |
| mbed_official | 205:c41fc65bcfb4 | 511 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 512 | { |
| mbed_official | 205:c41fc65bcfb4 | 513 | /* Disable the transfer error interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 514 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE); |
| mbed_official | 205:c41fc65bcfb4 | 515 | |
| mbed_official | 205:c41fc65bcfb4 | 516 | /* Clear the transfer error flag */ |
| mbed_official | 205:c41fc65bcfb4 | 517 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 518 | |
| mbed_official | 205:c41fc65bcfb4 | 519 | /* Update error code */ |
| mbed_official | 205:c41fc65bcfb4 | 520 | hdma->ErrorCode |= HAL_DMA_ERROR_TE; |
| mbed_official | 205:c41fc65bcfb4 | 521 | |
| mbed_official | 205:c41fc65bcfb4 | 522 | /* Change the DMA state */ |
| mbed_official | 205:c41fc65bcfb4 | 523 | hdma->State = HAL_DMA_STATE_ERROR; |
| mbed_official | 205:c41fc65bcfb4 | 524 | |
| mbed_official | 205:c41fc65bcfb4 | 525 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 526 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 527 | |
| mbed_official | 205:c41fc65bcfb4 | 528 | if (hdma->XferErrorCallback != NULL) |
| mbed_official | 205:c41fc65bcfb4 | 529 | { |
| mbed_official | 205:c41fc65bcfb4 | 530 | /* Transfer error callback */ |
| mbed_official | 205:c41fc65bcfb4 | 531 | hdma->XferErrorCallback(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 532 | } |
| mbed_official | 205:c41fc65bcfb4 | 533 | } |
| mbed_official | 205:c41fc65bcfb4 | 534 | } |
| mbed_official | 205:c41fc65bcfb4 | 535 | |
| mbed_official | 205:c41fc65bcfb4 | 536 | /* Half Transfer Complete Interrupt management ******************************/ |
| mbed_official | 205:c41fc65bcfb4 | 537 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 538 | { |
| mbed_official | 205:c41fc65bcfb4 | 539 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 540 | { |
| mbed_official | 205:c41fc65bcfb4 | 541 | /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ |
| mbed_official | 205:c41fc65bcfb4 | 542 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
| mbed_official | 205:c41fc65bcfb4 | 543 | { |
| mbed_official | 205:c41fc65bcfb4 | 544 | /* Disable the half transfer interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 545 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); |
| mbed_official | 205:c41fc65bcfb4 | 546 | } |
| mbed_official | 205:c41fc65bcfb4 | 547 | /* Clear the half transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 548 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 549 | |
| mbed_official | 205:c41fc65bcfb4 | 550 | /* Change DMA peripheral state */ |
| mbed_official | 205:c41fc65bcfb4 | 551 | hdma->State = HAL_DMA_STATE_READY_HALF; |
| mbed_official | 205:c41fc65bcfb4 | 552 | |
| mbed_official | 205:c41fc65bcfb4 | 553 | if(hdma->XferHalfCpltCallback != NULL) |
| mbed_official | 205:c41fc65bcfb4 | 554 | { |
| mbed_official | 205:c41fc65bcfb4 | 555 | /* Half transfer callback */ |
| mbed_official | 205:c41fc65bcfb4 | 556 | hdma->XferHalfCpltCallback(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 557 | } |
| mbed_official | 205:c41fc65bcfb4 | 558 | } |
| mbed_official | 205:c41fc65bcfb4 | 559 | } |
| mbed_official | 205:c41fc65bcfb4 | 560 | |
| mbed_official | 205:c41fc65bcfb4 | 561 | /* Transfer Complete Interrupt management ***********************************/ |
| mbed_official | 205:c41fc65bcfb4 | 562 | if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 563 | { |
| mbed_official | 205:c41fc65bcfb4 | 564 | if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) |
| mbed_official | 205:c41fc65bcfb4 | 565 | { |
| mbed_official | 205:c41fc65bcfb4 | 566 | if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) |
| mbed_official | 205:c41fc65bcfb4 | 567 | { |
| mbed_official | 205:c41fc65bcfb4 | 568 | /* Disable the transfer complete interrupt */ |
| mbed_official | 205:c41fc65bcfb4 | 569 | __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC); |
| mbed_official | 205:c41fc65bcfb4 | 570 | } |
| mbed_official | 205:c41fc65bcfb4 | 571 | /* Clear the transfer complete flag */ |
| mbed_official | 205:c41fc65bcfb4 | 572 | __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); |
| mbed_official | 205:c41fc65bcfb4 | 573 | |
| mbed_official | 205:c41fc65bcfb4 | 574 | /* Update error code */ |
| mbed_official | 205:c41fc65bcfb4 | 575 | hdma->ErrorCode |= HAL_DMA_ERROR_NONE; |
| mbed_official | 205:c41fc65bcfb4 | 576 | |
| mbed_official | 205:c41fc65bcfb4 | 577 | /* Change the DMA state */ |
| mbed_official | 205:c41fc65bcfb4 | 578 | hdma->State = HAL_DMA_STATE_READY; |
| mbed_official | 205:c41fc65bcfb4 | 579 | |
| mbed_official | 205:c41fc65bcfb4 | 580 | /* Process Unlocked */ |
| mbed_official | 205:c41fc65bcfb4 | 581 | __HAL_UNLOCK(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 582 | |
| mbed_official | 205:c41fc65bcfb4 | 583 | if(hdma->XferCpltCallback != NULL) |
| mbed_official | 205:c41fc65bcfb4 | 584 | { |
| mbed_official | 205:c41fc65bcfb4 | 585 | /* Transfer complete callback */ |
| mbed_official | 205:c41fc65bcfb4 | 586 | hdma->XferCpltCallback(hdma); |
| mbed_official | 205:c41fc65bcfb4 | 587 | } |
| mbed_official | 205:c41fc65bcfb4 | 588 | } |
| mbed_official | 205:c41fc65bcfb4 | 589 | } |
| mbed_official | 205:c41fc65bcfb4 | 590 | } |
| mbed_official | 205:c41fc65bcfb4 | 591 | |
| mbed_official | 205:c41fc65bcfb4 | 592 | /** |
| mbed_official | 205:c41fc65bcfb4 | 593 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 594 | */ |
| mbed_official | 205:c41fc65bcfb4 | 595 | |
| mbed_official | 205:c41fc65bcfb4 | 596 | /** @defgroup DMA_Group3 Peripheral State functions |
| mbed_official | 205:c41fc65bcfb4 | 597 | * @brief Peripheral State functions |
| mbed_official | 205:c41fc65bcfb4 | 598 | * |
| mbed_official | 205:c41fc65bcfb4 | 599 | @verbatim |
| mbed_official | 205:c41fc65bcfb4 | 600 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 601 | ##### State and Errors functions ##### |
| mbed_official | 205:c41fc65bcfb4 | 602 | =============================================================================== |
| mbed_official | 205:c41fc65bcfb4 | 603 | [..] |
| mbed_official | 205:c41fc65bcfb4 | 604 | This subsection provides functions allowing to |
| mbed_official | 205:c41fc65bcfb4 | 605 | (+) Check the DMA state |
| mbed_official | 205:c41fc65bcfb4 | 606 | (+) Get error code |
| mbed_official | 205:c41fc65bcfb4 | 607 | |
| mbed_official | 205:c41fc65bcfb4 | 608 | @endverbatim |
| mbed_official | 205:c41fc65bcfb4 | 609 | * @{ |
| mbed_official | 205:c41fc65bcfb4 | 610 | */ |
| mbed_official | 205:c41fc65bcfb4 | 611 | |
| mbed_official | 205:c41fc65bcfb4 | 612 | /** |
| mbed_official | 205:c41fc65bcfb4 | 613 | * @brief Returns the DMA state. |
| mbed_official | 205:c41fc65bcfb4 | 614 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 615 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 616 | * @retval HAL state |
| mbed_official | 205:c41fc65bcfb4 | 617 | */ |
| mbed_official | 205:c41fc65bcfb4 | 618 | HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 619 | { |
| mbed_official | 205:c41fc65bcfb4 | 620 | return hdma->State; |
| mbed_official | 205:c41fc65bcfb4 | 621 | } |
| mbed_official | 205:c41fc65bcfb4 | 622 | |
| mbed_official | 205:c41fc65bcfb4 | 623 | /** |
| mbed_official | 205:c41fc65bcfb4 | 624 | * @brief Return the DMA error code |
| mbed_official | 205:c41fc65bcfb4 | 625 | * @param hdma : pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 626 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 627 | * @retval DMA Error Code |
| mbed_official | 205:c41fc65bcfb4 | 628 | */ |
| mbed_official | 205:c41fc65bcfb4 | 629 | uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) |
| mbed_official | 205:c41fc65bcfb4 | 630 | { |
| mbed_official | 205:c41fc65bcfb4 | 631 | return hdma->ErrorCode; |
| mbed_official | 205:c41fc65bcfb4 | 632 | } |
| mbed_official | 205:c41fc65bcfb4 | 633 | |
| mbed_official | 205:c41fc65bcfb4 | 634 | /** |
| mbed_official | 205:c41fc65bcfb4 | 635 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 636 | */ |
| mbed_official | 205:c41fc65bcfb4 | 637 | |
| mbed_official | 205:c41fc65bcfb4 | 638 | /** |
| mbed_official | 205:c41fc65bcfb4 | 639 | * @brief Sets the DMA Transfer parameter. |
| mbed_official | 205:c41fc65bcfb4 | 640 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 205:c41fc65bcfb4 | 641 | * the configuration information for the specified DMA Channel. |
| mbed_official | 205:c41fc65bcfb4 | 642 | * @param SrcAddress: The source memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 643 | * @param DstAddress: The destination memory Buffer address |
| mbed_official | 205:c41fc65bcfb4 | 644 | * @param DataLength: The length of data to be transferred from source to destination |
| mbed_official | 205:c41fc65bcfb4 | 645 | * @retval HAL status |
| mbed_official | 205:c41fc65bcfb4 | 646 | */ |
| mbed_official | 205:c41fc65bcfb4 | 647 | static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) |
| mbed_official | 205:c41fc65bcfb4 | 648 | { |
| mbed_official | 205:c41fc65bcfb4 | 649 | /* Configure DMA Channel data length */ |
| mbed_official | 205:c41fc65bcfb4 | 650 | hdma->Instance->CNDTR = DataLength; |
| mbed_official | 205:c41fc65bcfb4 | 651 | |
| mbed_official | 205:c41fc65bcfb4 | 652 | /* Peripheral to Memory */ |
| mbed_official | 205:c41fc65bcfb4 | 653 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) |
| mbed_official | 205:c41fc65bcfb4 | 654 | { |
| mbed_official | 205:c41fc65bcfb4 | 655 | /* Configure DMA Channel destination address */ |
| mbed_official | 205:c41fc65bcfb4 | 656 | hdma->Instance->CPAR = DstAddress; |
| mbed_official | 205:c41fc65bcfb4 | 657 | |
| mbed_official | 205:c41fc65bcfb4 | 658 | /* Configure DMA Channel source address */ |
| mbed_official | 205:c41fc65bcfb4 | 659 | hdma->Instance->CMAR = SrcAddress; |
| mbed_official | 205:c41fc65bcfb4 | 660 | } |
| mbed_official | 205:c41fc65bcfb4 | 661 | /* Memory to Peripheral */ |
| mbed_official | 205:c41fc65bcfb4 | 662 | else |
| mbed_official | 205:c41fc65bcfb4 | 663 | { |
| mbed_official | 205:c41fc65bcfb4 | 664 | /* Configure DMA Channel source address */ |
| mbed_official | 205:c41fc65bcfb4 | 665 | hdma->Instance->CPAR = SrcAddress; |
| mbed_official | 205:c41fc65bcfb4 | 666 | |
| mbed_official | 205:c41fc65bcfb4 | 667 | /* Configure DMA Channel destination address */ |
| mbed_official | 205:c41fc65bcfb4 | 668 | hdma->Instance->CMAR = DstAddress; |
| mbed_official | 205:c41fc65bcfb4 | 669 | } |
| mbed_official | 205:c41fc65bcfb4 | 670 | } |
| mbed_official | 205:c41fc65bcfb4 | 671 | |
| mbed_official | 205:c41fc65bcfb4 | 672 | /** |
| mbed_official | 205:c41fc65bcfb4 | 673 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 674 | */ |
| mbed_official | 205:c41fc65bcfb4 | 675 | |
| mbed_official | 205:c41fc65bcfb4 | 676 | #endif /* HAL_DMA_MODULE_ENABLED */ |
| mbed_official | 205:c41fc65bcfb4 | 677 | /** |
| mbed_official | 205:c41fc65bcfb4 | 678 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 679 | */ |
| mbed_official | 205:c41fc65bcfb4 | 680 | |
| mbed_official | 205:c41fc65bcfb4 | 681 | /** |
| mbed_official | 205:c41fc65bcfb4 | 682 | * @} |
| mbed_official | 205:c41fc65bcfb4 | 683 | */ |
| mbed_official | 205:c41fc65bcfb4 | 684 | |
| mbed_official | 205:c41fc65bcfb4 | 685 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |